[LLVMdev] Signed NaNs in APFloat arithmetic

[Sanjay Patel]

FYI, I was looking at the SSE/AVX codegen here:
http://llvm.org/bugs/show_bug.cgi?id=20578

If LLVM starts caring about FP exceptions, even this won't be possible. Is
there a way of doing an IEEE-754 fneg in C/C++? Ie, there's no fneg() in
libm, so any C method we choose could cause an exception, and that's not
allowed by the IEEE definition of fneg.


On Fri, Aug 8, 2014 at 12:29 PM, Stephen Canon <scanon at apple.com> wrote:

>
> > On Aug 8, 2014, at 11:22 AM, David Jones <djones at xtreme-eda.com> wrote:
> >
> > A quick survey from my various manuals:
> > - m68k has negate and absolute value instructions.
> > - so does x87
> > - so does PA-RISC
> > - but SPARC does not.
> > - and neither does x86 SSE (although bit fiddling might be real cheap
> here)
>
> [V]AND[SS|SD|PS|PD] / [V]ANDN[SS|SD|PS|PD] / [V]OR[SS|SD|PS|PD] is by far
> the preferred idiom to perform these operations on SSE/AVX.
>
> – Steve
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