[LLVMdev] Multimedia IO instructions & partial backend implementations for simple CPUs

[Rob Stewart]

Hi, I'm getting started with LLVM, with the intention of writing a DSL
that compiles to LLVM IR, to target a new CPU instruction set. I have
two questions:

1. Multimedia IO in LLVM

In the paper "The LLVM Instruction Set and Compilation Strategy" [1],
there is talk about a possible multimedia instruction set in a future
LLVM release:

"Note that LLVM is a virtual instruction set: it does not define
runtime and operating system functions such as I/O, memory management
(in particular, garbage collection), signals, and many others. Some
issues that do belong in the instruction set and may be added in the
future include support for multimedia instructions (e.g., packed
operations),
predicated instructions, and explicit parallelism."

My question is a very basic one: how do I use LLVM IR code to do file
IO? As a simple example, take a file with 3 tab-separated integers.
How would I read this file in to an LLVM vector <3 x i32> ? Now take a
more complicated example: decoding a file to an LLVM vector
representation. To use the multimedia instruction set described above
(though I guess not implemented yet), how do I: A) read a greyscale
3x3 pixel image file, B) translate this to an LLVM vector <9 x i8> ?


2. Implementing an LLVM backend subset.

I have not yet delved deeply in to the requirements of implementing
LLVM backends to target new hardware instruction sets. Given a
constrained hardware implementation, is it acceptable to implement a
backend subset, and throwing "Not Supported" exceptions where ever
appropriate. To give a concrete example, take a simple CPU
architecture that does not support floating point arithmetic, but does
support simple integer arithmetic. If my LLVM frontend produces only
i32 values, then `llc -march=my_new_arch` doesn't complain. If,
however, my frontend produces float values, then `llc
-marc=my_new_arch` would complain with the "Type 'float' Not Supported
by architecture my_new_arch".

Is this the philosophy of LLVM backend implementation? Must the new
target architecture support all LLVM instructions, or am I able to
develop an LLVM backend for an architecture that lacks features like
floating point arithmetic? Any related resources would be appreciated.

[1] - http://goo.gl/HA5AXU

--
Rob