[LLVMdev] Missing optimization - constant parameter

[Rafael Espíndola]

I reported http://llvm.org/pr17784 to make sure we track this.

On 10 October 2013 12:16, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
>
> On Oct 10, 2013, at 7:59 AM, Maurice Marks <maurice.marks at gmail.com> wrote:
>
>> I went back to this problem after looking at some other things. Turning on debugging I noticed that the register coalescer is trying to do the "right thing" and merge vreg0 (the previous load of the constant) with the first parameter of the call (%rdi), which is exactly what gcc does in this case - eliminating a second constant load, but its refusing to do the merge:
>>
>> Here's the debug output for that part of the compilation:
>>
>> ********** SIMPLE REGISTER COALESCING **********
>> ********** Function: caller
>> ********** JOINING INTERVALS ***********
>> entry:
>> 64B     %RDI<def> = COPY %vreg0; GR64:%vreg0
>>         Considering merging %vreg0 with %RDI
>>         Can only merge into reserved registers.
>> Remat: %RDI<def> = MOV64ri 12345123400
>> Shrink: [32r,64r:0)  0 at 32r
>> Shrunk: [32r,48r:0)  0 at 32r
>> Trying to inflate 0 regs.
>> ********** INTERVALS **********
>> %vreg0 = [32r,48r:0)  0 at 32r
>> RegMasks: 80r
>>
>> Jakob, what does "can only merge into reserved registers" mean in this instance. I don't see any reason for it not to do the merge.
>
> The coalescer won’t merge virtual and allocatable physical registers because that will extend the live range of the physical registers, constraining register allocation.
>
> Instead, the register allocator will attempt to choose %rdi for%vreg0 so the copy can be eliminated after register allocation.
>
> /jakob
>