[LLVMdev] "This is not a register operand" assertion during code generation with the MCJIT engine for arm

[Jonas Zaddach]

Thanks, in fact I forgot to include the MCJIT.h header :(



On Fri, May 17, 2013 at 4:05 PM, Rafael Espíndola <
rafael.espindola at gmail.com> wrote:

> Note that you are *not* using MCJIT. The backtrace shows
> lib/Target/ARM/ARMCodeEmitter.cpp, with is part of the old JIT.
>
>
> On 15 May 2013 08:24, Jonas Zaddach <zaddach at eurecom.fr> wrote:
> > Hi,
> >
> > I have a small example program that is supposed to generate
> cross-compiled
> > JIT code with the MCJIT execution engine on an x86 host. The code works
> fine
> > if I choose x86 as target platform, but if I choose ARM, I hit an
> assertion
> > in include/llvm/CodeGen/MachineOperand.h:260 (This is not a register
> > operand).
> >
> > I am not sure if an older post regarding this assertion are relevant to
> my
> > problem
> > (http://lists.cs.uiuc.edu/pipermail/llvmbugs/2011-February/016779.html),
> but
> > I still have this issue in the current SVN version.
> >
> > I would be very happy if you can offer me some assistance.
> >
> > Jonas
> >
> > P.s: Code is attached.
> >
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> >
>
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