[LLVMdev] Vector type LOAD/STORE with post-increment.

[Hal Finkel]

----- Original Message -----
> 
> 
> I am trying to implement vector type load/store with post-increment
> for an out of tree backend.
> I see that that ARM NEON support such load/store so I am using ARM
> NEON as an example of what to do.
> 
> 
> The problem is I can't get any C or C++ code example to actually
> generate vector load/store with post increment.
> 
> 
> I am talking about something like this:
> vldr d16, [sp, #8]
> 
> 
> 
> Does anybody know any C/C++ code example that will generate such code
> (especially loop)? Is this supported by the auto-vectorizer?

To add slightly to Renato's answer...

Auto-vectorization, which is an IR-level pass, happens well before Pre/Post-increment formation (which happens during DAGCombine). Whether or not vector loads/stores are eligible for post-increment formation will depend on calling setIndexedLoadAction(ISD::POST_INC, ...) and how you've implemented <Target>TargetLowering::getPreIndexedAddressParts.

 -Hal

> 
> 
> Thanks.
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> 

-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory