[LLVMdev] pattern matching order

Reed Kotler rkotler at mips.com
Fri Feb 8 09:38:03 PST 2013


It seems that patterns are matched in the order that they appear in the 
td file.

Is this something we can rely on?

def: ArithLogicI16_pat<add, immSExt8, AddiuRxRxImm16>;
def: ArithLogicI16_pat<add, immSExt16, AddiuRxRxImmX16>;

the immSExt8 will only match a 8 bit signed value.

I want it to try the first pattern and then the second, if it fails.

  AddiuRxRxImm16 --- 16 bit instruction
  AddiuRxRxXImm16 -- 32 bit instruction



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