[LLVMdev] How to eliminate duplicated load/store IR in LLVM?

[Criswell, John T]

Depending on the situation, you either want to use mem2reg or GVN.

Sent from my iPhone

On Aug 13, 2013, at 1:02 AM, "Li Bin" <richardustc at gmail.com<mailto:richardustc at gmail.com>> wrote:

Hi,
    We are writing a binary translator with LLVM. There are a lot of duplicated load/store IR instruction generated by our binary translator.
    Is there any kind of optimization pass which can eliminate those duplicated load/store instruction? We know that this kind of optimization can be harmful under some circumstances such as multi-threading, but it's safe in our model.



Bin LI,
State Key Laboratory of Computer Architecture,
Institute of Computing Technology of Chinese Academy of Sciences,
Address: NO.6 Kexueyuan South Road, Haidian District, Beijing, China
email: richardustc at gmail.com<mailto:richardustc at gmail.com>
_______________________________________________
LLVM Developers mailing list
LLVMdev at cs.uiuc.edu<mailto:LLVMdev at cs.uiuc.edu>         http://llvm.cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130813/f816eca0/attachment.html>