[LLVMdev] Redundant Add Operation in Code Generation?

[Ryan Taylor]

That solves the issue but it seems odd to me that instcombine doesn't take
care of it?

So is this just a setup for the backend? If not, seems like if there is a
possibility that lsr could create these redundant operations, should it not
clean itself up? Or am I mistaken?

On Fri, Oct 19, 2012 at 1:29 PM, Andrew Trick <atrick at apple.com> wrote:

>
> On Oct 17, 2012, at 1:22 PM, Ryan Taylor <ryta1203 at gmail.com> wrote:
>
> I'm curious why I am seeing this:
>
>   *%uglygep18.sum = add i32 %lsr_iv8, %tmp45*
>   %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
>   %scevgep1920 = bitcast i8* %scevgep19 to i16*
>   %tmp78 = load i16* %scevgep1920, align 2
>  * %uglygep14.sum = add i32 %lsr_iv8, %tmp45*
>   %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
>   %scevgep1516 = bitcast i8* %scevgep15 to i16*
>   %tmp79 = load i16* %scevgep1516, align 2
>   %conv93.i.i = sext i16 %tmp79 to i32
>   *%uglygep.sum = add i32 %lsr_iv8, %tmp45*
>   %scevgep11 = getelementptr i8* %sysBits_010, i32 %uglygep_sum
>
> You can see here that "add i32 %lsr_iv8, %tmp45" is done multiple times,
> appearing that there are two redundant add operations that are not needed
> yet are generated?
>
>
> That's LSR, as you can see from the variable names ;) It might think that
> load(Base + Index) is a legal addressing mode for your target. -disable-lsr
> might be the right thing for you anyway.
>
> Incidentally, MachineCSE could clean this up if it doesn't get folded into
> the address, but like LSR, it tries hard not to increase register pressure.
>
> -Andy
>
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