[LLVMdev] Request for merge: GHC/ARM calling convention.

[Renato Golin]

Hi Karel,

I understand this patch has already been merged (to 3.0), so don't
take my question as stopping the merge to head, I'm just making sure I
got it right... The rest looks correct.

+  CCIfType<[v2f64], CCAssignToReg<[Q4, Q5]>>,
+  CCIfType<[f64], CCAssignToReg<[D8, D9, D10, D11]>>,
+  CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,

Does this mean that for floating point support in GHC, you need VFP registers?

I don't know much how tablegen would work in this case, but I'd expect
it to break during codegen (with a horrid error message) if you try to
compile that to an ARMv4-ish core.

Maybe you need a warning/error during codegen (if GHC &&  !hasVFP ->
error) to make it clear to the user. I think it's ok to assume ARMv5+
for Haskell code... ;)

cheers,
--renato