[LLVMdev] Back-end: how to test all lowering condition

[Tom Stellard]

On Wed, Jun 20, 2012 at 03:21:42PM +0000, Christian Nastasi wrote:
> Dear Tom,
> thank you for your reply. What you suggest is something I was considering doing, however there still no solution to my Problem2. How do I test the ISD  instructions if I can only write IR instructions?
>

I don't think there is really an easy way to do this.  Other than
ISD Opcodes that map one-to-one to LLVM IR instructions, most (maybe all
I'm not sure) of the code that does the lowering to ISD nodes is located
in lib/CodeGen/SelectionDAG.  If you want to figure out how to write
llvm IR to generate a specific ISDOpcode, I would recommend looking for
that opcode in lib/CodeGen/SelectionDAG (DAGCombiner.cpp is the best
place to start) to see what instruction sequence is generating the
ISD node you are looking for.

-Tom

> -----Original Message-----
> From: Tom Stellard [mailto:thomas.stellard at amd.com]
> Sent: Wednesday, June 20, 2012 4:14 PM
> To: Christian Nastasi
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Back-end: how to test all lowering condition
> 
> On Wed, Jun 20, 2012 at 01:50:51PM +0000, Christian Nastasi wrote:
> > Dear All,
> > I am working on a back-end implementation for a new architecture which is provided with its own assembler.
> > I am currently capable of writing most of the lowering process to generate a decent assembly code.
> > Under certain circumstances, i.e. depending on the C code, some IR instructions generate a Selection DAG for which I am not implementing a proper lowering, thus resulting in the well-known "cannot select" error.
> > I guess this is because I have not implemented all possible instructions defined in the Selection DAG, those declared in include/llvm/CodeGen/ISDOpcodes.h, which apparently are different from those declared in the IR.
> >
> > Problem1: how can I know the complete list of ISD:: instruction (SelectionDAG) I have to implement (either by promoting, customizing and expanding)?
> > A possible solution is to implement all of them, taking the list defined in the file mentioned above or taking the list from an already existing target (e.g. MSP430 Mips).
> >
> 
> The complete list of ISD opcodes is located in include/llvm/CodeGen/ISDOpcodes.h, as far as I know you need to handle all of them, however some of these are handled for you in the TargetLowering constructor in lib/CodeGen/SelectionDAG/TargetLowering.cpp.
> 
> -Tom
> > Problem2: even if I implement the complete list, how can I test it? I cannot write a .ll file containing directly the ISD:: instruction, but rather IR one that causes the former to appear in the SelectionDAG. In such case, what is the relationship between IR instructions and ISD:: ones?
> >
> > Note to problem2: test/CodeGen/MSP430/setcc.ll is an example of test the uses the IR instruction "icmp" to generate the "setcc" SelectionDAG instruction.
> >
> > Thank you all in advance for any suggestion you may give.
> > Cheers,
> > Christian.
> >
> >
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