[LLVMdev] Vector promotion broken for <2 x [i8|i16]>

[dag at cray.com]

"Villmow, Micah" <Micah.Villmow at amd.com> writes:

> The comments in the code state it should do bitcast, op, then bitcast,
> not extend, op and truncate.
>
> "SDValue VectorLegalizer::PromoteVectorOp(SDValue Op) {
>   // Vector "promotion" is basically just bitcasting and doing the operation
>   // in a different type.  For example, x86 promotes ISD::AND on v2i32 to
>   // v1i64."
>
> So following the same logic <4 x i8> bitcasts into a <1 x i32> and
> then does the ISD::AND and then bitcasts back to <1 x i32>.

Ok, I thought we were talking about type promotion during legalization.
Nadav explained it well too.

These names are really confusing.  :(  I would find it helpful to have
different names for bitcasting vs. true promotion as legalize defines
it.  Maybe "coercion" for the bitcast meaning?

                             -Dave