[LLVMdev] Vector promotion broken for <2 x [i8|i16]>

[Villmow, Micah]

The comments in the code state it should do bitcast, op, then bitcast, not extend, op and truncate.

"SDValue VectorLegalizer::PromoteVectorOp(SDValue Op) {
  // Vector "promotion" is basically just bitcasting and doing the operation
  // in a different type.  For example, x86 promotes ISD::AND on v2i32 to
  // v1i64."

So following the same logic <4 x i8> bitcasts into a <1 x i32> and then does the ISD::AND and then bitcasts back to <1 x i32>.


Micah

> -----Original Message-----
> From: dag at cray.com [mailto:dag at cray.com]
> Sent: Monday, July 30, 2012 1:15 PM
> To: Villmow, Micah
> Cc: Rotem, Nadav; Developers Mailing List
> Subject: Re: [LLVMdev] Vector promotion broken for <2 x [i8|i16]>
> 
> "Villmow, Micah" <Micah.Villmow at amd.com> writes:
> 
> > Sorry, <4 x i8> should convert to a <1 x i32>.
> 
> Why?  I'm really confused.
> 
> Shouldn't this converts to a <4 x i32>?
> 
>                                -Dave