[LLVMdev] Possible fix for Bug 1388 - CPY instruction emitted on < ARMv6T

[Gordon Keiser]

Hi,

I've been thinking about ways to get around this in the short term for some time,
http://llvm.org/bugs/show_bug.cgi?id=1388

An end-user workaround is possibly to use at least one register > r7 for the MOV form of the instruction.
In that case, what is listed in the bug as the CPY instruction (which is the ARMv6 version generated if both Rd and Rm are <= r7) will
become a valid MOV instruction all the way down to ARMv4T.

Even if flags aren't modeled correctly on ARM yet,  it seems like this instruction could be forced to a high register safely,
but unfortunately I don't understand the target code enough yet to implement this.

The other (ugly and slow) option might be to encode the low-register versions with a PUSH Rm / POP Rd pair when
on ARMv5 or less.

Any thoughts?

-Gordon Keiser
Software Development Engineer
Arxan Technologies, Inc.
1305 Cumberland Ave, Ste 215
West Lafayette, IN
47906


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