[LLVMdev] Passing return values on the stack & storing arbitrary sized integers

[Anton Korobeynikov]

Fabian,

> here are the definitions of these register classes:
>
> // Data register class
> def DR : RegisterClass<"TriCore", [i32], 32,
>                        (add D0, D1, D2,  D3,  D4,  D5,  D6,  D7,
>                             D8, D9, D10, D11, D12, D13, D14, D15)>;
>
> // Extended-size data register class
> def ER : RegisterClass<"TriCore", [i64], 32,
>                        (add E0, E2, E4, E6, E8, E10, E12, E14)> {
>   let SubRegClasses = [(DR sub_even, sub_odd)];
> }
>
> And the DX and EX registers are defined this way:
The regclasses look fine... So, you need to figure out why
getRepRegClassFor() returns NULL in this case.
Side note: you can autogenerate register names :)

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University