[LLVMdev] TableGen syntax for matching a constant load

Sat Feb 26 14:04:54 PST 2011

On Feb 26, 2011, at 1:36 PM, Joerg Sonnenberger wrote:

> On Sat, Feb 26, 2011 at 01:07:39PM -0800, Jakob Stoklund Olesen wrote:
>> 
>> You may want to consider using xorl+decl instead. It is also three
>> bytes, and there are no false dependencies. The xor idiom is recognized
>> by processors as old as Pentium 4 as having no dependencies.
> 
> Any examples of how to create more than one instructions for a given
> pattern? There are some other cases I could use this for.

def : Pat<(i32 -1), (DEC32r (MOV32r0))>;

/jakob

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