[LLVMdev] TableGen syntax for matching a constant load

[Joerg Sonnenberger]

Hi all,
I'm trying to add a X86 pattern to turn
	movl $-1, %eax
into
	orl $-1, $eax
I can't find a way to express this in TableGen syntax though.

def : Pat<(set GR32:$src, (i32 -1)), (OR32ri8 GR32:$src, -1)>;

results in an assertion about 'Unknown Node'.

Joerg