[LLVMdev] Lowering "memcpy" intrinsic function on ARM using LDMIA/STMIA

[Jason Kim]

On Wed, Feb 9, 2011 at 5:02 AM, Vasiliy Korchagin
<vasiliy.korchagin at gmail.com> wrote:
> Hi,
>
> llvm emits code for "memcpy" on ARM as consecutive ldr/str commands, and

Hmm, this happens elsewhere as well (x86?). Perhaps what we need is a
switch to disable memset/memcpy lowering?

> further combines them into ldm/stm with special pass after register
> allocation. But ldm/stm commands require registers to go in ascending order,
> what is often not so after regalloc, therefore some str/ldr commands. For
> example such code:
>
> struct Foo {int a, b, c, d; }
> void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }
>
> compiled to:
>
> ldmia    r1, {r2, r3, r12}
> ldr    r1, [r1, #12]
> stmia    r0, {r2, r3, r12}
> str    r1, [r0, #12]
> bx    lr
>
> I ran different tests and always regalloc allocates at least one register
> not in ascending order.
>
> What is your ideas to overcome this issue? Maybe llvm should emit code for
> "memcpy" straight into ldm/stm or exchange registers before combining
> ldr/str to make them go in ascending order or fix somehow register
> allocator?
>
> Best regards, Vasiliy.
>
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