[LLVMdev] [LLVM, llc] TypeLegalization, DAGCombining, vectors loading

[Stepan Dyatkovskiy]

Probably, I misunderstood MemoryVT purpose? Should it be a type that 
equal to original vector type (e.g. v2i5). Or it is a type of memory 
area for this vector (e.g. v2i8) ?

-Stepan.

Stepan Dyatkovskiy wrote:
> Hi all. The question about 'load' instruction.
> When we promote
> v2i5 = load<addr>  ;<MemoryVT = v2i5>
> to
> v2i64 = load<addr>  ;<MemoryVT = v2i5>
>
> should we insert vector shuffling that moves second v2i5 item to the
> second v2i64 item?
>
> Or it is still depends from target?
>
> Thanks.
>
> -Stepan.
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