[LLVMdev] Disable the Module Verifier pass?

[Zheng Wang]

Hello,

Is there anyway to disable the module verifier pass (in llvm-ld and llc)?

I got an error as " Instruction does not dominate all uses!".
Obviously, there must be something wrong. The module verifier simply
aborts `llvm-ld` instead of generating bytecode. If somehow I can
disable the module verifier, then I can use llc to produce LLVM
assembly code for my program. This will help me to debug my pass.

Cheers
Zheng