[LLVMdev] Puzzled by "set" in target description file

[Bill Wendling]

On Nov 24, 2009, at 10:33 PM, Heyu Zhu wrote:

> Hello everyone,
>  
> I  try to write target description by reference to existing backends.
>  
> Target description declares an instruction as below:
> 
> def MOVi2pieces : AI1x2<(outs GPR:$dst), (ins so_imm2part:$src), Pseudo,
>                          "mov", " $dst, $src",
>                          [(set GPR:$dst, so_imm2part:$src)]>;
>  
> I find 'set' declared in file TargetSelectDAG.td as
>      def set;
>  
> But if i modify it,
>      def set_try;
>  
> def MOVi2pieces : AI1x2<(outs GPR:$dst), (ins so_imm2part:$src), Pseudo,
>                          "mov", " $dst, $src",
>                          [(set_try GPR:$dst, so_imm2part:$src)]>;
>  
> tblgen will give a message: Unrecognized node set_try.
>  
> Why 'set ' is a node without SDNode when define?
>  
'set' in this case is used essentially as a keyword. The TableGen program specifically looks for the word "set" when it does pattern matching. If you look at utils/TableGen/CodeGenDAGPatterns.cpp, you'll see what I mean.

If you need your own version of "set", then you'll have to modify the TableGen program itself to recognize the new keyword. But it's probably best to not create a new "set" if at all possible. :-)

-bw