[LLVMdev] RFC: X86InstrFormats.td Refactoring

[David Greene]

On Monday 30 March 2009 16:12, David Greene wrote:
> There is some redundancy at the instruction format level in the x86 .td
> files. For example, in X86InstrFormats.td:
>
> // SSE1 Instruction Templates:
> //
> //   SSI   - SSE1 instructions with XS prefix.
>
> class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
> pattern>
>
>       : I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>;
>
> // SSE3 Instruction Templates:
> //   S3SI   - SSE3 instructions with XSrefix.
>
> class S3SI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
> pattern>
>
>       : I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE3]>;
>
> The only difference here is the parameter to Requires.  There are many more
> examples and this gets worse with AVX.
>
> I'd like to propose a refactoring that looks something like this:
>
> // SSE Instruction Templates:
> //
> //  SSI - SSE Instructions with XS prefix
>
> class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
> pattern>
>
>       : I<o, F, outs, ins, asm, pattern>, XS;
>
> /./ SSE1 Instruction Templates
> //
> //  S1SI - SSE1 instructions with Xs prefix
>
> class S1SI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
> pattern>
>
>       : SSI<o, F, outs, ins, asm, pattern>, Requires<HasSSE1>;

Actually, I meant to keep the existing class names intact to avoid global 
changes.  So what I'm proposing is actually:

 class SSIb<bits<8> o, Format F, dag outs, dag ins, string asm,
   list<dag>  pattern>  : I<o, F, outs, ins, asm, pattern>, XS;

class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, 
  list<dag> pattern>
       : SSIb<o, F, outs, ins, asm, pattern>, Requires<HasSSE1>;

                                           -Dave