[LLVMdev] RFC: X86InstrFormats.td Refactoring
David Greene
dag at cray.com
Mon Mar 30 14:12:51 PDT 2009
There is some redundancy at the instruction format level in the x86 .td files.
For example, in X86InstrFormats.td:
// SSE1 Instruction Templates:
//
// SSI - SSE1 instructions with XS prefix.
class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
: I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>;
// SSE3 Instruction Templates:
// S3SI - SSE3 instructions with XSrefix.
class S3SI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
: I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE3]>;
The only difference here is the parameter to Requires. There are many more
examples and this gets worse with AVX.
I'd like to propose a refactoring that looks something like this:
// SSE Instruction Templates:
//
// SSI - SSE Instructions with XS prefix
class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
: I<o, F, outs, ins, asm, pattern>, XS;
/./ SSE1 Instruction Templates
//
// S1SI - SSE1 instructions with Xs prefix
class S1SI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
: SSI<o, F, outs, ins, asm, pattern>, Requires<HasSSE1>;
This way we can reuse the SSI class and hide encoding details for many SSE
levels and AVX.
Sound good?
-Dave
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