[LLVMdev] disabling combining load/stores in optimizer.

David Greene dag at cray.com
Tue Aug 4 14:46:58 PDT 2009


On Tuesday 04 August 2009 12:06, Chris Lattner wrote:

> > I can see the benefits of this approach at a macro-level, however at
> > micro-level the impact is visible especially in embedded targets with
> > limited memory and register resources (such as pic16)
>
> Is this actually causing a performance problem in practice?  If so,
> please show the generated and desired code for a tiny testcase.
> Instead of talking theory, please give an example.

Obviously I don't have a PIC16 example, but we've seen many cases in our
own optimizer where we've had to throttle things, especially for register
pressure.  Sometimes the backend really can't recover because there isn't
enough information to do so.

Generally I abhor throttles.  But sometimes they are necessary because the
earlier passes have the right information to make the decisions.

                             -Dave



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