[LLVMdev] Hi Cache Miss and Branch Misprediction

[Ketan Pundlik Umare]

Than a lot John!!!!

That was great, i wanted to read the performance counter, but was always afraid how llvm would react (virtual machine)
Thanx for the resource i ll go through it. 
i think i read somewhere that llvm doesnot support assembly instructions???

Also can you redirect me to run-time transforms for llvm, where can i find the material. I thought that the transfor pass is done on the IR only and it is static??? Please correct my thinking.

You were of great help
Thank you
Ketan
----- Original Message -----
From: "John Criswell" <criswell at cs.uiuc.edu>
To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
Sent: Tuesday, September 30, 2008 11:37:05 AM GMT -05:00 US/Canada Eastern
Subject: Re: [LLVMdev] Hi Cache Miss and Branch Misprediction

Ketan Pundlik Umare wrote:
> Thanx a lot Guys!!
> But i have to do this online and and use it to do some kind code transformation. Its for a different project.
>   
Another possibility is to write an LLVM transform that inserts code into 
a program to do this profiling for you.

For example, consider cache misses.  You could write a function that 
reads the processor's performance counter registers for cache misses in 
native code.  You could then write an LLVM transform that instruments a 
program to call this function to calculate cache misses in various parts 
of the program.  A run-time transform used in a JIT built using LLVM 
could then use this information to transform various parts of the 
program at run-time.

If you want to do fine grained profiling (for example, instrumenting 
individual LLVM load/store instructions), there may be more efficient 
ways to read the performance counters.  You may be able to, for example, 
write an inline asm statement to read the performance counter registers 
directly (LLVM supports inline assembly).

If you want to instrument code that is not visible at the LLVM IR level 
(e.g., cache misses due to register spills), then you'd need to modify 
the code generator, I believe.

You may want to check this resource 
(http://perfsuite.ncsa.uiuc.edu/publications/LJ135/t1.html) for 
information on software you can use to read performance counters on Linux.

-- John T.

> But all this has given me a quite a bit of knowledge.Wow!!!
>
> Thank you
> Best
> Ketan
> ----- Original Message -----
> From: "OvermindDL1" <overminddl1 at gmail.com>
> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Sent: Monday, September 29, 2008 10:17:41 PM GMT -05:00 US/Canada Eastern
> Subject: Re: [LLVMdev] Hi Cache Miss and Branch Misprediction
>
> On Mon, Sep 29, 2008 at 6:30 PM, Mike Stump <mrs at apple.com> wrote:
>   
>> /* snip */
>>     
>
> AMD's CodeAnalyst is free and quite wonderful at this job.  Shows
> details about just about anything the CPU reports (and on newer AMD
> CPU's there is an even more ridiculous amount of information) about
> every little function call, time they took, multiple profiling modes,
> etc...
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