[LLVMdev] Custom Lowering and fneg

[Villmow, Micah]

So, I have this small test program that I figured would cause no
problems but want to test all the various data types and operations with
my modified sparc backend. I've been working on LLVM for about 3 days
now, so this might be a problem with not knowing enough yet, so thanks
for bearing with me.

The code that I based my example off of is compiled to LLVM-IR from:

void test_unary_op_anegate(float x, float* result)

{

        *result = (-x);

}

 

Generating the following LLVM IR:

define void @test_unary_op_anegate(float %x, float addrspace(11)*
%result) nounwind  {

entry:

        %neg = sub float -0.000000e+000, %x             ; <float>
[#uses=1]

        store float %neg, float addrspace(11)* %result

        ret void

}

 

However, when I attempt to run it through my backend which can handle
binary math ops correctly I keep asserting on the following item.

Cannot yet select: 017B8010: i32 = fneg 017B7E78

 

What I cannot figure out is why it is attempting to pattern match on an
i32 when there are no i32's in my test program.

I've tried a custom lowering function that lowers it to dst = sub 0,
src0 and forcing it to f32, but it complains that result and the op
value types are incorrect.

 

My table descriptor rule is:

def FNEG       : OneInOneOut<OP_F_NEG, (outs GPR:$dst), (ins GPR:$src0),

                              !strconcat(OP_F_NEG.Text, " $dst, $src0"),

                              [(set GPR:$dst, (fneg GPR:$src0))]>;

With GPR defined as either an i32 or an f32.

 

On another not, is there any known examples of using Tablegen with a
typeless register class? Or with instruction formats where the modifiers
are on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg,
GPR2_abs, which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)?

 

Thanks,

 

Micah Villmow

Systems Engineer

Advanced Technology & Performance

Advanced Micro Devices Inc.

4555 Great America Pkwy,

Santa Clara, CA. 95054

P: 408-572-6219

F: 408-572-6596

 

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