[LLVMdev] mem2reg optimization

[Dan Gohman]

On Oct 7, 2008, at 3:07 PM, David Greene wrote:

> On Tuesday 07 October 2008 16:13, Dan Gohman wrote:
>
>>> No, it's analysis that depend on the orderings of loads and stores
>>> (or any
>>> instruction).  I ran across this need in another area.
>>
>> I believe that there are problems, but I'm not seeing what
>> the problem is with an instruction ordering pass to be used
>> by mem2reg. Can you be more specific, or point me to the
>> thread where this was discussed?
>
> Oh, use by mem2reg shouldn't be a problem.  But as you say, unless  
> it's used
> other places, why make it a separate pass?  My point was that the  
> other place
> I've found this useful is in an analysis pass and that's problematic  
> because
> the ordering won't be updated by PassManager even if the dependent  
> analysis
> is.  Therefore, the dependent analysis will compute wrong answers.

Ok, thanks for clarifying for me.

>
> Let's not confuse separate issues:
>
> 1. mem2reg needs speedup that ordering can provide.  I propose we  
> provide that
>    within mem2reg itself for now to keep things simple.
>
> 2. Breaking ordering out into a pass is fine as long as only  
> transformation
>    passes use it.  It will not help analysis passes.
>
> 3. PassManager support for analysis passes depending on other  
> analysis passes
>    is a whole can of worms I don't want to touch right now.  :)


Sounds reasonable :-). Thanks!

Dan