[LLVMdev] Indirect Branch Representation

[kapil anand]

Specifically, I need a way to represent indirect branch instruction (in
binary) as an equivalent LLVM instruction. With switch instruction , I would
have to list all the possible targets and then initialize the corresponding
instruction. I was just thinking whether it might be possible to have some
kind of indirect branch where label is a "variable" and not an explicit
label present in module.

-Kapil
On Wed, Jul 23, 2008 at 10:36 PM, Eli Friedman <eli.friedman at gmail.com>
wrote:

>  On Wed, Jul 23, 2008 at 5:57 PM, kapil anand <kapilanand2 at gmail.com>
> wrote:
> > Hi,
> >
> > I was thinking about the ways to represent indirect branch in LLVM. It
> seems
> > that "Switch instruction" is the only way to logically represent indirect
> > branch inside LLVM.
> > Is there any other easier way to represent indirect branch in LLVM?
>
> Yeah, that's essentially it; the only forms of control flow LLVM
> supports are branches/switches, calls, and exceptions.  There's been
> some discussion that this makes it difficult to represent some
> constructs, like setjmp/longjmp and the gcc goto from nested function
> extension, but nobody has really proposed anything yet.
>
> LLVM supports turning functions with the fastcc calling convention
> into tail calls; that can be useful in some cases. Is there something
> in particular you're running into issues with?
>
> -Eli
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