[LLVMdev] LLVM Newbie. Questions about backend.
Christopher Lamb
christopher.lamb at gmail.com
Fri Oct 26 09:36:32 PDT 2007
On Oct 26, 2007, at 2:52 AM, Sami Ahlberg wrote:
> Hello,
> I have been studying LLVM and started to create a new backend for a
> new RISC architecture. Now I need some help to get forward with my
> project. I'm quite new to compiling techniques so I'm sorry for the
> stupid questions.
>
> Question 1:
> My idea is to lower the select SDNode as follows:
>
> %res1 = %falseVal
> %res2 = setc %trueVal, %condition
>
> Where setc is conditional mov. The question is how can I make sure
> that %res1 and %res2 are assigned to the same phsyical register? (I'm
> assuming you can only define virtual register once, is this correct
> assumption?)
If you use a register constraint the existing infrastructure will
take care of
this for you.
In your InstrInfo.td file you'll need something like this:
let Constraints = "$falseVal = $Rdest" {
def CMOV : YourTargetInst<
(outs regclass$Rdest),
(ins rc:$trueVal, rc:$falseVal, rc:$condition),
"cmov $Rdest, $trueVal, $condition",
[(set rc:$Rdest, (select rc:$condition, rc:$trueVal, rc:
$falseVal))]>;
}
--
Christopher Lamb
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