[llvm] [SelectionDAG] Avoid redundant comparisons in bit-test switch lowering (PR #222626)

[Eli Friedman via llvm-commits]

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@@ -12578,20 +12580,45 @@ void SelectionDAGBuilder::lowerWorkItem(SwitchWorkListItem W, Value *Cond,
   for (CaseClusterIt I = W.FirstCluster; I <= W.LastCluster; ++I)
     UnhandledProbs += I->Prob;
 
-  MachineBasicBlock *CurMBB = W.MBB;
-  for (CaseClusterIt I = W.FirstCluster, E = W.LastCluster; I <= E; ++I) {
+  // Insert bit-test blocks before the linear work-item continuation blocks so
+  // that pre-creating the latter preserves the existing layout.
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efriedma-quic wrote:

What does "existing" mean?  The layout without this patch?  Probably should phrase that differently so it makes sense outside the context of this pull request.

https://github.com/llvm/llvm-project/pull/222626