[llvm] [X86] Narrow the mask when folding (vselect mask, (v16i8 (vtrunc (v8i64 x))), 0). (PR #228270)

[Craig Topper via llvm-commits]

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/228270

>From 7b7820a6619f7d5db9d9b874a2455498697fe586 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 1 Oct 2026 15:28:02 -0700
Subject: [PATCH 1/2] [X86] Narrow the mask when folding (vselect mask, (v16i8
 (vtrunc (v8i64 x))), 0).

vmtrunc expects the mask to have the same number of elements as
the source. Elements 8-15 of the result are always zero and don't
require a mask.

Assisted-by: Claude
---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 7817c86155e5b0..acd158a1404891 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -49145,7 +49145,11 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
       SDValue TruncSrc = LHS.getOperand(0);
       EVT TruncSrcVT = TruncSrc.getValueType();
       if (VT == MVT::v16i8 && TruncSrcVT == MVT::v8i64) {
-        return DAG.getNode(X86ISD::VMTRUNC, DL, VT, TruncSrc, RHS, Cond);
+        // VMTRUNC's mask operand must have the same number of elements as
+        // the truncation source (v8i64), not the (wider) v16i8 result.
+        EVT MaskVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 8);
+        SDValue MaskCond = DAG.getExtractSubvector(DL, MaskVT, Cond, 0);
+        return DAG.getNode(X86ISD::VMTRUNC, DL, VT, TruncSrc, RHS, MaskCond);
       }
     }
   }

>From 6ab6e38cdc3140fa35e5ae963f7f1255c598594a Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 1 Oct 2026 23:52:01 -0700
Subject: [PATCH 2/2] fixup! address review comment

---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index acd158a1404891..476188c8123819 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -49147,8 +49147,7 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
       if (VT == MVT::v16i8 && TruncSrcVT == MVT::v8i64) {
         // VMTRUNC's mask operand must have the same number of elements as
         // the truncation source (v8i64), not the (wider) v16i8 result.
-        EVT MaskVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 8);
-        SDValue MaskCond = DAG.getExtractSubvector(DL, MaskVT, Cond, 0);
+        SDValue MaskCond = DAG.getExtractSubvector(DL, MVT::v8i1, Cond, 0);
         return DAG.getNode(X86ISD::VMTRUNC, DL, VT, TruncSrc, RHS, MaskCond);
       }
     }