[llvm] [RISCV][P-ext] Remove unnecessary check from (p)m(racc) handling in LowerIntrinsic_WO_CHAIN. NFC (PR #228172)

[Craig Topper via llvm-commits]

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/228172

This was rejecting MVT::i32 on RV64, but this check was mutually exclusive with every other case handled in this block. We can let it go to the final return SDValue().

I'm not sure we can even get to this case anyway since ReplaceNodeResults should be called for an illegal MVT::i32 on RV64.

>From b59d4818a0144de5dbadd19f3e2069d06ea7fdcc Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 1 Oct 2026 10:52:11 -0700
Subject: [PATCH] [RISCV][P-ext] Remove unnecessary check from (p)m(racc)
 handling in LowerIntrinsic_WO_CHAIN. NFC

This was rejecting MVT::i32 on RV64, but this check was mutually
exclusive with every other case handled in this block. We can let
it go to the final return SDValue().

I'm not sure we can even get to this case anyway since ReplaceNodeResults
should be called for an illegal MVT::i32 on RV64.
---
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 5c2cb79379dfaf..21b570a75ad28e 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13071,10 +13071,6 @@ SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
     SDValue Rs2 = Op.getOperand(3);
     MVT XLenVT = Subtarget.getXLenVT();
 
-    bool IsScalarHalfword = VT == MVT::i32;
-    if (Subtarget.is64Bit() && IsScalarHalfword)
-      return SDValue();
-
     if (VT == MVT::v2i32 && Rs1.getSimpleValueType() == MVT::v4i16) {
       if (Subtarget.is64Bit()) {
         unsigned Opc = getRVPQFormatAccOpcode(IntNo);