[llvm] 7cf8ecb - Mips: Mark MUL's existing HI0/LO0 defs dead in FastISel (#227230)

[via llvm-commits]

Author: Matt Arsenault
Date: 2026-09-29T10:00:38Z
New Revision: 7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7

URL: https://github.com/llvm/llvm-project/commit/7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7
DIFF: https://github.com/llvm/llvm-project/commit/7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7.diff

LOG: Mips: Mark MUL's existing HI0/LO0 defs dead in FastISel (#227230)

Added: 
    llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll

Modified: 
    llvm/lib/Target/Mips/MipsFastISel.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp
index 8e79160c131f3..7d1f024002eaf 100644
--- a/llvm/lib/Target/Mips/MipsFastISel.cpp
+++ b/llvm/lib/Target/Mips/MipsFastISel.cpp
@@ -2147,10 +2147,10 @@ unsigned MipsFastISel::fastEmitInst_rr(unsigned MachineInstOpcode,
     Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
     Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1);
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II, ResultReg)
-      .addReg(Op0)
-      .addReg(Op1)
-      .addReg(Mips::HI0, RegState::ImplicitDefine | RegState::Dead)
-      .addReg(Mips::LO0, RegState::ImplicitDefine | RegState::Dead);
+        .addReg(Op0)
+        .addReg(Op1)
+        .setOperandDead(3)  // implicit-def $hi0
+        .setOperandDead(4); // implicit-def $lo0
     return ResultReg;
   }
 

diff  --git a/llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll b/llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll
new file mode 100644
index 0000000000000..2f7e661f3d58f
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=mipsel -mcpu=mips32 -O0 -relocation-model=pic -stop-after=finalize-isel -o - < %s | FileCheck %s
+
+define i32 @mul(i32 %a, i32 %b) {
+  ; CHECK-LABEL: name: mul
+  ; CHECK: bb.0.entry:
+  ; CHECK-NEXT:   liveins: $a0, $a1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr32 = COPY $a1
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr32 = COPY $a0
+  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
+  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gpr32 = COPY killed [[COPY]]
+  ; CHECK-NEXT:   [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY2]], [[COPY3]], implicit-def dead $hi0, implicit-def dead $lo0
+  ; CHECK-NEXT:   $v0 = COPY [[MUL]]
+  ; CHECK-NEXT:   RetRA implicit $v0
+entry:
+  %0 = mul i32 %a, %b
+  ret i32 %0
+}