[llvm] [AMDGPU] Split the true16 fcopysign pattern by uniformity (PR #226898)

[Matt Arsenault via llvm-commits]

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@@ -2464,10 +2464,16 @@ def : GCNPat <
 }
 let True16Predicate = UseRealTrue16Insts in {
 def : GCNPat <
-  (fcopysign fp16vt:$src0, fp16vt:$src1),
+  (UniformBinFrag<fcopysign> fp16vt:$src0, fp16vt:$src1),
+  (EXTRACT_SUBREG (V_BFI_B32_e64 (S_MOV_B32 (i32 0x00007fff)),
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arsenm wrote:

I don't understand selecting a VALU instruction from a UniformBinFrag pattern. This is just going to force readfirstlane insertion by SIFixSGPRCopies and we definitely don't want that 

https://github.com/llvm/llvm-project/pull/226898