[llvm] [AMDGPU][SIMemoryLegalizer] Ensure LDS -> DMA hazards respect fences (PR #220288)

[Zach Goldthorpe via llvm-commits]

zGoldthorpe wrote:

> So what's the plan for this PR, post https://github.com/llvm/llvm-project/pull/224065? Note that the memory model that we are drafting for async DMA operations will always cause the DMA to wait for previous LDS operations. Do people on this PR have reason to believe that such a model will leave performance on the table? There is room to invent metadata on the prior LDS operations which allow the subsequent DMA operation to not wait for them. But would that be over-design?

Sorry, I thought I responded to his, but I guess not.
As far as I'm concerned, #224065 is a sufficient replacement for this PR, since the original motivation for this PR was relanding some form of #187673. I'll close this PR unless others want some form of this to be implemented.

https://github.com/llvm/llvm-project/pull/220288