[llvm] [AArch64] Remove variable only used in assert (PR #226433)

[Gaëtan Bossu via llvm-commits]

https://github.com/gbossu created https://github.com/llvm/llvm-project/pull/226433

This caused a buildbot failure after the variable was introduced in https://github.com/llvm/llvm-project/pull/208212

>From bf12909c0581455682f684ddd01598b42258f2c5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ga=C3=ABtan=20Bossu?= <gaetan.bossu at arm.com>
Date: Fri, 25 Sep 2026 10:47:21 +0000
Subject: [PATCH] [AArch64] Remove variable only used in assert

---
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 395d586bd89eb..101a3961779fe 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -17854,8 +17854,7 @@ SDValue AArch64TargetLowering::LowerVECTOR_REPEAT(SDValue Op,
   SDLoc DL(Op);
   SDValue Src = Op.getOperand(0);
   EVT VT = Op.getValueType();
-  EVT SrcVT = Src.getValueType();
-  assert(SrcVT.is64BitVector() && "Expected 64bit source!");
+  assert(Src.getValueType().is64BitVector() && "Expected 64bit source!");
 
   // Repeat into a packed container before extracting the low lanes, which
   // places the result elements at the spacing required by the unpacked type.