[llvm] [DAG] SimplifyMultipleUseDemandedBits - simplify ISD::SCALAR_TO_VECTOR to ISD::POISON if we don't demand 0th element (PR #225530)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 25 02:21:25 PDT 2026


https://github.com/RKSimon closed https://github.com/llvm/llvm-project/pull/225530


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