[llvm] [TableGen] Assign LaneBitmask bits in a less surprising order (PR #225809)

[Sander de Smalen via llvm-commits]

https://github.com/sdesmalen-arm commented:

Nice, this change now allows us to rename `zsub` to (the more correct) `qsub`; this failed when I previously tried it, probably due to the missing change to `shouldCoalesce`.

https://github.com/llvm/llvm-project/pull/225809