[llvm] [MachineCSE] Enhance MachineCSE simple PRE to find common subexpressi… (PR #129860)

[via llvm-commits]

Jinlock9 wrote:

Would it make sense to perform CSE immediately during PRE? PRE already calls isProfitableToCSE when considering a hoist. Could we validate each original occurrence against the hoisted representative and complete the elimination on the fly?

For example, consider these chains in two branches:
```
  bb1:
    %a = SHR %x, 7
    %b = ADD %a, %y

  bb2:
    %c = SHR %x, 7
    %d = ADD %c, %y
```
After hoisting the shift as `%h = SHR %x, 7`, we could permanently replace `%a` and `%c` with `%h` and remove the redundant shifts, provided the CSE checks pass. Both adds then become `ADD %h, %y`, exposing the next PRE opportunity during the same traversal.

We would retain the actual hoisted representative in PREMap and remove/reinsert affected keys around operand changes. This would eliminate the need for RecoverRegChangedInst.

I prototyped this for candidates without physical-register operands, retaining the dominance, profitability, register-constraint, and convergence checks. It fixes the dependent shift/add chain in my softmax case.

I haven’t contributed to LLVM upstream yet, so I’d appreciate feedback on whether this fits the pass’s design and any correctness concerns I may be missing.

https://github.com/llvm/llvm-project/pull/129860