[llvm] [RISCV] Reject XTHeadMemIdx load-update with rd == rs1 (PR #225271)

[Zeyi Xu via llvm-commits]

zeyi2 wrote:

> I'll add the disassembler checks for all these instructions later in this PR.

Should be good now :)

https://github.com/llvm/llvm-project/pull/225271