[llvm] [SelectionDAG] Add BUILD_PAIR to computeKnownBits (PR #225073)

[Simon Pilgrim via llvm-commits]

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@@ -0,0 +1,42 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+
+; In %bb the zero %v is an ISD::BUILD_PAIR of known-zero parts, because cross-block
+; values are passed in parts. computeKnownBits() has to see through it to fold the
+; shift here: type legalization expands variable shifts via memory and loses the zero.
+
+define i128 @shl_zero_i128(i128 %x, i128 %amt, i1 %c) nounwind {
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RKSimon wrote:

just add this to known-bits.ll - no need for a new file?

https://github.com/llvm/llvm-project/pull/225073