[llvm] [AArch64] Match scalar_to_vector of frozen extended loads (PR #224213)

[Cyrus Ding via llvm-commits]

dingcyrus wrote:

Follow-up to #217185 as requested in review (https://github.com/llvm/llvm-project/pull/217185#pullrequestreview-...) and tracked in #224181.

The SimplifyDemandedVectorElts `freeze(scalar_to_vector(x)) -> scalar_to_vector(freeze(x))` sink (which #217185 makes fire more often, currently guarded there by a promoted-load workaround) leaves a `freeze` between SCALAR_TO_VECTOR and the extended load. `freeze(load)` can never be folded away since the loaded value may be poison in memory, so the ExtLoad8_16AllModes scalar_to_vector patterns stopped matching and e.g. AArch64/neon-dotreduce.ll regressed from `ldr b` to `ldrb` + `fmov`.

This patch closes the gap at the source by teaching the patterns to look through the freeze, so the workaround in #217185 can be dropped in a follow-up once both land. Matching through freeze is safe: the LDRB/LDRH/LDRS destination register is fully defined, which is exactly what freeze promises.

New test: llvm/test/CodeGen/AArch64/scalar-to-vector-frozen-load.ll (constructs the frozen-load shape directly from IR, independent of #217185).

cc @RKSimon @davemgreen


https://github.com/llvm/llvm-project/pull/224213