[llvm] [AArch64] Add custom v2i32->v2i16 store lowering. (PR #223659)

Eli Friedman via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 15 11:05:51 PDT 2026


================
@@ -491,11 +489,9 @@ define i32 @shufflevector_v2i16_zeroes(<2 x i16> %a, <2 x i16> %b){
 ; CHECK-SD-NEXT:    sub sp, sp, #16
 ; CHECK-SD-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-SD-NEXT:    dup v1.2s, v0.s[0]
-; CHECK-SD-NEXT:    str h0, [sp, #12]
-; CHECK-SD-NEXT:    mov s1, v1.s[1]
-; CHECK-SD-NEXT:    str h1, [sp, #14]
-; CHECK-SD-NEXT:    ldr w0, [sp, #12]
+; CHECK-SD-NEXT:    dup v0.2s, v0.s[0]
+; CHECK-SD-NEXT:    uzp1 v0.4h, v0.4h, v0.4h
+; CHECK-SD-NEXT:    fmov w0, s0
----------------
efriedma-quic wrote:

Please open a bug to follow up on this.  (The store+load is going away, but we're still creating a stack slot.)

https://github.com/llvm/llvm-project/pull/223659


More information about the llvm-commits mailing list