[llvm] [RegAlloc][X86] Rematerialization of instructions with physical register (PR #198853)

[Matt Arsenault via llvm-commits]

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@@ -6339,11 +6366,20 @@ static bool expandMOVSHP(MachineInstrBuilder &MIB, MachineInstr &MI,
 }
 
 bool X86InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
+  MachineBasicBlock &MBB = *MI.getParent();
   bool HasAVX = Subtarget.hasAVX();
   MachineInstrBuilder MIB(*MI.getParent()->getParent(), MI);
   switch (MI.getOpcode()) {
-  case X86::MOV32r0:
-    return Expand2AddrUndef(MIB, get(X86::XOR32rr));
+  case X86::MOV32r0: {
+    if (MBB.computeRegisterLiveness(&TRI, X86::EFLAGS, MI) !=
+        MachineBasicBlock::LQR_Dead) {
+      MIB->setDesc(get(X86::MOV32ri));
+      MIB.addImm(0);
+      return true;
+    } else
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arsenm wrote:

No else after return 

https://github.com/llvm/llvm-project/pull/198853