[llvm] [Xtensa] Implement esp32s3 target. (PR #220393)
Andrei Safronov via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 12 18:03:22 PDT 2026
================
@@ -548,9 +589,48 @@ bool XtensaAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_Invalidimm7_22:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected immediate in range [7, 22]");
+ case Match_InvalidSelect_2:
+ return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
----------------
andreisfr wrote:
@arsenm thank you very much for comment. I added test for invalid esp32s3 specific operands and also some minor fixes.
https://github.com/llvm/llvm-project/pull/220393
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