[llvm] [AMDGPU] Don't merge M0 initializations across calls that clobber M0 (PR #221963)

[Matt Arsenault via llvm-commits]

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@@ -678,3 +678,136 @@ body:             |
   bb.3:
     S_ENDPGM 0
 ...
+
+# A call clobbers m0 with a regmask instead of an explicit def, so the init
+# after the call must be kept.
+
+# GCN-LABEL: name: merge-m0-call-clobber
+# GCN:      SI_INIT_M0 -1
+# GCN:      DS_WRITE_B32
+# GCN-NEXT: SI_CALL
+# GCN-NEXT: SI_INIT_M0 -1
+# GCN-NEXT: DS_WRITE_B32
+# GCN-NEXT: S_ENDPGM
+
+---
+name: merge-m0-call-clobber
+registers:
+  - { id: 0, class: vgpr_32 }
+  - { id: 1, class: vgpr_32 }
+  - { id: 2, class: sreg_64_xexec }
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arsenm wrote:

DOn't need registers section, fix missing inline class specifiers 

https://github.com/llvm/llvm-project/pull/221963