[llvm] [AMDGPU][Codegen] Legalize 16bit register class in sdag (PR #220275)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> For a isel pattern that contains i16/f16/bf16 input, or contains extract_subreg src, lo/hi16, the regclass for the output sdnodes cannot be determined by the pattern itself, and the generated illegal instruction could cause problem in the dead lane detection and other following pass.


You can always add explicit types. Is the problem the register classes are being inferred to SReg_32, because i16 is a legal type? Can we make the legal type set for a register class dependent on HwMode, so i16 no longer appears there?

https://github.com/llvm/llvm-project/pull/220275