[llvm] Legalize sgpr16 in sdag (PR #220275)
Guo Chen via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 9 11:49:54 PDT 2026
https://github.com/broxigarchen updated https://github.com/llvm/llvm-project/pull/220275
>From b801ae07be82ad890bdff5c5afe213bd2d3311e6 Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Sun, 23 Aug 2026 19:13:00 -0400
Subject: [PATCH 1/4] Legalize sgpr16 in sdag
---
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 284 +-
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h | 2 +
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 5 +-
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 85 +-
llvm/lib/Target/AMDGPU/VOP1Instructions.td | 30 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll | 120 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll | 23782 ++++++++++------
.../CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll | 4469 +--
.../CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll | 360 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll | 5247 ++--
.../CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll | 6250 ++--
.../CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll | 1292 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll | 216 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll | 10033 ++++---
.../CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll | 5170 ++--
.../CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll | 5756 ++--
.../CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll | 3106 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll | 6282 ++--
.../CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll | 6850 +++--
.../CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll | 7432 +++--
.../CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll | 8012 ++++--
.../CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll | 8574 ++++--
.../CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll | 2286 +-
.../atomic_optimizations_global_pointer.ll | 2189 +-
.../test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll | 182 +-
llvm/test/CodeGen/AMDGPU/bf16-conversions.ll | 28 +-
llvm/test/CodeGen/AMDGPU/bf16-math.ll | 4 +-
llvm/test/CodeGen/AMDGPU/bf16.ll | 109 +-
llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll | 12 +-
llvm/test/CodeGen/AMDGPU/br_cc.f16.ll | 44 +-
llvm/test/CodeGen/AMDGPU/bswap.ll | 145 +-
.../CodeGen/AMDGPU/call-args-inreg-bfloat.ll | 4 +-
llvm/test/CodeGen/AMDGPU/call-args-inreg.ll | 84 -
.../CodeGen/AMDGPU/call-argument-types.ll | 94 +-
.../CodeGen/AMDGPU/calling-conventions.ll | 1269 +-
.../CodeGen/AMDGPU/extract_vector_elt-f16.ll | 84 +-
llvm/test/CodeGen/AMDGPU/fabs.bf16.ll | 217 +-
llvm/test/CodeGen/AMDGPU/fabs.f16.ll | 70 +-
llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll | 66 +-
llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll | 240 +-
llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll | 4 +-
llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll | 1 +
.../CodeGen/AMDGPU/fcopysign.gfx11plus.ll | 8 +-
.../fix-sgpr-copies-f16-gfx12-true16.mir | 10 +
.../AMDGPU/fix-sgpr-copies-f16-true16.mir | 71 +-
.../CodeGen/AMDGPU/fix-sgpr-copies-f16.mir | 6 +
.../fix-sgpr-copies-sgpr32-to-vgpr16.ll | 18 +-
llvm/test/CodeGen/AMDGPU/flat_atomics.ll | 79 +-
llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll | 370 +-
.../float-to-arbitrary-fp-fp8-f16-hw.ll | 12 +-
.../AMDGPU/float-to-arbitrary-fp-widen.ll | 2909 +-
llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll | 4 +-
llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll | 9 +-
llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll | 198 +-
llvm/test/CodeGen/AMDGPU/fmaximum.ll | 26 +-
llvm/test/CodeGen/AMDGPU/fmaximum3.ll | 4 +-
llvm/test/CodeGen/AMDGPU/fmaxnum.ll | 31 +-
llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll | 23 +-
llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll | 198 +-
llvm/test/CodeGen/AMDGPU/fminimum.ll | 26 +-
llvm/test/CodeGen/AMDGPU/fminimum3.ll | 4 +-
llvm/test/CodeGen/AMDGPU/fminnum.ll | 31 +-
.../AMDGPU/fmul-2-combine-multi-use.ll | 10 +-
llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll | 129 +-
llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll | 78 +-
llvm/test/CodeGen/AMDGPU/fneg.bf16.ll | 70 +-
llvm/test/CodeGen/AMDGPU/fneg.f16.ll | 70 +-
llvm/test/CodeGen/AMDGPU/fpext.f16.ll | 24 +-
llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll | 62 +-
llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll | 486 +-
llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll | 108 +-
llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll | 437 +-
llvm/test/CodeGen/AMDGPU/frem.ll | 3184 ++-
.../CodeGen/AMDGPU/function-args-inreg.ll | 79 +-
llvm/test/CodeGen/AMDGPU/function-returns.ll | 79 +-
.../AMDGPU/gfx-callable-argument-types.ll | 973 +-
llvm/test/CodeGen/AMDGPU/global_atomics.ll | 24 +-
llvm/test/CodeGen/AMDGPU/half.ll | 197 +-
llvm/test/CodeGen/AMDGPU/idiv-licm.ll | 145 +-
.../CodeGen/AMDGPU/insert-delay-alu-bug.ll | 156 -
.../AMDGPU/insert_vector_elt.v2bf16.ll | 13 +-
.../CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 38 +-
.../integer-canonicalizing-src-modifiers.ll | 14 +-
.../CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll | 12 +-
.../CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll | 3 +-
.../test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll | 2 +-
.../AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll | 2 +-
.../AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll | 394 +-
.../llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll | 23 +-
.../llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll | 31 +-
.../llvm.amdgcn.raw.tbuffer.load.d16.ll | 48 +-
.../llvm.amdgcn.raw.tbuffer.store.d16.ll | 70 +-
.../CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll | 10 +-
.../CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll | 5 +-
.../CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll | 5 +-
.../CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll | 7 +-
...llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll | 26 +-
...lvm.amdgcn.struct.ptr.tbuffer.store.d16.ll | 34 +-
.../llvm.amdgcn.struct.tbuffer.load.d16.ll | 54 +-
.../llvm.amdgcn.struct.tbuffer.store.d16.ll | 77 +-
llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll | 144 +-
.../test/CodeGen/AMDGPU/llvm.fptrunc.round.ll | 140 +-
llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll | 11 +-
llvm/test/CodeGen/AMDGPU/llvm.round.ll | 6 +-
llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll | 22 +-
llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 11 +-
llvm/test/CodeGen/AMDGPU/load-constant-i1.ll | 1666 +-
llvm/test/CodeGen/AMDGPU/load-constant-i16.ll | 60 +-
llvm/test/CodeGen/AMDGPU/load-constant-i8.ll | 88 +-
llvm/test/CodeGen/AMDGPU/mad.u16.ll | 105 +-
llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll | 4917 ++--
llvm/test/CodeGen/AMDGPU/minimummaximum.ll | 32 +-
llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll | 4917 ++--
llvm/test/CodeGen/AMDGPU/minmax.ll | 12 +-
...-to-valu-pseudo-scalar-trans-f16-true16.ll | 60 +-
...-alloca-vector-dynamic-idx-bitcasts-llc.ll | 11 +-
.../AMDGPU/pseudo-scalar-transcendental.ll | 268 +-
llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll | 230 +-
llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll | 264 +-
.../AMDGPU/scalar_to_vector.gfx11plus.ll | 5 +-
llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll | 24 +-
llvm/test/CodeGen/AMDGPU/select.f16.ll | 68 +-
llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll | 19 +-
llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll | 19 +-
llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll | 19 +-
llvm/test/CodeGen/AMDGPU/ucmp.ll | 92 +-
.../umin-sub-to-usubo-select-combine.ll | 11 +-
llvm/test/CodeGen/AMDGPU/usubsat.ll | 131 +-
128 files changed, 83172 insertions(+), 51885 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 0d212f9dd39b2a..a3dc904f6075e6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -426,8 +426,8 @@ const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N,
SDValue SubRegOp = N->getOperand(OpNo + 1);
unsigned SubRegIdx = SubRegOp->getAsZExtVal();
- return Subtarget->getRegisterInfo()->getSubClassWithSubReg(SuperRC,
- SubRegIdx);
+ return Subtarget->getRegisterInfo()->getSubRegisterClass(SuperRC,
+ SubRegIdx);
}
}
}
@@ -4781,6 +4781,283 @@ bool AMDGPUDAGToDAGISel::isUniformLoad(const SDNode *N) const {
->isMemOpHasNoClobberedMemOperand(N)));
}
+const TargetRegisterClass *
+AMDGPUDAGToDAGISel::inferDefRegClass(SDNode *N) const {
+ const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
+ if (!N->isMachineOpcode()) {
+ switch (N->getOpcode()) {
+ case ISD::CopyFromReg: {
+ Register Reg = cast<RegisterSDNode>(N->getOperand(1))->getReg();
+ if (Reg.isPhysical())
+ return TRI->getPhysRegBaseClass(Reg);
+ return CurDAG->getMachineFunction().getRegInfo().getRegClass(Reg);
+ }
+ }
+ return nullptr;
+ }
+
+ switch (N->getMachineOpcode()) {
+ case TargetOpcode::COPY: {
+ return inferDefRegClass(N->getOperand(0).getNode());
+ }
+ case TargetOpcode::EXTRACT_SUBREG: {
+ const TargetRegisterClass *SrcRC =
+ inferDefRegClass(N->getOperand(0).getNode());
+ if (!SrcRC)
+ return nullptr;
+ unsigned SubIdx = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
+ return Subtarget->getRegisterInfo()->getSubRegisterClass(SrcRC, SubIdx);
+ }
+ case TargetOpcode::REG_SEQUENCE: {
+ unsigned RCID = N->getConstantOperandVal(0);
+ return Subtarget->getRegisterInfo()->getRegClass(RCID);
+ }
+ case TargetOpcode::COPY_TO_REGCLASS: {
+ unsigned RCID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
+ return TRI->getRegClass(RCID);
+ }
+ default:
+ const MCInstrDesc &Desc = TII->get(N->getMachineOpcode());
+ return TII->getRegClass(Desc, 0);
+ }
+}
+
+// Create a sreg32 from a vgpr16 in true16 mode
+static SDValue createVGPR16ToSGPR32(SDValue VReg16, SDLoc DL, EVT VT,
+ llvm::SelectionDAG *CurDAG) {
+ SDValue SubIdx0 = CurDAG->getTargetConstant(AMDGPU::lo16, DL, MVT::i32);
+ SDValue SubIdx1 = CurDAG->getTargetConstant(AMDGPU::hi16, DL, MVT::i32);
+ SDValue Undef = SDValue(
+ CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::i16), 0);
+ SDValue VRegRCImm =
+ CurDAG->getTargetConstant(AMDGPU::VGPR_32RegClassID, DL, MVT::i32);
+ const SDValue Ops[] = {VRegRCImm, VReg16, SubIdx0, Undef, SubIdx1};
+ SDValue RegSeq = SDValue(
+ CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, DL, MVT::i32, Ops), 0);
+ SDValue SRegRCImm =
+ CurDAG->getTargetConstant(AMDGPU::SGPR_32RegClassID, DL, MVT::i32);
+ return SDValue(CurDAG->getMachineNode(AMDGPU::COPY_TO_REGCLASS, DL, VT,
+ RegSeq, SRegRCImm),
+ 0);
+}
+
+// Create a vgpr16 from a sreg32 in true16 mode
+static SDValue createSGPR32ToVGPR16(SDValue SReg32, SDValue LoHi16, SDLoc DL,
+ EVT VT, llvm::SelectionDAG *CurDAG) {
+ SDValue VRegRCImm =
+ CurDAG->getTargetConstant(AMDGPU::VGPR_32RegClassID, DL, MVT::i32);
+ SDValue VReg32 = SDValue(CurDAG->getMachineNode(AMDGPU::COPY_TO_REGCLASS, DL,
+ VT, SReg32, VRegRCImm),
+ 0);
+ return SDValue(CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, VT,
+ VReg32, LoHi16),
+ 0);
+}
+
+// Due to missing of sgpr16 class, 16bit value could be in vgpr16/sgpr32.
+// Check and legalize 16bit Register/SubregIdx in true16 mode includuing:
+// 1. 16bit register def-use chain that requires a fix (i.e. sgpr32->vgpr16)
+// 2. extract_subreg lo/hi16
+// Legalization expected to be done from top-down
+bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
+ // This check is required for r600 and older targets
+ if (!CurDAG->getTarget().getTargetTriple().isAMDGCN() ||
+ !Subtarget->useRealTrue16Insts())
+ return false;
+
+ const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
+
+ EVT VT = N->getValueType(0);
+ if (VT != MVT::i16 && VT != MVT::f16 && VT != MVT::bf16)
+ return false;
+
+ const TargetRegisterClass *DstRC = nullptr;
+ SDLoc DL(N);
+
+ if (N->isMachineOpcode() &&
+ N->getMachineOpcode() == TargetOpcode::EXTRACT_SUBREG) {
+ unsigned SubIdx = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
+ // Only check lo/hi16 subregidx
+ if (TRI->getSubRegIdxSize(SubIdx) != 16)
+ return false;
+
+ SDNode *Src = N->getOperand(0).getNode();
+ const TargetRegisterClass *SrcRC = inferDefRegClass(Src);
+ if (!SrcRC)
+ return false;
+
+ SmallVector<std::pair<SDNode *, unsigned>, 4> UserSGPR;
+ SmallVector<std::pair<SDNode *, unsigned>, 4> UserVGPR;
+
+ // Check Src/User regclass of extract_subreg
+ for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); UI != UE;
+ ++UI) {
+ SDNode *User = UI->getUser();
+ unsigned OperandNo = UI->getOperandNo();
+
+ const TargetRegisterClass *UserRC = getOperandRegClass(User, OperandNo);
+ if (!UserRC)
+ continue;
+
+ if (!TRI->getCommonSubClass(UserRC, &AMDGPU::SGPR_32RegClass))
+ UserVGPR.emplace_back(User, OperandNo);
+ else if (!TRI->getCommonSubClass(UserRC, &AMDGPU::VGPR_16RegClass))
+ UserSGPR.emplace_back(User, OperandNo);
+ else
+ TRI->isSGPRClass(SrcRC) ? UserSGPR.emplace_back(User, OperandNo)
+ : UserVGPR.emplace_back(User, OperandNo);
+ }
+
+ SDValue NewValue;
+ if (TRI->isSGPRClass(SrcRC)) {
+ // SGPR extract_subreg with lo/hi16 is illegal
+ SDValue SReg32;
+ if (TRI->getSubClassWithSubReg(SrcRC, AMDGPU::sub0)) {
+ SDValue SubIdx = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
+ SReg32 =
+ SDValue(CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, VT,
+ SDValue(Src, 0), SubIdx),
+ 0);
+ } else
+ SReg32 = SDValue(Src, 0);
+
+ if (UserVGPR.size()) {
+ // t0: sgpr_xx = ...
+ // ... = extract_subreg t0, lo/hi16
+ // to
+ // t0: sgpr_xx = ...
+ // t1: sgpr_32 = extract_subreg t0, sub0
+ // t2: vgpr_32 = COPY_TO_VGPR32_PSEUDO t1
+ // t3 ... = extract_subreg t2, lo/hi16
+ // ... = t3: vgpr_16
+ NewValue =
+ createSGPR32ToVGPR16(SReg32, N->getOperand(1), DL, VT, CurDAG);
+ for (auto &[User, OperandNo] : UserVGPR) {
+ SmallVector<SDValue, 8> NewOps(User->op_begin(), User->op_end());
+ NewOps[OperandNo] = NewValue;
+ CurDAG->UpdateNodeOperands(User, NewOps);
+ }
+ }
+
+ if (UserSGPR.size()) {
+ // t0: sgpr_xx = ...
+ // ... = extract_subreg t0, lo/hi16
+ // to
+ // t0: sgpr_xx = ...
+ // t1: sgpr_32 = extract_subreg t0, sub0
+ // ... = t1: sgpr_32
+ // Insert additional copy_to_regclass in case the src is a
+ // extract_subreg
+ SDValue RCImm =
+ CurDAG->getTargetConstant(AMDGPU::SGPR_32RegClassID, DL, MVT::i32);
+ NewValue = SDValue(CurDAG->getMachineNode(AMDGPU::COPY_TO_REGCLASS, DL,
+ VT, SReg32, RCImm),
+ 0);
+ for (auto &[User, OperandNo] : UserSGPR) {
+ SmallVector<SDValue, 8> NewOps(User->op_begin(), User->op_end());
+ NewOps[OperandNo] = NewValue;
+ CurDAG->UpdateNodeOperands(User, NewOps);
+ }
+ }
+ return true;
+ } else {
+
+ if (!UserSGPR.size())
+ return false;
+
+ // t0: vgpr_xx = ...
+ // t1: vgpr_16 = extract_subreg t0, lo/hi16
+ // to
+ // t0: vgpr_xx = ...
+ // t1: vgpr_32 = extract_subreg t0, sub0
+ // t2: sreg_32 = COPY_REGCLASS t1
+ // ... = t3: sreg_32
+ SDValue VReg32;
+ if (TRI->getSubClassWithSubReg(SrcRC, AMDGPU::sub0)) {
+ SDValue SubIdx = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
+ VReg32 =
+ SDValue(CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, VT,
+ SDValue(Src, 0), SubIdx),
+ 0);
+ } else
+ VReg32 = SDValue(Src, 0);
+ SDValue RCImm =
+ CurDAG->getTargetConstant(AMDGPU::SGPR_32RegClassID, DL, MVT::i32);
+ NewValue = SDValue(CurDAG->getMachineNode(AMDGPU::COPY_TO_REGCLASS, DL,
+ VT, VReg32, RCImm),
+ 0);
+ for (auto &[User, OperandNo] : UserSGPR) {
+ SmallVector<SDValue, 8> NewOps(User->op_begin(), User->op_end());
+ NewOps[OperandNo] = NewValue;
+ CurDAG->UpdateNodeOperands(User, NewOps);
+ }
+ }
+ return true;
+ }
+
+ // Check def register class
+ DstRC = inferDefRegClass(N);
+
+ if (!DstRC)
+ return false;
+
+ SmallVector<std::pair<SDNode *, unsigned>, 4> ToFix;
+
+ bool IsSGPR32 = TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_32RegClass);
+ bool IsVGPR16 = TRI->getCommonSubClass(DstRC, &AMDGPU::VGPR_16RegClass);
+
+ // Now fix user
+ for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); UI != UE;
+ ++UI) {
+ SDNode *User = UI->getUser();
+ unsigned OperandNo = UI->getOperandNo();
+
+ const TargetRegisterClass *UserRC = getOperandRegClass(User, OperandNo);
+ if (!UserRC)
+ continue;
+
+ // 16bit cross regbank def-use that requires a fix
+ if ((IsSGPR32 &&
+ !TRI->getCommonSubClass(UserRC, &AMDGPU::SGPR_32RegClass)) ||
+ (IsVGPR16 &&
+ !TRI->getCommonSubClass(UserRC, &AMDGPU::VGPR_16RegClass))) {
+ ToFix.emplace_back(User, OperandNo);
+ }
+ }
+
+ if (!ToFix.size())
+ return false;
+
+ SDValue NewValue;
+ if (IsSGPR32) {
+ // t0: sgpr_32 = ...
+ // ... = t0: vgpr_16
+ //
+ // t0: sgpr_32 = ...
+ // t1: vgpr_32 = COPY_TO_VGPR32_PSEUDO t0
+ // t2: vgpr_16 = EXTRACT_SUBREG t1, lo16
+ // ... = t2: vgpr_16
+ NewValue = createSGPR32ToVGPR16(
+ SDValue(N, 0), CurDAG->getTargetConstant(AMDGPU::lo16, DL, MVT::i32),
+ DL, VT, CurDAG);
+ } else if (IsVGPR16) {
+ // t0: vgpr_16 = ...
+ // ... = t0: sgpr_32
+ // to
+ // t0: vgpr_16 = ...
+ // t1: vgpr_32 = REG_SEQUENCE t0, lo16, undef, hi16
+ // t2: sgpr_32 = COPY_TO_REGCLASS t1
+ // ... = t2: sgpr_32
+ NewValue = createVGPR16ToSGPR32(SDValue(N, 0), DL, VT, CurDAG);
+ }
+ for (auto &[User, OperandNo] : ToFix) {
+ SmallVector<SDValue, 8> NewOps(User->op_begin(), User->op_end());
+ NewOps[OperandNo] = NewValue;
+ CurDAG->UpdateNodeOperands(User, NewOps);
+ }
+ return true;
+}
+
void AMDGPUDAGToDAGISel::PostprocessISelDAG() {
const AMDGPUTargetLowering& Lowering =
*static_cast<const AMDGPUTargetLowering*>(getTargetLowering());
@@ -4792,6 +5069,9 @@ void AMDGPUDAGToDAGISel::PostprocessISelDAG() {
SelectionDAG::allnodes_iterator Position = CurDAG->allnodes_begin();
while (Position != CurDAG->allnodes_end()) {
SDNode *Node = &*Position++;
+
+ IsModified = Legalize16BitRegClass(Node);
+
MachineSDNode *MachineNode = dyn_cast<MachineSDNode>(Node);
if (!MachineNode)
continue;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
index 2bcfe530b39473..ecc6d7f3ec5d8e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
@@ -312,6 +312,8 @@ class AMDGPUDAGToDAGISel : public SelectionDAGISel {
void SelectINTRINSIC_VOID(SDNode *N);
void SelectWAVE_ADDRESS(SDNode *N);
void SelectSTACKRESTORE(SDNode *N);
+ bool Legalize16BitRegClass(SDNode *N);
+ const TargetRegisterClass *inferDefRegClass(SDNode *N) const;
protected:
// Include the pieces autogenerated from the target description.
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index a55208053099ca..140d64adb70350 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -21123,8 +21123,11 @@ SITargetLowering::getRegClassFor(MVT VT, bool isDivergent) const {
if (RC == &AMDGPU::VReg_1RegClass && !isDivergent)
return Subtarget->isWave64() ? &AMDGPU::SReg_64RegClass
: &AMDGPU::SReg_32RegClass;
- if (!TRI->isSGPRClass(RC) && !isDivergent)
+ if (!TRI->isSGPRClass(RC) && !isDivergent) {
+ if (VT.getSizeInBits() == 16 && Subtarget->useRealTrue16Insts())
+ return RC;
return TRI->getEquivalentSGPRClass(RC);
+ }
if (TRI->isSGPRClass(RC) && isDivergent) {
if (Subtarget->hasGFX90AInsts())
return TRI->getEquivalentAVClass(RC);
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 29a22a324447e4..b6df182ae3cb56 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6527,6 +6527,15 @@ void SIInstrInfo::legalizeOpWithMove(MachineInstr &MI, unsigned OpIdx) const {
.addImm(AMDGPU::sub0_sub1)
.addReg(Low64, RegState::Kill)
.addImm(AMDGPU::sub2_sub3);
+ } else if (Size == 16 && ST.useRealTrue16Insts() && Opcode == AMDGPU::COPY) {
+ // SGPR32 to VGPR16
+ const TargetRegisterClass *CurrRC = MRI.getRegClass(MO.getReg());
+ const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(CurrRC);
+ Register Reg = MRI.createVirtualRegister(VRC);
+ BuildMI(*MBB, I, DL, get(Opcode), Reg).add(MO);
+ MO.ChangeToRegister(Reg, false);
+ legalizeOperandsVALUt16(MI, OpIdx, MRI);
+ return;
} else {
BuildMI(*MBB, I, DL, get(Opcode), Reg).add(MO);
}
@@ -8070,6 +8079,31 @@ bool SIInstrWorklist::isDeferred(MachineInstr *MI) {
return DeferredList.contains(MI);
}
+// Create VReg32 for MI dst. This is called when a SALU16 (dst32)
+// is moved to VALU16 (dst16) to preserved the register size of dst operand
+static Register tryCreateLo16ToVReg32(MachineInstr &MI,
+ const SIInstrInfo *TII) {
+ MachineOperand DstOp = MI.getOperand(0);
+ assert(DstOp.isReg() && DstOp.isDef());
+ Register DstReg = DstOp.getReg();
+ MachineBasicBlock *MBB = MI.getParent();
+ MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
+ // check dst reg size
+ if (!MRI.constrainRegClass(DstReg, &AMDGPU::VGPR_16RegClass))
+ return DstReg;
+ const DebugLoc &DL = MI.getDebugLoc();
+ Register NewDstReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
+ Register Undef = MRI.createVirtualRegister(&AMDGPU::VGPR_16RegClass);
+ BuildMI(*MBB, &MI, DL, TII->get(AMDGPU::IMPLICIT_DEF), Undef);
+ BuildMI(*MBB, std::next(MI.getIterator()), DL, TII->get(AMDGPU::REG_SEQUENCE),
+ NewDstReg)
+ .addReg(DstReg)
+ .addImm(AMDGPU::lo16)
+ .addReg(Undef)
+ .addImm(AMDGPU::hi16);
+ return NewDstReg;
+}
+
// Legalize size mismatches between 16bit and 32bit registers in v2s copy
// lowering (change sgpr to vgpr).
// This is mainly caused by 16bit SALU and 16bit VALU using reg with different
@@ -8702,7 +8736,6 @@ void SIInstrInfo::moveToVALUImpl(
.addImm(0) // clamp
.addImm(0); // omod
MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
-
legalizeOperands(*NewInstr, MDT);
addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
Inst.eraseFromParent();
@@ -8721,6 +8754,8 @@ void SIInstrInfo::moveToVALUImpl(
.addImm(0) // clamp
.addImm(0) // omod
.addImm(0); // opsel0
+ if (ST.useRealTrue16Insts())
+ NewDst = tryCreateLo16ToVReg32(*NewInstr, this);
MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
legalizeOperands(*NewInstr, MDT);
addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
@@ -8743,6 +8778,8 @@ void SIInstrInfo::moveToVALUImpl(
.setMIFlags(Inst.getFlags());
if (AMDGPU::hasNamedOperand(NewOpcode, AMDGPU::OpName::op_sel))
NewInstr.addImm(0); // opsel0
+ if (ST.useRealTrue16Insts())
+ NewDst = tryCreateLo16ToVReg32(*NewInstr, this);
MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
legalizeOperands(*NewInstr, MDT);
addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
@@ -8817,38 +8854,6 @@ void SIInstrInfo::moveToVALUImpl(
}
}
- // If this is a v2s copy between 16bit and 32bit reg,
- // replace vgpr copy to reg_sequence/extract_subreg
- // This can be remove after we have sgpr16 in place
- if (ST.useRealTrue16Insts() && Inst.isCopy() &&
- Inst.getOperand(1).getReg().isVirtual() &&
- RI.isVGPR(MRI, Inst.getOperand(1).getReg())) {
- const TargetRegisterClass *SrcRegRC = getOpRegClass(Inst, 1);
- if (RI.getMatchingSuperRegClass(NewDstRC, SrcRegRC, AMDGPU::lo16)) {
- Register NewDstReg = MRI.createVirtualRegister(NewDstRC);
- Register Undef = MRI.createVirtualRegister(&AMDGPU::VGPR_16RegClass);
- BuildMI(*Inst.getParent(), &Inst, Inst.getDebugLoc(),
- get(AMDGPU::IMPLICIT_DEF), Undef);
- BuildMI(*Inst.getParent(), &Inst, Inst.getDebugLoc(),
- get(AMDGPU::REG_SEQUENCE), NewDstReg)
- .addReg(Inst.getOperand(1).getReg())
- .addImm(AMDGPU::lo16)
- .addReg(Undef)
- .addImm(AMDGPU::hi16);
- Inst.eraseFromParent();
- MRI.replaceRegWith(DstReg, NewDstReg);
- addUsersToMoveToVALUWorklist(NewDstReg, MRI, Worklist);
- return;
- } else if (RI.getMatchingSuperRegClass(SrcRegRC, NewDstRC,
- AMDGPU::lo16)) {
- Inst.getOperand(1).setSubReg(AMDGPU::lo16);
- Register NewDstReg = MRI.createVirtualRegister(NewDstRC);
- MRI.replaceRegWith(DstReg, NewDstReg);
- addUsersToMoveToVALUWorklist(NewDstReg, MRI, Worklist);
- return;
- }
- }
-
Register NewDstReg = MRI.createVirtualRegister(NewDstRC);
MRI.replaceRegWith(DstReg, NewDstReg);
legalizeOperands(Inst, MDT);
@@ -8937,6 +8942,9 @@ void SIInstrInfo::moveToVALUImpl(
const TargetRegisterClass *NewDstRC = getDestEquivalentVGPRClass(*NewInstr);
assert(NewDstRC);
NewDstReg = MRI.createVirtualRegister(NewDstRC);
+ NewInstr->getOperand(0).setReg(NewDstReg);
+ if (ST.useRealTrue16Insts())
+ NewDstReg = tryCreateLo16ToVReg32(*NewInstr, this);
MRI.replaceRegWith(DstReg, NewDstReg);
}
fixImplicitOperands(*NewInstr);
@@ -9819,24 +9827,21 @@ void SIInstrInfo::movePackToVALU(SIInstrWorklist &Worklist,
SrcReg1 = Src1.getReg();
}
- bool isSrc0Reg16 = MRI.constrainRegClass(SrcReg0, &AMDGPU::VGPR_16RegClass);
- bool isSrc1Reg16 = MRI.constrainRegClass(SrcReg1, &AMDGPU::VGPR_16RegClass);
-
auto NewMI = BuildMI(*MBB, Inst, DL, get(AMDGPU::REG_SEQUENCE), ResultReg);
switch (Inst.getOpcode()) {
case AMDGPU::S_PACK_LL_B32_B16:
NewMI
.addReg(SrcReg0, {},
- isSrc0Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
+ AMDGPU::lo16)
.addImm(AMDGPU::lo16)
.addReg(SrcReg1, {},
- isSrc1Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
+ AMDGPU::lo16)
.addImm(AMDGPU::hi16);
break;
case AMDGPU::S_PACK_LH_B32_B16:
NewMI
.addReg(SrcReg0, {},
- isSrc0Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
+ AMDGPU::lo16)
.addImm(AMDGPU::lo16)
.addReg(SrcReg1, {}, AMDGPU::hi16)
.addImm(AMDGPU::hi16);
@@ -9845,7 +9850,7 @@ void SIInstrInfo::movePackToVALU(SIInstrWorklist &Worklist,
NewMI.addReg(SrcReg0, {}, AMDGPU::hi16)
.addImm(AMDGPU::lo16)
.addReg(SrcReg1, {},
- isSrc1Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
+ AMDGPU::lo16)
.addImm(AMDGPU::hi16);
break;
case AMDGPU::S_PACK_HH_B32_B16:
diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
index ed1f38afc298d9..70f63c16b2b105 100644
--- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
@@ -1799,44 +1799,22 @@ def : GCNPat <
let True16Predicate = UseRealTrue16Insts in {
def : GCNPat<
- (i32 (UniformUnaryFrag<anyext> i16:$src)),
- (COPY $src)
->;
-
-def : GCNPat<
- (i32 (DivergentUnaryFrag<anyext> i16:$src)),
+ (i32 (anyext i16:$src)),
(REG_SEQUENCE VGPR_32, $src, lo16, (i16 (IMPLICIT_DEF)), hi16)
>;
def : GCNPat<
- (i64 (UniformUnaryFrag<anyext> i16:$src)),
- (REG_SEQUENCE VReg_64,
- (i32 (COPY $src)), sub0,
- (V_MOV_B32_e32 (i32 0)), sub1)
->;
-
-def : GCNPat<
- (i64 (DivergentUnaryFrag<anyext> i16:$src)),
+ (i64 (anyext i16:$src)),
(REG_SEQUENCE VReg_64, $src, lo16, (i16 (IMPLICIT_DEF)), hi16, (i32 (IMPLICIT_DEF)), sub1)
>;
def : GCNPat<
- (i16 (UniformUnaryFrag<trunc> i32:$src)),
- (COPY $src)
->;
-
-def : GCNPat<
- (i16 (DivergentUnaryFrag<trunc> i32:$src)),
+ (i16 (trunc i32:$src)),
(EXTRACT_SUBREG $src, lo16)
>;
def : GCNPat <
- (i16 (UniformUnaryFrag<trunc> i64:$src)),
- (EXTRACT_SUBREG $src, sub0)
->;
-
-def : GCNPat <
- (i16 (DivergentUnaryFrag<trunc> i64:$src)),
+ (i16 (trunc i64:$src)),
(EXTRACT_SUBREG $src, lo16)
>;
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
index 5738dd30112c51..620c80f53264d6 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
@@ -3,7 +3,7 @@
; RUN: llc -global-isel -mtriple=amdgpu8.03-amd-amdpal -o - %s | FileCheck -check-prefix=GFX8 %s
; RUN: llc -global-isel -mtriple=amdgpu9.00-amd-amdpal -o - %s | FileCheck -check-prefix=GFX9 %s
; RUN: llc -global-isel -mtriple=amdgpu10.10-amd-amdpal -o - %s | FileCheck -check-prefix=GFX10 %s
-; RUN: llc -global-isel -mtriple=amdgpu11.00-amd-amdpal -amdgpu-enable-delay-alu=0 -o - %s | FileCheck -check-prefix=GFX10 %s
+; RUN: llc -global-isel -mtriple=amdgpu11.00-amd-amdpal -amdgpu-enable-delay-alu=0 -o - %s | FileCheck -check-prefix=GFX11 %s
define amdgpu_ps i32 @s_bswap_i32(i32 inreg %src) {
; GFX7-LABEL: s_bswap_i32:
@@ -36,6 +36,12 @@ define amdgpu_ps i32 @s_bswap_i32(i32 inreg %src) {
; GFX10-NEXT: v_perm_b32 v0, 0, s0, 0x10203
; GFX10-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-NEXT: ; return to shader part epilog
+;
+; GFX11-LABEL: s_bswap_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: v_perm_b32 v0, 0, s0, 0x10203
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-NEXT: ; return to shader part epilog
%bswap = call i32 @llvm.bswap.i32(i32 %src)
ret i32 %bswap
}
@@ -69,6 +75,12 @@ define i32 @v_bswap_i32(i32 %src) {
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0x10203
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0x10203
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call i32 @llvm.bswap.i32(i32 %src)
ret i32 %bswap
}
@@ -116,6 +128,14 @@ define amdgpu_ps <2 x i32> @s_bswap_v2i32(<2 x i32> inreg %src) {
; GFX10-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-NEXT: v_readfirstlane_b32 s1, v1
; GFX10-NEXT: ; return to shader part epilog
+;
+; GFX11-LABEL: s_bswap_v2i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: v_perm_b32 v0, 0, s0, 0x10203
+; GFX11-NEXT: v_perm_b32 v1, 0, s1, 0x10203
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-NEXT: v_readfirstlane_b32 s1, v1
+; GFX11-NEXT: ; return to shader part epilog
%bswap = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %src)
ret <2 x i32> %bswap
}
@@ -155,6 +175,13 @@ define <2 x i32> @v_bswap_v2i32(<2 x i32> %src) {
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0x10203
; GFX10-NEXT: v_perm_b32 v1, 0, v1, 0x10203
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_v2i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0x10203
+; GFX11-NEXT: v_perm_b32 v1, 0, v1, 0x10203
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %src)
ret <2 x i32> %bswap
}
@@ -202,6 +229,14 @@ define amdgpu_ps i64 @s_bswap_i64(i64 inreg %src) {
; GFX10-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-NEXT: v_readfirstlane_b32 s1, v1
; GFX10-NEXT: ; return to shader part epilog
+;
+; GFX11-LABEL: s_bswap_i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: v_perm_b32 v0, 0, s1, 0x10203
+; GFX11-NEXT: v_perm_b32 v1, 0, s0, 0x10203
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-NEXT: v_readfirstlane_b32 s1, v1
+; GFX11-NEXT: ; return to shader part epilog
%bswap = call i64 @llvm.bswap.i64(i64 %src)
ret i64 %bswap
}
@@ -245,6 +280,14 @@ define i64 @v_bswap_i64(i64 %src) {
; GFX10-NEXT: v_perm_b32 v1, 0, v0, 0x10203
; GFX10-NEXT: v_mov_b32_e32 v0, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v2, 0, v1, 0x10203
+; GFX11-NEXT: v_perm_b32 v1, 0, v0, 0x10203
+; GFX11-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call i64 @llvm.bswap.i64(i64 %src)
ret i64 %bswap
}
@@ -316,6 +359,18 @@ define amdgpu_ps <2 x i64> @s_bswap_v2i64(<2 x i64> inreg %src) {
; GFX10-NEXT: v_readfirstlane_b32 s2, v2
; GFX10-NEXT: v_readfirstlane_b32 s3, v3
; GFX10-NEXT: ; return to shader part epilog
+;
+; GFX11-LABEL: s_bswap_v2i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: v_perm_b32 v0, 0, s1, 0x10203
+; GFX11-NEXT: v_perm_b32 v1, 0, s0, 0x10203
+; GFX11-NEXT: v_perm_b32 v2, 0, s3, 0x10203
+; GFX11-NEXT: v_perm_b32 v3, 0, s2, 0x10203
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-NEXT: v_readfirstlane_b32 s1, v1
+; GFX11-NEXT: v_readfirstlane_b32 s2, v2
+; GFX11-NEXT: v_readfirstlane_b32 s3, v3
+; GFX11-NEXT: ; return to shader part epilog
%bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %src)
ret <2 x i64> %bswap
}
@@ -375,6 +430,17 @@ define <2 x i64> @v_bswap_v2i64(<2 x i64> %src) {
; GFX10-NEXT: v_mov_b32_e32 v0, v4
; GFX10-NEXT: v_mov_b32_e32 v2, v5
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_v2i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v4, 0, v1, 0x10203
+; GFX11-NEXT: v_perm_b32 v5, 0, v3, 0x10203
+; GFX11-NEXT: v_perm_b32 v1, 0, v0, 0x10203
+; GFX11-NEXT: v_perm_b32 v3, 0, v2, 0x10203
+; GFX11-NEXT: v_mov_b32_e32 v0, v4
+; GFX11-NEXT: v_mov_b32_e32 v2, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %src)
ret <2 x i64> %bswap
}
@@ -408,6 +474,12 @@ define amdgpu_ps i16 @s_bswap_i16(i16 inreg %src) {
; GFX10-NEXT: v_perm_b32 v0, 0, s0, 0xc0c0001
; GFX10-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-NEXT: ; return to shader part epilog
+;
+; GFX11-LABEL: s_bswap_i16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: v_perm_b32 v0, 0, s0, 0xc0c0001
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-NEXT: ; return to shader part epilog
%bswap = call i16 @llvm.bswap.i16(i16 %src)
ret i16 %bswap
}
@@ -440,6 +512,12 @@ define i16 @v_bswap_i16(i16 %src) {
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0xc0c0001
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_i16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0xc0c0001
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call i16 @llvm.bswap.i16(i16 %src)
ret i16 %bswap
}
@@ -481,6 +559,12 @@ define amdgpu_ps i32 @s_bswap_v2i16(<2 x i16> inreg %src) {
; GFX10-NEXT: v_perm_b32 v0, 0, s0, 0x2030001
; GFX10-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-NEXT: ; return to shader part epilog
+;
+; GFX11-LABEL: s_bswap_v2i16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: v_perm_b32 v0, 0, s0, 0x2030001
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-NEXT: ; return to shader part epilog
%bswap = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %src)
%cast = bitcast <2 x i16> %bswap to i32
ret i32 %cast
@@ -515,6 +599,12 @@ define i32 @v_bswap_i16_zext_to_i32(i16 %src) {
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0xc0c0001
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_i16_zext_to_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0xc0c0001
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call i16 @llvm.bswap.i16(i16 %src)
%zext = zext i16 %bswap to i32
ret i32 %zext
@@ -552,6 +642,13 @@ define i32 @v_bswap_i16_sext_to_i32(i16 %src) {
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0xc0c0001
; GFX10-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_i16_sext_to_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0xc0c0001
+; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call i16 @llvm.bswap.i16(i16 %src)
%zext = sext i16 %bswap to i32
ret i32 %zext
@@ -591,6 +688,12 @@ define <2 x i16> @v_bswap_v2i16(<2 x i16> %src) {
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0x2030001
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_v2i16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0x2030001
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %src)
ret <2 x i16> %bswap
}
@@ -636,6 +739,13 @@ define <3 x i16> @v_bswap_v3i16(<3 x i16> %src) {
; GFX10-NEXT: v_perm_b32 v0, 0, v0, 0x2030001
; GFX10-NEXT: v_perm_b32 v1, 0, v1, 0x2030001
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_v3i16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v0, 0, v0, 0x2030001
+; GFX11-NEXT: v_perm_b32 v1, 0, v1, 0x2030001
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%bswap = call <3 x i16> @llvm.bswap.v3i16(<3 x i16> %src)
ret <3 x i16> %bswap
}
@@ -679,6 +789,14 @@ define i64 @v_bswap_i48(i64 %src) {
; GFX10-NEXT: v_perm_b32 v2, 0, v0, 0x10203
; GFX10-NEXT: v_lshrrev_b64 v[0:1], 16, v[1:2]
; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_bswap_i48:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_perm_b32 v1, 0, v1, 0x10203
+; GFX11-NEXT: v_perm_b32 v2, 0, v0, 0x10203
+; GFX11-NEXT: v_lshrrev_b64 v[0:1], 16, v[1:2]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
%trunc = trunc i64 %src to i48
%bswap = call i48 @llvm.bswap.i48(i48 %trunc)
%zext = zext i48 %bswap to i64
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index 7be6ad4575d694..aa50d4af06bc99 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -10970,778 +10970,1561 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32i32_to_v128i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_xor_saveexec_b32 s4, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v23, s32
-; GFX11-NEXT: scratch_store_b32 off, v24, s32 offset:4
-; GFX11-NEXT: scratch_store_b32 off, v25, s32 offset:8
-; GFX11-NEXT: scratch_store_b32 off, v26, s32 offset:12
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v23, s34, 0
-; GFX11-NEXT: v_writelane_b32 v23, s35, 1
-; GFX11-NEXT: v_writelane_b32 v23, s36, 2
-; GFX11-NEXT: v_writelane_b32 v23, s37, 3
-; GFX11-NEXT: v_writelane_b32 v23, s38, 4
-; GFX11-NEXT: v_writelane_b32 v23, s39, 5
-; GFX11-NEXT: v_writelane_b32 v23, s48, 6
-; GFX11-NEXT: v_writelane_b32 v23, s49, 7
-; GFX11-NEXT: v_writelane_b32 v23, s50, 8
-; GFX11-NEXT: v_writelane_b32 v23, s51, 9
-; GFX11-NEXT: v_writelane_b32 v23, s52, 10
-; GFX11-NEXT: v_writelane_b32 v23, s53, 11
-; GFX11-NEXT: v_writelane_b32 v23, s54, 12
-; GFX11-NEXT: v_writelane_b32 v23, s55, 13
-; GFX11-NEXT: v_writelane_b32 v23, s64, 14
-; GFX11-NEXT: v_writelane_b32 v23, s65, 15
-; GFX11-NEXT: v_writelane_b32 v23, s66, 16
-; GFX11-NEXT: v_writelane_b32 v23, s67, 17
-; GFX11-NEXT: v_writelane_b32 v23, s68, 18
-; GFX11-NEXT: v_writelane_b32 v23, s69, 19
-; GFX11-NEXT: v_writelane_b32 v23, s70, 20
-; GFX11-NEXT: v_writelane_b32 v23, s71, 21
-; GFX11-NEXT: v_writelane_b32 v23, s80, 22
-; GFX11-NEXT: v_writelane_b32 v23, s81, 23
-; GFX11-NEXT: v_writelane_b32 v23, s82, 24
-; GFX11-NEXT: v_writelane_b32 v23, s83, 25
-; GFX11-NEXT: v_writelane_b32 v23, s84, 26
-; GFX11-NEXT: v_writelane_b32 v23, s85, 27
-; GFX11-NEXT: v_writelane_b32 v23, s86, 28
-; GFX11-NEXT: v_writelane_b32 v23, s87, 29
-; GFX11-NEXT: v_writelane_b32 v23, s96, 30
-; GFX11-NEXT: v_writelane_b32 v23, s97, 31
-; GFX11-NEXT: v_writelane_b32 v24, s98, 0
-; GFX11-NEXT: v_writelane_b32 v24, s99, 1
-; GFX11-NEXT: v_writelane_b32 v24, s100, 2
-; GFX11-NEXT: v_writelane_b32 v24, s101, 3
-; GFX11-NEXT: v_writelane_b32 v24, s102, 4
-; GFX11-NEXT: v_writelane_b32 v24, s103, 5
-; GFX11-NEXT: v_writelane_b32 v24, s104, 6
-; GFX11-NEXT: v_writelane_b32 v24, s30, 7
-; GFX11-NEXT: v_writelane_b32 v24, s31, 8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s7, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s9, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s11, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s13, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s15, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s103, 0
-; GFX11-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
-; GFX11-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s8, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 18
-; GFX11-NEXT: s_lshr_b32 s43, s12, 16
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: s_lshr_b32 s31, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 19
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
-; GFX11-NEXT: s_lshr_b32 s42, s4, 16
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 20
-; GFX11-NEXT: s_lshr_b32 s43, s20, 16
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 21
-; GFX11-NEXT: s_lshr_b32 s43, s20, 8
-; GFX11-NEXT: s_lshr_b32 s61, s6, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: s_lshr_b32 s48, s9, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 22
-; GFX11-NEXT: s_lshr_b32 s43, s19, 8
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 23
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 24
-; GFX11-NEXT: s_lshr_b32 s43, s18, 8
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 25
-; GFX11-NEXT: s_lshr_b32 s43, s17, 24
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 26
-; GFX11-NEXT: s_lshr_b32 s43, s17, 16
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 27
-; GFX11-NEXT: s_lshr_b32 s43, s17, 8
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 28
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 29
-; GFX11-NEXT: s_lshr_b32 s43, s16, 8
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 30
-; GFX11-NEXT: s_lshr_b32 s43, s3, 24
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 31
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 0
-; GFX11-NEXT: s_lshr_b32 s43, s3, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 1
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 2
-; GFX11-NEXT: s_lshr_b32 s43, s2, 8
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 3
-; GFX11-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 4
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 5
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 6
-; GFX11-NEXT: s_lshr_b32 s43, s0, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 7
-; GFX11-NEXT: s_lshr_b32 s43, s0, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: s_mov_b32 s103, -1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s42, 0
-; GFX11-NEXT: v_writelane_b32 v26, s43, 1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s72, 2
-; GFX11-NEXT: v_writelane_b32 v26, s73, 3
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 4
-; GFX11-NEXT: v_writelane_b32 v26, s73, 5
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 6
-; GFX11-NEXT: v_writelane_b32 v26, s73, 7
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 8
-; GFX11-NEXT: v_writelane_b32 v26, s73, 9
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 10
-; GFX11-NEXT: v_writelane_b32 v26, s73, 11
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 12
-; GFX11-NEXT: v_writelane_b32 v26, s73, 13
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 14
-; GFX11-NEXT: v_writelane_b32 v26, s73, 15
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_and_b32 s43, s103, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_mov_b32 s103, s31
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_mov_b32 s31, s42
-; GFX11-NEXT: s_mov_b32 s42, s61
-; GFX11-NEXT: s_mov_b32 s43, s48
-; GFX11-NEXT: v_readlane_b32 s48, v26, 18
-; GFX11-NEXT: v_readlane_b32 s61, v26, 19
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 20
-; GFX11-NEXT: s_lshr_b32 s72, s20, 16
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 21
-; GFX11-NEXT: s_lshr_b32 s72, s20, 8
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 22
-; GFX11-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 23
-; GFX11-NEXT: s_lshr_b32 s72, s18, 16
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 24
-; GFX11-NEXT: s_lshr_b32 s72, s18, 8
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 25
-; GFX11-NEXT: s_lshr_b32 s72, s17, 24
-; GFX11-NEXT: s_add_i32 s12, s12, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s14, s14, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 26
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s40, s40, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 27
-; GFX11-NEXT: s_lshr_b32 s72, s17, 8
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 28
-; GFX11-NEXT: s_lshr_b32 s72, s16, 16
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 29
-; GFX11-NEXT: s_lshr_b32 s72, s16, 8
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 30
-; GFX11-NEXT: s_lshr_b32 s72, s3, 24
-; GFX11-NEXT: s_lshr_b32 s103, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 31
-; GFX11-NEXT: s_lshr_b32 s72, s3, 16
-; GFX11-NEXT: s_lshr_b32 s31, s4, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 0
-; GFX11-NEXT: s_lshr_b32 s72, s3, 8
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 1
-; GFX11-NEXT: s_lshr_b32 s72, s2, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 2
-; GFX11-NEXT: s_lshr_b32 s72, s2, 8
-; GFX11-NEXT: s_lshr_b32 s43, s9, 24
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 3
-; GFX11-NEXT: s_lshr_b32 s72, s1, 24
-; GFX11-NEXT: s_lshr_b32 s48, s8, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 4
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 5
-; GFX11-NEXT: s_lshr_b32 s72, s1, 8
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 6
-; GFX11-NEXT: s_lshr_b32 s72, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s61, s12, 16
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 7
-; GFX11-NEXT: s_lshr_b32 s72, s0, 8
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s73, v25, 7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v2, s73, vcc_lo, v1
-; GFX11-NEXT: v_readlane_b32 s73, v25, 8
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v3, s0, s73, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 6
-; GFX11-NEXT: v_perm_b32 v21, s70, s79, v1
-; GFX11-NEXT: v_perm_b32 v22, s77, s78, v1
-; GFX11-NEXT: v_perm_b32 v17, s21, s68, v1
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v2
-; GFX11-NEXT: v_perm_b32 v4, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 2
-; GFX11-NEXT: v_readlane_b32 s1, v25, 5
-; GFX11-NEXT: v_readlane_b32 s70, v23, 20
-; GFX11-NEXT: v_readlane_b32 s68, v23, 18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s0, s94, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 3
-; GFX11-NEXT: v_perm_b32 v6, s2, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v7, s3, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 29
-; GFX11-NEXT: v_perm_b32 v8, s0, s92, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v9, s16, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 28
-; GFX11-NEXT: v_perm_b32 v10, s17, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v11, s0, s90, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 25
-; GFX11-NEXT: v_perm_b32 v12, s18, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 23
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v13, s19, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 21
-; GFX11-NEXT: v_perm_b32 v14, s0, s88, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 20
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v15, s0, s74, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 22
-; GFX11-NEXT: v_perm_b32 v16, s20, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v18, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 31
-; GFX11-NEXT: v_readlane_b32 s1, v25, 0
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v19, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 26
-; GFX11-NEXT: v_readlane_b32 s1, v26, 27
-; GFX11-NEXT: v_or_b32_e32 v3, v4, v18
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v19
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v20, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 0
-; GFX11-NEXT: v_or_b32_e32 v4, v6, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v5, v7, v5
-; GFX11-NEXT: v_perm_b32 v6, s102, s101, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14
-; GFX11-NEXT: v_readlane_b32 s1, v26, 1
-; GFX11-NEXT: v_perm_b32 v14, s7, s36, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v20
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v11
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v21
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22
-; GFX11-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v3
-; GFX11-NEXT: v_or_b32_e32 v4, v12, v4
-; GFX11-NEXT: v_or_b32_e32 v5, v13, v5
-; GFX11-NEXT: v_perm_b32 v9, s22, s76, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v15
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v11, s25, s87, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:16
-; GFX11-NEXT: v_or_b32_e32 v2, v16, v7
-; GFX11-NEXT: v_or_b32_e32 v3, v17, v8
-; GFX11-NEXT: v_perm_b32 v5, s99, s0, v1
-; GFX11-NEXT: v_perm_b32 v7, s23, s100, v1
-; GFX11-NEXT: v_perm_b32 v8, s97, s96, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 2
-; GFX11-NEXT: v_readlane_b32 s1, v26, 3
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v9, s24, s98, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v12, s86, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v5, v7, v6
-; GFX11-NEXT: v_readlane_b32 s0, v26, 4
-; GFX11-NEXT: v_readlane_b32 s1, v26, 5
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v10
-; GFX11-NEXT: v_or_b32_e32 v7, v11, v8
-; GFX11-NEXT: v_perm_b32 v8, s26, s85, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s83, s82, v1
-; GFX11-NEXT: v_perm_b32 v11, s81, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
-; GFX11-NEXT: v_perm_b32 v2, s71, s69, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 6
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s27, s84, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s28, s80, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s29, s67, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s66, s0, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 7
-; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_perm_b32 v4, s40, s65, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s55, s54, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 8
-; GFX11-NEXT: v_readlane_b32 s1, v26, 9
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
-; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s41, s64, v1
-; GFX11-NEXT: v_perm_b32 v11, s62, s0, v1
-; GFX11-NEXT: v_perm_b32 v6, s53, s60, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; GFX11-NEXT: v_readlane_b32 s0, v26, 10
-; GFX11-NEXT: v_readlane_b32 s1, v26, 11
-; GFX11-NEXT: v_perm_b32 v8, s14, s63, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s15, s52, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s61, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX11-NEXT: v_readlane_b32 s0, v26, 12
-; GFX11-NEXT: v_readlane_b32 s1, v26, 13
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_perm_b32 v8, s12, s58, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s56, s57, v1
-; GFX11-NEXT: v_perm_b32 v11, s51, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
-; GFX11-NEXT: v_perm_b32 v2, s49, s47, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s13, s59, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s10, s50, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s11, s46, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s48, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_perm_b32 v4, s8, s44, v1
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s39, s43, v1
-; GFX11-NEXT: v_perm_b32 v11, s42, s72, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 15
-; GFX11-NEXT: v_perm_b32 v12, s6, s38, v1
-; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s9, s45, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_readlane_b32 s0, v26, 16
-; GFX11-NEXT: v_readlane_b32 s1, v26, 17
-; GFX11-NEXT: v_readlane_b32 s102, v24, 4
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v10
-; GFX11-NEXT: v_perm_b32 v10, s37, s35, v1
-; GFX11-NEXT: v_readlane_b32 s101, v24, 3
-; GFX11-NEXT: v_readlane_b32 s100, v24, 2
-; GFX11-NEXT: v_readlane_b32 s99, v24, 1
-; GFX11-NEXT: v_readlane_b32 s98, v24, 0
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10
-; GFX11-NEXT: v_or_b32_e32 v10, v12, v11
-; GFX11-NEXT: v_perm_b32 v12, s31, s0, v1
-; GFX11-NEXT: v_readlane_b32 s97, v23, 31
-; GFX11-NEXT: v_readlane_b32 s96, v23, 30
-; GFX11-NEXT: v_or_b32_e32 v11, v14, v13
-; GFX11-NEXT: v_perm_b32 v13, s4, s34, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-NEXT: v_readlane_b32 s87, v23, 29
-; GFX11-NEXT: v_readlane_b32 s86, v23, 28
-; GFX11-NEXT: v_readlane_b32 s85, v23, 27
-; GFX11-NEXT: v_readlane_b32 s84, v23, 26
-; GFX11-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX11-NEXT: v_perm_b32 v13, s104, s103, v1
-; GFX11-NEXT: v_perm_b32 v1, s5, s30, v1
-; GFX11-NEXT: v_readlane_b32 s30, v24, 7
-; GFX11-NEXT: v_readlane_b32 s31, v24, 8
-; GFX11-NEXT: v_readlane_b32 s104, v24, 6
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_readlane_b32 s103, v24, 5
-; GFX11-NEXT: v_readlane_b32 s83, v23, 25
-; GFX11-NEXT: v_readlane_b32 s82, v23, 24
-; GFX11-NEXT: v_readlane_b32 s81, v23, 23
-; GFX11-NEXT: v_or_b32_e32 v13, v1, v13
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
-; GFX11-NEXT: v_readlane_b32 s80, v23, 22
-; GFX11-NEXT: v_readlane_b32 s71, v23, 21
-; GFX11-NEXT: v_readlane_b32 s69, v23, 19
-; GFX11-NEXT: v_readlane_b32 s67, v23, 17
-; GFX11-NEXT: v_readlane_b32 s66, v23, 16
-; GFX11-NEXT: v_readlane_b32 s65, v23, 15
-; GFX11-NEXT: v_readlane_b32 s64, v23, 14
-; GFX11-NEXT: v_readlane_b32 s55, v23, 13
-; GFX11-NEXT: v_readlane_b32 s54, v23, 12
-; GFX11-NEXT: v_readlane_b32 s53, v23, 11
-; GFX11-NEXT: v_readlane_b32 s52, v23, 10
-; GFX11-NEXT: v_readlane_b32 s51, v23, 9
-; GFX11-NEXT: v_readlane_b32 s50, v23, 8
-; GFX11-NEXT: v_readlane_b32 s49, v23, 7
-; GFX11-NEXT: v_readlane_b32 s48, v23, 6
-; GFX11-NEXT: v_readlane_b32 s39, v23, 5
-; GFX11-NEXT: v_readlane_b32 s38, v23, 4
-; GFX11-NEXT: v_readlane_b32 s37, v23, 3
-; GFX11-NEXT: v_readlane_b32 s36, v23, 2
-; GFX11-NEXT: v_readlane_b32 s35, v23, 1
-; GFX11-NEXT: v_readlane_b32 s34, v23, 0
-; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v23, off, s32
-; GFX11-NEXT: scratch_load_b32 v24, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v25, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v26, off, s32 offset:12
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32i32_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x10 ; 68-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:64
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:60
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:56
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:52
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:48
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:44
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:40
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:36
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:28
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:24
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:20
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:16
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s43 :: v_dual_mov_b32 v2, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s43 :: v_dual_mov_b32 v7, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s43 :: v_dual_mov_b32 v9, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s43 :: v_dual_mov_b32 v13, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s43 :: v_dual_mov_b32 v14, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s43 :: v_dual_mov_b32 v16, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s43 :: v_dual_mov_b32 v17, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s43 :: v_dual_mov_b32 v24, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s43 :: v_dual_mov_b32 v30, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v51, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s9 :: v_dual_mov_b32 v66, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s11 :: v_dual_mov_b32 v83, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s10 :: v_dual_mov_b32 v85, s15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s44 :: v_dual_mov_b32 v50, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v64, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s12 :: v_dual_mov_b32 v103, s40
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s44 :: v_dual_mov_b32 v86, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s44 :: v_dual_mov_b32 v102, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v87, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v99, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s44 :: v_dual_mov_b32 v162, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v166, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v134, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v147, s44 :: v_dual_mov_b32 v182, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v44, s43 :: v_dual_mov_b32 v161, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s44 :: v_dual_mov_b32 v58, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s46 :: v_dual_mov_b32 v45, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s46 :: v_dual_mov_b32 v61, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s46 :: v_dual_mov_b32 v20, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v129, s46 :: v_dual_mov_b32 v52, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v98, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s46 :: v_dual_mov_b32 v39, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v144, s44
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s14 :: v_dual_mov_b32 v115, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s41 :: v_dual_mov_b32 v119, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s29 :: v_dual_mov_b32 v131, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s26 :: v_dual_mov_b32 v145, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s24 :: v_dual_mov_b32 v149, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s21 :: v_dual_mov_b32 v151, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v164, s19 :: v_dual_mov_b32 v165, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s17 :: v_dual_mov_b32 v176, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v180, s3 :: v_dual_mov_b32 v181, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v40, s1 :: v_dual_mov_b32 v43, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[4:5], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s42 :: v_dual_mov_b32 v29, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[14:15], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[28:29], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[8:9], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[24:25], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s44 :: v_dual_mov_b32 v51, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s42 :: v_dual_mov_b32 v101, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s42
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s42 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s42 :: v_dual_mov_b32 v39, s7
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s42 :: v_dual_mov_b32 v53, s9
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s42
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v144, s42 :: v_dual_mov_b32 v83, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v176, s16 :: v_dual_mov_b32 v3, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 24
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v40, s1 :: v_dual_mov_b32 v7, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v103, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v164, s19 :: v_dual_mov_b32 v1, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s43 :: v_dual_mov_b32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v13, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 24
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v17, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s41, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s41, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s5 :: v_dual_mov_b32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s41, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s40, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s40, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s24 :: v_dual_mov_b32 v181, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v180, s3 :: v_dual_mov_b32 v5, s42
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s26, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v102, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s5 :: v_dual_mov_b32 v116, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s5 :: v_dual_mov_b32 v128, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v129, s44 :: v_dual_mov_b32 v114, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v133, s4 :: v_dual_mov_b32 v134, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s22, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v162, s4 :: v_dual_mov_b32 v161, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s4 :: v_dual_mov_b32 v163, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v177, s4 :: v_dual_mov_b32 v178, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s18, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s21 :: v_dual_mov_b32 v43, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s5 :: v_dual_mov_b32 v44, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s44 :: v_dual_mov_b32 v85, s15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v46, s4 :: v_dual_mov_b32 v45, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v47, s4 :: v_dual_mov_b32 v56, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s3 :: v_dual_mov_b32 v58, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s2 :: v_dual_mov_b32 v61, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v115, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s11 :: v_dual_mov_b32 v119, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s10 :: v_dual_mov_b32 v131, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s12 :: v_dual_mov_b32 v145, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s14 :: v_dual_mov_b32 v149, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s41 :: v_dual_mov_b32 v151, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s29 :: v_dual_mov_b32 v165, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s26 :: v_dual_mov_b32 v167, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v59, s4 :: v_dual_mov_b32 v60, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v72, s1 :: v_dual_mov_b32 v63, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v146, v72, v146, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v144, v59, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v43, v43, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v181, v181, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v46, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v146
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v144
+; GFX11-TRUE16-NEXT: v_perm_b32 v47, v56, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v117, v183, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v129
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v56, v43, v146
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v58, v181, v144
+; GFX11-TRUE16-NEXT: v_perm_b32 v144, v176, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v146, v44, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v176, v178, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v101, v166, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v128, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v167, v167, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v146
+; GFX11-TRUE16-NEXT: v_perm_b32 v165, v165, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
+; GFX11-TRUE16-NEXT: v_perm_b32 v164, v164, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v179, 16, v176
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v176, v144, v129
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v151, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v98, v147, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v113, v116, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v116, v132, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v80, v99, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v60, v62, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v177, v167, v146
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v178, v165, v117
+; GFX11-TRUE16-NEXT: v_perm_b32 v117, v162, v160, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v148, v149, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v146, v129, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v101, v134, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v102, v130, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v80
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v116, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v87, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v81, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v69, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v54, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v49, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v35, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v32, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v24, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v18, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v13, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v40, v40, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v59, 16, v60
+; GFX11-TRUE16-NEXT: v_perm_b32 v180, v180, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; GFX11-TRUE16-NEXT: v_perm_b32 v144, v150, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v148, v148, v98
+; GFX11-TRUE16-NEXT: v_perm_b32 v98, v145, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v8, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v99, v131, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v118, v102, v80
+; GFX11-TRUE16-NEXT: v_perm_b32 v80, v119, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v69, v115, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v55
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v112, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v103, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v52
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v100, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v96, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v33, 16, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v85, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v84, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v70, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v68, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v66, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v53, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v57, v40, v59
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v59, v180, v47
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v147, v144, v117
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v149, v98, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v51, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v39, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v38, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v37, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v179, v164, v179
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v99, v113
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v119, v80, v81
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v97, v69, v54
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v98, v55, v65
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v99, v64, v52
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v100, v49, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v32, v33
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v31, v34
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v28, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v24, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v18, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v21, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v11, v12
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[56:59], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[176:179], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v10
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[146:149], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[116:119], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[97:100], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[14:17], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-TRUE16-NEXT: s_clause 0x10 ; 68-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:64
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32i32_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v23, s32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v24, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v25, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v26, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s31, 8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s103, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s5, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s4, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s7, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s9, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s11, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s12, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s15, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s14, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s41, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s41, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s29, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s28, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s27, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s27, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s26, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s25, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 15
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s25, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s24, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 13
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s23, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s23, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s0, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 11
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 9
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 6
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[0:1], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: s_mov_b32 s103, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_and_b32 s43, s103, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s103, s31
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s31, s42
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, s61
+; GFX11-FAKE16-NEXT: s_mov_b32 s43, s48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v26, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s61, v26, 19
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s22, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s20, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s20, 8
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s19, 8
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s18, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 24
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s40, s40, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 8
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s16, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s16, 8
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s4, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s7, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s6, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s10, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s13, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s12, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s15, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s14, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s14, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s41, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s41, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s40, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s29, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s28, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s27, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 15
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s26, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s25, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 13
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s23, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s21, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 11
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 9
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[0:1], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_readlane_b32 s73, v25, 7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s73, vcc_lo, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s73, v25, 8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s73, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 6
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, s70, s79, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, s77, s78, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, s21, s68, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v25, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v23, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v23, 18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s0, s94, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s2, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s3, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 29
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s0, s92, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 30
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s16, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 28
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s17, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s0, s90, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 25
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s18, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 23
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s19, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 21
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s0, s88, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 20
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s0, s74, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 22
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s20, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v25, 0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v18
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v19
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s102, s101, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s7, s36, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v20
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v21
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v9, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v12, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v13, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s22, s76, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v15
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s25, s87, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v16, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v17, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s99, s0, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s23, s100, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s97, s96, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s24, s98, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s86, s0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v11, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s85, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s83, s82, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s81, s0, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s71, s69, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s27, s84, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s28, s80, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s29, s67, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s66, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s40, s65, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s55, s54, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 9
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s41, s64, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s62, s0, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s53, s60, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 11
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s14, s63, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s52, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s61, s0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s12, s58, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s56, s57, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s51, s0, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s49, s47, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s13, s59, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s10, s50, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s11, s46, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s48, s0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s8, s44, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s39, s43, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s42, s72, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 15
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s6, s38, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s9, s45, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v24, 4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s37, s35, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v24, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v24, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v24, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v24, 0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v12, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s31, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v23, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v23, 30
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v14, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s4, s34, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v23, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v23, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v23, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v23, 26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v13, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s104, s103, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s5, s30, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v24, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v24, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v24, 6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v24, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v23, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v23, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v23, 23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v1, v13
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v23, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v23, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v23, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v23, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v23, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v23, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v23, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v23, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v23, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v23, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v23, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v23, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v23, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v23, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v23, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v23, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v23, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v23, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v23, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v23, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v23, 0
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v23, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v24, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v25, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v26, off, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -20525,458 +21308,582 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v32i32_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:308
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:292
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:268
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:252
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:228
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:216
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:212
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:208
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:196
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:180
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:176
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:172
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:168
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:160
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:156
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:136
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:132
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:128
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:116
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:108
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:92
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:88
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:68
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:60
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:56
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:40
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s29 :: v_dual_mov_b32 v60, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v59, s27 :: v_dual_mov_b32 v72, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s25 :: v_dual_mov_b32 v90, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v79, s24 :: v_dual_mov_b32 v76, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s23 :: v_dual_mov_b32 v92, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v94, s19 :: v_dual_mov_b32 v105, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v104, s17 :: v_dual_mov_b32 v107, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v120, s16 :: v_dual_mov_b32 v123, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v110, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s1 :: v_dual_mov_b32 v40, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s4 :: v_dual_mov_b32 v46, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s6 :: v_dual_mov_b32 v47, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v56, s9 :: v_dual_mov_b32 v75, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v58, s11 :: v_dual_mov_b32 v73, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s12 :: v_dual_mov_b32 v89, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v88, s15 :: v_dual_mov_b32 v77, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v74, s16 :: v_dual_mov_b32 v91, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v78, s20 :: v_dual_mov_b32 v93, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v95, s22 :: v_dual_mov_b32 v106, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v109, s23 :: v_dual_mov_b32 v122, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v108, s26 :: v_dual_mov_b32 v111, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v124, s27 :: v_dual_mov_b32 v125, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v121, s40 :: v_dual_mov_b32 v126, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v127, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v123, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v105, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v127, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v120, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v90, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v72, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v126, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v125, v111, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v92, v76, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v79, v61, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v93, v78, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v89, v74, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v124, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v60, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v75, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v56, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v46, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v109, v95, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v183, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v91, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v122, v106, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v177, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v88, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v133, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v128, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v118, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v47, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v103, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v43, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v87, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v12, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v182, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v180, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v49, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v165, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v35, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v150, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v137, 16, v137
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v151, v148, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v146, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v18, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v144, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v119, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v115, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v22, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v102, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v100, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v24, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v85, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v83, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v26, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v28, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v136
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v136, v137
; GFX11-TRUE16-NEXT: s_branch .LBB15_3
; GFX11-TRUE16-NEXT: .LBB15_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v123
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v120
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v92
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v90
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v79
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v122
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v109
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v60
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v76, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v106, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v95, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v125
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v111, 0xc0c0004
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v13, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v93
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v89
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v88
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v56
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v43
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v40, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v183
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v182
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v181
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v177
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v151
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v161, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v150, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff, v18
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff, v20
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v16, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v18, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v21
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v147
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v146
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v135
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v132
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v133
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v129
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v128
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v119
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v117
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v114
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v117, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v112, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
@@ -21007,21 +21914,21 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v103
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v102
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v101
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v96
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v85
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v84
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v81
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v70
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v82
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v99, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v22
@@ -21052,31 +21959,31 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v67
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v66
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v65
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v55
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v53
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 3, v49
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v48
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v37
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 3, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v55, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v49, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v49, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v36, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v39, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v34, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v35, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v28
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v37
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v34
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v33
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff, v27
@@ -21084,20 +21991,69 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff, v29
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v33, 0xffff, v33
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28
; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v34
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v34
; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32
; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -46868,890 +47824,1563 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32f32_to_v128i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72
-; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76
-; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80
-; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-NEXT: v_writelane_b32 v75, s31, 8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s7, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s9, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s11, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s13, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s15, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s30, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
-; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
-; GFX11-NEXT: s_cbranch_scc0 .LBB37_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s5, 24
-; GFX11-NEXT: s_lshr_b32 s31, s27, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s5, 16
-; GFX11-NEXT: s_lshr_b32 s34, s27, 16
-; GFX11-NEXT: s_lshr_b32 s36, s27, 8
-; GFX11-NEXT: s_lshr_b32 s35, s26, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s5, 8
-; GFX11-NEXT: s_lshr_b32 s37, s26, 8
-; GFX11-NEXT: s_lshr_b32 s38, s25, 24
-; GFX11-NEXT: s_lshr_b32 s39, s25, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s4, 16
-; GFX11-NEXT: s_lshr_b32 s49, s25, 8
-; GFX11-NEXT: s_lshr_b32 s48, s24, 16
-; GFX11-NEXT: s_lshr_b32 s50, s24, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s4, 8
-; GFX11-NEXT: s_lshr_b32 s51, s23, 24
-; GFX11-NEXT: s_lshr_b32 s52, s23, 16
-; GFX11-NEXT: s_lshr_b32 s54, s23, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s7, 24
-; GFX11-NEXT: s_lshr_b32 s53, s22, 16
-; GFX11-NEXT: s_lshr_b32 s55, s22, 8
-; GFX11-NEXT: s_lshr_b32 s64, s21, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s7, 16
-; GFX11-NEXT: s_lshr_b32 s65, s21, 16
-; GFX11-NEXT: s_lshr_b32 s67, s21, 8
-; GFX11-NEXT: s_lshr_b32 s66, s20, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s7, 8
-; GFX11-NEXT: s_lshr_b32 s68, s20, 8
-; GFX11-NEXT: s_lshr_b32 s69, s19, 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s80, s19, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s6, 8
-; GFX11-NEXT: s_lshr_b32 s71, s18, 16
-; GFX11-NEXT: s_lshr_b32 s81, s18, 8
-; GFX11-NEXT: s_lshr_b32 s82, s17, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s9, 24
-; GFX11-NEXT: s_lshr_b32 s83, s17, 16
-; GFX11-NEXT: s_lshr_b32 s85, s17, 8
-; GFX11-NEXT: s_lshr_b32 s84, s16, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s9, 16
-; GFX11-NEXT: s_lshr_b32 s86, s16, 8
-; GFX11-NEXT: s_lshr_b32 s87, s3, 24
-; GFX11-NEXT: s_lshr_b32 s96, s3, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s9, 8
-; GFX11-NEXT: s_lshr_b32 s98, s3, 8
-; GFX11-NEXT: s_lshr_b32 s97, s2, 16
-; GFX11-NEXT: s_lshr_b32 s99, s2, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s100, s1, 24
-; GFX11-NEXT: s_lshr_b32 s101, s1, 16
-; GFX11-NEXT: s_lshr_b32 s103, s1, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s8, 8
-; GFX11-NEXT: s_lshr_b32 s102, s0, 16
-; GFX11-NEXT: s_lshr_b32 s104, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-NEXT: s_lshr_b32 s42, s11, 24
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-NEXT: s_lshr_b32 s42, s11, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[14:15], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s11, 8
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-NEXT: s_lshr_b32 s42, s10, 8
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-NEXT: s_lshr_b32 s42, s13, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-NEXT: s_lshr_b32 s42, s13, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-NEXT: s_lshr_b32 s42, s13, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-NEXT: s_lshr_b32 s42, s12, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-NEXT: s_lshr_b32 s42, s12, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-NEXT: s_lshr_b32 s42, s15, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-NEXT: s_lshr_b32 s42, s15, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-NEXT: s_lshr_b32 s42, s15, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-NEXT: s_lshr_b32 s42, s14, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-NEXT: s_lshr_b32 s42, s14, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-NEXT: s_lshr_b32 s42, s41, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-NEXT: s_lshr_b32 s42, s41, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-NEXT: s_lshr_b32 s42, s41, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s40, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s40, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s29, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s29, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s29, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s28, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB37_3
-; GFX11-NEXT: .LBB37_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s30, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: .LBB37_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s30, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB37_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v12, s15, 1.0
-; GFX11-NEXT: v_add_f32_e64 v11, s14, 1.0
-; GFX11-NEXT: v_add_f32_e64 v14, s41, 1.0
-; GFX11-NEXT: v_add_f32_e64 v13, s40, 1.0
-; GFX11-NEXT: v_add_f32_e64 v16, s29, 1.0
-; GFX11-NEXT: v_add_f32_e64 v15, s28, 1.0
-; GFX11-NEXT: v_add_f32_e64 v26, s19, 1.0
-; GFX11-NEXT: v_add_f32_e64 v25, s18, 1.0
-; GFX11-NEXT: v_add_f32_e64 v18, s27, 1.0
-; GFX11-NEXT: v_add_f32_e64 v17, s26, 1.0
-; GFX11-NEXT: v_add_f32_e64 v4, s7, 1.0
-; GFX11-NEXT: v_add_f32_e64 v3, s6, 1.0
-; GFX11-NEXT: v_add_f32_e64 v28, s17, 1.0
-; GFX11-NEXT: v_add_f32_e64 v27, s16, 1.0
-; GFX11-NEXT: v_add_f32_e64 v20, s25, 1.0
-; GFX11-NEXT: v_add_f32_e64 v19, s24, 1.0
-; GFX11-NEXT: v_add_f32_e64 v6, s9, 1.0
-; GFX11-NEXT: v_add_f32_e64 v5, s8, 1.0
-; GFX11-NEXT: v_add_f32_e64 v32, s3, 1.0
-; GFX11-NEXT: v_add_f32_e64 v31, s2, 1.0
-; GFX11-NEXT: v_add_f32_e64 v22, s23, 1.0
-; GFX11-NEXT: v_add_f32_e64 v21, s22, 1.0
-; GFX11-NEXT: v_add_f32_e64 v8, s11, 1.0
-; GFX11-NEXT: v_add_f32_e64 v7, s10, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[11:12]
-; GFX11-NEXT: v_add_f32_e64 v34, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v33, s0, 1.0
-; GFX11-NEXT: v_add_f32_e64 v24, s21, 1.0
-; GFX11-NEXT: v_add_f32_e64 v23, s20, 1.0
-; GFX11-NEXT: v_add_f32_e64 v10, s13, 1.0
-; GFX11-NEXT: v_add_f32_e64 v2, s5, 1.0
-; GFX11-NEXT: v_add_f32_e64 v1, s4, 1.0
-; GFX11-NEXT: v_add_f32_e64 v9, s12, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b64 v[35:36], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[25:26]
-; GFX11-NEXT: v_lshrrev_b64 v[36:37], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
-; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[27:28]
-; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[31:32]
-; GFX11-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[33:34]
-; GFX11-NEXT: v_lshrrev_b32_e32 v70, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v69, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v97, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v134, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v133, 8, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 24, v26
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v26
-; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v26
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v25
-; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v25
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 24, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 8, v33
-; GFX11-NEXT: s_branch .LBB37_6
-; GFX11-NEXT: .LBB37_5:
-; GFX11-NEXT: v_dual_mov_b32 v33, s0 :: v_dual_mov_b32 v34, s1
-; GFX11-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-NEXT: v_dual_mov_b32 v31, s2 :: v_dual_mov_b32 v32, s3
-; GFX11-NEXT: v_dual_mov_b32 v27, s16 :: v_dual_mov_b32 v28, s17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v133, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-NEXT: v_dual_mov_b32 v25, s18 :: v_dual_mov_b32 v26, s19
-; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v145, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v131, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
-; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
-; GFX11-NEXT: v_mov_b32_e32 v135, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
-; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v144, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
-; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
-; GFX11-NEXT: v_mov_b32_e32 v132, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
-; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v134, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
-; GFX11-NEXT: v_dual_mov_b32 v72, s104 :: v_dual_mov_b32 v73, s102
-; GFX11-NEXT: v_mov_b32_e32 v128, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v63, s103 :: v_dual_mov_b32 v62, s100
-; GFX11-NEXT: v_dual_mov_b32 v61, s101 :: v_dual_mov_b32 v60, s97
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v57, s99 :: v_dual_mov_b32 v56, s98
-; GFX11-NEXT: v_dual_mov_b32 v58, s96 :: v_dual_mov_b32 v59, s87
-; GFX11-NEXT: v_mov_b32_e32 v130, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v46, s86 :: v_dual_mov_b32 v47, s84
-; GFX11-NEXT: v_dual_mov_b32 v42, s85 :: v_dual_mov_b32 v45, s82
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v115, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v44, s83 :: v_dual_mov_b32 v183, s81
-; GFX11-NEXT: v_dual_mov_b32 v43, s71 :: v_dual_mov_b32 v182, s80
-; GFX11-NEXT: v_mov_b32_e32 v119, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v40, s70 :: v_dual_mov_b32 v41, s69
-; GFX11-NEXT: v_dual_mov_b32 v178, s68 :: v_dual_mov_b32 v181, s66
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v113, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v176, s67 :: v_dual_mov_b32 v179, s65
-; GFX11-NEXT: v_dual_mov_b32 v180, s64 :: v_dual_mov_b32 v167, s55
-; GFX11-NEXT: v_mov_b32_e32 v117, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v177, s53 :: v_dual_mov_b32 v164, s54
-; GFX11-NEXT: v_dual_mov_b32 v165, s52 :: v_dual_mov_b32 v166, s51
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v118, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v160, s50 :: v_dual_mov_b32 v163, s48
-; GFX11-NEXT: v_dual_mov_b32 v150, s49 :: v_dual_mov_b32 v161, s39
-; GFX11-NEXT: v_mov_b32_e32 v114, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v162, s38 :: v_dual_mov_b32 v149, s37
-; GFX11-NEXT: v_dual_mov_b32 v151, s35 :: v_dual_mov_b32 v146, s36
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v116, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v147, s34 :: v_dual_mov_b32 v148, s31
-; GFX11-NEXT: v_dual_mov_b32 v29, s72 :: v_dual_mov_b32 v48, s90
-; GFX11-NEXT: v_mov_b32_e32 v102, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v35, s74 :: v_dual_mov_b32 v50, s94
-; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v52, s62
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v103, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v49, s92 :: v_dual_mov_b32 v54, s58
-; GFX11-NEXT: v_dual_mov_b32 v51, vcc_lo :: v_dual_mov_b32 v64, s56
-; GFX11-NEXT: v_mov_b32_e32 v112, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v66, s44
-; GFX11-NEXT: v_mov_b32_e32 v65, s46
-; GFX11-NEXT: v_mov_b32_e32 v67, s42
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_mov_b32_e32 v97, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v36, s76
-; GFX11-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v101, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v87, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-NEXT: v_mov_b32_e32 v99, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v100, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v96, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v98, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v80, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v85, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v86, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v82, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v84, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v55, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v81, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v83, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v30, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v71, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v39, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v69, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v70, s0
-; GFX11-NEXT: .LBB37_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v67, v73, v67, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v66, v60, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v33, v33, v72, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v68, v61, v62, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v57, v31, v57, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67
-; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66
-; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v34, v34, v63, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_or_b32_e32 v31, v33, v67
-; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v33, v57, v66
-; GFX11-NEXT: v_perm_b32 v66, v44, v45, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v67, v40, v41, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v56, v32, v56, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; GFX11-NEXT: v_perm_b32 v53, v177, v53, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v32, v34, v68
-; GFX11-NEXT: v_perm_b32 v27, v27, v46, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
-; GFX11-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66
-; GFX11-NEXT: v_perm_b32 v68, v25, v183, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_perm_b32 v182, v26, v182, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67
-; GFX11-NEXT: v_or_b32_e32 v34, v56, v58
-; GFX11-NEXT: v_perm_b32 v21, v21, v167, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-NEXT: v_or_b32_e32 v25, v27, v65
-; GFX11-NEXT: v_or_b32_e32 v26, v28, v66
-; GFX11-NEXT: v_or_b32_e32 v27, v68, v64
-; GFX11-NEXT: v_or_b32_e32 v28, v182, v67
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: scratch_store_b128 v0, v[31:34], off
-; GFX11-NEXT: scratch_store_b128 v0, v[25:28], off offset:16
-; GFX11-NEXT: v_perm_b32 v26, v165, v166, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v25, v21, v53
-; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v151, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v161, v162, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-NEXT: v_perm_b32 v19, v19, v160, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v20, v20, v150, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_or_b32_e32 v26, v21, v26
-; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
-; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v21, v17, v28
-; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v145, v50, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v134, v49, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v20, v20, v27
-; GFX11-NEXT: v_perm_b32 v27, v135, v144, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v15, v15, v133, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v13, v13, v132, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v16, v16, v131, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_or_b32_e32 v22, v17, v22
-; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
-; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v17, v13, v28
-; GFX11-NEXT: v_perm_b32 v28, v116, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v16, v16, v27
-; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v119, v48, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v117, v118, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v9, v9, v114, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v11, v11, v115, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_or_b32_e32 v18, v13, v18
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v28
-; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v101, v37, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v27
-; GFX11-NEXT: v_perm_b32 v27, v99, v100, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v98, v36, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v97, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v87, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v5, v5, v96, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
-; GFX11-NEXT: v_perm_b32 v24, v24, v176, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v27
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v28
-; GFX11-NEXT: v_perm_b32 v5, v84, v35, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v81, v83, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v71, v29, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v29, v69, v70, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v80, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_or_b32_e32 v23, v23, v54
-; GFX11-NEXT: v_or_b32_e32 v24, v24, v64
-; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v30, v1, v30, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v31, v2, v39, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v27
-; GFX11-NEXT: v_or_b32_e32 v3, v30, v28
-; GFX11-NEXT: v_or_b32_e32 v4, v31, v29
-; GFX11-NEXT: s_clause 0x5
-; GFX11-NEXT: scratch_store_b128 v0, v[23:26], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
-; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-NEXT: v_readlane_b32 s34, v74, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72
-; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76
-; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80
-; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32f32_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB37_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s43 :: v_dual_mov_b32 v24, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s43 :: v_dual_mov_b32 v36, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s44 :: v_dual_mov_b32 v39, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s43 :: v_dual_mov_b32 v86, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v87, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s43 :: v_dual_mov_b32 v98, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v12, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s43 :: v_dual_mov_b32 v100, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v103, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v99, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s7 :: v_dual_mov_b32 v14, s10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s43 :: v_dual_mov_b32 v116, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s9 :: v_dual_mov_b32 v20, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v112, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s11 :: v_dual_mov_b32 v22, s15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s12 :: v_dual_mov_b32 v26, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s14 :: v_dual_mov_b32 v30, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s40 :: v_dual_mov_b32 v34, s27
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s28 :: v_dual_mov_b32 v38, s25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v130, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s44 :: v_dual_mov_b32 v132, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s46 :: v_dual_mov_b32 v145, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s44 :: v_dual_mov_b32 v146, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v134, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v133, s44 :: v_dual_mov_b32 v150, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v149, s44 :: v_dual_mov_b32 v164, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v166, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s44 :: v_dual_mov_b32 v176, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v181, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s44 :: v_dual_mov_b32 v182, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v40, s43 :: v_dual_mov_b32 v177, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s44 :: v_dual_mov_b32 v72, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s46 :: v_dual_mov_b32 v60, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s46 :: v_dual_mov_b32 v1, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s46 :: v_dual_mov_b32 v8, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s46 :: v_dual_mov_b32 v35, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s4
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s26 :: v_dual_mov_b32 v64, s22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s24 :: v_dual_mov_b32 v66, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s23 :: v_dual_mov_b32 v80, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s21 :: v_dual_mov_b32 v32, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s19 :: v_dual_mov_b32 v48, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s16 :: v_dual_mov_b32 v52, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s3 :: v_dual_mov_b32 v82, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s46
+; GFX11-TRUE16-NEXT: s_branch .LBB37_3
+; GFX11-TRUE16-NEXT: .LBB37_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB37_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB37_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v65, s23, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v64, s22, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v49, s3, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v48, s2, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v67, s21, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v66, s20, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s12, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v53, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v52, s0, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v32, s17, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v31, s16, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v81, s19, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v80, s18, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v38, s25, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v37, s24, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v34, s27, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v33, s26, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v30, s29, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, s28, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s41, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s40, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s15, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s14, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, s6, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, s10, 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[4:5]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[66:67]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[2:3], 24, v[8:9]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[12:13]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[14:15]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[29:30]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[33:34]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[37:38]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[80:81]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[83:84], 24, v[52:53]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 24, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 24, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 8, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 24, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 8, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 16, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 16, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v80
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v80
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 16, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v52
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v52
+; GFX11-TRUE16-NEXT: .LBB37_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v83, v72, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v52, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v60, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v56, v57, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v48, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v83, 16, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v49, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v59, 16, v56
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v56, v52, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v47, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v58, v48, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v59, v49, v59
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v45, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v84, v62, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v52
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v42, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v32, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v80, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v80, v31, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v181, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v53, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v84, 16, v84
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v52
+; GFX11-TRUE16-NEXT: v_perm_b32 v70, v81, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v81, v32, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v179, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v66, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v119, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v57, v53, v84
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v183, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, v54, v52
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v67, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v66, v48, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v165, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v163, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v113, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v167, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v67, v52, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v65, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v37, v162, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v149, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v145, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v131, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v101, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v113, v21, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v87, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, v70, v53
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v64, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v33, v150, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v69, v32, v31
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v37, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v147, v146, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v19, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v20, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v68, v53, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v161, v160, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[56:59], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[80:83], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v33, v35
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v135, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v80, v29, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v129, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, v25, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v26, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v117, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v99, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v86, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v12, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v55, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v39, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v24, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v38, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v34, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v27
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v13, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v38, v49
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, v34, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v81, v30, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, v23, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v22, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v15, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v6, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v8, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v11
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[66:69], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[31:34], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[80:83], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[113:116], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[14:17], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32f32_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s30, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB37_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s27, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s26, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s25, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s24, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s23, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s21, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s20, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s19, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s17, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s16, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s3, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s2, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s1, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[14:15], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s13, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s13, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s12, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s15, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s15, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB37_3
+; GFX11-FAKE16-NEXT: .LBB37_2:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: s_mov_b32 s30, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: .LBB37_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s43, s30, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB37_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, s15, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, s14, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, s41, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, s40, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, s29, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, s28, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, s19, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v25, s18, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, s27, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, s26, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, s7, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, s6, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, s17, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, s16, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, s25, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, s24, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, s9, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, s8, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v32, s3, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v31, s2, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, s23, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, s22, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, s11, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, s10, 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v34, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v33, s0, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, s21, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, s20, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, s13, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, s5, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, s4, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, s12, 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[25:26]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[33:34]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v33
+; GFX11-FAKE16-NEXT: s_branch .LBB37_6
+; GFX11-FAKE16-NEXT: .LBB37_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s0 :: v_dual_mov_b32 v34, s1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s2 :: v_dual_mov_b32 v32, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s16 :: v_dual_mov_b32 v28, s17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v133, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s18 :: v_dual_mov_b32 v26, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v131, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v135, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v144, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v132, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v134, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v72, s104 :: v_dual_mov_b32 v73, s102
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v128, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v63, s103 :: v_dual_mov_b32 v62, s100
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v61, s101 :: v_dual_mov_b32 v60, s97
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v129, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v57, s99 :: v_dual_mov_b32 v56, s98
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v58, s96 :: v_dual_mov_b32 v59, s87
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v130, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v46, s86 :: v_dual_mov_b32 v47, s84
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v42, s85 :: v_dual_mov_b32 v45, s82
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v115, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v44, s83 :: v_dual_mov_b32 v183, s81
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v43, s71 :: v_dual_mov_b32 v182, s80
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v119, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v40, s70 :: v_dual_mov_b32 v41, s69
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v178, s68 :: v_dual_mov_b32 v181, s66
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v113, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v176, s67 :: v_dual_mov_b32 v179, s65
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v180, s64 :: v_dual_mov_b32 v167, s55
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v117, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v177, s53 :: v_dual_mov_b32 v164, s54
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v165, s52 :: v_dual_mov_b32 v166, s51
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v160, s50 :: v_dual_mov_b32 v163, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v150, s49 :: v_dual_mov_b32 v161, s39
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v114, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v162, s38 :: v_dual_mov_b32 v149, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v151, s35 :: v_dual_mov_b32 v146, s36
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v116, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v147, s34 :: v_dual_mov_b32 v148, s31
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s72 :: v_dual_mov_b32 v48, s90
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v102, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s74 :: v_dual_mov_b32 v50, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v52, s62
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v103, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s92 :: v_dual_mov_b32 v54, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, vcc_lo :: v_dual_mov_b32 v64, s56
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v112, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v66, s44
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v65, s46
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v67, s42
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v97, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v101, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v87, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v99, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v100, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v96, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v98, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v80, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v85, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v86, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v82, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v84, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v55, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v81, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v83, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v30, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v71, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v69, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v70, s0
+; GFX11-FAKE16-NEXT: .LBB37_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v67, v73, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v60, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v33, v33, v72, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v61, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v57, v31, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v67, 16, v67
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-FAKE16-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v34, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v33, v67
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v57, v66
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v44, v45, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v67, v40, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v56, v32, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v58, 16, v58
+; GFX11-FAKE16-NEXT: v_perm_b32 v53, v177, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v34, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v27, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v25, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-FAKE16-NEXT: v_perm_b32 v182, v26, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v67, 16, v67
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v56, v58
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v27, v65
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v28, v66
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v68, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v182, v67
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[31:34], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:16
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v165, v166, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v21, v53
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v151, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v161, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v160, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v150, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v21, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v19, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v17, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v145, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v134, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v20, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v135, v144, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v133, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v132, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v131, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v17, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v13, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v116, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v119, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v117, v118, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v114, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v115, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v13, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v101, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v99, v100, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v98, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v97, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v24, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v84, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v81, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v71, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v69, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v80, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v23, v54
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v24, v64
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v1, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v31, v2, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v30, v28
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v31, v29
+; GFX11-FAKE16-NEXT: s_clause 0x5
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[23:26], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v75, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v75, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v75, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v75, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v75, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v75, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v75, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v75, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v75, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v74, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v74, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v74, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v74, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v74, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v74, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v74, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v74, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v74, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v74, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v74, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v74, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v74, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v74, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v74, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v74, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v74, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v74, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v74, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v74, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v74, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v74, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v74, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v74, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v74, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v74, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v74, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v74, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v74, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v74, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v74, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v74, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -56535,458 +58164,582 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v32f32_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:308
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:292
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:268
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:252
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:228
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:216
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:212
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:208
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:196
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:180
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:176
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:172
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:168
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:160
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:156
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:136
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:132
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:128
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:116
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:108
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:92
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:88
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:68
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:60
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:56
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:40
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s29 :: v_dual_mov_b32 v60, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v59, s27 :: v_dual_mov_b32 v72, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s25 :: v_dual_mov_b32 v90, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v79, s24 :: v_dual_mov_b32 v76, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s23 :: v_dual_mov_b32 v92, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v94, s19 :: v_dual_mov_b32 v105, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v104, s17 :: v_dual_mov_b32 v107, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v120, s16 :: v_dual_mov_b32 v123, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v110, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s1 :: v_dual_mov_b32 v40, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s4 :: v_dual_mov_b32 v46, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s6 :: v_dual_mov_b32 v47, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v56, s9 :: v_dual_mov_b32 v75, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v58, s11 :: v_dual_mov_b32 v73, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s12 :: v_dual_mov_b32 v89, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v88, s15 :: v_dual_mov_b32 v77, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v74, s16 :: v_dual_mov_b32 v91, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v78, s20 :: v_dual_mov_b32 v93, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v95, s22 :: v_dual_mov_b32 v106, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v109, s23 :: v_dual_mov_b32 v122, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v108, s26 :: v_dual_mov_b32 v111, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v124, s27 :: v_dual_mov_b32 v125, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v121, s40 :: v_dual_mov_b32 v126, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v127, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB39_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v123, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v105, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v127, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v120, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v90, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v72, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v126, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v125, v111, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v92, v76, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v79, v61, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v93, v78, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v89, v74, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v124, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v60, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v75, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v56, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v46, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v109, v95, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v183, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v91, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v122, v106, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v177, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v88, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v133, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v128, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v118, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v47, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v103, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v43, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v87, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v12, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v182, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v180, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v49, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v165, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v35, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v150, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v137, 16, v137
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v151, v148, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v146, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v18, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v144, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v119, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v115, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v22, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v102, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v100, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v24, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v85, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v83, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v26, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v28, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v136
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v136, v137
; GFX11-TRUE16-NEXT: s_branch .LBB39_3
; GFX11-TRUE16-NEXT: .LBB39_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB39_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB39_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v123
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v120
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v92
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v90
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v79
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v122
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v109
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v60
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v76, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v106, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v95, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v125
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v111, 0xc0c0004
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v13, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v93
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v89
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v88
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v56
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v43
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v40, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v183
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v182
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v181
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v177
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v151
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v161, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v150, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff, v18
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff, v20
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v16, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v18, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v21
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v147
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v146
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v135
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v132
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v133
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v129
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v128
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v119
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v117
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v114
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v117, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v112, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
@@ -57017,21 +58770,21 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v103
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v102
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v101
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v96
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v85
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v84
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v81
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v70
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v82
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v99, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v22
@@ -57062,31 +58815,31 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v67
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v66
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v65
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v55
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v53
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 3, v49
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v48
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v37
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 3, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v55, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v49, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v49, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v36, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v39, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v34, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v35, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v28
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v37
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v34
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v33
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff, v27
@@ -57094,20 +58847,69 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff, v29
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v33, 0xffff, v33
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28
; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v34
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v34
; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32
; GFX11-TRUE16-NEXT: .LBB39_5: ; %end
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -80993,780 +82795,1557 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i64_to_v128i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_xor_saveexec_b32 s4, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v23, s32
-; GFX11-NEXT: scratch_store_b32 off, v24, s32 offset:4
-; GFX11-NEXT: scratch_store_b32 off, v25, s32 offset:8
-; GFX11-NEXT: scratch_store_b32 off, v26, s32 offset:12
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v23, s34, 0
-; GFX11-NEXT: v_writelane_b32 v23, s35, 1
-; GFX11-NEXT: v_writelane_b32 v23, s36, 2
-; GFX11-NEXT: v_writelane_b32 v23, s37, 3
-; GFX11-NEXT: v_writelane_b32 v23, s38, 4
-; GFX11-NEXT: v_writelane_b32 v23, s39, 5
-; GFX11-NEXT: v_writelane_b32 v23, s48, 6
-; GFX11-NEXT: v_writelane_b32 v23, s49, 7
-; GFX11-NEXT: v_writelane_b32 v23, s50, 8
-; GFX11-NEXT: v_writelane_b32 v23, s51, 9
-; GFX11-NEXT: v_writelane_b32 v23, s52, 10
-; GFX11-NEXT: v_writelane_b32 v23, s53, 11
-; GFX11-NEXT: v_writelane_b32 v23, s54, 12
-; GFX11-NEXT: v_writelane_b32 v23, s55, 13
-; GFX11-NEXT: v_writelane_b32 v23, s64, 14
-; GFX11-NEXT: v_writelane_b32 v23, s65, 15
-; GFX11-NEXT: v_writelane_b32 v23, s66, 16
-; GFX11-NEXT: v_writelane_b32 v23, s67, 17
-; GFX11-NEXT: v_writelane_b32 v23, s68, 18
-; GFX11-NEXT: v_writelane_b32 v23, s69, 19
-; GFX11-NEXT: v_writelane_b32 v23, s70, 20
-; GFX11-NEXT: v_writelane_b32 v23, s71, 21
-; GFX11-NEXT: v_writelane_b32 v23, s80, 22
-; GFX11-NEXT: v_writelane_b32 v23, s81, 23
-; GFX11-NEXT: v_writelane_b32 v23, s82, 24
-; GFX11-NEXT: v_writelane_b32 v23, s83, 25
-; GFX11-NEXT: v_writelane_b32 v23, s84, 26
-; GFX11-NEXT: v_writelane_b32 v23, s85, 27
-; GFX11-NEXT: v_writelane_b32 v23, s86, 28
-; GFX11-NEXT: v_writelane_b32 v23, s87, 29
-; GFX11-NEXT: v_writelane_b32 v23, s96, 30
-; GFX11-NEXT: v_writelane_b32 v23, s97, 31
-; GFX11-NEXT: v_writelane_b32 v24, s98, 0
-; GFX11-NEXT: v_writelane_b32 v24, s99, 1
-; GFX11-NEXT: v_writelane_b32 v24, s100, 2
-; GFX11-NEXT: v_writelane_b32 v24, s101, 3
-; GFX11-NEXT: v_writelane_b32 v24, s102, 4
-; GFX11-NEXT: v_writelane_b32 v24, s103, 5
-; GFX11-NEXT: v_writelane_b32 v24, s104, 6
-; GFX11-NEXT: v_writelane_b32 v24, s30, 7
-; GFX11-NEXT: v_writelane_b32 v24, s31, 8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s7, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s9, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s11, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s13, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s15, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s103, 0
-; GFX11-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
-; GFX11-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
-; GFX11-NEXT: s_cbranch_scc0 .LBB57_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s8, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 18
-; GFX11-NEXT: s_lshr_b32 s43, s12, 16
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: s_lshr_b32 s31, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 19
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
-; GFX11-NEXT: s_lshr_b32 s42, s4, 16
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 20
-; GFX11-NEXT: s_lshr_b32 s43, s20, 16
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 21
-; GFX11-NEXT: s_lshr_b32 s43, s20, 8
-; GFX11-NEXT: s_lshr_b32 s61, s6, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: s_lshr_b32 s48, s9, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 22
-; GFX11-NEXT: s_lshr_b32 s43, s19, 8
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 23
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 24
-; GFX11-NEXT: s_lshr_b32 s43, s18, 8
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 25
-; GFX11-NEXT: s_lshr_b32 s43, s17, 24
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 26
-; GFX11-NEXT: s_lshr_b32 s43, s17, 16
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 27
-; GFX11-NEXT: s_lshr_b32 s43, s17, 8
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 28
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 29
-; GFX11-NEXT: s_lshr_b32 s43, s16, 8
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 30
-; GFX11-NEXT: s_lshr_b32 s43, s3, 24
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 31
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 0
-; GFX11-NEXT: s_lshr_b32 s43, s3, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 1
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 2
-; GFX11-NEXT: s_lshr_b32 s43, s2, 8
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 3
-; GFX11-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 4
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 5
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 6
-; GFX11-NEXT: s_lshr_b32 s43, s0, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 7
-; GFX11-NEXT: s_lshr_b32 s43, s0, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
-; GFX11-NEXT: s_branch .LBB57_3
-; GFX11-NEXT: .LBB57_2:
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: s_mov_b32 s103, -1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s42, 0
-; GFX11-NEXT: v_writelane_b32 v26, s43, 1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s72, 2
-; GFX11-NEXT: v_writelane_b32 v26, s73, 3
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 4
-; GFX11-NEXT: v_writelane_b32 v26, s73, 5
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 6
-; GFX11-NEXT: v_writelane_b32 v26, s73, 7
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 8
-; GFX11-NEXT: v_writelane_b32 v26, s73, 9
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 10
-; GFX11-NEXT: v_writelane_b32 v26, s73, 11
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 12
-; GFX11-NEXT: v_writelane_b32 v26, s73, 13
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 14
-; GFX11-NEXT: v_writelane_b32 v26, s73, 15
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: .LBB57_3: ; %Flow
-; GFX11-NEXT: s_and_b32 s43, s103, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_mov_b32 s103, s31
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_mov_b32 s31, s42
-; GFX11-NEXT: s_mov_b32 s42, s61
-; GFX11-NEXT: s_mov_b32 s43, s48
-; GFX11-NEXT: v_readlane_b32 s48, v26, 18
-; GFX11-NEXT: v_readlane_b32 s61, v26, 19
-; GFX11-NEXT: s_cbranch_scc1 .LBB57_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s40, s40, 3
-; GFX11-NEXT: s_addc_u32 s41, s41, 0
-; GFX11-NEXT: s_add_u32 s14, s14, 3
-; GFX11-NEXT: s_addc_u32 s15, s15, 0
-; GFX11-NEXT: s_add_u32 s12, s12, 3
-; GFX11-NEXT: s_addc_u32 s13, s13, 0
-; GFX11-NEXT: s_add_u32 s10, s10, 3
-; GFX11-NEXT: s_addc_u32 s11, s11, 0
-; GFX11-NEXT: s_add_u32 s8, s8, 3
-; GFX11-NEXT: s_addc_u32 s9, s9, 0
-; GFX11-NEXT: s_add_u32 s6, s6, 3
-; GFX11-NEXT: s_addc_u32 s7, s7, 0
-; GFX11-NEXT: s_add_u32 s4, s4, 3
-; GFX11-NEXT: s_addc_u32 s5, s5, 0
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v26, s72, 20
-; GFX11-NEXT: s_lshr_b32 s72, s20, 16
-; GFX11-NEXT: s_lshr_b32 s103, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 21
-; GFX11-NEXT: s_lshr_b32 s72, s20, 8
-; GFX11-NEXT: s_lshr_b32 s31, s4, 16
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: v_writelane_b32 v26, s72, 22
-; GFX11-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 23
-; GFX11-NEXT: s_lshr_b32 s72, s18, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: s_lshr_b32 s43, s9, 24
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 24
-; GFX11-NEXT: s_lshr_b32 s72, s18, 8
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: s_lshr_b32 s48, s8, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 25
-; GFX11-NEXT: s_lshr_b32 s72, s17, 24
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 26
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: v_writelane_b32 v26, s72, 27
-; GFX11-NEXT: s_lshr_b32 s72, s17, 8
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s61, s12, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 28
-; GFX11-NEXT: s_lshr_b32 s72, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 29
-; GFX11-NEXT: s_lshr_b32 s72, s16, 8
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 30
-; GFX11-NEXT: s_lshr_b32 s72, s3, 24
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 31
-; GFX11-NEXT: s_lshr_b32 s72, s3, 16
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 0
-; GFX11-NEXT: s_lshr_b32 s72, s3, 8
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 1
-; GFX11-NEXT: s_lshr_b32 s72, s2, 16
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 2
-; GFX11-NEXT: s_lshr_b32 s72, s2, 8
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 3
-; GFX11-NEXT: s_lshr_b32 s72, s1, 24
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 4
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 5
-; GFX11-NEXT: s_lshr_b32 s72, s1, 8
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 6
-; GFX11-NEXT: s_lshr_b32 s72, s0, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 7
-; GFX11-NEXT: s_lshr_b32 s72, s0, 8
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
-; GFX11-NEXT: .LBB57_5: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s73, v25, 7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v2, s73, vcc_lo, v1
-; GFX11-NEXT: v_readlane_b32 s73, v25, 8
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v3, s0, s73, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 6
-; GFX11-NEXT: v_perm_b32 v21, s70, s79, v1
-; GFX11-NEXT: v_perm_b32 v22, s77, s78, v1
-; GFX11-NEXT: v_perm_b32 v17, s21, s68, v1
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v2
-; GFX11-NEXT: v_perm_b32 v4, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 2
-; GFX11-NEXT: v_readlane_b32 s1, v25, 5
-; GFX11-NEXT: v_readlane_b32 s70, v23, 20
-; GFX11-NEXT: v_readlane_b32 s68, v23, 18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s0, s94, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 3
-; GFX11-NEXT: v_perm_b32 v6, s2, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v7, s3, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 29
-; GFX11-NEXT: v_perm_b32 v8, s0, s92, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v9, s16, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 28
-; GFX11-NEXT: v_perm_b32 v10, s17, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v11, s0, s90, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 25
-; GFX11-NEXT: v_perm_b32 v12, s18, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 23
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v13, s19, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 21
-; GFX11-NEXT: v_perm_b32 v14, s0, s88, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 20
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v15, s0, s74, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 22
-; GFX11-NEXT: v_perm_b32 v16, s20, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v18, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 31
-; GFX11-NEXT: v_readlane_b32 s1, v25, 0
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v19, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 26
-; GFX11-NEXT: v_readlane_b32 s1, v26, 27
-; GFX11-NEXT: v_or_b32_e32 v3, v4, v18
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v19
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v20, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 0
-; GFX11-NEXT: v_or_b32_e32 v4, v6, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v5, v7, v5
-; GFX11-NEXT: v_perm_b32 v6, s102, s101, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14
-; GFX11-NEXT: v_readlane_b32 s1, v26, 1
-; GFX11-NEXT: v_perm_b32 v14, s7, s36, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v20
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v11
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v21
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22
-; GFX11-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v3
-; GFX11-NEXT: v_or_b32_e32 v4, v12, v4
-; GFX11-NEXT: v_or_b32_e32 v5, v13, v5
-; GFX11-NEXT: v_perm_b32 v9, s22, s76, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v15
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v11, s25, s87, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:16
-; GFX11-NEXT: v_or_b32_e32 v2, v16, v7
-; GFX11-NEXT: v_or_b32_e32 v3, v17, v8
-; GFX11-NEXT: v_perm_b32 v5, s99, s0, v1
-; GFX11-NEXT: v_perm_b32 v7, s23, s100, v1
-; GFX11-NEXT: v_perm_b32 v8, s97, s96, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 2
-; GFX11-NEXT: v_readlane_b32 s1, v26, 3
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v9, s24, s98, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v12, s86, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v5, v7, v6
-; GFX11-NEXT: v_readlane_b32 s0, v26, 4
-; GFX11-NEXT: v_readlane_b32 s1, v26, 5
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v10
-; GFX11-NEXT: v_or_b32_e32 v7, v11, v8
-; GFX11-NEXT: v_perm_b32 v8, s26, s85, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s83, s82, v1
-; GFX11-NEXT: v_perm_b32 v11, s81, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
-; GFX11-NEXT: v_perm_b32 v2, s71, s69, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 6
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s27, s84, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s28, s80, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s29, s67, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s66, s0, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 7
-; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_perm_b32 v4, s40, s65, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s55, s54, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 8
-; GFX11-NEXT: v_readlane_b32 s1, v26, 9
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
-; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s41, s64, v1
-; GFX11-NEXT: v_perm_b32 v11, s62, s0, v1
-; GFX11-NEXT: v_perm_b32 v6, s53, s60, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; GFX11-NEXT: v_readlane_b32 s0, v26, 10
-; GFX11-NEXT: v_readlane_b32 s1, v26, 11
-; GFX11-NEXT: v_perm_b32 v8, s14, s63, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s15, s52, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s61, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX11-NEXT: v_readlane_b32 s0, v26, 12
-; GFX11-NEXT: v_readlane_b32 s1, v26, 13
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_perm_b32 v8, s12, s58, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s56, s57, v1
-; GFX11-NEXT: v_perm_b32 v11, s51, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
-; GFX11-NEXT: v_perm_b32 v2, s49, s47, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s13, s59, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s10, s50, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s11, s46, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s48, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_perm_b32 v4, s8, s44, v1
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s39, s43, v1
-; GFX11-NEXT: v_perm_b32 v11, s42, s72, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 15
-; GFX11-NEXT: v_perm_b32 v12, s6, s38, v1
-; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s9, s45, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_readlane_b32 s0, v26, 16
-; GFX11-NEXT: v_readlane_b32 s1, v26, 17
-; GFX11-NEXT: v_readlane_b32 s102, v24, 4
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v10
-; GFX11-NEXT: v_perm_b32 v10, s37, s35, v1
-; GFX11-NEXT: v_readlane_b32 s101, v24, 3
-; GFX11-NEXT: v_readlane_b32 s100, v24, 2
-; GFX11-NEXT: v_readlane_b32 s99, v24, 1
-; GFX11-NEXT: v_readlane_b32 s98, v24, 0
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10
-; GFX11-NEXT: v_or_b32_e32 v10, v12, v11
-; GFX11-NEXT: v_perm_b32 v12, s31, s0, v1
-; GFX11-NEXT: v_readlane_b32 s97, v23, 31
-; GFX11-NEXT: v_readlane_b32 s96, v23, 30
-; GFX11-NEXT: v_or_b32_e32 v11, v14, v13
-; GFX11-NEXT: v_perm_b32 v13, s4, s34, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-NEXT: v_readlane_b32 s87, v23, 29
-; GFX11-NEXT: v_readlane_b32 s86, v23, 28
-; GFX11-NEXT: v_readlane_b32 s85, v23, 27
-; GFX11-NEXT: v_readlane_b32 s84, v23, 26
-; GFX11-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX11-NEXT: v_perm_b32 v13, s104, s103, v1
-; GFX11-NEXT: v_perm_b32 v1, s5, s30, v1
-; GFX11-NEXT: v_readlane_b32 s30, v24, 7
-; GFX11-NEXT: v_readlane_b32 s31, v24, 8
-; GFX11-NEXT: v_readlane_b32 s104, v24, 6
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_readlane_b32 s103, v24, 5
-; GFX11-NEXT: v_readlane_b32 s83, v23, 25
-; GFX11-NEXT: v_readlane_b32 s82, v23, 24
-; GFX11-NEXT: v_readlane_b32 s81, v23, 23
-; GFX11-NEXT: v_or_b32_e32 v13, v1, v13
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
-; GFX11-NEXT: v_readlane_b32 s80, v23, 22
-; GFX11-NEXT: v_readlane_b32 s71, v23, 21
-; GFX11-NEXT: v_readlane_b32 s69, v23, 19
-; GFX11-NEXT: v_readlane_b32 s67, v23, 17
-; GFX11-NEXT: v_readlane_b32 s66, v23, 16
-; GFX11-NEXT: v_readlane_b32 s65, v23, 15
-; GFX11-NEXT: v_readlane_b32 s64, v23, 14
-; GFX11-NEXT: v_readlane_b32 s55, v23, 13
-; GFX11-NEXT: v_readlane_b32 s54, v23, 12
-; GFX11-NEXT: v_readlane_b32 s53, v23, 11
-; GFX11-NEXT: v_readlane_b32 s52, v23, 10
-; GFX11-NEXT: v_readlane_b32 s51, v23, 9
-; GFX11-NEXT: v_readlane_b32 s50, v23, 8
-; GFX11-NEXT: v_readlane_b32 s49, v23, 7
-; GFX11-NEXT: v_readlane_b32 s48, v23, 6
-; GFX11-NEXT: v_readlane_b32 s39, v23, 5
-; GFX11-NEXT: v_readlane_b32 s38, v23, 4
-; GFX11-NEXT: v_readlane_b32 s37, v23, 3
-; GFX11-NEXT: v_readlane_b32 s36, v23, 2
-; GFX11-NEXT: v_readlane_b32 s35, v23, 1
-; GFX11-NEXT: v_readlane_b32 s34, v23, 0
-; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v23, off, s32
-; GFX11-NEXT: scratch_load_b32 v24, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v25, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v26, off, s32 offset:12
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i64_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x10 ; 68-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:64
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:60
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:56
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:52
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:48
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:44
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:40
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:36
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:28
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:24
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:20
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:16
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB57_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s43 :: v_dual_mov_b32 v2, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s43 :: v_dual_mov_b32 v7, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s43 :: v_dual_mov_b32 v9, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s43 :: v_dual_mov_b32 v13, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s43 :: v_dual_mov_b32 v14, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s43 :: v_dual_mov_b32 v16, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s43 :: v_dual_mov_b32 v17, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s43 :: v_dual_mov_b32 v19, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s43 :: v_dual_mov_b32 v22, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s43 :: v_dual_mov_b32 v24, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s43 :: v_dual_mov_b32 v26, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v27, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s43 :: v_dual_mov_b32 v29, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s43 :: v_dual_mov_b32 v38, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v51, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s43 :: v_dual_mov_b32 v55, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s43 :: v_dual_mov_b32 v83, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s43 :: v_dual_mov_b32 v101, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v115, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s43 :: v_dual_mov_b32 v129, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s46 :: v_dual_mov_b32 v148, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s43 :: v_dual_mov_b32 v151, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s44 :: v_dual_mov_b32 v130, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v134, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v160, s43 :: v_dual_mov_b32 v181, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v182, s43 :: v_dual_mov_b32 v47, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v58, s43 :: v_dual_mov_b32 v33, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s44 :: v_dual_mov_b32 v113, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v98, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s44 :: v_dual_mov_b32 v177, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s46 :: v_dual_mov_b32 v183, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s44
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s46 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s43
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s44 :: v_dual_mov_b32 v72, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s6 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s8 :: v_dual_mov_b32 v34, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s10 :: v_dual_mov_b32 v36, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s13 :: v_dual_mov_b32 v50, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s15 :: v_dual_mov_b32 v86, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s14 :: v_dual_mov_b32 v112, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s41 :: v_dual_mov_b32 v114, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s40 :: v_dual_mov_b32 v118, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s28 :: v_dual_mov_b32 v128, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s27 :: v_dual_mov_b32 v144, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s26 :: v_dual_mov_b32 v146, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s23 :: v_dual_mov_b32 v150, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v162, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v135, s19 :: v_dual_mov_b32 v164, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s3 :: v_dual_mov_b32 v166, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB57_3
+; GFX11-TRUE16-NEXT: .LBB57_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB57_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s40, s40, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s41, s41, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s14, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s15, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s12, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s13, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s11, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s9, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v135, s19 :: v_dual_mov_b32 v2, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s3 :: v_dual_mov_b32 v4, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s44 :: v_dual_mov_b32 v8, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s42 :: v_dual_mov_b32 v10, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v15, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s9, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v80, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s11, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s6 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v98, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s13, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[14:15], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s15, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s41, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s4 :: v_dual_mov_b32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s41, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s41, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s40, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v132, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s29, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[28:29], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v83, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s5 :: v_dual_mov_b32 v96, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[24:25], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v115, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s4 :: v_dual_mov_b32 v129, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s6 :: v_dual_mov_b32 v183, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v133, s4 :: v_dual_mov_b32 v134, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v147, s4 :: v_dual_mov_b32 v148, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s5 :: v_dual_mov_b32 v160, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v165, s4 :: v_dual_mov_b32 v176, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v178, s5 :: v_dual_mov_b32 v179, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v180, s4 :: v_dual_mov_b32 v181, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s4 :: v_dual_mov_b32 v40, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s26 :: v_dual_mov_b32 v162, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v43, s4 :: v_dual_mov_b32 v44, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v47, s3 :: v_dual_mov_b32 v46, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s23 :: v_dual_mov_b32 v164, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v166, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s2 :: v_dual_mov_b32 v58, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v49, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v53, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s13 :: v_dual_mov_b32 v86, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s12 :: v_dual_mov_b32 v112, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s15 :: v_dual_mov_b32 v114, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s14 :: v_dual_mov_b32 v118, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s41 :: v_dual_mov_b32 v128, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s40 :: v_dual_mov_b32 v144, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s28 :: v_dual_mov_b32 v146, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s27 :: v_dual_mov_b32 v150, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v59, s4 :: v_dual_mov_b32 v72, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s1 :: v_dual_mov_b32 v60, s0
+; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v57, v58, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v164, v164, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v47, v47, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v43, v44, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v61, v61, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v44, 16, v57
+; GFX11-TRUE16-NEXT: v_perm_b32 v162, v162, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v46, 16, v47
+; GFX11-TRUE16-NEXT: v_perm_b32 v166, v166, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v58, 16, v61
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v44, v164, v44
+; GFX11-TRUE16-NEXT: v_perm_b32 v164, v41, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v161, v161, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v45, v162, v46
+; GFX11-TRUE16-NEXT: v_perm_b32 v165, v167, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v47, 16, v43
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v162, 16, v164
+; GFX11-TRUE16-NEXT: v_perm_b32 v164, v179, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v43, v166, v58
+; GFX11-TRUE16-NEXT: v_perm_b32 v144, v144, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v135, v135, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v167, 16, v165
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v166, 16, v164
+; GFX11-TRUE16-NEXT: v_perm_b32 v133, v133, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v46, v161, v47
+; GFX11-TRUE16-NEXT: v_perm_b32 v161, v182, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v167, v135, v167
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v166, v144, v166
+; GFX11-TRUE16-NEXT: v_perm_b32 v144, v160, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v135, v149, v147, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v133
+; GFX11-TRUE16-NEXT: v_perm_b32 v119, v129, v119, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v116, v116, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v100, v102, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v96, v96, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v83, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v70, v70, v145, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v64, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v51, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v38, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v32, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v28, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v22, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v18, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v13, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v146, v146, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v161, 16, v161
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v144
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v128, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v135
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v148, v118, v133
+; GFX11-TRUE16-NEXT: v_perm_b32 v117, v117, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v119
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v8, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v150, v150, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v102, v114, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v116
+; GFX11-TRUE16-NEXT: v_perm_b32 v101, v112, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v100
+; GFX11-TRUE16-NEXT: v_perm_b32 v97, v103, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
+; GFX11-TRUE16-NEXT: v_perm_b32 v83, v99, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v87, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v68, 16, v70
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v86, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v85, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v81, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v71, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v69, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v67, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v65, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v53, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v50, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v49, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v36, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v165, v146, v161
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v146, v131, v144
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v147, v128, v135
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v149, v117, v118
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v35, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v34, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v30, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v31, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v164, v150, v162
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v100, v102, v114
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, v101, v112
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v102, v97, v96
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v103, v83, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, v64, v68
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, v55, v54
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v84, v52, v51
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v85, v38, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v28, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v32, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v22, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v18, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v11, v12
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[43:46], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[164:167], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v10
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[146:149], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[100:103], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[82:85], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[24:27], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[14:17], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-TRUE16-NEXT: s_clause 0x10 ; 68-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:64
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i64_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v23, s32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v24, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v25, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v26, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v24, s31, 8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s103, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB57_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s5, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s4, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s7, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s9, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s11, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s12, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s15, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s14, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s41, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s41, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s29, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s28, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s27, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s27, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s26, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s25, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 15
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s25, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s24, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 13
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s23, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s23, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s0, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 11
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s43, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 9
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 6
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[0:1], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB57_3
+; GFX11-FAKE16-NEXT: .LBB57_2:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: s_mov_b32 s103, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s43, 1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: .LBB57_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_and_b32 s43, s103, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s103, s31
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s31, s42
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, s61
+; GFX11-FAKE16-NEXT: s_mov_b32 s43, s48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v26, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s61, v26, 19
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB57_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s40, s40, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s41, s41, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s14, s14, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s15, s15, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s13, s13, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s11, s11, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s9, s9, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s7, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s9, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s11, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s12, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s12, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s15, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s15, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s14, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s41, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s41, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s29, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s28, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s27, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s25, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s24, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s23, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s21, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v25, s72, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s73, 17
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[0:1], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 15
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 13
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 11
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 9
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s74, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v26, s75, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-FAKE16-NEXT: .LBB57_5: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_readlane_b32 s73, v25, 7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s73, vcc_lo, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s73, v25, 8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s73, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 6
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, s70, s79, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, s77, s78, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, s21, s68, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v25, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v23, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v23, 18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s0, s94, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s2, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s3, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 29
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s0, s92, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 30
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s16, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 28
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s17, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s0, s90, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 25
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s18, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 23
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s19, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 21
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s0, s88, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 20
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s0, s74, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 22
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s20, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v25, 4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v25, 0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v18
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v19
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, s1, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s102, s101, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s7, s36, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v20
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v21
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v9, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v12, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v13, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s22, s76, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v15
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s25, s87, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v16, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v17, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s99, s0, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s23, s100, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s97, s96, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s24, s98, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s86, s0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v11, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s85, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s83, s82, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s81, s0, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s71, s69, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s27, s84, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s28, s80, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s29, s67, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s66, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s40, s65, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s55, s54, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 9
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s41, s64, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s62, s0, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s53, s60, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 11
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s14, s63, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s52, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s61, s0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s12, s58, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s56, s57, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s51, s0, v1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s49, s47, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s13, s59, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s10, s50, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s11, s46, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s48, s0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s8, s44, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s39, s43, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s42, s72, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 15
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s6, s38, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s9, s45, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v26, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v26, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v24, 4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s37, s35, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v24, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v24, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v24, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v24, 0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v12, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s31, s0, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v23, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v23, 30
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v14, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s4, s34, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v23, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v23, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v23, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v23, 26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v13, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s104, s103, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s5, s30, v1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v24, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v24, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v24, 6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v24, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v23, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v23, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v23, 23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v1, v13
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v23, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v23, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v23, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v23, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v23, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v23, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v23, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v23, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v23, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v23, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v23, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v23, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v23, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v23, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v23, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v23, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v23, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v23, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v23, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v23, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v23, 0
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v23, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v24, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v25, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v26, off, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -90550,458 +93129,582 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v16i64_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:308
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:292
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:268
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:252
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:228
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:216
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:212
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:208
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:196
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:180
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:176
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:172
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:168
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:160
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:156
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:136
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:132
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:128
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:116
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:108
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:92
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:88
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:68
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:60
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:56
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:40
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s29 :: v_dual_mov_b32 v60, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v59, s27 :: v_dual_mov_b32 v72, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s25 :: v_dual_mov_b32 v90, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v79, s24 :: v_dual_mov_b32 v76, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s23 :: v_dual_mov_b32 v92, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v94, s19 :: v_dual_mov_b32 v105, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v104, s17 :: v_dual_mov_b32 v107, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v120, s16 :: v_dual_mov_b32 v123, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v110, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s1 :: v_dual_mov_b32 v40, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s4 :: v_dual_mov_b32 v46, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s6 :: v_dual_mov_b32 v47, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v56, s9 :: v_dual_mov_b32 v75, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v58, s11 :: v_dual_mov_b32 v73, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s12 :: v_dual_mov_b32 v89, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v88, s15 :: v_dual_mov_b32 v77, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v74, s16 :: v_dual_mov_b32 v91, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v78, s20 :: v_dual_mov_b32 v93, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v95, s22 :: v_dual_mov_b32 v106, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v109, s23 :: v_dual_mov_b32 v122, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v108, s26 :: v_dual_mov_b32 v111, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v124, s27 :: v_dual_mov_b32 v125, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v121, s40 :: v_dual_mov_b32 v126, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v127, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB59_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v123, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v105, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v127, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v120, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v90, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v72, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v126, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v125, v111, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v92, v76, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v79, v61, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v93, v78, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v89, v74, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v124, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v60, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v75, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v56, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v46, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v109, v95, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v183, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v91, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v122, v106, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v177, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v88, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v133, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v128, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v118, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v47, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v103, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v43, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v87, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v12, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v182, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v180, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v49, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v165, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v35, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v150, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v137, 16, v137
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v151, v148, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v146, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v18, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v144, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v119, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v115, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v22, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v102, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v100, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v24, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v85, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v83, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v26, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v28, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v136
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v136, v137
; GFX11-TRUE16-NEXT: s_branch .LBB59_3
; GFX11-TRUE16-NEXT: .LBB59_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB59_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v123
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v120
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v92
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v90
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v79
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v122
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v109
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v60
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v76, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v106, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v95, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v125
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v111, 0xc0c0004
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v13, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v93
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v89
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v88
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v56
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v43
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v40, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v183
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v182
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v181
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v177
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v151
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v161, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v150, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff, v18
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff, v20
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v16, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v18, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v21
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v147
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v146
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v135
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v132
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v133
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v129
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v128
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v119
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v117
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v114
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v117, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v112, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
@@ -91032,21 +93735,21 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v103
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v102
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v101
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v96
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v85
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v84
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v81
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v70
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v82
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v99, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v22
@@ -91077,31 +93780,31 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v67
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v66
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v65
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v55
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v53
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 3, v49
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v48
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v37
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 3, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v55, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v49, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v49, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v36, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v39, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v34, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v35, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v28
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v37
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v34
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v33
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff, v27
@@ -91109,20 +93812,69 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff, v29
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v33, 0xffff, v33
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28
; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v34
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v34
; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32
; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -113923,876 +116675,1532 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16f64_to_v128i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72
-; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76
-; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80
-; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-NEXT: v_writelane_b32 v75, s31, 8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s41, v14
-; GFX11-NEXT: v_readfirstlane_b32 s40, v13
-; GFX11-NEXT: v_readfirstlane_b32 s15, v12
-; GFX11-NEXT: v_readfirstlane_b32 s14, v11
-; GFX11-NEXT: v_readfirstlane_b32 s11, v10
-; GFX11-NEXT: v_readfirstlane_b32 s10, v9
-; GFX11-NEXT: v_readfirstlane_b32 s9, v8
-; GFX11-NEXT: v_readfirstlane_b32 s8, v7
-; GFX11-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s30, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
-; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
-; GFX11-NEXT: s_cbranch_scc0 .LBB73_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s11, 16
-; GFX11-NEXT: s_lshr_b32 s48, s41, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s9, 24
-; GFX11-NEXT: s_lshr_b32 s39, s41, 16
-; GFX11-NEXT: s_lshr_b32 s38, s41, 8
-; GFX11-NEXT: s_lshr_b32 s50, s40, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s9, 16
-; GFX11-NEXT: s_lshr_b32 s49, s40, 8
-; GFX11-NEXT: s_lshr_b32 s37, s15, 24
-; GFX11-NEXT: s_lshr_b32 s36, s15, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s9, 8
-; GFX11-NEXT: s_lshr_b32 s35, s15, 8
-; GFX11-NEXT: s_lshr_b32 s52, s14, 16
-; GFX11-NEXT: s_lshr_b32 s51, s14, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s7, 24
-; GFX11-NEXT: s_lshr_b32 s34, s11, 24
-; GFX11-NEXT: s_lshr_b32 s104, s11, 8
-; GFX11-NEXT: s_lshr_b32 s54, s10, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s7, 16
-; GFX11-NEXT: s_lshr_b32 s53, s10, 8
-; GFX11-NEXT: s_lshr_b32 s64, s8, 16
-; GFX11-NEXT: s_lshr_b32 s55, s8, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s7, 8
-; GFX11-NEXT: s_lshr_b32 s66, s6, 16
-; GFX11-NEXT: s_lshr_b32 s65, s6, 8
-; GFX11-NEXT: s_lshr_b32 s68, s4, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s5, 24
-; GFX11-NEXT: s_lshr_b32 s67, s4, 8
-; GFX11-NEXT: s_lshr_b32 s70, s12, 16
-; GFX11-NEXT: s_lshr_b32 s69, s12, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s5, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 16
-; GFX11-NEXT: s_lshr_b32 s71, s28, 8
-; GFX11-NEXT: s_lshr_b32 s82, s26, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-NEXT: s_lshr_b32 s42, s5, 8
-; GFX11-NEXT: s_lshr_b32 s81, s26, 8
-; GFX11-NEXT: s_lshr_b32 s84, s24, 16
-; GFX11-NEXT: s_lshr_b32 s83, s24, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-NEXT: s_lshr_b32 s42, s13, 24
-; GFX11-NEXT: s_lshr_b32 s86, s22, 16
-; GFX11-NEXT: s_lshr_b32 s85, s22, 8
-; GFX11-NEXT: s_lshr_b32 s96, s20, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-NEXT: s_lshr_b32 s42, s13, 16
-; GFX11-NEXT: s_lshr_b32 s87, s20, 8
-; GFX11-NEXT: s_lshr_b32 s98, s18, 16
-; GFX11-NEXT: s_lshr_b32 s97, s18, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-NEXT: s_lshr_b32 s42, s13, 8
-; GFX11-NEXT: s_lshr_b32 s100, s16, 16
-; GFX11-NEXT: s_lshr_b32 s99, s16, 8
-; GFX11-NEXT: s_lshr_b32 s102, s2, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-NEXT: s_lshr_b32 s42, s29, 24
-; GFX11-NEXT: s_lshr_b32 s101, s2, 8
-; GFX11-NEXT: s_lshr_b32 s31, s0, 16
-; GFX11-NEXT: s_lshr_b32 s103, s0, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-NEXT: s_lshr_b32 s42, s29, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-NEXT: s_lshr_b32 s42, s29, 8
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB73_3
-; GFX11-NEXT: .LBB73_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s30, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: .LBB73_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s30, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB73_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[21:22], s[22:23], 1.0
-; GFX11-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
-; GFX11-NEXT: v_add_f64 v[23:24], s[20:21], 1.0
-; GFX11-NEXT: v_add_f64 v[13:14], s[12:13], 1.0
-; GFX11-NEXT: v_add_f64 v[27:28], s[18:19], 1.0
-; GFX11-NEXT: v_add_f64 v[15:16], s[28:29], 1.0
-; GFX11-NEXT: v_add_f64 v[31:32], s[16:17], 1.0
-; GFX11-NEXT: v_add_f64 v[7:8], s[8:9], 1.0
-; GFX11-NEXT: v_add_f64 v[17:18], s[26:27], 1.0
-; GFX11-NEXT: v_add_f64 v[35:36], s[2:3], 1.0
-; GFX11-NEXT: v_add_f64 v[1:2], s[40:41], 1.0
-; GFX11-NEXT: v_add_f64 v[3:4], s[14:15], 1.0
-; GFX11-NEXT: v_add_f64 v[5:6], s[10:11], 1.0
-; GFX11-NEXT: v_add_f64 v[9:10], s[6:7], 1.0
-; GFX11-NEXT: v_add_f64 v[19:20], s[24:25], 1.0
-; GFX11-NEXT: v_add_f64 v[48:49], s[0:1], 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[23:24]
-; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[27:28]
-; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[31:32]
-; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[35:36]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[29:30], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[48:49]
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v97, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v102, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v101, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v114, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v100, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v99, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v131, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v129, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v113, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v112, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v134, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v144, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v118, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v117, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v147, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v128, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v176, 24, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v146, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v135, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v182, 24, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 24, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 16, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 8, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 16, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v166, 16, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v165, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 24, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 24, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v180, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 24, v49
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 16, v49
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 8, v49
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v48
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v48
-; GFX11-NEXT: s_branch .LBB73_6
-; GFX11-NEXT: .LBB73_5:
-; GFX11-NEXT: v_dual_mov_b32 v48, s0 :: v_dual_mov_b32 v49, s1
-; GFX11-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-NEXT: v_mov_b32_e32 v83, s36
-; GFX11-NEXT: v_dual_mov_b32 v1, s40 :: v_dual_mov_b32 v2, s41
-; GFX11-NEXT: v_dual_mov_b32 v3, s14 :: v_dual_mov_b32 v4, s15
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_mov_b32_e32 v98, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-NEXT: v_mov_b32_e32 v97, s34
-; GFX11-NEXT: v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11
-; GFX11-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
-; GFX11-NEXT: v_mov_b32_e32 v102, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-NEXT: v_dual_mov_b32 v9, s6 :: v_dual_mov_b32 v10, s7
-; GFX11-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v103, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-NEXT: v_dual_mov_b32 v13, s12 :: v_dual_mov_b32 v14, s13
-; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
-; GFX11-NEXT: v_mov_b32_e32 v101, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
-; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v114, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v116, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
-; GFX11-NEXT: v_dual_mov_b32 v31, s16 :: v_dual_mov_b32 v32, s17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v115, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v35, s2 :: v_dual_mov_b32 v36, s3
-; GFX11-NEXT: v_dual_mov_b32 v41, s31 :: v_dual_mov_b32 v42, s103
-; GFX11-NEXT: v_mov_b32_e32 v130, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v181, s102 :: v_dual_mov_b32 v180, s101
-; GFX11-NEXT: v_dual_mov_b32 v178, s100 :: v_dual_mov_b32 v177, s99
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v131, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v166, s98 :: v_dual_mov_b32 v165, s97
-; GFX11-NEXT: v_dual_mov_b32 v161, s96 :: v_dual_mov_b32 v160, s87
-; GFX11-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v151, s86 :: v_dual_mov_b32 v146, s84
-; GFX11-NEXT: v_dual_mov_b32 v149, s85 :: v_dual_mov_b32 v132, s81
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v134, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v135, s83 :: v_dual_mov_b32 v128, s80
-; GFX11-NEXT: v_dual_mov_b32 v133, s82 :: v_dual_mov_b32 v118, s70
-; GFX11-NEXT: v_mov_b32_e32 v145, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v119, s71 :: v_dual_mov_b32 v112, s67
-; GFX11-NEXT: v_dual_mov_b32 v117, s69 :: v_dual_mov_b32 v100, s66
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v144, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v113, s68 :: v_dual_mov_b32 v96, s64
-; GFX11-NEXT: v_dual_mov_b32 v99, s65 :: v_dual_mov_b32 v84, s53
-; GFX11-NEXT: v_mov_b32_e32 v148, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v87, s55 :: v_dual_mov_b32 v80, s52
-; GFX11-NEXT: v_dual_mov_b32 v85, s54 :: v_dual_mov_b32 v30, s50
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v71, s51 :: v_dual_mov_b32 v26, s49
-; GFX11-NEXT: v_dual_mov_b32 v39, s48 :: v_dual_mov_b32 v34, s38
-; GFX11-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v55, s39 :: v_dual_mov_b32 v82, s37
-; GFX11-NEXT: v_dual_mov_b32 v81, s35 :: v_dual_mov_b32 v86, s104
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v69, s42 :: v_dual_mov_b32 v68, s44
-; GFX11-NEXT: v_dual_mov_b32 v67, s46 :: v_dual_mov_b32 v66, s56
-; GFX11-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v65, s58 :: v_dual_mov_b32 v64, s60
-; GFX11-NEXT: v_dual_mov_b32 v54, s62 :: v_dual_mov_b32 v53, vcc_lo
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v52, s94 :: v_dual_mov_b32 v51, s92
-; GFX11-NEXT: v_dual_mov_b32 v50, s90 :: v_dual_mov_b32 v37, s78
-; GFX11-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v33, s76
-; GFX11-NEXT: v_mov_b32_e32 v29, s74
-; GFX11-NEXT: v_mov_b32_e32 v25, s72
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-NEXT: .LBB73_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v69, v41, v69, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v48, v48, v42, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v70, v72, v63, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v68, v181, v68, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v181, v62, v60, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_perm_b32 v49, v49, v73, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70
-; GFX11-NEXT: v_perm_b32 v35, v35, v180, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v180, 16, v181
-; GFX11-NEXT: v_or_b32_e32 v60, v48, v69
-; GFX11-NEXT: v_perm_b32 v48, v178, v67, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v61, v49, v70
-; GFX11-NEXT: v_perm_b32 v49, v56, v46, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v63, v36, v180
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_lshlrev_b32_e32 v36, 16, v48
-; GFX11-NEXT: v_perm_b32 v48, v166, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v31, v31, v177, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v27, v165, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v28, v47, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v49, 16, v49
-; GFX11-NEXT: v_lshlrev_b32_e32 v48, 16, v48
-; GFX11-NEXT: v_or_b32_e32 v62, v35, v68
-; GFX11-NEXT: v_perm_b32 v35, v59, v58, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v66, v31, v36
-; GFX11-NEXT: v_or_b32_e32 v69, v28, v49
-; GFX11-NEXT: v_or_b32_e32 v68, v27, v48
-; GFX11-NEXT: v_perm_b32 v27, v161, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v45, v44, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v31, v151, v64, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v32, v32, v57, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-NEXT: v_perm_b32 v23, v23, v160, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v24, v24, v43, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v21, v21, v149, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; GFX11-NEXT: v_or_b32_e32 v67, v32, v35
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: scratch_store_b128 v0, v[60:63], off
-; GFX11-NEXT: scratch_store_b128 v0, v[66:69], off offset:16
-; GFX11-NEXT: v_or_b32_e32 v64, v23, v27
-; GFX11-NEXT: v_perm_b32 v23, v40, v182, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v65, v24, v28
-; GFX11-NEXT: v_or_b32_e32 v66, v21, v31
-; GFX11-NEXT: v_perm_b32 v21, v22, v183, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v146, v54, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v179, v176, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v133, v53, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v19, v19, v135, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v20, v20, v167, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v132, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_or_b32_e32 v67, v21, v23
-; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
-; GFX11-NEXT: v_perm_b32 v22, v164, v162, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v20, v20, v24
-; GFX11-NEXT: v_or_b32_e32 v21, v17, v27
-; GFX11-NEXT: v_perm_b32 v17, v18, v163, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v128, v52, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v118, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v150, v148, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v15, v15, v119, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v13, v13, v117, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v16, v16, v147, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_or_b32_e32 v22, v17, v22
-; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
-; GFX11-NEXT: v_perm_b32 v18, v145, v134, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v17, v13, v24
-; GFX11-NEXT: v_perm_b32 v24, v100, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v16, v16, v23
-; GFX11-NEXT: v_perm_b32 v13, v14, v144, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v113, v50, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v131, v130, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v9, v9, v99, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v11, v11, v112, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v129, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_or_b32_e32 v18, v13, v18
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v24
-; GFX11-NEXT: v_perm_b32 v9, v10, v115, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v96, v37, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v116, v114, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v23
-; GFX11-NEXT: v_perm_b32 v23, v103, v102, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v85, v33, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v87, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v101, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v5, v5, v84, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v98, v97, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v23
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v24
-; GFX11-NEXT: v_perm_b32 v5, v80, v29, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v83, v82, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v30, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v55, v39, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v86, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v81, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v26, v1, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v27, v2, v34, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v23
-; GFX11-NEXT: v_or_b32_e32 v3, v26, v24
-; GFX11-NEXT: v_or_b32_e32 v4, v27, v25
-; GFX11-NEXT: s_clause 0x5
-; GFX11-NEXT: scratch_store_b128 v0, v[64:67], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
-; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-NEXT: v_readlane_b32 s34, v74, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72
-; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76
-; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80
-; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16f64_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB73_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s43 :: v_dual_mov_b32 v85, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s43 :: v_dual_mov_b32 v87, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s43 :: v_dual_mov_b32 v97, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v98, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v99, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s44 :: v_dual_mov_b32 v101, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s46 :: v_dual_mov_b32 v112, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s44 :: v_dual_mov_b32 v115, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v103, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s44 :: v_dual_mov_b32 v117, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v128, s43 :: v_dual_mov_b32 v21, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v130, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v131, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s43 :: v_dual_mov_b32 v25, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v133, s43 :: v_dual_mov_b32 v134, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v144, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v146, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v151, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s44 :: v_dual_mov_b32 v160, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v150, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s44 :: v_dual_mov_b32 v166, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s44 :: v_dual_mov_b32 v178, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s44 :: v_dual_mov_b32 v182, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v179, s44 :: v_dual_mov_b32 v46, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s44 :: v_dual_mov_b32 v62, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s46 :: v_dual_mov_b32 v57, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s46 :: v_dual_mov_b32 v61, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s46 :: v_dual_mov_b32 v73, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s46 :: v_dual_mov_b32 v13, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_mov_b32 v3, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s7 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s9 :: v_dual_mov_b32 v9, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s15 :: v_dual_mov_b32 v11, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s41 :: v_dual_mov_b32 v16, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s11 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s13 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s29 :: v_dual_mov_b32 v26, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s27 :: v_dual_mov_b32 v28, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s25 :: v_dual_mov_b32 v34, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s23 :: v_dual_mov_b32 v48, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s21 :: v_dual_mov_b32 v52, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s19 :: v_dual_mov_b32 v64, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s17 :: v_dual_mov_b32 v30, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s3 :: v_dual_mov_b32 v36, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s1 :: v_dual_mov_b32 v50, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s44 :: v_dual_mov_b32 v82, s46
+; GFX11-TRUE16-NEXT: s_branch .LBB73_3
+; GFX11-TRUE16-NEXT: .LBB73_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB73_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB73_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f64 v[64:65], s[18:19], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[34:35], s[24:25], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[9:10], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[36:37], s[2:3], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[48:49], s[22:23], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[3:4], s[4:5], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[5:6], s[6:7], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[11:12], s[14:15], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[40:41], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[50:51], s[0:1], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[30:31], s[16:17], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[10:11], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[52:53], s[20:21], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[28:29], s[26:27], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[28:29], 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[34:35]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[81:82], 24, v[36:37]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[16:17]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[30:31]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[52:53]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[28:29]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[22:23]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[26:27]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 24, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 24, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 24, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 16, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v52
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v52
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 16, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v50
+; GFX11-TRUE16-NEXT: .LBB73_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v72, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v50, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v81, v60, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v56, v57, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v83, v62, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v36, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v81
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v37, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v59, 16, v56
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v56, v50, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v47, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v51, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v83, 16, v83
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v58, v36, v81
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v59, v37, v59
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v46, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v57, v51, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v43, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v40, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v80, v30, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v182, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v64, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v65, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v81, v31, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v181, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v52, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v177, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, v64, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, v65, v51
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v53, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v48, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v50, v36, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v167, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, v51, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v49, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v52, v48, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v165, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v55, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v163, v162, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v34, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v160, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v53, v31, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v150, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v35, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, v34, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, v28, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v29, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, v35, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v148, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, v28, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v22, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v23, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v132, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v21, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v116, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v103, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v18, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v118, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v26, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v134, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v17, v119, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v115, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v102, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v147, v146, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v131, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v9, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v99, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v98, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v87, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v85, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v145, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v31
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v22, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v19, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v9, v10
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[56:59], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[80:83], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v16
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[50:53], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[34:37], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[26:29], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[18:21], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16f64_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v1
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s30, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB73_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s41, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s41, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s15, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s15, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s14, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s10, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s8, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s4, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s12, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s28, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s26, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s24, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s13, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s20, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s18, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s2, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s0, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB73_3
+; GFX11-FAKE16-NEXT: .LBB73_2:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: s_mov_b32 s30, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: .LBB73_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s43, s30, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB73_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f64 v[21:22], s[22:23], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[23:24], s[20:21], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[13:14], s[12:13], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[27:28], s[18:19], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[15:16], s[28:29], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[31:32], s[16:17], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[7:8], s[8:9], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[17:18], s[26:27], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[35:36], s[2:3], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[1:2], s[40:41], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[3:4], s[14:15], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[5:6], s[10:11], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[9:10], s[6:7], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[19:20], s[24:25], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[48:49], s[0:1], 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[35:36]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[48:49]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 24, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v48
+; GFX11-FAKE16-NEXT: s_branch .LBB73_6
+; GFX11-FAKE16-NEXT: .LBB73_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s0 :: v_dual_mov_b32 v49, s1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v83, s36
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s40 :: v_dual_mov_b32 v2, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s14 :: v_dual_mov_b32 v4, s15
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v98, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v97, s34
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v102, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s6 :: v_dual_mov_b32 v10, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v103, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s12 :: v_dual_mov_b32 v14, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v101, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v114, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v116, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s16 :: v_dual_mov_b32 v32, s17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v115, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s2 :: v_dual_mov_b32 v36, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s31 :: v_dual_mov_b32 v42, s103
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v130, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v181, s102 :: v_dual_mov_b32 v180, s101
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v178, s100 :: v_dual_mov_b32 v177, s99
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v131, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v166, s98 :: v_dual_mov_b32 v165, s97
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s96 :: v_dual_mov_b32 v160, s87
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v129, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v151, s86 :: v_dual_mov_b32 v146, s84
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v149, s85 :: v_dual_mov_b32 v132, s81
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v134, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v135, s83 :: v_dual_mov_b32 v128, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v133, s82 :: v_dual_mov_b32 v118, s70
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v119, s71 :: v_dual_mov_b32 v112, s67
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v117, s69 :: v_dual_mov_b32 v100, s66
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v144, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v113, s68 :: v_dual_mov_b32 v96, s64
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s65 :: v_dual_mov_b32 v84, s53
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s55 :: v_dual_mov_b32 v80, s52
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s54 :: v_dual_mov_b32 v30, s50
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s51 :: v_dual_mov_b32 v26, s49
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s48 :: v_dual_mov_b32 v34, s38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s39 :: v_dual_mov_b32 v82, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s35 :: v_dual_mov_b32 v86, s104
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s42 :: v_dual_mov_b32 v68, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s46 :: v_dual_mov_b32 v66, s56
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v164, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s58 :: v_dual_mov_b32 v64, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s62 :: v_dual_mov_b32 v53, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s94 :: v_dual_mov_b32 v51, s92
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s90 :: v_dual_mov_b32 v37, s78
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v33, s76
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s74
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v25, s72
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v44, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0
+; GFX11-FAKE16-NEXT: .LBB73_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v41, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v48, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v72, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v181, v68, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v181, v62, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v49, v49, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v70, 16, v70
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v35, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v180, 16, v181
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v60, v48, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v178, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v61, v49, v70
+; GFX11-FAKE16-NEXT: v_perm_b32 v49, v56, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v63, v36, v180
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v48
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v166, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v31, v31, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v27, v165, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v28, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v62, v35, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v59, v58, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, v31, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, v28, v49
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, v27, v48
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v161, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v45, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v31, v151, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v32, v32, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v23, v160, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v24, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v149, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v67, v32, v35
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[60:63], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[66:69], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, v23, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v40, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, v24, v28
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, v21, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v22, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v146, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v179, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v133, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v135, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v132, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v67, v21, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v19, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v164, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v20, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v17, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v18, v163, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v128, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v118, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v150, v148, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v119, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v117, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v147, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v17, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v145, v134, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v13, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v100, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v144, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v113, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v131, v130, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v99, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v112, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v129, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v13, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v115, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v96, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v116, v114, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v103, v102, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v85, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v101, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v84, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v98, v97, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v80, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v83, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v55, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v1, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v2, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v26, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v27, v25
+; GFX11-FAKE16-NEXT: s_clause 0x5
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[64:67], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v75, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v75, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v75, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v75, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v75, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v75, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v75, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v75, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v75, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v74, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v74, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v74, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v74, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v74, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v74, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v74, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v74, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v74, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v74, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v74, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v74, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v74, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v74, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v74, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v74, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v74, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v74, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v74, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v74, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v74, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v74, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v74, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v74, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v74, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v74, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v74, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v74, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v74, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v74, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v74, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v74, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -123576,458 +126984,582 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v16f64_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:308
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:292
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:268
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:252
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:228
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:216
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:212
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:208
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:196
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:180
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:176
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:172
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:168
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:160
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:156
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:136
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:132
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:128
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:116
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:108
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:92
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:88
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:68
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:60
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:56
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:40
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v57, s29 :: v_dual_mov_b32 v60, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v59, s27 :: v_dual_mov_b32 v72, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s25 :: v_dual_mov_b32 v90, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v79, s24 :: v_dual_mov_b32 v76, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s23 :: v_dual_mov_b32 v92, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v94, s19 :: v_dual_mov_b32 v105, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v104, s17 :: v_dual_mov_b32 v107, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v120, s16 :: v_dual_mov_b32 v123, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v110, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s1 :: v_dual_mov_b32 v40, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s4 :: v_dual_mov_b32 v46, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s6 :: v_dual_mov_b32 v47, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v56, s9 :: v_dual_mov_b32 v75, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v58, s11 :: v_dual_mov_b32 v73, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s12 :: v_dual_mov_b32 v89, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v88, s15 :: v_dual_mov_b32 v77, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v74, s16 :: v_dual_mov_b32 v91, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v78, s20 :: v_dual_mov_b32 v93, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v95, s22 :: v_dual_mov_b32 v106, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v109, s23 :: v_dual_mov_b32 v122, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v108, s26 :: v_dual_mov_b32 v111, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v124, s27 :: v_dual_mov_b32 v125, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v121, s40 :: v_dual_mov_b32 v126, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v127, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB75_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v123, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v105, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v127, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v120, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v90, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v72, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v126, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v125, v111, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v92, v76, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v79, v61, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v93, v78, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v89, v74, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v124, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v60, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v75, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v56, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v46, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v109, v95, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v183, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v91, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v122, v106, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v177, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v88, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v133, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v128, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v118, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v47, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v103, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v43, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v87, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v12, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v182, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v180, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v49, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v165, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v35, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v150, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v137, 16, v137
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v151, v148, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v146, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v18, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v144, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v119, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v115, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v22, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v102, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v100, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v24, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v85, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v83, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v26, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v28, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40
-; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v136
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v136, v137
; GFX11-TRUE16-NEXT: s_branch .LBB75_3
; GFX11-TRUE16-NEXT: .LBB75_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB75_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB75_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v123
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v120
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v92
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v107, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v104, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v94, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v90
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v79
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v122
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v109
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v60
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v76, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v108, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v106, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v95, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v125
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v111, 0xc0c0004
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v13, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v93
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v89
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v88
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v56
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v43
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v40, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v183
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v182
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v181
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v177
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v151
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v161, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v150, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff, v18
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff, v20
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v16, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v18, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v21
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v147
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v146
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v135
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v132
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v133
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v129
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v128
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v119
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v117
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v114
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v144, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v132, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v131, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v130, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v117, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v116, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v114, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v112, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
@@ -124058,21 +127590,21 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v103
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v102
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 3, v101
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v96
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v85
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v84
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v81
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v70
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v82
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v99, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v97, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v22
@@ -124103,31 +127635,31 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 3, v67
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 3, v66
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 3, v65
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v55
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 3, v53
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 3, v49
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v48
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v37
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 3, v34
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v55, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v49, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v49, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v36, v48, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v39, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v34, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v39, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v35, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v28
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v37
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v34
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v33
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff, v27
@@ -124135,20 +127667,69 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff, v29
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v36, 0xffff, v36
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v33, 0xffff, v33
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28
; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v34
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v34
; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32
; GFX11-TRUE16-NEXT: .LBB75_5: ; %end
-; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -149027,468 +152608,652 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v64bf16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:296
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:288
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:280
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:276
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:256
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:248
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:240
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:236
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:200
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v110, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v125, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v121, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v127, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v120, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v124, off, s32 offset:292
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v122, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v126, off, s32 offset:284
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v74, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v107, off, s32 offset:276
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v78, off, s32 offset:272
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v111, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v77, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v94, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v88, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v108, off, s32 offset:252
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v62, off, s32 offset:244
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v90, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v95, off, s32 offset:236
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:232
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v46, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v72, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v42, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v40, off, s32 offset:208
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v47, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:192
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:176
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:168
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:148
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:136
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:128
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:120
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:60
-; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:28
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v79, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v104, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v89, off, s32 offset:176
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v109, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:168
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v73, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v93, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v106, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:152
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v57, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v183, off, s32 offset:144
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v75, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v44, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v41, off, s32 offset:128
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v59, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:112
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: s_clause 0xf
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v54, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s27 :: v_dual_mov_b32 v52, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s25 :: v_dual_mov_b32 v32, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v64, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s22 :: v_dual_mov_b32 v34, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s21 :: v_dual_mov_b32 v48, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s18 :: v_dual_mov_b32 v38, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s17 :: v_dual_mov_b32 v50, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v123, s1 :: v_dual_mov_b32 v56, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v91, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s4 :: v_dual_mov_b32 v60, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v105, s5 :: v_dual_mov_b32 v76, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s8 :: v_dual_mov_b32 v92, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v148, s10 :: v_dual_mov_b32 v43, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s12 :: v_dual_mov_b32 v58, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v149, s14 :: v_dual_mov_b32 v180, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s16 :: v_dual_mov_b32 v144, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s17 :: v_dual_mov_b32 v164, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s18 :: v_dual_mov_b32 v182, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s22 :: v_dual_mov_b32 v133, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s24 :: v_dual_mov_b32 v113, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s25 :: v_dual_mov_b32 v119, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s28 :: v_dual_mov_b32 v134, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s40
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB89_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0x6050400
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v70, v114, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v32, v38, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v33, v50, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s4, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s40, s8, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s14, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s12, s6, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s5, s56, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s61, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s11, s43, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s13, s46, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s58, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s57, s63, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v9.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s59, s44, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s41, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s47, s62, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v13.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v50, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v37, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v52, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v100, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v119, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v133, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v144, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v66, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v48, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v149, v180, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v148, v43, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v64, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v60, v76, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v56, v91, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v134, v115, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v37, v68, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s73, s42, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v65, v67, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v69, v81, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v146, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v182, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v68, v83, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v96, v99, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v161, v45, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v103, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v116, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v63, v92, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v105, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v160, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v13.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v86, s74, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v53, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v13.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v134, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v66, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v14.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v39, v83, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v71, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v15.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v99, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v69, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v97, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v84, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v17.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v98, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v116, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v113, v55, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v19.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v130, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v118, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v64, v117, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v21.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v82, v131, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v147, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v87, v144, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v23.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v151, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v101, v149, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v119, v164, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v132, v162, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v25.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v102, v160, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v128, v167, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v129, v165, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v27.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v183, v133, v166, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v150, v179, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v29.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v181, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v178, v182, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v31.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v180, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v183.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v80, v123, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v84, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v44, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v57, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v15.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v70, v87, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v112, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v73, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v104, v79, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v17.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v118, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v147, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v117, v150, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v42, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v19.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v178, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v166, v46, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v163, v62, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v21.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v59, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v75, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v77, v94, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v74, v107, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v23.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v106, v93, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v109, v89, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v120, v124, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v110, v125, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v25.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v129, v167, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v47, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v27.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v179, v72, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v95, v90, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v88, v108, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v111, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v31.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v122, v126, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v127, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v136.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v137.l
; GFX11-TRUE16-NEXT: s_branch .LBB89_3
; GFX11-TRUE16-NEXT: .LBB89_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB89_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB89_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v180
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v166
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v181
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s59, s59, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v125
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v95
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v122, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v120, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v90, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v133, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v129, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v160
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v110, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v111
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v107
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v179
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v162
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v129, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v1, v102, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v150, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v132, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v177
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v102, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v149
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v132, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v167
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v101, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v144
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v176
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v128, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v101, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v131
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v120, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v108
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v94
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v88, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v74, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v62
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v77, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v42
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v163, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v164
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v87, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v119, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v151
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v118
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v82, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v147
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v64, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v113
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v85, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v135
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v55, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v98
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v55, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v167
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v150
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v166, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v177, 0x300, v4
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(43)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v109
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v104
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(39)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v106
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v89, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v79, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v93, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v117, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v73
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(35)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v129, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v57
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(31)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v59
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v44
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v150, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v130
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v52, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v116
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v71
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v103
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v97
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v53
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(27)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v178
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v160
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v165, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v167, 0x300, v4
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(23)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v145
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(19)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v147
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v128, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v116
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(15)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v130, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v103
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v112
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v85, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v86, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v96, 0x300, v4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v134
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v114
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v68
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v70, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v81
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v123
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s74, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s73, s73, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s73, s42, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s47, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s59, s44, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s72, s58, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s43, s11, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s56, s5, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s12, s6, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s61, s61, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s41, s10, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s46, s13, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v50, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v53, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s60, s15, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s61, s45, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v68, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v67
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v69, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v92
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v76
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v65, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s28, s29, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s63, s63, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s63, s57, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s9, s4, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s20, s21, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s14, s7, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, s40, s8, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v67, s26, s27, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v68, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s22, s23, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v69, s2, s3, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v70, s18, s19, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v66, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v71, s16, s17, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v80, s0, s1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v54, 0x300, v54
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v67
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v69, 0x300, v69
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v70, 0x300, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v43
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v70, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v45
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v182
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v71, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v146
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v80, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v133
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v134
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v119
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v81, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v71
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v80
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v101.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v132.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v133.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v83, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v84, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v64
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v3, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v4, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v50
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v66
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x300, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v49
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v34
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v96.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v86.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v85.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.h, v130.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.h, v167.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.h, v165.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.h, v150.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.h, v129.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v117.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.h, v177.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.h, v166.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.h, v163.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v77.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v74.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v120.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v110.l
; GFX11-TRUE16-NEXT: .LBB89_5: ; %end
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -162695,90 +166460,44 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-LABEL: bitcast_v64bf16_to_v128i8_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
-; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-TRUE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:12
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:8
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
@@ -162795,1355 +166514,1160 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s104, 0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s5, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s5, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s4, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s4, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s7, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s7, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s7, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s6, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s9, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s9, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s8, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s11, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s11, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s10, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s10, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s13, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s13, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s13, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s12, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s15, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s15, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s14, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s14, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s41, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s41, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s41, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s40, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s40, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s29, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s29, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s29, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s28, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s43 :: v_dual_mov_b32 v55, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s43 :: v_dual_mov_b32 v53, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v130, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v149, s43 :: v_dual_mov_b32 v134, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v160, s43 :: v_dual_mov_b32 v163, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v128, s43 :: v_dual_mov_b32 v161, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s43 :: v_dual_mov_b32 v164, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v119, s43 :: v_dual_mov_b32 v40, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v47, s43 :: v_dual_mov_b32 v58, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s43 :: v_dual_mov_b32 v60, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v115, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v145, s43 :: v_dual_mov_b32 v112, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v146, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v151, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v150, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s43 :: v_dual_mov_b32 v162, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v166, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v98, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s43 :: v_dual_mov_b32 v180, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v99, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s43 :: v_dual_mov_b32 v86, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, s43 :: v_dual_mov_b32 v97, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v43, s43 :: v_dual_mov_b32 v56, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v87, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s43 :: v_dual_mov_b32 v82, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s43 :: v_dual_mov_b32 v85, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s43 :: v_dual_mov_b32 v72, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v74, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s43 :: v_dual_mov_b32 v48, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s43 :: v_dual_mov_b32 v64, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v54, s46
; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s44 :: v_dual_mov_b32 v66, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s44 :: v_dual_mov_b32 v28, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s44 :: v_dual_mov_b32 v35, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s44 :: v_dual_mov_b32 v52, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s27 :: v_dual_mov_b32 v37, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s25 :: v_dual_mov_b32 v32, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s23 :: v_dual_mov_b32 v30, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s21 :: v_dual_mov_b32 v25, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s19 :: v_dual_mov_b32 v23, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s17 :: v_dual_mov_b32 v21, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s3 :: v_dual_mov_b32 v19, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s1 :: v_dual_mov_b32 v17, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v15, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v13, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v11, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v9, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v7, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v5, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s41 :: v_dual_mov_b32 v3, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s29 :: v_dual_mov_b32 v1, s28
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s46
; GFX11-TRUE16-NEXT: s_branch .LBB91_3
; GFX11-TRUE16-NEXT: .LBB91_2:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: s_mov_b32 s104, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_lo
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
; GFX11-TRUE16-NEXT: .LBB91_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s43, s104, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB91_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_lshl_b32 s42, s29, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s29, s29, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s29, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s29, s29, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s42
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s29
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s28, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s29, s28, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s28, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s29
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s29, s41, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s29
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s41, s41, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s28, s40, 0xffff0000
-; GFX11-TRUE16-NEXT: s_lshl_b32 s29, s40, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s28, s41, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v3, v7 :: v_dual_add_nc_u32 v4, 0x7fff, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s41
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s41, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v51.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_and_b32 s28, s40, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v9, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s29
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s40, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v5, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s28, s15, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v5 :: v_dual_add_nc_u32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v11, v6
; GFX11-TRUE16-NEXT: s_lshl_b32 s15, s15, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v5, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s14, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v5
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s15
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s15, s14, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s14, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX11-TRUE16-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s13, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v12, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v10, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s13, s12, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v14, v10
; GFX11-TRUE16-NEXT: s_lshl_b32 s12, s12, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v52.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v11, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v12 :: v_dual_add_nc_u32 v7, v7, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s12
; GFX11-TRUE16-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v13, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s11, s11, 16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v13
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v12
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v10, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v16, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s11, s10, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s10, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v12
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v15, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v17, v13
; GFX11-TRUE16-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v15, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s9, s9, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: s_and_b32 s9, s8, 0xffff0000
-; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s8, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v15, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v17, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s9, s8, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v15
+; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v13, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-TRUE16-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v17
; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s7, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v14, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v18, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
; GFX11-TRUE16-NEXT: s_and_b32 s7, s6, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s6, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v70.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v20, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s6
; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v98.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v18, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s5
; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v20, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v101.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v39.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v83.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v16, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v85.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v21, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v18, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v23, v19
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v21 :: v_dual_add_nc_u32 v16, v19, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v21 :: v_dual_add_nc_u32 v16, v17, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v20, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v99.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v21, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v17
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v22 :: v_dual_add_nc_u32 v18, v18, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v19, v23
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v25, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v18, v20, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v112.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v113.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v87.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v24, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s3, 16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v21, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v21 :: v_dual_add_nc_u32 v20, 0x7fff, v20
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, v26, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v23
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v20, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v101.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v98.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s2, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v103.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v83.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.h, v129.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v118.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.h, v132.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v20, v21, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v25, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s17, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v19, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v25
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v21, v25
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, v26, v23
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v102.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, v21, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v112.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v114.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v84.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v19, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v84.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v81.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v19
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v97.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v23 :: v_dual_add_nc_u32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v86.l
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v21, v21, v25 :: v_dual_add_nc_u32 v22, 0x7fff, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, v19, v24
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v87.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v22, v22, v25 :: v_dual_add_nc_u32 v23, 0x7fff, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v19, v24
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v21, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s16, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v22, v23, v25, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, v26, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v27, v24, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v28, v25, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v25
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v117.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v21, v23, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, v27, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, v28, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v23, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v16
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v22 :: v_dual_add_nc_u32 v16, v17, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x7fff, v26
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, v21, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v86.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v24, v26, v28, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, 0x400000, v23
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v97.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v96.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v29, v26, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v25
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v99.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v29, v26
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v23, v27, v28, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v26
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v25
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v27, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v31, v28, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v30, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v27
; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v131.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, v31, v28
+; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v30, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v23, v23, v29, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x7fff, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v27
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, v26, v30
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v25, v25, v29 :: v_dual_add_nc_u32 v26, 0x7fff, v31
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v30
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v31, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v19 :: v_dual_add_nc_u32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v26, v26, v27, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v118.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v28, v31, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, 0x400000, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v26
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v27, v23, v29, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v25
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, v28, v31
+; GFX11-TRUE16-NEXT: v_bfe_u32 v28, v25, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, v28, v25
+; GFX11-TRUE16-NEXT: v_bfe_u32 v32, v29, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.h, v129.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v27, v27, v30, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v30, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, v32, v29
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v27
+; GFX11-TRUE16-NEXT: v_bfe_u32 v27, v30, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v100.l
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v25, v28, v31 :: v_dual_add_nc_u32 v28, 0x7fff, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, v27, v30
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v32, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v30
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v24, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v33, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v28, v31, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v31, v32, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x7fff, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, 0x400000, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, v31, v32
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v27, v27, v29, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32
+; GFX11-TRUE16-NEXT: v_bfe_u32 v28, v33, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x7fff, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v27
+; GFX11-TRUE16-NEXT: v_bfe_u32 v27, v29, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v16 :: v_dual_add_nc_u32 v16, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v30, v30, v34, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v34, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, v27, v29
; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v33
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v36, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v33, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, v28, v33
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v28
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v130.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.h, v131.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v103.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v113.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v28, v32, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v32, v34, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
+; GFX11-TRUE16-NEXT: v_bfe_u32 v29, v36, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v115.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v28
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v27, v27, v35 :: v_dual_add_nc_u32 v32, v32, v34
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v134.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v116.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, v29, v36
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v34
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v119.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-TRUE16-NEXT: v_bfe_u32 v35, v29, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v37, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v28, v32, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v147.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v22, v15
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v17, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, v35, v29
+; GFX11-TRUE16-NEXT: v_bfe_u32 v34, v37, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v37
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v27, v27, v33, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v33.h, v132.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[30:31]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, v34, v37
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v34, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v16, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v22, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v161.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v19, v26, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v18, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v150.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v163.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v25, v26, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.l, v134.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.h, v149.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.l, v146.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v18, v27, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.h, v160.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v145.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.l, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.h, v148.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v100.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v117.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v115.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v128.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v119.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.h, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v130.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.h, v144.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v162.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v176.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v165.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v177.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v96.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.l, v151.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v164.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v166.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v167.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[40:41]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[46:47]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[20:21]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[44:45]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[35:36]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[178:179]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[48:49]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[28:29]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[182:183]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v179
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 8, v179
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v183
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v41
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v47
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v47
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v46
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v45
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v45
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v44
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v178
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v35
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX11-TRUE16-NEXT: s_branch .LBB91_6
-; GFX11-TRUE16-NEXT: .LBB91_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s2 :: v_dual_mov_b32 v115, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s8 :: v_dual_mov_b32 v165, s26
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s24 :: v_dual_mov_b32 v151, s25
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s22 :: v_dual_mov_b32 v147, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v135, s18
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s21 :: v_dual_mov_b32 v131, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s16 :: v_dual_mov_b32 v119, s17
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s3 :: v_dual_mov_b32 v99, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s1 :: v_dual_mov_b32 v87, s7
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s4 :: v_dual_mov_b32 v81, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v71, s11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s103 :: v_dual_mov_b32 v112, s99
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s102 :: v_dual_mov_b32 v100, s101
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s98 :: v_dual_mov_b32 v96, s100
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s97 :: v_dual_mov_b32 v84, s87
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s96 :: v_dual_mov_b32 v70, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s12 :: v_dual_mov_b32 v80, s86
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s85
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v64, s40
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s84 :: v_dual_mov_b32 v66, s83
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s82
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s28 :: v_dual_mov_b32 v53, s81
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s29 :: v_dual_mov_b32 v51, s80
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s71 :: v_dual_mov_b32 v19, s69
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s67 :: v_dual_mov_b32 v13, s70
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s64 :: v_dual_mov_b32 v14, s66
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s68 :: v_dual_mov_b32 v12, s55
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v132, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s53 :: v_dual_mov_b32 v28, s50
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s65 :: v_dual_mov_b32 v10, s52
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s54 :: v_dual_mov_b32 v8, s49
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s39 :: v_dual_mov_b32 v6, s38
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s51 :: v_dual_mov_b32 v48, s34
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s36 :: v_dual_mov_b32 v36, s35
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s48 :: v_dual_mov_b32 v44, s37
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s30 :: v_dual_mov_b32 v4, s31
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v26, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s44 :: v_dual_mov_b32 v38, s42
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s74 :: v_dual_mov_b32 v16, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s78 :: v_dual_mov_b32 v18, s88
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v23, s92
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-TRUE16-NEXT: .LBB91_6: ; %end
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v128, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v115, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v115, v117, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v35, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v28
+; GFX11-TRUE16-NEXT: v_bfe_u32 v38, v34, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s26, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_bfe_u32 v49, v35, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v48, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v28, v36, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, v38, v34
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, v49, v35
+; GFX11-TRUE16-NEXT: v_bfe_u32 v37, v48, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x7fff, v36
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_perm_b32 v117, v114, v72, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v114, v129, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v132, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v144, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v128, v116, v61, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v130, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v148, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v117, v115
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v118, v37
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v128, v129
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v133, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v119, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v119, v135, v46, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v33, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v160, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v149, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v119, v32
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v146, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v163, v30, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v118, v145, v56, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v38, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v134, v41, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v32, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v161, v183, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v167, v26, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v147, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v177, v25, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v118
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v37, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v166, v180, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v69, v23, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v96, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v27, v27, v32 :: v_dual_add_nc_u32 v32, 0x7fff, v38
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v35
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, v37, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, 0x400000, v34
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v38, 0x400000, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v32, v32, v36, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v29, v29, v37, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v27
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v32.h, v135.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v28, v38, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v29
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.h, v133.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[32:33]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v28
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.h, v144.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[37:38]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 24, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v1
+; GFX11-TRUE16-NEXT: .LBB91_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v115, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v117, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v71, v113, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-TRUE16-NEXT: v_perm_b32 v81, v114, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v119, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v17, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v19, v65
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v116, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v129, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v69, v118, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v71, 16, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v81
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v69
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v18, v71
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v20, v81
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v21, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v131, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v22, v65
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v23, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v24, v69
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v128, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v134, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
-; GFX11-TRUE16-NEXT: v_perm_b32 v116, v165, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v33, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v176, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v51, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v68, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:16
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v130, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v135, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v132, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v160, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v25, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v31, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v32, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v144, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v26, v65
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v33, v53, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v82, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v100, v17, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v164, v181, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v116, v25
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v162, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v50, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v30, v64
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v37, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v24, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v133, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v26, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v83, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v39, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v30, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v38, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v74, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v83, v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v80, v29, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v27, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v115, v151, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v53, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v66, v3, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v25, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v55, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v67, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v85, v28, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v103, v16, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v101, v21, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v113, v15, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v112, v24, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v52, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v64, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v85, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v82, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v87, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v84, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v62, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v65, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v81, v12, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v98, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v87, v14, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v102, v20, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v99, v19, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v34, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v37, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v97, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v25
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v26
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v86, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v99, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v96, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v101, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v98, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v103, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v100, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v112, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v102, v145, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v167, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v162, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v150, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v147, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v146, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v15, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v29
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:48
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v74, 0
-; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
-; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-TRUE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:72
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -175321,468 +178845,652 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v64f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:296
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:288
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:280
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:276
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:256
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:248
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:240
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:236
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:200
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v110, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v125, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v121, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v127, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v120, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v124, off, s32 offset:292
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v122, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v126, off, s32 offset:284
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v74, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v107, off, s32 offset:276
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v78, off, s32 offset:272
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v111, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v77, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v94, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v88, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v108, off, s32 offset:252
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v62, off, s32 offset:244
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v90, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v95, off, s32 offset:236
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:232
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v46, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v72, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v42, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v40, off, s32 offset:208
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v47, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:192
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:176
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:168
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:148
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:136
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:128
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:120
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:60
-; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:28
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v79, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v104, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v89, off, s32 offset:176
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v109, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:168
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v73, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v93, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v106, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:152
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v57, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v183, off, s32 offset:144
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v75, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v44, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v41, off, s32 offset:128
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v59, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:112
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: s_clause 0xf
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v54, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s27 :: v_dual_mov_b32 v52, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s25 :: v_dual_mov_b32 v32, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v64, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s22 :: v_dual_mov_b32 v34, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s21 :: v_dual_mov_b32 v48, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s18 :: v_dual_mov_b32 v38, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s17 :: v_dual_mov_b32 v50, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v123, s1 :: v_dual_mov_b32 v56, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v91, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s4 :: v_dual_mov_b32 v60, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v105, s5 :: v_dual_mov_b32 v76, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s8 :: v_dual_mov_b32 v92, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v148, s10 :: v_dual_mov_b32 v43, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s12 :: v_dual_mov_b32 v58, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v149, s14 :: v_dual_mov_b32 v180, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s16 :: v_dual_mov_b32 v144, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s17 :: v_dual_mov_b32 v164, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s18 :: v_dual_mov_b32 v182, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s22 :: v_dual_mov_b32 v133, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s24 :: v_dual_mov_b32 v113, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s25 :: v_dual_mov_b32 v119, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s28 :: v_dual_mov_b32 v134, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s40
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB93_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0x6050400
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v70, v114, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v32, v38, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v33, v50, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s4, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s40, s8, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s14, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s12, s6, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s5, s56, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s61, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s11, s43, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s13, s46, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s58, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s57, s63, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v9.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s59, s44, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s41, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s47, s62, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v13.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v50, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v37, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v52, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v100, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v119, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v133, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v144, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v66, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v48, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v149, v180, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v148, v43, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v64, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v60, v76, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v56, v91, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v134, v115, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v37, v68, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s73, s42, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v65, v67, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v69, v81, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v146, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v182, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v68, v83, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v96, v99, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v161, v45, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v103, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v116, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v63, v92, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v105, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v160, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v13.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v86, s74, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v53, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v13.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v134, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v66, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v14.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v39, v83, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v71, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v15.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v99, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v69, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v97, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v84, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v17.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v98, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v116, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v113, v55, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v19.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v130, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v118, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v64, v117, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v21.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v82, v131, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v147, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v87, v144, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v23.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v151, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v101, v149, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v119, v164, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v132, v162, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v25.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v102, v160, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v128, v167, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v129, v165, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v27.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v183, v133, v166, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v150, v179, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v29.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v181, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v178, v182, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v31.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v180, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v183.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v80, v123, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v84, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v44, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v57, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v15.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v70, v87, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v112, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v73, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v104, v79, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v17.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v118, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v147, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v117, v150, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v42, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v19.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v178, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v166, v46, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v163, v62, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v21.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v59, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v75, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v77, v94, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v74, v107, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v23.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v106, v93, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v109, v89, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v120, v124, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v110, v125, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v25.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v129, v167, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v47, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v27.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v179, v72, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v95, v90, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v88, v108, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v111, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v31.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v122, v126, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v127, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v136.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v137.l
; GFX11-TRUE16-NEXT: s_branch .LBB93_3
; GFX11-TRUE16-NEXT: .LBB93_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB93_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB93_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v180
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v166
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v181
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s59, s59, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v125
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v95
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v122, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v120, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v90, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v133, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v129, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v160
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v110, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v111
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v107
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v179
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v162
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v129, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v1, v102, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v150, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v132, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v177
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v102, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v149
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v132, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v167
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v101, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v144
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v176
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v128, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v101, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v131
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v120, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v108
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v94
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v88, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v74, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v62
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v77, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v42
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v163, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v164
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v87, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v119, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v151
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v118
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v82, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v147
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v64, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v113
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v85, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v135
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v55, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v98
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v55, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v167
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v150
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v166, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v177, 0x300, v4
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(43)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v109
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v104
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(39)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v106
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v89, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v79, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v93, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v117, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v73
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(35)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v129, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v57
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(31)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v59
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v44
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v150, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v130
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v52, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v116
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v71
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v103
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v97
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v53
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(27)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v178
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v160
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v165, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v167, 0x300, v4
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(23)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v145
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(19)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v147
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v128, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v116
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(15)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v130, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v103
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v112
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v85, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v86, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v96, 0x300, v4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v134
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v114
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v68
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v70, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v81
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v123
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s74, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s73, s73, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s73, s42, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s47, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s59, s44, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s72, s58, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s43, s11, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s56, s5, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s12, s6, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s61, s61, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s41, s10, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s46, s13, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v50, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v53, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s60, s15, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s61, s45, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v68, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v67
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v69, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v92
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v76
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v65, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s28, s29, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s63, s63, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s63, s57, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s9, s4, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s20, s21, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s14, s7, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, s40, s8, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v67, s26, s27, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v68, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s22, s23, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v69, s2, s3, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v70, s18, s19, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v66, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v71, s16, s17, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v80, s0, s1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v54, 0x300, v54
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v67
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v69, 0x300, v69
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v70, 0x300, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v43
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v70, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v45
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v182
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v71, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v146
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v80, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v133
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v134
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v119
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v81, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v71
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v80
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v101.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v132.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v133.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v83, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v84, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v64
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v3, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v4, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v50
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v66
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x300, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v49
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v34
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v96.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v86.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v85.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.h, v130.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.h, v167.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.h, v165.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.h, v150.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.h, v129.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v117.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.h, v177.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.h, v166.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.h, v163.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v77.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v74.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v120.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v110.l
; GFX11-TRUE16-NEXT: .LBB93_5: ; %end
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -185442,889 +189150,1583 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v64f16_to_v128i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72
-; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76
-; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80
-; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-NEXT: v_writelane_b32 v75, s31, 8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s7, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s9, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s11, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s13, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s15, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s100, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
-; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
-; GFX11-NEXT: s_cbranch_scc0 .LBB95_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s30, s5, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s31, s5, 16
-; GFX11-NEXT: s_lshr_b32 s35, s5, 8
-; GFX11-NEXT: s_lshr_b32 s34, s4, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-NEXT: s_lshr_b32 s36, s4, 8
-; GFX11-NEXT: s_lshr_b32 s37, s7, 24
-; GFX11-NEXT: s_lshr_b32 s38, s7, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-NEXT: s_lshr_b32 s48, s7, 8
-; GFX11-NEXT: s_lshr_b32 s39, s6, 16
-; GFX11-NEXT: s_lshr_b32 s49, s6, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-NEXT: s_lshr_b32 s50, s9, 24
-; GFX11-NEXT: s_lshr_b32 s51, s9, 16
-; GFX11-NEXT: s_lshr_b32 s53, s9, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-NEXT: s_lshr_b32 s52, s8, 16
-; GFX11-NEXT: s_lshr_b32 s54, s8, 8
-; GFX11-NEXT: s_lshr_b32 s55, s11, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-NEXT: s_lshr_b32 s64, s11, 16
-; GFX11-NEXT: s_lshr_b32 s66, s11, 8
-; GFX11-NEXT: s_lshr_b32 s65, s10, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-NEXT: s_lshr_b32 s67, s10, 8
-; GFX11-NEXT: s_lshr_b32 s68, s13, 24
-; GFX11-NEXT: s_lshr_b32 s69, s13, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-NEXT: s_lshr_b32 s71, s13, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-NEXT: s_lshr_b32 s70, s12, 16
-; GFX11-NEXT: s_lshr_b32 s80, s12, 8
-; GFX11-NEXT: s_lshr_b32 s81, s15, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-NEXT: s_lshr_b32 s82, s15, 16
-; GFX11-NEXT: s_lshr_b32 s84, s15, 8
-; GFX11-NEXT: s_lshr_b32 s83, s14, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s85, s14, 8
-; GFX11-NEXT: s_lshr_b32 s86, s41, 24
-; GFX11-NEXT: s_lshr_b32 s87, s41, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-NEXT: s_lshr_b32 s97, s41, 8
-; GFX11-NEXT: s_lshr_b32 s96, s40, 16
-; GFX11-NEXT: s_lshr_b32 s98, s40, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-NEXT: s_lshr_b32 s99, s29, 24
-; GFX11-NEXT: s_lshr_b32 s101, s29, 16
-; GFX11-NEXT: s_lshr_b32 s103, s29, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-NEXT: s_lshr_b32 s102, s28, 16
-; GFX11-NEXT: s_lshr_b32 s104, s28, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s0, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB95_3
-; GFX11-NEXT: .LBB95_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s100, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: .LBB95_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s100, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB95_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v30, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s41 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s40 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v34, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v33, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v36, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v35, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28]
-; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
-; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30]
-; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[33:34]
-; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[35:36]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v50, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v98, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v116, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15
-; GFX11-NEXT: s_branch .LBB95_6
-; GFX11-NEXT: .LBB95_5:
-; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
-; GFX11-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
-; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
-; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
-; GFX11-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
-; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
-; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
-; GFX11-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
-; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
-; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
-; GFX11-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102
-; GFX11-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101
-; GFX11-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v133, s96 :: v_dual_mov_b32 v128, s97
-; GFX11-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
-; GFX11-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s83
-; GFX11-NEXT: v_dual_mov_b32 v114, s84 :: v_dual_mov_b32 v117, s82
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
-; GFX11-NEXT: v_dual_mov_b32 v115, s70 :: v_dual_mov_b32 v102, s71
-; GFX11-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
-; GFX11-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s65
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v96, s66 :: v_dual_mov_b32 v99, s64
-; GFX11-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
-; GFX11-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v97, s52 :: v_dual_mov_b32 v86, s50
-; GFX11-NEXT: v_dual_mov_b32 v83, s53 :: v_dual_mov_b32 v82, s49
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s39
-; GFX11-NEXT: v_dual_mov_b32 v55, s48 :: v_dual_mov_b32 v80, s38
-; GFX11-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v81, s37 :: v_dual_mov_b32 v32, s36
-; GFX11-NEXT: v_dual_mov_b32 v71, s34 :: v_dual_mov_b32 v26, s35
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v39, s31 :: v_dual_mov_b32 v50, s30
-; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62
-; GFX11-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58
-; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v41, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42
-; GFX11-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88
-; GFX11-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90
-; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v49, s92
-; GFX11-NEXT: v_mov_b32_e32 v67, vcc_lo
-; GFX11-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v165, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v166, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v151, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v161, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v160, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v146, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v148, s0
-; GFX11-NEXT: .LBB95_6: ; %end
-; GFX11-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70
-; GFX11-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v34, v36, v70
-; GFX11-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
-; GFX11-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_or_b32_e32 v33, v35, v68
-; GFX11-NEXT: v_or_b32_e32 v35, v56, v69
-; GFX11-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; GFX11-NEXT: v_or_b32_e32 v27, v29, v65
-; GFX11-NEXT: v_or_b32_e32 v29, v70, v64
-; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_or_b32_e32 v36, v57, v58
-; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
-; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-NEXT: v_or_b32_e32 v28, v30, v68
-; GFX11-NEXT: v_or_b32_e32 v30, v182, v69
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off
-; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
-; GFX11-NEXT: v_or_b32_e32 v27, v23, v54
-; GFX11-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v28, v24, v64
-; GFX11-NEXT: v_or_b32_e32 v29, v21, v53
-; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30
-; GFX11-NEXT: v_or_b32_e32 v30, v21, v23
-; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
-; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v20, v20, v24
-; GFX11-NEXT: v_or_b32_e32 v21, v17, v33
-; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v145, v67, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v133, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_or_b32_e32 v22, v17, v22
-; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
-; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v17, v13, v24
-; GFX11-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v16, v16, v23
-; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_or_b32_e32 v18, v13, v18
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v24
-; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v23
-; GFX11-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v23
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v24
-; GFX11-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v39, v50, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v26, v2, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v23
-; GFX11-NEXT: v_or_b32_e32 v3, v31, v24
-; GFX11-NEXT: v_or_b32_e32 v4, v26, v25
-; GFX11-NEXT: s_clause 0x5
-; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
-; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-NEXT: v_readlane_b32 s34, v74, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72
-; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76
-; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80
-; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v64f16_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x19 ; 104-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:100
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:96
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:92
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:88
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:84
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:80
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:76
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:72
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:68
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:64
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:60
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:56
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:52
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:48
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:44
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:40
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:36
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:28
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:24
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:20
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:16
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB95_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v27, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s44 :: v_dual_mov_b32 v86, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v114, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v99, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s44 :: v_dual_mov_b32 v134, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v150, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s44 :: v_dual_mov_b32 v162, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v147, s44 :: v_dual_mov_b32 v176, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v146, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v178, s43 :: v_dual_mov_b32 v161, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v166, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s27 :: v_dual_mov_b32 v64, s22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s43 :: v_dual_mov_b32 v42, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s43 :: v_dual_mov_b32 v46, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s43 :: v_dual_mov_b32 v96, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s43 :: v_dual_mov_b32 v113, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s43 :: v_dual_mov_b32 v112, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v119, s43 :: v_dual_mov_b32 v132, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v130, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s43 :: v_dual_mov_b32 v148, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v163, s43 :: v_dual_mov_b32 v160, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v165, s43 :: v_dual_mov_b32 v180, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v177, s43 :: v_dual_mov_b32 v44, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v47, s43 :: v_dual_mov_b32 v62, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s43 :: v_dual_mov_b32 v36, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v73, s43 :: v_dual_mov_b32 v68, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s44 :: v_dual_mov_b32 v38, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s26 :: v_dual_mov_b32 v7, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s44 :: v_dual_mov_b32 v14, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s46 :: v_dual_mov_b32 v21, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v66, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s23 :: v_dual_mov_b32 v70, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s21 :: v_dual_mov_b32 v32, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s19 :: v_dual_mov_b32 v50, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s17 :: v_dual_mov_b32 v54, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s3 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s1 :: v_dual_mov_b32 v6, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v10, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v12, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s8 :: v_dual_mov_b32 v16, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v18, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s13 :: v_dual_mov_b32 v24, s41
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v28, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s40 :: v_dual_mov_b32 v80, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s46
+; GFX11-TRUE16-NEXT: s_branch .LBB95_3
+; GFX11-TRUE16-NEXT: .LBB95_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB95_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB95_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v65, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v64, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, s41 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, s40 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v51, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v50, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v49, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v35, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v34, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v48, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v55, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v54, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v33, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v32, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v71, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v67, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v66, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v70, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[34:35]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[66:67]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[70:71]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[32:33]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[54:55]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[16:17]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[81:82], 24, v[28:29]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 24, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 24, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v54
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v54
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v28
+; GFX11-TRUE16-NEXT: .LBB95_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v179, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v50, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v162, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v45, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v32, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v54, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v33, v146, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v76, v50, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v147, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v131, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v88, v32, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v117, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v74, v54, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v71, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v114, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v99, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v89, v33, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v66, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v91, v54, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v67, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, v33, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v85, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v22, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v8, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v83, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v164, v166, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, v37, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v65, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v53, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v34, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v35, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v48, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v73, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v51, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v164, 16, v164
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v135, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v49, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v33
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v39, v32, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v27, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v63, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v8, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v57, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v48, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v28, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v77, v51, v164
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v70, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v29, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v24, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, v22, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v47, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v90, v51, v38
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, v27, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v43, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v180, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, v8, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v167, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v144, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v17, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v41, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v18, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v151, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v145, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v25, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v59, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v19, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v8, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v132, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v55, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v64, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v9, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v119, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v10, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v115, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v101, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v96, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v160, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v75, v55, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v38, v38, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v1, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v2, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v50, v23, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v8, v4
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[74:77], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[88:91], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v16, v10
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[36:39], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[48:51], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[18:21], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-TRUE16-NEXT: s_clause 0x19 ; 104-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:100
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v64f16_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s100, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB95_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s4, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s7, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s6, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s9, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s11, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s10, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s13, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s13, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s13, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s12, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s15, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s15, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s14, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s14, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s41, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s41, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s41, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s40, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s40, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s29, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s28, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB95_3
+; GFX11-FAKE16-NEXT: .LBB95_2:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: s_mov_b32 s100, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: .LBB95_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s43, s100, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB95_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v28, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v30, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s41 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s40 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v34, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v33, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s29 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s28 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v36, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v35, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[33:34]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[35:36]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 8, v15
+; GFX11-FAKE16-NEXT: s_branch .LBB95_6
+; GFX11-FAKE16-NEXT: .LBB95_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v133, s96 :: v_dual_mov_b32 v128, s97
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s83
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s84 :: v_dual_mov_b32 v117, s82
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s70 :: v_dual_mov_b32 v102, s71
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s65
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s66 :: v_dual_mov_b32 v99, s64
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v44, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s52 :: v_dual_mov_b32 v86, s50
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s53 :: v_dual_mov_b32 v82, s49
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s48 :: v_dual_mov_b32 v80, s38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s37 :: v_dual_mov_b32 v32, s36
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s34 :: v_dual_mov_b32 v26, s35
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s31 :: v_dual_mov_b32 v50, s30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v177, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v49, s92
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v67, vcc_lo
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v178, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v164, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v151, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v161, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v160, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-FAKE16-NEXT: .LBB95_6: ; %end
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v70, 16, v70
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v36, v70
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v35, v68
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v56, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v58, 16, v58
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v65
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v70, v64
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v69
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v57, v58
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v68
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v182, v69
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v23, v54
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v24, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v21, v53
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v30
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v21, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v19, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v20, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v17, v33
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v145, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v133, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v17, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v13, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v13, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v39, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v2, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v31, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v26, v25
+; GFX11-FAKE16-NEXT: s_clause 0x5
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v75, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v75, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v75, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v75, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v75, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v75, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v75, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v75, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v75, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v74, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v74, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v74, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v74, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v74, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v74, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v74, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v74, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v74, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v74, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v74, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v74, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v74, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v74, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v74, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v74, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v74, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v74, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v74, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v74, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v74, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v74, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v74, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v74, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v74, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v74, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v74, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v74, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v74, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v74, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v74, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v74, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -196026,468 +200428,652 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v64i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:516
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:512
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:508
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:504
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:500
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:496
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:492
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:488
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:484
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:480
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:476
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:472
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:468
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:464
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:460
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:456
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:452
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:448
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:444
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:440
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:436
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:432
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:428
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:424
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:420
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:416
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:412
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:408
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:404
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:400
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:396
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:392
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:388
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:384
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:380
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:376
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:372
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:368
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:364
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:360
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:356
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:352
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:348
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:344
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:340
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:336
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:332
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:328
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:324
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:320
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:312
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v161, off, s32 offset:304
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v180, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:296
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:288
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v182, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:280
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:276
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:272
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:264
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:260
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:256
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:248
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v149, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v146, off, s32 offset:240
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:236
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v144, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v148, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:200
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v164, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v110, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v125, off, s32 offset:308
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v121, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v127, off, s32 offset:300
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v120, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v124, off, s32 offset:292
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v122, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v126, off, s32 offset:284
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v74, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v107, off, s32 offset:276
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v78, off, s32 offset:272
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v111, off, s32 offset:268
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v77, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v94, off, s32 offset:260
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v88, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v108, off, s32 offset:252
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v163, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v62, off, s32 offset:244
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v90, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v95, off, s32 offset:236
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:232
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v46, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v179, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v72, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v177, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v42, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v40, off, s32 offset:208
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v47, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v150, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v129, off, s32 offset:192
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v167, off, s32 offset:188
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:176
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v151, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:168
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v113, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:160
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:148
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:136
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:128
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:120
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:60
-; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:28
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v114, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v134, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v79, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v104, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v89, off, s32 offset:176
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v109, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:168
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v73, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v93, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v106, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v176, off, s32 offset:152
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v57, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v183, off, s32 offset:144
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v75, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v181, off, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v44, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v41, off, s32 offset:128
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v59, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v128, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v131, off, s32 offset:112
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v178, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v130, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v145, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v132, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v162, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v135, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v147, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: s_clause 0xf
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v54, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s27 :: v_dual_mov_b32 v52, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s25 :: v_dual_mov_b32 v32, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v64, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s22 :: v_dual_mov_b32 v34, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s21 :: v_dual_mov_b32 v48, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s18 :: v_dual_mov_b32 v38, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s17 :: v_dual_mov_b32 v50, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v29
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v25
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s20, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s21, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s22, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s23, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s24, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s25, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s26, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s27, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s28, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v123, s1 :: v_dual_mov_b32 v56, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v91, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v61, s4 :: v_dual_mov_b32 v60, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v105, s5 :: v_dual_mov_b32 v76, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s8 :: v_dual_mov_b32 v92, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v148, s10 :: v_dual_mov_b32 v43, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s12 :: v_dual_mov_b32 v58, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v149, s14 :: v_dual_mov_b32 v180, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v161, s16 :: v_dual_mov_b32 v144, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s17 :: v_dual_mov_b32 v164, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s18 :: v_dual_mov_b32 v182, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s22 :: v_dual_mov_b32 v133, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s24 :: v_dual_mov_b32 v113, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s25 :: v_dual_mov_b32 v119, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s28 :: v_dual_mov_b32 v134, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s40
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s41
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(47)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB97_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0x6050400
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v70, v114, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v32, v38, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v33, v50, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s4, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s40, s8, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s14, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s12, s6, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s5, s56, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s61, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s11, s43, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s13, s46, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s58, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s57, s63, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v9.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s59, s44, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s41, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s47, s62, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v13.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v50, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v37, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v52, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v100, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v119, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v133, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v144, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v66, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v48, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v149, v180, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v148, v43, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v64, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v60, v76, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v56, v91, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v134, v115, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v37, v68, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s73, s42, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v65, v67, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v69, v81, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v146, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v182, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v68, v83, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v96, v99, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v161, v45, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v58, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v103, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v116, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v63, v92, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v105, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v160, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v13.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v86, s74, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v53, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v13.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v134, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v66, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v14.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v39, v83, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v71, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v15.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v99, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v69, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v97, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v84, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v17.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v98, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v116, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v113, v55, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v19.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v130, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v118, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v64, v117, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v21.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v82, v131, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v147, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v87, v144, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v23.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v151, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v101, v149, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v119, v164, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v132, v162, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v25.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v102, v160, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v128, v167, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v129, v165, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v27.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v183, v133, v166, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v150, v179, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v29.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, v181, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v178, v182, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v31.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v180, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v183.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v80, v123, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v84, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v44, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v57, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v15.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v70, v87, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v112, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v73, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v104, v79, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v17.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v118, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v147, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v117, v150, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v42, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v19.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v162, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v178, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v166, v46, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v163, v62, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v21.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v59, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v75, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v77, v94, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v74, v107, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v23.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v106, v93, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v109, v89, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v136, v120, v124, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v137, v110, v125, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v25.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v129, v167, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v47, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v27.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v179, v72, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v95, v90, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v88, v108, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v111, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v31.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v122, v126, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v127, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v136.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v137.l
; GFX11-TRUE16-NEXT: s_branch .LBB97_3
; GFX11-TRUE16-NEXT: .LBB97_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: .LBB97_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB97_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v180
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v166
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v182
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v165
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v181
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v133, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s59, s59, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v127
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v125
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v126
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v124
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v95
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v121, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v110, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v122, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v120, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v90, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v133, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v129, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v160
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v110, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v111
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v107
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v179
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v162
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v129, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v1, v102, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v150, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v132, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v177
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v102, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v149
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v132, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v167
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v101, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v144
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v176
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v128, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v101, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v148, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v131
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v120, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v108
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v94
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v78, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v88, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v74, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v62
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v72
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v77, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v46
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v47
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v42
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v166, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v163, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v164
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v87, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v119, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v151
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v118
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v82, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v147
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v64, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v113
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v85, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v100, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v135
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v55, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v98
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v145
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v55, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v112, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v167
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v150
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v166, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v177, 0x300, v4
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(43)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v109
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v104
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(39)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v106
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v117, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v89, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v79, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v93, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v117, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v73
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(35)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v75
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v129, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v57
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(31)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v59
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v44
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v150, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v130
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v52, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v116
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v71
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v49, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v103
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v97
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v53
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(27)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v178
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v160
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v165, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v167, 0x300, v4
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(23)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v162
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v145
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(19)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v147
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v132, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v135, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v128, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v116
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(15)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v130, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v103
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v112
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v99
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v85, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v87
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v83
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v34, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v86, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v96, 0x300, v4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v134
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v114
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v68
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v70, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v81
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v123
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s74, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s73, s73, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v38, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s73, s42, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s47, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s59, s44, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s72, s58, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s43, s11, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s56, s5, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s12, s6, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s61, s61, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s41, s10, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s46, s13, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v50, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v53, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s60, s15, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s61, s45, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v68, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v67
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v105
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v69, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v91
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v92
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v76
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v65, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s28, s29, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s63, s63, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s63, s57, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s9, s4, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s20, s21, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s14, s7, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, s40, s8, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v67, s26, s27, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v68, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s22, s23, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v69, s2, s3, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v70, s18, s19, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v66, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v71, s16, s17, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v80, s0, s1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v54, 0x300, v54
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v67
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v69, 0x300, v69
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v70, 0x300, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v58
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v43
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v70, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v45
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v180
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v182
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v151, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v71, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v144
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v146
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v80, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v133
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v134
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v119
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v101, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v114, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v113, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v81, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v71
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v80
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v101.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v132.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v133.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v100
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v83, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v84, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v64
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v3, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v4, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v50
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 3, v66
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v37, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x300, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v35, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v49
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v34
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v96.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v86.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v85.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.h, v130.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.h, v167.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.h, v165.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.h, v150.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.h, v129.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v117.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.h, v177.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.h, v166.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.h, v163.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v77.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v74.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v120.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v110.l
; GFX11-TRUE16-NEXT: .LBB97_5: ; %end
+; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:324
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:332
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:336
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:340
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:344
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:348
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:356
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:360
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:364
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:372
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:376
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:380
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:384
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:392
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:396
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:400
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:404
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:408
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:412
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:416
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:420
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:424
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:428
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:432
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:436
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:440
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:444
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:448
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:452
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:456
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:460
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:464
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:468
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:472
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:476
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:480
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:484
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:488
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:492
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:496
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:500
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:504
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:508
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:512
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:516
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -205868,889 +210454,1583 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v64i16_to_v128i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72
-; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76
-; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80
-; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-NEXT: v_writelane_b32 v75, s31, 8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s7, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s9, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s11, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s13, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s15, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s100, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
-; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
-; GFX11-NEXT: s_cbranch_scc0 .LBB99_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s30, s5, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s31, s5, 16
-; GFX11-NEXT: s_lshr_b32 s35, s5, 8
-; GFX11-NEXT: s_lshr_b32 s34, s4, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-NEXT: s_lshr_b32 s36, s4, 8
-; GFX11-NEXT: s_lshr_b32 s37, s7, 24
-; GFX11-NEXT: s_lshr_b32 s38, s7, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-NEXT: s_lshr_b32 s48, s7, 8
-; GFX11-NEXT: s_lshr_b32 s39, s6, 16
-; GFX11-NEXT: s_lshr_b32 s49, s6, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-NEXT: s_lshr_b32 s50, s9, 24
-; GFX11-NEXT: s_lshr_b32 s51, s9, 16
-; GFX11-NEXT: s_lshr_b32 s53, s9, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-NEXT: s_lshr_b32 s52, s8, 16
-; GFX11-NEXT: s_lshr_b32 s54, s8, 8
-; GFX11-NEXT: s_lshr_b32 s55, s11, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-NEXT: s_lshr_b32 s64, s11, 16
-; GFX11-NEXT: s_lshr_b32 s66, s11, 8
-; GFX11-NEXT: s_lshr_b32 s65, s10, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-NEXT: s_lshr_b32 s67, s10, 8
-; GFX11-NEXT: s_lshr_b32 s68, s13, 24
-; GFX11-NEXT: s_lshr_b32 s69, s13, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-NEXT: s_lshr_b32 s71, s13, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-NEXT: s_lshr_b32 s70, s12, 16
-; GFX11-NEXT: s_lshr_b32 s80, s12, 8
-; GFX11-NEXT: s_lshr_b32 s81, s15, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-NEXT: s_lshr_b32 s82, s15, 16
-; GFX11-NEXT: s_lshr_b32 s84, s15, 8
-; GFX11-NEXT: s_lshr_b32 s83, s14, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s85, s14, 8
-; GFX11-NEXT: s_lshr_b32 s86, s41, 24
-; GFX11-NEXT: s_lshr_b32 s87, s41, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-NEXT: s_lshr_b32 s97, s41, 8
-; GFX11-NEXT: s_lshr_b32 s96, s40, 16
-; GFX11-NEXT: s_lshr_b32 s98, s40, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-NEXT: s_lshr_b32 s99, s29, 24
-; GFX11-NEXT: s_lshr_b32 s101, s29, 16
-; GFX11-NEXT: s_lshr_b32 s103, s29, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-NEXT: s_lshr_b32 s102, s28, 16
-; GFX11-NEXT: s_lshr_b32 s104, s28, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s0, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB99_3
-; GFX11-NEXT: .LBB99_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s100, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: .LBB99_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s100, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB99_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v28, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v30, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v29, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s41, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s40, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v34, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v33, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s29, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s28, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v36, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v35, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28]
-; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
-; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30]
-; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[33:34]
-; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[35:36]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v50, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v98, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v116, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15
-; GFX11-NEXT: s_branch .LBB99_6
-; GFX11-NEXT: .LBB99_5:
-; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
-; GFX11-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
-; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
-; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
-; GFX11-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
-; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
-; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
-; GFX11-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
-; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
-; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
-; GFX11-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102
-; GFX11-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101
-; GFX11-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v133, s96 :: v_dual_mov_b32 v128, s97
-; GFX11-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
-; GFX11-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s83
-; GFX11-NEXT: v_dual_mov_b32 v114, s84 :: v_dual_mov_b32 v117, s82
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
-; GFX11-NEXT: v_dual_mov_b32 v115, s70 :: v_dual_mov_b32 v102, s71
-; GFX11-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
-; GFX11-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s65
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v96, s66 :: v_dual_mov_b32 v99, s64
-; GFX11-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
-; GFX11-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v97, s52 :: v_dual_mov_b32 v86, s50
-; GFX11-NEXT: v_dual_mov_b32 v83, s53 :: v_dual_mov_b32 v82, s49
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s39
-; GFX11-NEXT: v_dual_mov_b32 v55, s48 :: v_dual_mov_b32 v80, s38
-; GFX11-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v81, s37 :: v_dual_mov_b32 v32, s36
-; GFX11-NEXT: v_dual_mov_b32 v71, s34 :: v_dual_mov_b32 v26, s35
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v39, s31 :: v_dual_mov_b32 v50, s30
-; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62
-; GFX11-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58
-; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v41, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42
-; GFX11-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88
-; GFX11-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90
-; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v49, s92
-; GFX11-NEXT: v_mov_b32_e32 v67, vcc_lo
-; GFX11-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v165, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v166, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v151, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v161, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v160, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v146, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v148, s0
-; GFX11-NEXT: .LBB99_6: ; %end
-; GFX11-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70
-; GFX11-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v34, v36, v70
-; GFX11-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
-; GFX11-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_or_b32_e32 v33, v35, v68
-; GFX11-NEXT: v_or_b32_e32 v35, v56, v69
-; GFX11-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; GFX11-NEXT: v_or_b32_e32 v27, v29, v65
-; GFX11-NEXT: v_or_b32_e32 v29, v70, v64
-; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_or_b32_e32 v36, v57, v58
-; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
-; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-NEXT: v_or_b32_e32 v28, v30, v68
-; GFX11-NEXT: v_or_b32_e32 v30, v182, v69
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off
-; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
-; GFX11-NEXT: v_or_b32_e32 v27, v23, v54
-; GFX11-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v28, v24, v64
-; GFX11-NEXT: v_or_b32_e32 v29, v21, v53
-; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30
-; GFX11-NEXT: v_or_b32_e32 v30, v21, v23
-; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
-; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v20, v20, v24
-; GFX11-NEXT: v_or_b32_e32 v21, v17, v33
-; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v145, v67, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v133, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_or_b32_e32 v22, v17, v22
-; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
-; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v17, v13, v24
-; GFX11-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v16, v16, v23
-; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_or_b32_e32 v18, v13, v18
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v24
-; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v23
-; GFX11-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v23
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v24
-; GFX11-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v39, v50, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v26, v2, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v23
-; GFX11-NEXT: v_or_b32_e32 v3, v31, v24
-; GFX11-NEXT: v_or_b32_e32 v4, v26, v25
-; GFX11-NEXT: s_clause 0x5
-; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
-; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
-; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-NEXT: v_readlane_b32 s34, v74, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72
-; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76
-; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80
-; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v64i16_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_clause 0x19 ; 104-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:100
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:96
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:92
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:88
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:84
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:80
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:76
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:72
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:68
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:64
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:60
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:56
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:52
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:48
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:44
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:40
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:36
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:28
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:24
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:20
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:16
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB99_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v27, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s44 :: v_dual_mov_b32 v86, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v100, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v114, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v99, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s44 :: v_dual_mov_b32 v134, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v150, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s44 :: v_dual_mov_b32 v162, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v147, s44 :: v_dual_mov_b32 v176, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v146, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v178, s43 :: v_dual_mov_b32 v161, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v166, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s27 :: v_dual_mov_b32 v64, s22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s43 :: v_dual_mov_b32 v42, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s43 :: v_dual_mov_b32 v46, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s43 :: v_dual_mov_b32 v96, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s43 :: v_dual_mov_b32 v113, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s43 :: v_dual_mov_b32 v112, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s6, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s46
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v119, s43 :: v_dual_mov_b32 v132, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v130, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s43
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v151, s43 :: v_dual_mov_b32 v148, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s10, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v163, s43 :: v_dual_mov_b32 v160, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v165, s43 :: v_dual_mov_b32 v180, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s15, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s14, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v177, s43 :: v_dual_mov_b32 v44, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s41, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s15, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v47, s43 :: v_dual_mov_b32 v62, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s41, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s40, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s43
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s29, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s43 :: v_dual_mov_b32 v36, s44
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v73, s43 :: v_dual_mov_b32 v68, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s44 :: v_dual_mov_b32 v38, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s26 :: v_dual_mov_b32 v7, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s44 :: v_dual_mov_b32 v14, s46
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s44
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[12:13], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s46 :: v_dual_mov_b32 v21, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v66, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s23 :: v_dual_mov_b32 v70, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s21 :: v_dual_mov_b32 v32, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s19 :: v_dual_mov_b32 v50, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s17 :: v_dual_mov_b32 v54, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s3 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s1 :: v_dual_mov_b32 v6, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v10, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v12, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s8 :: v_dual_mov_b32 v16, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v18, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s13 :: v_dual_mov_b32 v24, s41
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v28, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s40 :: v_dual_mov_b32 v80, s44
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s46
+; GFX11-TRUE16-NEXT: s_branch .LBB99_3
+; GFX11-TRUE16-NEXT: .LBB99_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB99_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB99_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v65, s23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v64, s22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, s41, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, s40, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v51, s3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v50, s2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v49, s25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v35, s27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v34, s26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v48, s24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v55, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v54, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v33, s17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v32, s16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v71, s19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v67, s21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v66, s20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v70, s18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[34:35]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[66:67]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[70:71]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[32:33]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[54:55]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[16:17]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[81:82], 24, v[28:29]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 24, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v64
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 24, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v54
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v54
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v28
+; GFX11-TRUE16-NEXT: .LBB99_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v179, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v50, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v162, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v45, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v32, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v54, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v33, v146, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v76, v50, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v147, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v131, v129, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v88, v32, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v117, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v74, v54, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v71, v133, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v114, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v99, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v89, v33, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v66, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v91, v54, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v67, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, v33, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v85, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v22, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v8, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v83, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v164, v166, v164, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, v37, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v65, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v53, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v34, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v35, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v48, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v73, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v51, v176, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v164, 16, v164
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v135, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v49, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v33
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v39, v32, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v27, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v63, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v8, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v57, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v48, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v28, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v77, v51, v164
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v70, v134, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v29, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v24, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, v22, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v47, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v90, v51, v38
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, v27, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v43, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v180, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, v8, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v167, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v144, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v17, v177, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v41, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v18, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v151, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v145, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v25, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v59, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v19, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v8, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v132, v130, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v55, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v64, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v9, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v119, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v10, v128, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v115, v113, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v101, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v96, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v160, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v75, v55, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v38, v38, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v118, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v112, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v1, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v2, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v50, v23, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v8, v4
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[74:77], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[88:91], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v16, v10
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[36:39], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[48:51], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[18:21], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-TRUE16-NEXT: s_clause 0x19 ; 104-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:100
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v64i16_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s100, 0
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB99_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s5, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s4, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s7, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s6, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s9, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s11, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s10, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s13, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s13, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s13, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s12, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s15, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s15, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s14, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s14, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s41, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s41, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s41, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s40, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s40, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s29, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s28, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB99_3
+; GFX11-FAKE16-NEXT: .LBB99_2:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: s_mov_b32 s100, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: .LBB99_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s43, s100, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB99_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v30, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s41, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s40, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v34, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v33, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s29, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s28, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v36, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v35, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[33:34]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[35:36]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 8, v15
+; GFX11-FAKE16-NEXT: s_branch .LBB99_6
+; GFX11-FAKE16-NEXT: .LBB99_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v133, s96 :: v_dual_mov_b32 v128, s97
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s83
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s84 :: v_dual_mov_b32 v117, s82
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s70 :: v_dual_mov_b32 v102, s71
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s65
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s66 :: v_dual_mov_b32 v99, s64
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v44, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s52 :: v_dual_mov_b32 v86, s50
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s53 :: v_dual_mov_b32 v82, s49
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s48 :: v_dual_mov_b32 v80, s38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s37 :: v_dual_mov_b32 v32, s36
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s34 :: v_dual_mov_b32 v26, s35
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s31 :: v_dual_mov_b32 v50, s30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v177, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v49, s92
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v67, vcc_lo
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v178, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v164, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v151, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v161, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v160, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-FAKE16-NEXT: .LBB99_6: ; %end
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v70, 16, v70
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v36, v70
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v35, v68
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v56, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v58, 16, v58
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v65
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v70, v64
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v69
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v57, v58
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v68
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v182, v69
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v23, v54
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v24, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v21, v53
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v30
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v21, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v19, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v20, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v17, v33
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v145, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v133, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v17, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v13, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v13, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v39, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v2, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v31, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v26, v25
+; GFX11-FAKE16-NEXT: s_clause 0x5
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v75, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v75, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v75, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v75, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v75, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v75, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v75, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v75, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v75, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v74, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v74, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v74, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v74, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v74, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v74, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v74, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v74, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v74, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v74, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v74, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v74, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v74, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v74, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v74, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v74, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v74, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v74, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v74, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v74, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v74, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v74, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v74, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v74, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v74, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v74, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v74, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v74, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v74, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v74, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v74, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v74, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -220060,280 +225340,272 @@ define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v68, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v64, 0x400000, v68
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v65, v65, v67, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v69, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v68, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v70, 0x400000, v69
; GFX11-TRUE16-NEXT: v_or_b32_e32 v68, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v30.h
; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v69, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v55.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v66, v64, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v1, 16, 1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v65
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v30.h
; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v54.l
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v70, 0x40c00000, v65
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v65, 0x400000, v69
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v66, v66, v68, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v65, 0x40c00000, v65
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v66, v68, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69
-; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v70, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v71, 0x400000, v70
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v69, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v67, v65, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v66
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v70, 0x7fff
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v65.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v67, v69, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v70, v70
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v65, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v71, 0x400000, v65
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v65, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v67, v67, v70, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v64.l
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v70, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v2, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v68, v70 :: v_dual_and_b32 v3, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v68, v68, v71, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v65, v66, v71, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v80, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v3, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v71, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v69, v71 :: v_dual_and_b32 v4, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v81, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v66, v71 :: v_dual_and_b32 v4, 0xffff0000, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v81, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v66, 0x40c00000, v66
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v66, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v80, 0x400000, v66
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v66, v66
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v66, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v66, v67, v80, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v68, v80, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v4, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v80, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v67, v80, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v67.h
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v4, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v68, v80 :: v_dual_and_b32 v5, 0xffff0000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v3, 16, 1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v69, v81, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v4, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v66, v81, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v5, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v81, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_cndmask_b32 v5, v69, v81
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v65.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v66, v81 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v67, v82, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v6, 16, 1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v68, v82, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v82, 0x400000, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v66.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v67, v82, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.h
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v69.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v68, v82, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v68.h
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v84, 0x400000, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v69, v83, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v6, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v66, v83, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v84, 0x400000, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v7, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, 0x400000, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v5, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v7, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v69, v83, vcc_lo
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v85, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v7, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v70.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v66, v83 :: v_dual_add_f32 v8, 0x40c00000, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v67, v84, vcc_lo
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.h
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v71.l
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v70.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v86, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v6, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v8, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v68, v84, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v8, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v84, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v85, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v67, v67, v8, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v67, v84, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h
+; GFX11-TRUE16-NEXT: v_add3_u32 v68, v68, v8, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v71.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v68, v84, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v68, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_bfe_u32 v67, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v69, v85, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v68, v7, 0x7fff
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v68, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v66, v85, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v86, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.h
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v68, 0x40c00000, v68
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v9, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v85, 0x400000, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v9, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v69, v85, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v80.l
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v87, 0x400000, v68
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v9, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v66, v85 :: v_dual_and_b32 v10, 0xffff0000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v8
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v67, v7, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v67, 16, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.h
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v86, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v67, 0x40c00000, v67
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v96, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v86, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v68, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v10, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v81.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v67, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v87, 0x400000, v67
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v68, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v66, v86, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v11, 0x40c00000, v11 :: v_dual_lshlrev_b32 v10, 16, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v87, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v96, 0x400000, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v80.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v67, 0x7fff
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v86, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v10, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v69, v86, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v86, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v67, v67
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v9, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v86, v86, v11, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v87, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v87, 0x400000, v11
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v9, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v86, v87, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v9, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v6.h
+; GFX11-TRUE16-NEXT: v_add3_u32 v86, v86, v11, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v69, v96, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v82.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v86, v87 :: v_dual_add_f32 v12, 0x40c00000, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v13
; GFX11-TRUE16-NEXT: v_bfe_u32 v86, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-TRUE16-NEXT: v_or_b32_e32 v97, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v83.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v66, v96, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v11
; GFX11-TRUE16-NEXT: v_add3_u32 v11, v86, v10, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v86, 0x40c00000, v87
; GFX11-TRUE16-NEXT: v_or_b32_e32 v87, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v12, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v12, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
; GFX11-TRUE16-NEXT: v_bfe_u32 v98, v86, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v11, v87, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v13
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v14
-; GFX11-TRUE16-NEXT: v_add3_u32 v13, v98, v86, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v69, v97, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v69, 0x400000, v86
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v83.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v66, v97, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v66, 0x400000, v86
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v86, v86
-; GFX11-TRUE16-NEXT: v_bfe_u32 v97, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v86, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v13
+; GFX11-TRUE16-NEXT: v_add3_u32 v13, v98, v86, 0x7fff
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v12
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v13, v69 :: v_dual_lshlrev_b32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v87
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v97, v11, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v87, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v86, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v13, v66 :: v_dual_lshlrev_b32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v97, v11, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v86, 0x40c00000, v86
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v97, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v99, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, 0x400000, v86
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v69, v87, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v97, v97, v13, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v68.l
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v97, v11, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v87
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v87, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, 0x400000, v86
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v66, v87 :: v_dual_add_f32 v14, 0x40c00000, v14
; GFX11-TRUE16-NEXT: v_bfe_u32 v87, v86, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v86, v86
-; GFX11-TRUE16-NEXT: v_bfe_u32 v100, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v103, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; GFX11-TRUE16-NEXT: v_bfe_u32 v97, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v99, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v66, v14, 16, 1
; GFX11-TRUE16-NEXT: v_add3_u32 v87, v87, v86, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_add3_u32 v100, v100, v15, 0x7fff
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.h
-; GFX11-TRUE16-NEXT: v_bfe_u32 v69, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; GFX11-TRUE16-NEXT: v_or_b32_e32 v102, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_add3_u32 v97, v97, v13, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v66, v66, v14, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v86, v87, v101, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v100, v15, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v103, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v96.l
-; GFX11-TRUE16-NEXT: v_add3_u32 v69, v69, v14, 0x7fff
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v84.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v82.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v69, v102, vcc_lo
+; GFX11-TRUE16-NEXT: v_add3_u32 v100, v100, v15, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v66, v102, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v86
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v86
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v100, v103, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v86.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v14
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v15.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v97, v99, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v66.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v86.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v12.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v98.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v13.h
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
index 17fa6366bbca10..7aca94dffcf5ee 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
@@ -2936,85 +2936,79 @@ define <4 x i32> @bitcast_v8bf16_to_v4i32(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v3, 16, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v7, v8 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v7, v8 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v9, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v8, v12 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v4, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v2, v7, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v7, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l
; GFX11-TRUE16-NEXT: .LBB22_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -4164,74 +4158,159 @@ define inreg <16 x i8> @bitcast_v4i32_to_v16i8_scalar(<4 x i32> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v15, s10
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i32_to_v16i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s18, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB25_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s8, s3, 24
-; GFX11-NEXT: s_lshr_b32 s9, s3, 16
-; GFX11-NEXT: s_lshr_b32 s10, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s12, s2, 8
-; GFX11-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-NEXT: s_lshr_b32 s14, s1, 16
-; GFX11-NEXT: s_lshr_b32 s15, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s17, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB25_3
-; GFX11-NEXT: .LBB25_2:
-; GFX11-NEXT: s_mov_b32 s18, -1
-; GFX11-NEXT: ; implicit-def: $sgpr17
-; GFX11-NEXT: ; implicit-def: $sgpr16
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: .LBB25_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s18, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB25_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s8, s3, 24
-; GFX11-NEXT: s_lshr_b32 s9, s3, 16
-; GFX11-NEXT: s_lshr_b32 s10, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s12, s2, 8
-; GFX11-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-NEXT: s_lshr_b32 s14, s1, 16
-; GFX11-NEXT: s_lshr_b32 s15, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s17, s0, 8
-; GFX11-NEXT: .LBB25_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s17
-; GFX11-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v3, s6
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s15
-; GFX11-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s13
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s4
-; GFX11-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s10
-; GFX11-NEXT: v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v15, s8
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i32_to_v16i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: s_branch .LBB25_3
+; GFX11-TRUE16-NEXT: .LBB25_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v15, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v13, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s5 :: v_dual_mov_b32 v9, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v5, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v7, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB25_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i32_to_v16i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s18, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB25_3
+; GFX11-FAKE16-NEXT: .LBB25_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s18, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s18, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s0, 8
+; GFX11-FAKE16-NEXT: .LBB25_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v3, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v15, s8
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -5059,84 +5138,168 @@ define inreg <4 x i32> @bitcast_v16i8_to_v4i32_scalar(<16 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB27_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v4i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB27_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB27_3
-; GFX11-NEXT: .LBB27_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB27_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB27_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB27_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v4i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB27_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB27_3
+; GFX11-TRUE16-NEXT: .LBB27_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB27_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB27_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB27_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v4i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB27_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB27_3
+; GFX11-FAKE16-NEXT: .LBB27_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB27_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB27_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB27_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7697,85 +7860,79 @@ define <4 x float> @bitcast_v8bf16_to_v4f32(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v3, 16, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v7, v8 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v7, v8 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v9, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v8, v12 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v4, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v2, v7, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v7, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l
; GFX11-TRUE16-NEXT: .LBB46_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -8941,109 +9098,189 @@ define inreg <16 x i8> @bitcast_v4f32_to_v16i8_scalar(<4 x float> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v12, v17
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4f32_to_v16i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB49_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s9, s3, 24
-; GFX11-NEXT: s_lshr_b32 s10, s3, 16
-; GFX11-NEXT: s_lshr_b32 s12, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s13, s2, 8
-; GFX11-NEXT: s_lshr_b32 s14, s1, 24
-; GFX11-NEXT: s_lshr_b32 s15, s1, 16
-; GFX11-NEXT: s_lshr_b32 s17, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s18, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB49_3
-; GFX11-NEXT: .LBB49_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr18
-; GFX11-NEXT: ; implicit-def: $sgpr16
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr17
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: .LBB49_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB49_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v19, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v17, s3, 1.0
-; GFX11-NEXT: v_add_f32_e64 v16, s2, 1.0
-; GFX11-NEXT: v_add_f32_e64 v18, s0, 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v18
-; GFX11-NEXT: s_branch .LBB49_6
-; GFX11-NEXT: .LBB49_5:
-; GFX11-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1
-; GFX11-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v17, s3
-; GFX11-NEXT: v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s16
-; GFX11-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s15
-; GFX11-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v10, s11
-; GFX11-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v14, s10
-; GFX11-NEXT: v_mov_b32_e32 v13, s12
-; GFX11-NEXT: v_mov_b32_e32 v15, s9
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB49_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v18
-; GFX11-NEXT: v_mov_b32_e32 v4, v19
-; GFX11-NEXT: v_mov_b32_e32 v8, v16
-; GFX11-NEXT: v_mov_b32_e32 v12, v17
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = fadd <4 x float> %a, splat (float 1.000000e+00)
- %a2 = bitcast <4 x float> %a1 to <16 x i8>
- br label %end
-
-cmp.false:
- %a3 = bitcast <4 x float> %a to <16 x i8>
- br label %end
-
-end:
- %phi = phi <16 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
- ret <16 x i8> %phi
-}
-
-define <4 x float> @bitcast_v16i8_to_v4f32(<16 x i8> %a, i32 %b) #0 {
-; SI-LABEL: bitcast_v16i8_to_v4f32:
-; SI: ; %bb.0:
-; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v18, v2
-; SI-NEXT: v_mov_b32_e32 v17, v0
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
-; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v3
+; GFX11-TRUE16-LABEL: bitcast_v4f32_to_v16i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s6
+; GFX11-TRUE16-NEXT: s_branch .LBB49_3
+; GFX11-TRUE16-NEXT: .LBB49_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, s3, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, s2, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, s0, 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4f32_to_v16i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB49_3
+; GFX11-FAKE16-NEXT: .LBB49_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr18
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, s3, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, s2, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, s0, 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; GFX11-FAKE16-NEXT: s_branch .LBB49_6
+; GFX11-FAKE16-NEXT: .LBB49_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v17, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v10, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v14, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s12
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s9
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB49_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v19
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v17
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = fadd <4 x float> %a, splat (float 1.000000e+00)
+ %a2 = bitcast <4 x float> %a1 to <16 x i8>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast <4 x float> %a to <16 x i8>
+ br label %end
+
+end:
+ %phi = phi <16 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
+ ret <16 x i8> %phi
+}
+
+define <4 x float> @bitcast_v16i8_to_v4f32(<16 x i8> %a, i32 %b) #0 {
+; SI-LABEL: bitcast_v16i8_to_v4f32:
+; SI: ; %bb.0:
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v18, v2
+; SI-NEXT: v_mov_b32_e32 v17, v0
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
+; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v3
; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v5
; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v7
; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v9
@@ -9845,84 +10082,168 @@ define inreg <4 x float> @bitcast_v16i8_to_v4f32_scalar(<16 x i8> inreg %a, i32
; GFX9-NEXT: .LBB51_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v4f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB51_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB51_3
-; GFX11-NEXT: .LBB51_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB51_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB51_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v4f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v4f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB51_3
+; GFX11-FAKE16-NEXT: .LBB51_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB51_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -12051,85 +12372,79 @@ define <2 x i64> @bitcast_v8bf16_to_v2i64(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB66_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v3, 16, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v7, v8 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v7, v8 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v9, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v8, v12 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v4, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v2, v7, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v7, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l
; GFX11-TRUE16-NEXT: .LBB66_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -13279,105 +13594,192 @@ define inreg <16 x i8> @bitcast_v2i64_to_v16i8_scalar(<2 x i64> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v15, s10
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v2i64_to_v16i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s18, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB69_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s8, s3, 24
-; GFX11-NEXT: s_lshr_b32 s9, s3, 16
-; GFX11-NEXT: s_lshr_b32 s10, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s12, s2, 8
-; GFX11-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-NEXT: s_lshr_b32 s14, s1, 16
-; GFX11-NEXT: s_lshr_b32 s15, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s17, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB69_3
-; GFX11-NEXT: .LBB69_2:
-; GFX11-NEXT: s_mov_b32 s18, -1
-; GFX11-NEXT: ; implicit-def: $sgpr17
-; GFX11-NEXT: ; implicit-def: $sgpr16
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: .LBB69_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s18, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB69_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
-; GFX11-NEXT: s_lshr_b32 s8, s3, 24
-; GFX11-NEXT: s_lshr_b32 s9, s3, 16
-; GFX11-NEXT: s_lshr_b32 s10, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s12, s2, 8
-; GFX11-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-NEXT: s_lshr_b32 s14, s1, 16
-; GFX11-NEXT: s_lshr_b32 s15, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s17, s0, 8
-; GFX11-NEXT: .LBB69_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s17
-; GFX11-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v3, s6
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s15
-; GFX11-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s13
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s4
-; GFX11-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s10
-; GFX11-NEXT: v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v15, s8
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = add <2 x i64> %a, splat (i64 3)
- %a2 = bitcast <2 x i64> %a1 to <16 x i8>
- br label %end
-
-cmp.false:
- %a3 = bitcast <2 x i64> %a to <16 x i8>
- br label %end
-
-end:
- %phi = phi <16 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
- ret <16 x i8> %phi
-}
-
-define <2 x i64> @bitcast_v16i8_to_v2i64(<16 x i8> %a, i32 %b) #0 {
-; SI-LABEL: bitcast_v16i8_to_v2i64:
-; SI: ; %bb.0:
-; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v18, v2
-; SI-NEXT: v_mov_b32_e32 v17, v0
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
-; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v13
+; GFX11-TRUE16-LABEL: bitcast_v2i64_to_v16i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: s_branch .LBB69_3
+; GFX11-TRUE16-NEXT: .LBB69_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v15, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v9, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v5, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v6, s3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB69_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v2i64_to_v16i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s18, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB69_3
+; GFX11-FAKE16-NEXT: .LBB69_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s18, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s18, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s0, 8
+; GFX11-FAKE16-NEXT: .LBB69_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v3, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v15, s8
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = add <2 x i64> %a, splat (i64 3)
+ %a2 = bitcast <2 x i64> %a1 to <16 x i8>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast <2 x i64> %a to <16 x i8>
+ br label %end
+
+end:
+ %phi = phi <16 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
+ ret <16 x i8> %phi
+}
+
+define <2 x i64> @bitcast_v16i8_to_v2i64(<16 x i8> %a, i32 %b) #0 {
+; SI-LABEL: bitcast_v16i8_to_v2i64:
+; SI: ; %bb.0:
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v18, v2
+; SI-NEXT: v_mov_b32_e32 v17, v0
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
+; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v13
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v15
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -14174,84 +14576,168 @@ define inreg <2 x i64> @bitcast_v16i8_to_v2i64_scalar(<16 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB71_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v2i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB71_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB71_3
-; GFX11-NEXT: .LBB71_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB71_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB71_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB71_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v2i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB71_3
+; GFX11-TRUE16-NEXT: .LBB71_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB71_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v2i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB71_3
+; GFX11-FAKE16-NEXT: .LBB71_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB71_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -15964,85 +16450,79 @@ define <2 x double> @bitcast_v8bf16_to_v2f64(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v3, 16, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v7, v8 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v7, v8 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v9, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v8, v12 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v4, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v2, v7, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v7, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l
; GFX11-TRUE16-NEXT: .LBB82_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -17198,142 +17678,220 @@ define inreg <16 x i8> @bitcast_v2f64_to_v16i8_scalar(<2 x double> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v12, v17
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v2f64_to_v16i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB85_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s3, 24
-; GFX11-NEXT: s_lshr_b32 s13, s3, 16
-; GFX11-NEXT: s_lshr_b32 s12, s3, 8
-; GFX11-NEXT: s_lshr_b32 s16, s2, 16
-; GFX11-NEXT: s_lshr_b32 s15, s2, 8
-; GFX11-NEXT: s_lshr_b32 s11, s1, 24
-; GFX11-NEXT: s_lshr_b32 s10, s1, 16
-; GFX11-NEXT: s_lshr_b32 s9, s1, 8
-; GFX11-NEXT: s_lshr_b32 s18, s0, 16
-; GFX11-NEXT: s_lshr_b32 s17, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB85_3
-; GFX11-NEXT: .LBB85_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr17
-; GFX11-NEXT: ; implicit-def: $sgpr18
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr16
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB85_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB85_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[16:17], s[2:3], 1.0
-; GFX11-NEXT: v_add_f64 v[18:19], s[0:1], 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v18
-; GFX11-NEXT: s_branch .LBB85_6
-; GFX11-NEXT: .LBB85_5:
-; GFX11-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v17, s3
-; GFX11-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v19, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s18 :: v_dual_mov_b32 v1, s17
-; GFX11-NEXT: v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v9, s15
-; GFX11-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v14, s13
-; GFX11-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v6, s10
-; GFX11-NEXT: v_mov_b32_e32 v15, s14
-; GFX11-NEXT: v_mov_b32_e32 v13, s12
-; GFX11-NEXT: v_mov_b32_e32 v7, s11
-; GFX11-NEXT: v_mov_b32_e32 v5, s9
-; GFX11-NEXT: .LBB85_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v18
-; GFX11-NEXT: v_mov_b32_e32 v4, v19
-; GFX11-NEXT: v_mov_b32_e32 v8, v16
-; GFX11-NEXT: v_mov_b32_e32 v12, v17
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = fadd <2 x double> %a, splat (double 1.000000e+00)
- %a2 = bitcast <2 x double> %a1 to <16 x i8>
- br label %end
-
-cmp.false:
- %a3 = bitcast <2 x double> %a to <16 x i8>
- br label %end
-
-end:
- %phi = phi <16 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
- ret <16 x i8> %phi
-}
-
-define <2 x double> @bitcast_v16i8_to_v2f64(<16 x i8> %a, i32 %b) #0 {
-; SI-LABEL: bitcast_v16i8_to_v2f64:
-; SI: ; %bb.0:
-; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v18, v2
-; SI-NEXT: v_mov_b32_e32 v17, v0
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
-; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v1
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v5
-; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v7
-; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v11
-; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v13
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v15
-; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
-; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_cbranch_execnz .LBB86_3
-; SI-NEXT: ; %bb.1: ; %Flow
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; SI-NEXT: s_cbranch_execnz .LBB86_4
-; SI-NEXT: .LBB86_2: ; %end
-; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: s_setpc_b64 s[30:31]
-; SI-NEXT: .LBB86_3: ; %cmp.false
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v17
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v0, v0, v22
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v21, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v6
-; SI-NEXT: v_or_b32_e32 v1, v1, v20
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v19, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v8
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v2, v2, v16
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-LABEL: bitcast_v2f64_to_v16i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s8 :: v_dual_mov_b32 v4, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v16, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB85_3
+; GFX11-TRUE16-NEXT: .LBB85_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f64 v[11:12], s[2:3], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[3:4], s[0:1], 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB85_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v2f64_to_v16i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB85_3
+; GFX11-FAKE16-NEXT: .LBB85_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr18
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f64 v[16:17], s[2:3], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[18:19], s[0:1], 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; GFX11-FAKE16-NEXT: s_branch .LBB85_6
+; GFX11-FAKE16-NEXT: .LBB85_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v17, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v19, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s18 :: v_dual_mov_b32 v1, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v9, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v14, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v6, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s14
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s12
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, s11
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, s9
+; GFX11-FAKE16-NEXT: .LBB85_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v19
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v17
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = fadd <2 x double> %a, splat (double 1.000000e+00)
+ %a2 = bitcast <2 x double> %a1 to <16 x i8>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast <2 x double> %a to <16 x i8>
+ br label %end
+
+end:
+ %phi = phi <16 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
+ ret <16 x i8> %phi
+}
+
+define <2 x double> @bitcast_v16i8_to_v2f64(<16 x i8> %a, i32 %b) #0 {
+; SI-LABEL: bitcast_v16i8_to_v2f64:
+; SI: ; %bb.0:
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v18, v2
+; SI-NEXT: v_mov_b32_e32 v17, v0
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16
+; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v1
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v5
+; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v7
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v11
+; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v13
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v15
+; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
+; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
+; SI-NEXT: s_cbranch_execnz .LBB86_3
+; SI-NEXT: ; %bb.1: ; %Flow
+; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_cbranch_execnz .LBB86_4
+; SI-NEXT: .LBB86_2: ; %end
+; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: s_setpc_b64 s[30:31]
+; SI-NEXT: .LBB86_3: ; %cmp.false
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v17
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
+; SI-NEXT: v_or_b32_e32 v0, v0, v22
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v21, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v6
+; SI-NEXT: v_or_b32_e32 v1, v1, v20
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v2, v19, v2
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v8
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v10
+; SI-NEXT: v_or_b32_e32 v2, v2, v16
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v3, v9, v3
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
@@ -18099,84 +18657,168 @@ define inreg <2 x double> @bitcast_v16i8_to_v2f64_scalar(<16 x i8> inreg %a, i32
; GFX9-NEXT: .LBB87_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v2f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB87_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB87_3
-; GFX11-NEXT: .LBB87_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB87_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB87_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB87_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v2f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB87_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB87_3
+; GFX11-TRUE16-NEXT: .LBB87_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB87_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB87_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB87_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v2f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB87_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB87_3
+; GFX11-FAKE16-NEXT: .LBB87_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB87_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB87_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB87_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -19497,89 +20139,82 @@ define <8 x i16> @bitcast_v8bf16_to_v8i16(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB94_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v12, v5, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v5, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_add_f32 v6, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v11, v12 :: v_dual_add_f32 v0, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v3, 16, 1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v5, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v8, v13 :: v_dual_and_b32 v2, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v13, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v8, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v9, v13, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v9.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v12, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v7.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v12, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v8.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v10, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v6.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v3.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v7.l
; GFX11-TRUE16-NEXT: .LBB94_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -20840,92 +21475,172 @@ define inreg <16 x i8> @bitcast_v8i16_to_v16i8_scalar(<8 x i16> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v12, v17
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i16_to_v16i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB97_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s9, s3, 24
-; GFX11-NEXT: s_lshr_b32 s10, s3, 16
-; GFX11-NEXT: s_lshr_b32 s12, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s13, s2, 8
-; GFX11-NEXT: s_lshr_b32 s14, s1, 24
-; GFX11-NEXT: s_lshr_b32 s15, s1, 16
-; GFX11-NEXT: s_lshr_b32 s17, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s18, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB97_3
-; GFX11-NEXT: .LBB97_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr18
-; GFX11-NEXT: ; implicit-def: $sgpr16
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr17
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: .LBB97_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB97_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v19, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v18
-; GFX11-NEXT: s_branch .LBB97_6
-; GFX11-NEXT: .LBB97_5:
-; GFX11-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1
-; GFX11-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v17, s3
-; GFX11-NEXT: v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s16
-; GFX11-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s15
-; GFX11-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v10, s11
-; GFX11-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v14, s10
-; GFX11-NEXT: v_mov_b32_e32 v13, s12
-; GFX11-NEXT: v_mov_b32_e32 v15, s9
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB97_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v18
-; GFX11-NEXT: v_mov_b32_e32 v4, v19
-; GFX11-NEXT: v_mov_b32_e32 v8, v16
-; GFX11-NEXT: v_mov_b32_e32 v12, v17
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = add <8 x i16> %a, splat (i16 3)
- %a2 = bitcast <8 x i16> %a1 to <16 x i8>
- br label %end
-
-cmp.false:
+; GFX11-TRUE16-LABEL: bitcast_v8i16_to_v16i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s6
+; GFX11-TRUE16-NEXT: s_branch .LBB97_3
+; GFX11-TRUE16-NEXT: .LBB97_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB97_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i16_to_v16i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB97_3
+; GFX11-FAKE16-NEXT: .LBB97_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr18
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; GFX11-FAKE16-NEXT: s_branch .LBB97_6
+; GFX11-FAKE16-NEXT: .LBB97_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v17, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v10, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v14, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s12
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s9
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB97_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v19
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v17
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = add <8 x i16> %a, splat (i16 3)
+ %a2 = bitcast <8 x i16> %a1 to <16 x i8>
+ br label %end
+
+cmp.false:
%a3 = bitcast <8 x i16> %a to <16 x i8>
br label %end
@@ -21792,84 +22507,168 @@ define inreg <8 x i16> @bitcast_v16i8_to_v8i16_scalar(<16 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB99_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v8i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB99_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB99_3
-; GFX11-NEXT: .LBB99_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB99_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB99_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB99_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v8i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB99_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB99_3
+; GFX11-TRUE16-NEXT: .LBB99_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB99_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB99_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB99_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v8i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB99_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB99_3
+; GFX11-FAKE16-NEXT: .LBB99_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB99_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB99_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB99_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -22540,87 +23339,79 @@ define <8 x half> @bitcast_v8bf16_to_v8f16(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB102_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v4, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v7, v8 :: v_dual_and_b32 v5, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v9, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v11, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v8.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v4, v7 :: v_dual_add_f32 v6, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v10, v12 :: v_dual_and_b32 v6, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v5.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v9, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_add_f32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v9, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v10
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v7, 16, 1
; GFX11-TRUE16-NEXT: v_add3_u32 v9, v10, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v11, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_add3_u32 v10, v11, v7, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v5.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v10, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v9, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v13, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v7.l
; GFX11-TRUE16-NEXT: .LBB102_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
@@ -23930,83 +24721,163 @@ define inreg <16 x i8> @bitcast_v8f16_to_v16i8_scalar(<8 x half> inreg %a, i32 i
; GFX9-NEXT: v_mov_b32_e32 v12, v17
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8f16_to_v16i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB105_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s9, s3, 24
-; GFX11-NEXT: s_lshr_b32 s10, s3, 16
-; GFX11-NEXT: s_lshr_b32 s12, s3, 8
-; GFX11-NEXT: s_lshr_b32 s11, s2, 16
-; GFX11-NEXT: s_lshr_b32 s13, s2, 8
-; GFX11-NEXT: s_lshr_b32 s14, s1, 24
-; GFX11-NEXT: s_lshr_b32 s15, s1, 16
-; GFX11-NEXT: s_lshr_b32 s17, s1, 8
-; GFX11-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-NEXT: s_lshr_b32 s18, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB105_3
-; GFX11-NEXT: .LBB105_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr18
-; GFX11-NEXT: ; implicit-def: $sgpr16
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr17
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: .LBB105_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB105_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v17
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v18
-; GFX11-NEXT: s_branch .LBB105_6
-; GFX11-NEXT: .LBB105_5:
-; GFX11-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1
-; GFX11-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v17, s3
-; GFX11-NEXT: v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s16
-; GFX11-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s15
-; GFX11-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v10, s11
-; GFX11-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v14, s10
-; GFX11-NEXT: v_mov_b32_e32 v13, s12
-; GFX11-NEXT: v_mov_b32_e32 v15, s9
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB105_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v18
-; GFX11-NEXT: v_mov_b32_e32 v4, v19
-; GFX11-NEXT: v_mov_b32_e32 v8, v16
-; GFX11-NEXT: v_mov_b32_e32 v12, v17
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8f16_to_v16i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s6
+; GFX11-TRUE16-NEXT: s_branch .LBB105_3
+; GFX11-TRUE16-NEXT: .LBB105_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB105_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8f16_to_v16i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB105_3
+; GFX11-FAKE16-NEXT: .LBB105_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr18
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v17
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[16:17]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; GFX11-FAKE16-NEXT: s_branch .LBB105_6
+; GFX11-FAKE16-NEXT: .LBB105_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s2 :: v_dual_mov_b32 v17, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v10, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v14, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s12
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s9
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB105_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v19
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v17
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -24882,84 +25753,168 @@ define inreg <8 x half> @bitcast_v16i8_to_v8f16_scalar(<16 x i8> inreg %a, i32 i
; GFX9-NEXT: .LBB107_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v8f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB107_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB107_3
-; GFX11-NEXT: .LBB107_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB107_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB107_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB107_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v8f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB107_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB107_3
+; GFX11-TRUE16-NEXT: .LBB107_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB107_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB107_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB107_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v8f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB107_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB107_3
+; GFX11-FAKE16-NEXT: .LBB107_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB107_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB107_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB107_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -25387,91 +26342,89 @@ define <16 x i8> @bitcast_v8bf16_to_v16i8(<8 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v16.l
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v17
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v3, 16, v16
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v12
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v1, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v6.l
-; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v0, v7, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v3, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v8, 0x40c00000, v8 :: v_dual_cndmask_b32 v1, v1, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v0, v0, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v4, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v10, v9, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v4
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v5, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v2.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v8, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v9, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v8, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[16:17]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v3
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v10.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[16:17]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
; GFX11-TRUE16-NEXT: .LBB108_4: ; %end
@@ -26047,156 +27000,150 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s18, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v2, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s6
; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s6
; GFX11-TRUE16-NEXT: s_branch .LBB109_3
; GFX11-TRUE16-NEXT: .LBB109_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr16
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr18
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr17
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
; GFX11-TRUE16-NEXT: .LBB109_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB109_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s1
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s4, 0, s1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s4, 0, s3
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s4, 0, s0
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v17.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v8, v5
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v6.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v2, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v8, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s2, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v11, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v13, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v14.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v10, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v16.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v21
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v3, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v10.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[20:21]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v20
-; GFX11-TRUE16-NEXT: s_branch .LBB109_6
-; GFX11-TRUE16-NEXT: .LBB109_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v17, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s18 :: v_dual_mov_b32 v9, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v13, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v7, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v5, s10
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-TRUE16-NEXT: .LBB109_6: ; %end
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v17
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v10.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v16i8_scalar:
@@ -27223,84 +28170,168 @@ define inreg <8 x bfloat> @bitcast_v16i8_to_v8bf16_scalar(<16 x i8> inreg %a, i3
; GFX9-NEXT: .LBB111_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i8_to_v8bf16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB111_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s26, s27, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v8, s24, s25, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v8, v6
-; GFX11-NEXT: s_branch .LBB111_3
-; GFX11-NEXT: .LBB111_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB111_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB111_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v0
-; GFX11-NEXT: v_perm_b32 v0, s26, s27, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: .LBB111_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i8_to_v8bf16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v7, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s25 :: v_dual_mov_b32 v10, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_mov_b32 v9, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v13, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s2 :: v_dual_mov_b32 v19, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB111_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v22, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v23, v21
+; GFX11-TRUE16-NEXT: s_branch .LBB111_3
+; GFX11-TRUE16-NEXT: .LBB111_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB111_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB111_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v12, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v11, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: .LBB111_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i8_to_v8bf16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB111_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-FAKE16-NEXT: s_branch .LBB111_3
+; GFX11-FAKE16-NEXT: .LBB111_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB111_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB111_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s26, s27, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: .LBB111_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
index c7cd6ebeca16e0..1c9150f2074ced 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
@@ -164,26 +164,51 @@ define inreg half @bitcast_i16_to_f16_scalar(i16 inreg %a, i32 inreg %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, s16
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_i16_to_f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s1, 0
-; GFX11-NEXT: s_cbranch_scc1 .LBB1_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s1, -1
-; GFX11-NEXT: .LBB1_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s1, s1, exec_lo
-; GFX11-NEXT: s_cselect_b32 s1, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s1, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB1_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: .LBB1_4: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_i16_to_f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB1_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB1_3
+; GFX11-TRUE16-NEXT: .LBB1_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: .LBB1_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB1_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v0
+; GFX11-TRUE16-NEXT: .LBB1_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_i16_to_f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB1_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, -1
+; GFX11-FAKE16-NEXT: .LBB1_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB1_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: .LBB1_4: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -385,20 +410,22 @@ define inreg i16 @bitcast_f16_to_i16_scalar(half inreg %a, i32 inreg %b) #0 {
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB3_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB3_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB3_3
+; GFX11-TRUE16-NEXT: .LBB3_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
-; GFX11-TRUE16-NEXT: .LBB3_2: ; %Flow
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: .LBB3_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB3_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB3_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f16_e64 v0.l, 0x200, s0
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-; GFX11-TRUE16-NEXT: .LBB3_4:
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: .LBB3_5: ; %end
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_f16_to_i16_scalar:
@@ -603,26 +630,51 @@ define inreg bfloat @bitcast_i16_to_bf16_scalar(i16 inreg %a, i32 inreg %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, s16
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_i16_to_bf16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s1, 0
-; GFX11-NEXT: s_cbranch_scc1 .LBB5_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s1, -1
-; GFX11-NEXT: .LBB5_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s1, s1, exec_lo
-; GFX11-NEXT: s_cselect_b32 s1, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s1, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB5_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: .LBB5_4: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_i16_to_bf16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB5_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB5_3
+; GFX11-TRUE16-NEXT: .LBB5_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: .LBB5_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB5_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v0
+; GFX11-TRUE16-NEXT: .LBB5_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_i16_to_bf16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB5_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, -1
+; GFX11-FAKE16-NEXT: .LBB5_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB5_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: .LBB5_4: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -875,37 +927,71 @@ define inreg i16 @bitcast_bf16_to_i16_scalar(bfloat inreg %a, i32 inreg %b) #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, s16
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_bf16_to_i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s1, 0
-; GFX11-NEXT: s_cbranch_scc1 .LBB7_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s1, -1
-; GFX11-NEXT: .LBB7_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s1, s1, exec_lo
-; GFX11-NEXT: s_cselect_b32 s1, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s1, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB7_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s0
-; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0
-; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, v1, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
-; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB7_4:
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_bf16_to_i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB7_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB7_3
+; GFX11-TRUE16-NEXT: .LBB7_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: .LBB7_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB7_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: .LBB7_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_bf16_to_i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB7_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, -1
+; GFX11-FAKE16-NEXT: .LBB7_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB7_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB7_4:
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -1108,20 +1194,22 @@ define inreg bfloat @bitcast_f16_to_bf16_scalar(half inreg %a, i32 inreg %b) #0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB9_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB9_3
+; GFX11-TRUE16-NEXT: .LBB9_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
-; GFX11-TRUE16-NEXT: .LBB9_2: ; %Flow
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: .LBB9_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f16_e64 v0.l, 0x200, s0
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-; GFX11-TRUE16-NEXT: .LBB9_4:
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: .LBB9_5: ; %end
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_f16_to_bf16_scalar:
@@ -1396,37 +1484,71 @@ define inreg half @bitcast_bf16_to_f16_scalar(bfloat inreg %a, i32 inreg %b) #0
; GFX9-NEXT: v_mov_b32_e32 v0, s16
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_bf16_to_f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s1, 0
-; GFX11-NEXT: s_cbranch_scc1 .LBB11_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s1, -1
-; GFX11-NEXT: .LBB11_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s1, s1, exec_lo
-; GFX11-NEXT: s_cselect_b32 s1, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s1, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB11_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s0
-; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0
-; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, v1, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
-; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB11_4:
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_bf16_to_f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB11_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB11_3
+; GFX11-TRUE16-NEXT: .LBB11_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: .LBB11_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB11_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: .LBB11_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_bf16_to_f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB11_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, -1
+; GFX11-FAKE16-NEXT: .LBB11_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB11_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB11_4:
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -1445,3 +1567,5 @@ end:
}
attributes #0 = { nounwind }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX11: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
index b18d1409ad0942..dcb315feb1a05c 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
@@ -6176,122 +6176,272 @@ define inreg <32 x i8> @bitcast_v8i32_to_v32i8_scalar(<8 x i32> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v31, s14
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i32_to_v32i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s46, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB25_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s12, s19, 24
-; GFX11-NEXT: s_lshr_b32 s13, s19, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s20, s18, 8
-; GFX11-NEXT: s_lshr_b32 s21, s17, 24
-; GFX11-NEXT: s_lshr_b32 s22, s17, 16
-; GFX11-NEXT: s_lshr_b32 s23, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s25, s16, 8
-; GFX11-NEXT: s_lshr_b32 s26, s3, 24
-; GFX11-NEXT: s_lshr_b32 s27, s3, 16
-; GFX11-NEXT: s_lshr_b32 s28, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s40, s2, 8
-; GFX11-NEXT: s_lshr_b32 s41, s1, 24
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB25_3
-; GFX11-NEXT: .LBB25_2:
-; GFX11-NEXT: s_mov_b32 s46, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr21
-; GFX11-NEXT: ; implicit-def: $sgpr20
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: .LBB25_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s46, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB25_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s12, s19, 24
-; GFX11-NEXT: s_lshr_b32 s13, s19, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s20, s18, 8
-; GFX11-NEXT: s_lshr_b32 s21, s17, 24
-; GFX11-NEXT: s_lshr_b32 s22, s17, 16
-; GFX11-NEXT: s_lshr_b32 s23, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s25, s16, 8
-; GFX11-NEXT: s_lshr_b32 s26, s3, 24
-; GFX11-NEXT: s_lshr_b32 s27, s3, 16
-; GFX11-NEXT: s_lshr_b32 s28, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s40, s2, 8
-; GFX11-NEXT: s_lshr_b32 s41, s1, 24
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 8
-; GFX11-NEXT: .LBB25_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s45
-; GFX11-NEXT: v_dual_mov_b32 v2, s44 :: v_dual_mov_b32 v3, s10
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s43
-; GFX11-NEXT: v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s41
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s40
-; GFX11-NEXT: v_dual_mov_b32 v10, s29 :: v_dual_mov_b32 v11, s8
-; GFX11-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s28
-; GFX11-NEXT: v_dual_mov_b32 v14, s27 :: v_dual_mov_b32 v15, s26
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s25
-; GFX11-NEXT: v_dual_mov_b32 v18, s24 :: v_dual_mov_b32 v19, s6
-; GFX11-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v21, s23
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s21
-; GFX11-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v25, s20
-; GFX11-NEXT: v_dual_mov_b32 v26, s15 :: v_dual_mov_b32 v27, s4
-; GFX11-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, s14
-; GFX11-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s12
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i32_to_v32i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v24, s18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v28, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v20, s17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v16, s16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB25_3
+; GFX11-TRUE16-NEXT: .LBB25_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s18, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s16, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s8 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[4:5], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s8 :: v_dual_mov_b32 v20, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s7, 24
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s10 :: v_dual_mov_b32 v24, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v29, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v16, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s8 :: v_dual_mov_b32 v17, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v15, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s5 :: v_dual_mov_b32 v9, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v5, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v7, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB25_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i32_to_v32i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB25_3
+; GFX11-FAKE16-NEXT: .LBB25_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s46, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 8
+; GFX11-FAKE16-NEXT: .LBB25_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s44 :: v_dual_mov_b32 v3, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s29 :: v_dual_mov_b32 v11, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s27 :: v_dual_mov_b32 v15, s26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s24 :: v_dual_mov_b32 v19, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v21, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v25, s20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s15 :: v_dual_mov_b32 v27, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s12
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7799,148 +7949,309 @@ define inreg <8 x i32> @bitcast_v32i8_to_v8i32_scalar(<32 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB27_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32i8_to_v8i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s42, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s5, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s7, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s9, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s11, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s13, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s15, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: v_readfirstlane_b32 s41, v0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB27_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v5, s22, s23, v3
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v11, s5, s4, v3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX11-NEXT: v_perm_b32 v6, s13, s12, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX11-NEXT: v_perm_b32 v9, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v13, s7, s6, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v4
-; GFX11-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-NEXT: v_or_b32_e32 v5, v10, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v12, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v13, v11
-; GFX11-NEXT: s_branch .LBB27_3
-; GFX11-NEXT: .LBB27_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
-; GFX11-NEXT: .LBB27_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB27_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: v_perm_b32 v4, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v6, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v8, s15, s14, v3
-; GFX11-NEXT: v_perm_b32 v9, s13, s12, v3
-; GFX11-NEXT: v_perm_b32 v10, s11, s10, v3
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v12, s7, s6, v3
-; GFX11-NEXT: v_perm_b32 v3, s5, s4, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v3
-; GFX11-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v4, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v6, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v13
-; GFX11-NEXT: .LBB27_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v8i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s17 :: v_dual_mov_b32 v34, s3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s29 :: v_dual_mov_b32 v26, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s27 :: v_dual_mov_b32 v24, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s26 :: v_dual_mov_b32 v28, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s23 :: v_dual_mov_b32 v32, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v35, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s19 :: v_dual_mov_b32 v36, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s16 :: v_dual_mov_b32 v38, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB27_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v38, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v32, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v39, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v35, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v36, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v37, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v25, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v28, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v26, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v22, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v49, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v51, v52
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v53, v50
+; GFX11-TRUE16-NEXT: s_branch .LBB27_3
+; GFX11-TRUE16-NEXT: .LBB27_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-TRUE16-NEXT: .LBB27_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB27_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v10
+; GFX11-TRUE16-NEXT: .LBB27_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32i8_to_v8i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB27_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v10, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v13, v11
+; GFX11-FAKE16-NEXT: s_branch .LBB27_3
+; GFX11-FAKE16-NEXT: .LBB27_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-FAKE16-NEXT: .LBB27_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB27_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v13
+; GFX11-FAKE16-NEXT: .LBB27_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -13696,135 +14007,272 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v25, v32
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8f32_to_v32i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s12, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB49_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s13, s19, 24
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s20, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s21, s18, 8
-; GFX11-NEXT: s_lshr_b32 s22, s17, 24
-; GFX11-NEXT: s_lshr_b32 s23, s17, 16
-; GFX11-NEXT: s_lshr_b32 s25, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s26, s16, 8
-; GFX11-NEXT: s_lshr_b32 s27, s3, 24
-; GFX11-NEXT: s_lshr_b32 s28, s3, 16
-; GFX11-NEXT: s_lshr_b32 s40, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s41, s2, 8
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s46, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB49_3
-; GFX11-NEXT: .LBB49_2:
-; GFX11-NEXT: s_mov_b32 s12, -1
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr21
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr20
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: .LBB49_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s12, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB49_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v39, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v37, s3, 1.0
-; GFX11-NEXT: v_add_f32_e64 v35, s17, 1.0
-; GFX11-NEXT: v_add_f32_e64 v33, s19, 1.0
-; GFX11-NEXT: v_add_f32_e64 v32, s18, 1.0
-; GFX11-NEXT: v_add_f32_e64 v34, s16, 1.0
-; GFX11-NEXT: v_add_f32_e64 v36, s2, 1.0
-; GFX11-NEXT: v_add_f32_e64 v38, s0, 1.0
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 24, v33
-; GFX11-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v38
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v38
-; GFX11-NEXT: s_branch .LBB49_6
-; GFX11-NEXT: .LBB49_5:
-; GFX11-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
-; GFX11-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
-; GFX11-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v35, s17
-; GFX11-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v33, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s46 :: v_dual_mov_b32 v2, s44
-; GFX11-NEXT: v_dual_mov_b32 v5, s45 :: v_dual_mov_b32 v6, s43
-; GFX11-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v10, s29
-; GFX11-NEXT: v_dual_mov_b32 v9, s41 :: v_dual_mov_b32 v14, s28
-; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v18, s24
-; GFX11-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v26, s15
-; GFX11-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v30, s14
-; GFX11-NEXT: v_mov_b32_e32 v23, s22
-; GFX11-NEXT: v_mov_b32_e32 v25, s21
-; GFX11-NEXT: v_mov_b32_e32 v29, s20
-; GFX11-NEXT: v_mov_b32_e32 v31, s13
-; GFX11-NEXT: v_mov_b32_e32 v27, s10
-; GFX11-NEXT: v_mov_b32_e32 v19, s8
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB49_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v38
-; GFX11-NEXT: v_mov_b32_e32 v4, v39
-; GFX11-NEXT: v_mov_b32_e32 v8, v36
-; GFX11-NEXT: v_mov_b32_e32 v12, v37
-; GFX11-NEXT: v_mov_b32_e32 v16, v34
-; GFX11-NEXT: v_mov_b32_e32 v20, v35
-; GFX11-NEXT: v_mov_b32_e32 v24, v32
-; GFX11-NEXT: v_mov_b32_e32 v28, v33
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8f32_to_v32i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v8, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v32, s18
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v20, s17
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v33, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v19, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB49_3
+; GFX11-TRUE16-NEXT: .LBB49_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, s3, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s17, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v33, s19, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v32, s18, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s16, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, s2, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, s0, 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v33.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8f32_to_v32i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB49_3
+; GFX11-FAKE16-NEXT: .LBB49_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s12, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v39, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v37, s3, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v35, s17, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v33, s19, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v32, s18, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v34, s16, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v36, s2, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v38, s0, 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v38
+; GFX11-FAKE16-NEXT: s_branch .LBB49_6
+; GFX11-FAKE16-NEXT: .LBB49_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v35, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v33, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s46 :: v_dual_mov_b32 v2, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s45 :: v_dual_mov_b32 v6, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v10, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s41 :: v_dual_mov_b32 v14, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v18, s24
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v26, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v30, s14
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v23, s22
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v25, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s20
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v31, s13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v27, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v19, s8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB49_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v39
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v36
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v37
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v16, v34
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v20, v35
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, v32
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, v33
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -15332,148 +15780,309 @@ define inreg <8 x float> @bitcast_v32i8_to_v8f32_scalar(<32 x i8> inreg %a, i32
; GFX9-NEXT: .LBB51_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32i8_to_v8f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s42, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s5, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s7, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s9, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s11, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s13, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s15, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: v_readfirstlane_b32 s41, v0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB51_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v5, s22, s23, v3
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v11, s5, s4, v3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX11-NEXT: v_perm_b32 v6, s13, s12, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX11-NEXT: v_perm_b32 v9, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v13, s7, s6, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v4
-; GFX11-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-NEXT: v_or_b32_e32 v5, v10, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v12, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v13, v11
-; GFX11-NEXT: s_branch .LBB51_3
-; GFX11-NEXT: .LBB51_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
-; GFX11-NEXT: .LBB51_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: v_perm_b32 v4, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v6, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v8, s15, s14, v3
-; GFX11-NEXT: v_perm_b32 v9, s13, s12, v3
-; GFX11-NEXT: v_perm_b32 v10, s11, s10, v3
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v12, s7, s6, v3
-; GFX11-NEXT: v_perm_b32 v3, s5, s4, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v3
-; GFX11-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v4, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v6, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v13
-; GFX11-NEXT: .LBB51_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v8f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s17 :: v_dual_mov_b32 v34, s3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s29 :: v_dual_mov_b32 v26, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s27 :: v_dual_mov_b32 v24, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s26 :: v_dual_mov_b32 v28, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s23 :: v_dual_mov_b32 v32, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v35, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s19 :: v_dual_mov_b32 v36, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s16 :: v_dual_mov_b32 v38, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v38, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v32, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v39, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v35, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v36, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v37, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v25, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v28, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v26, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v22, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v49, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v51, v52
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v53, v50
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v10
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32i8_to_v8f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v10, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v13, v11
+; GFX11-FAKE16-NEXT: s_branch .LBB51_3
+; GFX11-FAKE16-NEXT: .LBB51_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-FAKE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v13
+; GFX11-FAKE16-NEXT: .LBB51_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -20662,122 +21271,277 @@ define inreg <32 x i8> @bitcast_v4i64_to_v32i8_scalar(<4 x i64> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v31, s14
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i64_to_v32i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s46, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB69_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s12, s19, 24
-; GFX11-NEXT: s_lshr_b32 s13, s19, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s20, s18, 8
-; GFX11-NEXT: s_lshr_b32 s21, s17, 24
-; GFX11-NEXT: s_lshr_b32 s22, s17, 16
-; GFX11-NEXT: s_lshr_b32 s23, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s25, s16, 8
-; GFX11-NEXT: s_lshr_b32 s26, s3, 24
-; GFX11-NEXT: s_lshr_b32 s27, s3, 16
-; GFX11-NEXT: s_lshr_b32 s28, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s40, s2, 8
-; GFX11-NEXT: s_lshr_b32 s41, s1, 24
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB69_3
-; GFX11-NEXT: .LBB69_2:
-; GFX11-NEXT: s_mov_b32 s46, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr21
-; GFX11-NEXT: ; implicit-def: $sgpr20
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: .LBB69_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s46, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB69_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s12, s19, 24
-; GFX11-NEXT: s_lshr_b32 s13, s19, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s20, s18, 8
-; GFX11-NEXT: s_lshr_b32 s21, s17, 24
-; GFX11-NEXT: s_lshr_b32 s22, s17, 16
-; GFX11-NEXT: s_lshr_b32 s23, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s25, s16, 8
-; GFX11-NEXT: s_lshr_b32 s26, s3, 24
-; GFX11-NEXT: s_lshr_b32 s27, s3, 16
-; GFX11-NEXT: s_lshr_b32 s28, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s40, s2, 8
-; GFX11-NEXT: s_lshr_b32 s41, s1, 24
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 8
-; GFX11-NEXT: .LBB69_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s45
-; GFX11-NEXT: v_dual_mov_b32 v2, s44 :: v_dual_mov_b32 v3, s10
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s43
-; GFX11-NEXT: v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s41
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s40
-; GFX11-NEXT: v_dual_mov_b32 v10, s29 :: v_dual_mov_b32 v11, s8
-; GFX11-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s28
-; GFX11-NEXT: v_dual_mov_b32 v14, s27 :: v_dual_mov_b32 v15, s26
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s25
-; GFX11-NEXT: v_dual_mov_b32 v18, s24 :: v_dual_mov_b32 v19, s6
-; GFX11-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v21, s23
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s21
-; GFX11-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v25, s20
-; GFX11-NEXT: v_dual_mov_b32 v26, s15 :: v_dual_mov_b32 v27, s4
-; GFX11-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, s14
-; GFX11-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s12
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i64_to_v32i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v24, s18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v28, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v20, s17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v16, s16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB69_3
+; GFX11-TRUE16-NEXT: .LBB69_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s4, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s19, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s7, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v17, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v14, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v5, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v6, s3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB69_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i64_to_v32i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB69_3
+; GFX11-FAKE16-NEXT: .LBB69_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s46, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 8
+; GFX11-FAKE16-NEXT: .LBB69_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s44 :: v_dual_mov_b32 v3, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s29 :: v_dual_mov_b32 v11, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s27 :: v_dual_mov_b32 v15, s26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s24 :: v_dual_mov_b32 v19, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v21, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v25, s20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s15 :: v_dual_mov_b32 v27, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s12
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -22285,148 +23049,309 @@ define inreg <4 x i64> @bitcast_v32i8_to_v4i64_scalar(<32 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB71_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32i8_to_v4i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s42, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s5, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s7, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s9, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s11, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s13, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s15, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: v_readfirstlane_b32 s41, v0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB71_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v5, s22, s23, v3
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v11, s5, s4, v3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX11-NEXT: v_perm_b32 v6, s13, s12, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX11-NEXT: v_perm_b32 v9, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v13, s7, s6, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v4
-; GFX11-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-NEXT: v_or_b32_e32 v5, v10, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v12, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v13, v11
-; GFX11-NEXT: s_branch .LBB71_3
-; GFX11-NEXT: .LBB71_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
-; GFX11-NEXT: .LBB71_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB71_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: v_perm_b32 v4, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v6, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v8, s15, s14, v3
-; GFX11-NEXT: v_perm_b32 v9, s13, s12, v3
-; GFX11-NEXT: v_perm_b32 v10, s11, s10, v3
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v12, s7, s6, v3
-; GFX11-NEXT: v_perm_b32 v3, s5, s4, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v3
-; GFX11-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v4, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v6, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v13
-; GFX11-NEXT: .LBB71_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v4i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s17 :: v_dual_mov_b32 v34, s3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s29 :: v_dual_mov_b32 v26, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s27 :: v_dual_mov_b32 v24, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s26 :: v_dual_mov_b32 v28, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s23 :: v_dual_mov_b32 v32, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v35, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s19 :: v_dual_mov_b32 v36, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s16 :: v_dual_mov_b32 v38, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v38, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v32, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v39, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v35, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v36, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v37, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v25, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v28, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v26, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v22, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v49, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v51, v52
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v53, v50
+; GFX11-TRUE16-NEXT: s_branch .LBB71_3
+; GFX11-TRUE16-NEXT: .LBB71_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-TRUE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v10
+; GFX11-TRUE16-NEXT: .LBB71_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32i8_to_v4i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v10, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v13, v11
+; GFX11-FAKE16-NEXT: s_branch .LBB71_3
+; GFX11-FAKE16-NEXT: .LBB71_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-FAKE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v13
+; GFX11-FAKE16-NEXT: .LBB71_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -27095,133 +28020,269 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v25, v32
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4f64_to_v32i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s12, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB85_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s28, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s26, s19, 8
-; GFX11-NEXT: s_lshr_b32 s40, s18, 16
-; GFX11-NEXT: s_lshr_b32 s29, s18, 8
-; GFX11-NEXT: s_lshr_b32 s25, s17, 24
-; GFX11-NEXT: s_lshr_b32 s24, s17, 16
-; GFX11-NEXT: s_lshr_b32 s23, s17, 8
-; GFX11-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 8
-; GFX11-NEXT: s_lshr_b32 s22, s3, 24
-; GFX11-NEXT: s_lshr_b32 s21, s3, 16
-; GFX11-NEXT: s_lshr_b32 s20, s3, 8
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 8
-; GFX11-NEXT: s_lshr_b32 s15, s1, 24
-; GFX11-NEXT: s_lshr_b32 s14, s1, 16
-; GFX11-NEXT: s_lshr_b32 s13, s1, 8
-; GFX11-NEXT: s_lshr_b32 s46, s0, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB85_3
-; GFX11-NEXT: .LBB85_2:
-; GFX11-NEXT: s_mov_b32 s12, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr20
-; GFX11-NEXT: ; implicit-def: $sgpr21
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: .LBB85_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s12, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB85_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[32:33], s[18:19], 1.0
-; GFX11-NEXT: v_add_f64 v[34:35], s[16:17], 1.0
-; GFX11-NEXT: v_add_f64 v[36:37], s[2:3], 1.0
-; GFX11-NEXT: v_add_f64 v[38:39], s[0:1], 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 24, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v38
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v38
-; GFX11-NEXT: s_branch .LBB85_6
-; GFX11-NEXT: .LBB85_5:
-; GFX11-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v33, s19
-; GFX11-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v35, s17
-; GFX11-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v37, s3
-; GFX11-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v39, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s46 :: v_dual_mov_b32 v1, s45
-; GFX11-NEXT: v_dual_mov_b32 v10, s44 :: v_dual_mov_b32 v9, s43
-; GFX11-NEXT: v_dual_mov_b32 v18, s42 :: v_dual_mov_b32 v17, s41
-; GFX11-NEXT: v_dual_mov_b32 v26, s40 :: v_dual_mov_b32 v25, s29
-; GFX11-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v30, s27
-; GFX11-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v22, s24
-; GFX11-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v14, s21
-; GFX11-NEXT: v_dual_mov_b32 v27, s10 :: v_dual_mov_b32 v6, s14
-; GFX11-NEXT: v_mov_b32_e32 v31, s28
-; GFX11-NEXT: v_mov_b32_e32 v29, s26
-; GFX11-NEXT: v_mov_b32_e32 v23, s25
-; GFX11-NEXT: v_mov_b32_e32 v21, s23
-; GFX11-NEXT: v_mov_b32_e32 v15, s22
-; GFX11-NEXT: v_mov_b32_e32 v13, s20
-; GFX11-NEXT: v_mov_b32_e32 v7, s15
-; GFX11-NEXT: v_mov_b32_e32 v5, s13
-; GFX11-NEXT: .LBB85_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v38
-; GFX11-NEXT: v_mov_b32_e32 v4, v39
-; GFX11-NEXT: v_mov_b32_e32 v8, v36
-; GFX11-NEXT: v_mov_b32_e32 v12, v37
-; GFX11-NEXT: v_mov_b32_e32 v16, v34
-; GFX11-NEXT: v_mov_b32_e32 v20, v35
-; GFX11-NEXT: v_mov_b32_e32 v24, v32
-; GFX11-NEXT: v_mov_b32_e32 v28, v33
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4f64_to_v32i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s8 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v28, s19
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v20, s17
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v32, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v27, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB85_3
+; GFX11-TRUE16-NEXT: .LBB85_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f64 v[27:28], s[18:19], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[19:20], s[16:17], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[11:12], s[2:3], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[3:4], s[0:1], 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB85_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v32.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4f64_to_v32i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB85_3
+; GFX11-FAKE16-NEXT: .LBB85_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s12, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f64 v[32:33], s[18:19], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[34:35], s[16:17], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[36:37], s[2:3], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[38:39], s[0:1], 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v38
+; GFX11-FAKE16-NEXT: s_branch .LBB85_6
+; GFX11-FAKE16-NEXT: .LBB85_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v33, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v35, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v37, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v39, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s46 :: v_dual_mov_b32 v1, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s44 :: v_dual_mov_b32 v9, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s42 :: v_dual_mov_b32 v17, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s40 :: v_dual_mov_b32 v25, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v30, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v22, s24
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v14, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s10 :: v_dual_mov_b32 v6, s14
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v31, s28
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s26
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v23, s25
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v21, s23
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s22
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s20
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, s15
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, s13
+; GFX11-FAKE16-NEXT: .LBB85_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v39
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v36
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v37
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v16, v34
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v20, v35
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, v32
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, v33
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -28729,148 +29790,309 @@ define inreg <4 x double> @bitcast_v32i8_to_v4f64_scalar(<32 x i8> inreg %a, i32
; GFX9-NEXT: .LBB87_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32i8_to_v4f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s42, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-NEXT: v_readfirstlane_b32 s5, v12
-; GFX11-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-NEXT: v_readfirstlane_b32 s7, v10
-; GFX11-NEXT: v_readfirstlane_b32 s8, v9
-; GFX11-NEXT: v_readfirstlane_b32 s9, v8
-; GFX11-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-NEXT: v_readfirstlane_b32 s11, v6
-; GFX11-NEXT: v_readfirstlane_b32 s12, v5
-; GFX11-NEXT: v_readfirstlane_b32 s13, v4
-; GFX11-NEXT: v_readfirstlane_b32 s14, v3
-; GFX11-NEXT: v_readfirstlane_b32 s15, v2
-; GFX11-NEXT: v_readfirstlane_b32 s40, v1
-; GFX11-NEXT: v_readfirstlane_b32 s41, v0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB87_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v5, s22, s23, v3
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v11, s5, s4, v3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX11-NEXT: v_perm_b32 v6, s13, s12, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX11-NEXT: v_perm_b32 v9, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v13, s7, s6, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v4
-; GFX11-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-NEXT: v_or_b32_e32 v5, v10, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v12, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v13, v11
-; GFX11-NEXT: s_branch .LBB87_3
-; GFX11-NEXT: .LBB87_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
-; GFX11-NEXT: .LBB87_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s42, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB87_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v3, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v3
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v3
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v3
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: v_perm_b32 v4, s24, s25, v3
-; GFX11-NEXT: v_perm_b32 v5, s26, s27, v3
-; GFX11-NEXT: v_perm_b32 v6, s28, s29, v3
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v3
-; GFX11-NEXT: v_perm_b32 v8, s15, s14, v3
-; GFX11-NEXT: v_perm_b32 v9, s13, s12, v3
-; GFX11-NEXT: v_perm_b32 v10, s11, s10, v3
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v3
-; GFX11-NEXT: v_perm_b32 v12, s7, s6, v3
-; GFX11-NEXT: v_perm_b32 v3, s5, s4, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v3
-; GFX11-NEXT: v_or_b32_e32 v3, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v4, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v6, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v13
-; GFX11-NEXT: .LBB87_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v4f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s17 :: v_dual_mov_b32 v34, s3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s29 :: v_dual_mov_b32 v26, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s27 :: v_dual_mov_b32 v24, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s26 :: v_dual_mov_b32 v28, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s23 :: v_dual_mov_b32 v32, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v35, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s19 :: v_dual_mov_b32 v36, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s16 :: v_dual_mov_b32 v38, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB87_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v38, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v32, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v39, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v35, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v36, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v37, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v25, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v28, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v26, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v22, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v48
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v49, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v51, v52
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v53, v50
+; GFX11-TRUE16-NEXT: s_branch .LBB87_3
+; GFX11-TRUE16-NEXT: .LBB87_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-TRUE16-NEXT: .LBB87_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB87_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v38
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v17, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v16, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v10
+; GFX11-TRUE16-NEXT: .LBB87_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32i8_to_v4f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB87_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v10, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v13, v11
+; GFX11-FAKE16-NEXT: s_branch .LBB87_3
+; GFX11-FAKE16-NEXT: .LBB87_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-FAKE16-NEXT: .LBB87_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB87_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s15, s14, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s13, s12, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s11, s10, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s7, s6, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s5, s4, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v13
+; GFX11-FAKE16-NEXT: .LBB87_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -33290,135 +34512,272 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v25, v32
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i16_to_v32i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s12, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB97_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s13, s19, 24
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s20, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s21, s18, 8
-; GFX11-NEXT: s_lshr_b32 s22, s17, 24
-; GFX11-NEXT: s_lshr_b32 s23, s17, 16
-; GFX11-NEXT: s_lshr_b32 s25, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s26, s16, 8
-; GFX11-NEXT: s_lshr_b32 s27, s3, 24
-; GFX11-NEXT: s_lshr_b32 s28, s3, 16
-; GFX11-NEXT: s_lshr_b32 s40, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s41, s2, 8
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s46, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB97_3
-; GFX11-NEXT: .LBB97_2:
-; GFX11-NEXT: s_mov_b32 s12, -1
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr21
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr20
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: .LBB97_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s12, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB97_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v39, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v37, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v35, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v33, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v32, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v34, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v36, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v38, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 24, v33
-; GFX11-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v38
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v38
-; GFX11-NEXT: s_branch .LBB97_6
-; GFX11-NEXT: .LBB97_5:
-; GFX11-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
-; GFX11-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
-; GFX11-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v35, s17
-; GFX11-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v33, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s46 :: v_dual_mov_b32 v2, s44
-; GFX11-NEXT: v_dual_mov_b32 v5, s45 :: v_dual_mov_b32 v6, s43
-; GFX11-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v10, s29
-; GFX11-NEXT: v_dual_mov_b32 v9, s41 :: v_dual_mov_b32 v14, s28
-; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v18, s24
-; GFX11-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v26, s15
-; GFX11-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v30, s14
-; GFX11-NEXT: v_mov_b32_e32 v23, s22
-; GFX11-NEXT: v_mov_b32_e32 v25, s21
-; GFX11-NEXT: v_mov_b32_e32 v29, s20
-; GFX11-NEXT: v_mov_b32_e32 v31, s13
-; GFX11-NEXT: v_mov_b32_e32 v27, s10
-; GFX11-NEXT: v_mov_b32_e32 v19, s8
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB97_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v38
-; GFX11-NEXT: v_mov_b32_e32 v4, v39
-; GFX11-NEXT: v_mov_b32_e32 v8, v36
-; GFX11-NEXT: v_mov_b32_e32 v12, v37
-; GFX11-NEXT: v_mov_b32_e32 v16, v34
-; GFX11-NEXT: v_mov_b32_e32 v20, v35
-; GFX11-NEXT: v_mov_b32_e32 v24, v32
-; GFX11-NEXT: v_mov_b32_e32 v28, v33
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i16_to_v32i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v8, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v32, s18
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v20, s17
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v33, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v19, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB97_3
+; GFX11-TRUE16-NEXT: .LBB97_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, s17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v33, s19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v32, s18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB97_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v33.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i16_to_v32i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB97_3
+; GFX11-FAKE16-NEXT: .LBB97_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s12, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v39, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v37, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v35, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v33, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v32, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v34, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v36, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v38, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v38
+; GFX11-FAKE16-NEXT: s_branch .LBB97_6
+; GFX11-FAKE16-NEXT: .LBB97_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v35, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v33, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s46 :: v_dual_mov_b32 v2, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s45 :: v_dual_mov_b32 v6, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v10, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s41 :: v_dual_mov_b32 v14, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v18, s24
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v26, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v30, s14
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v23, s22
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v25, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s20
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v31, s13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v27, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v19, s8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB97_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v39
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v36
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v37
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v16, v34
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v20, v35
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, v32
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, v33
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -35045,120 +36404,137 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32
; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v16i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v14
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s8 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s17 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v35, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s8 :: v_dual_mov_b32 v21, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s29 :: v_dual_mov_b32 v29, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s25 :: v_dual_mov_b32 v8, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s24 :: v_dual_mov_b32 v24, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s22 :: v_dual_mov_b32 v30, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s19 :: v_dual_mov_b32 v15, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s16 :: v_dual_mov_b32 v18, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v17, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB99_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 0x6050400
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s26, s27, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s12, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s7, s11, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s5, s14, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s4, s8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s29, s28, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s41, s15, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s10, s40, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s13, s6, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v10.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v18, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v15, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v11, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v20, v32, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v26, v38, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v25, v34, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v16, v28, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v17, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v30, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v33, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v22, v35, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v39, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v37, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v31, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v49.l
; GFX11-TRUE16-NEXT: s_branch .LBB99_3
; GFX11-TRUE16-NEXT: .LBB99_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: .LBB99_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB99_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s13, s6, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s8, s4, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s14, s5, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s41, s15, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s12, s9, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s28, s29, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s20, s21, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s40, s10, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s11, s7, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s26, s27, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s22, s23, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s2, s3, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s18, s19, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s16, s17, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v31
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v4, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v5, v26, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v3, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v4, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v11, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v15, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v10
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v16.l
; GFX11-TRUE16-NEXT: .LBB99_5: ; %end
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -38825,135 +40201,272 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v25, v32
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16f16_to_v32i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s12, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB105_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s13, s19, 24
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s20, s19, 8
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s21, s18, 8
-; GFX11-NEXT: s_lshr_b32 s22, s17, 24
-; GFX11-NEXT: s_lshr_b32 s23, s17, 16
-; GFX11-NEXT: s_lshr_b32 s25, s17, 8
-; GFX11-NEXT: s_lshr_b32 s24, s16, 16
-; GFX11-NEXT: s_lshr_b32 s26, s16, 8
-; GFX11-NEXT: s_lshr_b32 s27, s3, 24
-; GFX11-NEXT: s_lshr_b32 s28, s3, 16
-; GFX11-NEXT: s_lshr_b32 s40, s3, 8
-; GFX11-NEXT: s_lshr_b32 s29, s2, 16
-; GFX11-NEXT: s_lshr_b32 s41, s2, 8
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 8
-; GFX11-NEXT: s_lshr_b32 s44, s0, 16
-; GFX11-NEXT: s_lshr_b32 s46, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB105_3
-; GFX11-NEXT: .LBB105_2:
-; GFX11-NEXT: s_mov_b32 s12, -1
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr21
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr20
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: .LBB105_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s12, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB105_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v39, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v37, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v35, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v33, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v32, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v34, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v36, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v38, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 24, v33
-; GFX11-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v37
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v39
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v38
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v38
-; GFX11-NEXT: s_branch .LBB105_6
-; GFX11-NEXT: .LBB105_5:
-; GFX11-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
-; GFX11-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
-; GFX11-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v35, s17
-; GFX11-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v33, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s46 :: v_dual_mov_b32 v2, s44
-; GFX11-NEXT: v_dual_mov_b32 v5, s45 :: v_dual_mov_b32 v6, s43
-; GFX11-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v10, s29
-; GFX11-NEXT: v_dual_mov_b32 v9, s41 :: v_dual_mov_b32 v14, s28
-; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v18, s24
-; GFX11-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v22, s23
-; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v26, s15
-; GFX11-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v30, s14
-; GFX11-NEXT: v_mov_b32_e32 v23, s22
-; GFX11-NEXT: v_mov_b32_e32 v25, s21
-; GFX11-NEXT: v_mov_b32_e32 v29, s20
-; GFX11-NEXT: v_mov_b32_e32 v31, s13
-; GFX11-NEXT: v_mov_b32_e32 v27, s10
-; GFX11-NEXT: v_mov_b32_e32 v19, s8
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB105_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v38
-; GFX11-NEXT: v_mov_b32_e32 v4, v39
-; GFX11-NEXT: v_mov_b32_e32 v8, v36
-; GFX11-NEXT: v_mov_b32_e32 v12, v37
-; GFX11-NEXT: v_mov_b32_e32 v16, v34
-; GFX11-NEXT: v_mov_b32_e32 v20, v35
-; GFX11-NEXT: v_mov_b32_e32 v24, v32
-; GFX11-NEXT: v_mov_b32_e32 v28, v33
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16f16_to_v32i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v8, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v32, s18
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v20, s17
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v33, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v19, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB105_3
+; GFX11-TRUE16-NEXT: .LBB105_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v33, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v32, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB105_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v33.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16f16_to_v32i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB105_3
+; GFX11-FAKE16-NEXT: .LBB105_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s12, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s12, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v39, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v37, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v35, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v33, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v32, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v34, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v36, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v38, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v38
+; GFX11-FAKE16-NEXT: s_branch .LBB105_6
+; GFX11-FAKE16-NEXT: .LBB105_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s16 :: v_dual_mov_b32 v35, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s18 :: v_dual_mov_b32 v33, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s46 :: v_dual_mov_b32 v2, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s45 :: v_dual_mov_b32 v6, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s42 :: v_dual_mov_b32 v10, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s41 :: v_dual_mov_b32 v14, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v18, s24
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v22, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v26, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v30, s14
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v23, s22
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v25, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s20
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v31, s13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v27, s10
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v19, s8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB105_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v38
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v39
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v36
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v37
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v16, v34
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v20, v35
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, v32
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, v33
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -40580,120 +42093,137 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32
; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v16f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v14
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s8 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s17 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v35, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s8 :: v_dual_mov_b32 v21, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s29 :: v_dual_mov_b32 v29, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s25 :: v_dual_mov_b32 v8, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s24 :: v_dual_mov_b32 v24, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s22 :: v_dual_mov_b32 v30, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s19 :: v_dual_mov_b32 v15, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s16 :: v_dual_mov_b32 v18, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v17, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB107_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 0x6050400
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s26, s27, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s12, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s7, s11, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s5, s14, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s4, s8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s29, s28, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s41, s15, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s10, s40, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s13, s6, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v10.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v18, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v15, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v11, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v20, v32, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v26, v38, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v25, v34, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v16, v28, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v17, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v30, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v33, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v22, v35, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v39, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v37, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v31, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v49.l
; GFX11-TRUE16-NEXT: s_branch .LBB107_3
; GFX11-TRUE16-NEXT: .LBB107_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: .LBB107_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB107_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s13, s6, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s8, s4, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s14, s5, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s41, s15, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s12, s9, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s28, s29, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s20, s21, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s40, s10, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s11, s7, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s26, s27, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s22, s23, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s2, s3, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s18, s19, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s16, s17, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v31
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v4, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v5, v26, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v3, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v4, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v11, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v15, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v10
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v16.l
; GFX11-TRUE16-NEXT: .LBB107_5: ; %end
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -42816,270 +44346,278 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s24, s19, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s26, s19, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s28, s18, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s21, s17, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s23, s17, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s27, s16, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s20, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s25, s2, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s29, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s22, s0, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v10, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v1, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v32, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v27, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v19, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
; GFX11-TRUE16-NEXT: s_branch .LBB109_3
; GFX11-TRUE16-NEXT: .LBB109_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr22
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr29
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr25
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr20
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr27
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr23
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr21
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr26
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
; GFX11-TRUE16-NEXT: .LBB109_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s12, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB109_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_and_b32 s4, s0, 0xffff0000
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v2, v6 :: v_dual_add_nc_u32 v9, v9, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v4, v8 :: v_dual_add_nc_u32 v2, v2, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s18, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.l, v35.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v9, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s2, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v10, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.h, v2.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v5, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v10
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v34.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v5
; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v8, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v0, v8 :: v_dual_add_nc_u32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v1, v7 :: v_dual_add_nc_u32 v4, v4, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v7
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s16, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v5, v13
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
; GFX11-TRUE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v4, v5 :: v_dual_add_nc_u32 v7, v11, v3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v14.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v8.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v9, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v15, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v8, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v33.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v22.l
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v10.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v15, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v19, v9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v0, v7 :: v_dual_add_nc_u32 v7, 0x7fff, v16
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v22.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v18.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v13, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v10.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37]
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v32.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v16, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[38:39]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v24.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.l, v16.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v49
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v26.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[48:49]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v48
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v39
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v39
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[50:51]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v50
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v38
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; GFX11-TRUE16-NEXT: s_branch .LBB109_6
-; GFX11-TRUE16-NEXT: .LBB109_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v33, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s46 :: v_dual_mov_b32 v35, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s19 :: v_dual_mov_b32 v25, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v31, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v29, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s44 :: v_dual_mov_b32 v17, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s43 :: v_dual_mov_b32 v23, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v21, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s42 :: v_dual_mov_b32 v9, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s3 :: v_dual_mov_b32 v15, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s41 :: v_dual_mov_b32 v13, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s40 :: v_dual_mov_b32 v7, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s29 :: v_dual_mov_b32 v5, s14
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s10
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s8
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-TRUE16-NEXT: .LBB109_6: ; %end
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v35
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v34
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, v33
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v18.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v30.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v26.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v27
+; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v32.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v16bf16_to_v32i8_scalar:
@@ -44977,120 +46515,137 @@ define inreg <16 x bfloat> @bitcast_v32i8_to_v16bf16_scalar(<32 x i8> inreg %a,
; GFX11-TRUE16-LABEL: bitcast_v32i8_to_v16bf16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v14
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v12
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s8 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s17 :: v_dual_mov_b32 v12, s3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v35, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s8 :: v_dual_mov_b32 v21, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s29 :: v_dual_mov_b32 v29, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s25 :: v_dual_mov_b32 v8, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s24 :: v_dual_mov_b32 v24, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s22 :: v_dual_mov_b32 v30, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s19 :: v_dual_mov_b32 v15, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s16 :: v_dual_mov_b32 v18, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v17, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB111_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 0x6050400
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s26, s27, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s12, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s7, s11, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s5, s14, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s4, s8, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s29, s28, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s41, s15, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s10, s40, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s13, s6, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v10.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v18, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v15, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v11, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v20, v32, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v26, v38, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v25, v34, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v16, v28, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v17, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v30, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v33, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v22, v35, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v39, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v27, v37, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v31, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v49.l
; GFX11-TRUE16-NEXT: s_branch .LBB111_3
; GFX11-TRUE16-NEXT: .LBB111_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: .LBB111_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB111_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s13, s6, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s8, s4, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s14, s5, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s41, s15, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s12, s9, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s28, s29, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s20, s21, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s40, s10, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s11, s7, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s26, s27, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s22, s23, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s2, s3, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s18, s19, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s16, s17, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v31
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v4, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v5, v26, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v3, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v4, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v11, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v13, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v15, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v10
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v16.l
; GFX11-TRUE16-NEXT: .LBB111_5: ; %end
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
index c108fb664ca936..617446bdc2d128 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
@@ -3999,171 +3999,406 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v10i32_to_v40i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s22, 0
-; GFX11-NEXT: s_mov_b32 s63, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s15, s21, 8
-; GFX11-NEXT: s_lshr_b32 s24, s20, 16
-; GFX11-NEXT: s_lshr_b32 s23, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s25, s19, 8
-; GFX11-NEXT: s_lshr_b32 s29, s18, 16
-; GFX11-NEXT: s_lshr_b32 s28, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s44, s16, 8
-; GFX11-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s57, s2, 8
-; GFX11-NEXT: s_lshr_b32 s58, s1, 24
-; GFX11-NEXT: s_lshr_b32 s59, s1, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s62, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s63, -1
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s63, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s14, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s15, s21, 8
-; GFX11-NEXT: s_lshr_b32 s24, s20, 16
-; GFX11-NEXT: s_lshr_b32 s23, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s25, s19, 8
-; GFX11-NEXT: s_lshr_b32 s29, s18, 16
-; GFX11-NEXT: s_lshr_b32 s28, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s44, s16, 8
-; GFX11-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s57, s2, 8
-; GFX11-NEXT: s_lshr_b32 s58, s1, 24
-; GFX11-NEXT: s_lshr_b32 s59, s1, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s62, s0, 8
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v6, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v7, s56, s10, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v2, s61, s12, v6
-; GFX11-NEXT: v_perm_b32 v4, s59, s58, v6
-; GFX11-NEXT: v_perm_b32 v9, s46, s45, v6
-; GFX11-NEXT: v_perm_b32 v11, s43, s8, v6
-; GFX11-NEXT: v_perm_b32 v1, s0, s62, v6
-; GFX11-NEXT: v_perm_b32 v3, s1, s60, v6
-; GFX11-NEXT: v_perm_b32 v5, s2, s57, v6
-; GFX11-NEXT: v_perm_b32 v8, s3, s47, v6
-; GFX11-NEXT: v_perm_b32 v10, s16, s44, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v12, s24, s4, v6
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v5, v7
-; GFX11-NEXT: v_perm_b32 v7, s42, s41, v6
-; GFX11-NEXT: v_or_b32_e32 v4, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v5, v10, v11
-; GFX11-NEXT: v_perm_b32 v8, s29, s6, v6
-; GFX11-NEXT: v_perm_b32 v11, s27, s26, v6
-; GFX11-NEXT: v_perm_b32 v14, s22, s14, v6
-; GFX11-NEXT: v_perm_b32 v9, s17, s40, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v10, s18, s28, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v13, s19, s25, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v15, s20, s23, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-NEXT: v_perm_b32 v16, s21, s15, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v8
-; GFX11-NEXT: v_or_b32_e32 v8, v13, v11
-; GFX11-NEXT: v_or_b32_e32 v9, v15, v12
-; GFX11-NEXT: v_or_b32_e32 v10, v16, v14
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off
-; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v10i32_to_v40i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v4, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v16, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s6 :: v_dual_mov_b32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s6 :: v_dual_mov_b32 v32, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s6 :: v_dual_mov_b32 v36, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s6 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s21 :: v_dual_mov_b32 v15, s19
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s20 :: v_dual_mov_b32 v21, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s18 :: v_dual_mov_b32 v25, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s3 :: v_dual_mov_b32 v31, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s1 :: v_dual_mov_b32 v34, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s20, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s19, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s18, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s10
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s10
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s17, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s10 :: v_dual_mov_b32 v15, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s7 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s0 :: v_dual_mov_b32 v1, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 8
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s16, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v4, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s6 :: v_dual_mov_b32 v9, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s6 :: v_dual_mov_b32 v10, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v16, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 8
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s6 :: v_dual_mov_b32 v22, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s8 :: v_dual_mov_b32 v31, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s3 :: v_dual_mov_b32 v33, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s2 :: v_dual_mov_b32 v36, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s2 :: v_dual_mov_b32 v38, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v30, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v39, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v39, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v34, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v32, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v30, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v23, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v9, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v33, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v31, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v36
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v34, v27
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v25, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v21, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v20, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v15, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v14, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v12, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v33, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v31, v27
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v26, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v22, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v13, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v11, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v6, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v7
+; GFX11-TRUE16-NEXT: s_clause 0x2
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[23:26], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[16:19], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v10i32_to_v40i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s63, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s63, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s63, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s0, 8
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s56, s10, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s61, s12, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s59, s58, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s43, s8, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s62, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s1, s60, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s2, s57, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s3, s47, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s16, s44, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s24, s4, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v5, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s42, s41, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s29, s6, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s27, s26, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s22, s14, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s17, s40, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s18, s28, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s19, s25, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s20, s23, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s21, s15, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v13, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v15, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v16, v14
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -6055,182 +6290,381 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32
; GFX9-NEXT: .LBB15_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i8_to_v10i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s58, v22
-; GFX11-NEXT: v_readfirstlane_b32 s4, v21
-; GFX11-NEXT: v_readfirstlane_b32 s5, v20
-; GFX11-NEXT: v_readfirstlane_b32 s6, v19
-; GFX11-NEXT: v_readfirstlane_b32 s7, v18
-; GFX11-NEXT: v_readfirstlane_b32 s8, v17
-; GFX11-NEXT: v_readfirstlane_b32 s9, v16
-; GFX11-NEXT: v_readfirstlane_b32 s10, v15
-; GFX11-NEXT: v_readfirstlane_b32 s11, v14
-; GFX11-NEXT: v_readfirstlane_b32 s12, v13
-; GFX11-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-NEXT: v_readfirstlane_b32 s14, v11
-; GFX11-NEXT: v_readfirstlane_b32 s15, v10
-; GFX11-NEXT: v_readfirstlane_b32 s40, v9
-; GFX11-NEXT: v_readfirstlane_b32 s41, v8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v7
-; GFX11-NEXT: v_readfirstlane_b32 s43, v6
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s45, v4
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s47, v2
-; GFX11-NEXT: v_readfirstlane_b32 s56, v1
-; GFX11-NEXT: v_readfirstlane_b32 s57, v0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB15_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v5
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_perm_b32 v6, s45, s44, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v13, s5, s4, v5
-; GFX11-NEXT: v_perm_b32 v8, s47, s46, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v9, s43, s42, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v12, s15, s14, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v14, s11, s10, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v15, s7, s6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v10
-; GFX11-NEXT: v_or_b32_e32 v8, v14, v11
-; GFX11-NEXT: v_or_b32_e32 v9, v15, v13
-; GFX11-NEXT: s_branch .LBB15_3
-; GFX11-NEXT: .LBB15_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
-; GFX11-NEXT: .LBB15_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s57, s57, 3
-; GFX11-NEXT: s_add_i32 s47, s47, 3
-; GFX11-NEXT: s_add_i32 s45, s45, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: s_add_i32 s43, s43, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v6, s47, s46, v5
-; GFX11-NEXT: v_perm_b32 v7, s45, s44, v5
-; GFX11-NEXT: v_perm_b32 v8, s43, s42, v5
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v5
-; GFX11-NEXT: v_perm_b32 v11, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v5
-; GFX11-NEXT: v_perm_b32 v13, s9, s8, v5
-; GFX11-NEXT: v_perm_b32 v14, s7, s6, v5
-; GFX11-NEXT: v_perm_b32 v5, s5, s4, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v5
-; GFX11-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v8, v12, v13
-; GFX11-NEXT: v_or_b32_e32 v9, v14, v15
-; GFX11-NEXT: .LBB15_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40i8_to_v10i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s5 :: v_dual_mov_b32 v13, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s4 :: v_dual_mov_b32 v26, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s3 :: v_dual_mov_b32 v64, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s4 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v31, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s29 :: v_dual_mov_b32 v37, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s27 :: v_dual_mov_b32 v38, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s25 :: v_dual_mov_b32 v36, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s24 :: v_dual_mov_b32 v48, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s21 :: v_dual_mov_b32 v52, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s19 :: v_dual_mov_b32 v51, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s18 :: v_dual_mov_b32 v55, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s1 :: v_dual_mov_b32 v65, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v64, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v54, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v34, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v65, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v52, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v37, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v9, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v26, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v68, v21, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v30, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v27, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v67, v14, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v69, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-TRUE16-NEXT: v_perm_b32 v70, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v67, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v69, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v70, v68
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v30
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v13, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v18, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v14
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i8_to_v10i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v22
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v19
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v18
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v17
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s43, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v14, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v15, v13
+; GFX11-FAKE16-NEXT: s_branch .LBB15_3
+; GFX11-FAKE16-NEXT: .LBB15_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
+; GFX11-FAKE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s57, s57, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s47, s47, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s43, s43, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v15
+; GFX11-FAKE16-NEXT: .LBB15_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -10884,192 +11318,393 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v10f32_to_v40i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s22, 0
-; GFX11-NEXT: s_mov_b32 s14, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB33_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s15, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s24, s21, 8
-; GFX11-NEXT: s_lshr_b32 s23, s20, 16
-; GFX11-NEXT: s_lshr_b32 s25, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s29, s19, 8
-; GFX11-NEXT: s_lshr_b32 s28, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 8
-; GFX11-NEXT: s_lshr_b32 s46, s3, 24
-; GFX11-NEXT: s_lshr_b32 s47, s3, 16
-; GFX11-NEXT: s_lshr_b32 s57, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s58, s2, 8
-; GFX11-NEXT: s_lshr_b32 s59, s1, 24
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s62, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s63, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB33_3
-; GFX11-NEXT: .LBB33_2:
-; GFX11-NEXT: s_mov_b32 s14, -1
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: .LBB33_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s14, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB33_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v2, s21, 1.0
-; GFX11-NEXT: v_add_f32_e64 v1, s20, 1.0
-; GFX11-NEXT: v_add_f32_e64 v4, s19, 1.0
-; GFX11-NEXT: v_add_f32_e64 v3, s18, 1.0
-; GFX11-NEXT: v_add_f32_e64 v6, s17, 1.0
-; GFX11-NEXT: v_add_f32_e64 v5, s16, 1.0
-; GFX11-NEXT: v_add_f32_e64 v8, s3, 1.0
-; GFX11-NEXT: v_add_f32_e64 v7, s2, 1.0
-; GFX11-NEXT: v_add_f32_e64 v10, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v9, s0, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b32_e32 v19, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v20, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v24, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v9
-; GFX11-NEXT: s_branch .LBB33_6
-; GFX11-NEXT: .LBB33_5:
-; GFX11-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1
-; GFX11-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v8, s3
-; GFX11-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, s17
-; GFX11-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v2, s21
-; GFX11-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v48, s61
-; GFX11-NEXT: v_dual_mov_b32 v38, s62 :: v_dual_mov_b32 v37, s59
-; GFX11-NEXT: v_dual_mov_b32 v36, s60 :: v_dual_mov_b32 v35, s58
-; GFX11-NEXT: v_dual_mov_b32 v34, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-NEXT: v_dual_mov_b32 v30, s57 :: v_dual_mov_b32 v29, s45
-; GFX11-NEXT: v_dual_mov_b32 v32, s47 :: v_dual_mov_b32 v31, s43
-; GFX11-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s41
-; GFX11-NEXT: v_dual_mov_b32 v27, s42 :: v_dual_mov_b32 v24, s40
-; GFX11-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v23, s26
-; GFX11-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v17, s25
-; GFX11-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v21, s23
-; GFX11-NEXT: v_dual_mov_b32 v16, s24 :: v_dual_mov_b32 v19, s15
-; GFX11-NEXT: v_dual_mov_b32 v18, s22 :: v_dual_mov_b32 v15, s4
-; GFX11-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s12
-; GFX11-NEXT: .LBB33_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v15, v48, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v37, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v35, v7, v35, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v34, v14, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v15
-; GFX11-NEXT: v_perm_b32 v15, v32, v33, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v31, v13, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v10, v38, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v36
-; GFX11-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v14
-; GFX11-NEXT: v_perm_b32 v14, v8, v30, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v8, v10, v31
-; GFX11-NEXT: v_perm_b32 v27, v27, v28, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-NEXT: v_perm_b32 v14, v22, v23, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v13, v5, v13
-; GFX11-NEXT: v_perm_b32 v5, v26, v12, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v11, v21, v11, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v18, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v27
-; GFX11-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v20, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-NEXT: v_perm_b32 v1, v1, v17, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v2, v2, v16, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v15
-; GFX11-NEXT: v_or_b32_e32 v9, v35, v9
-; GFX11-NEXT: v_or_b32_e32 v14, v6, v12
-; GFX11-NEXT: v_or_b32_e32 v15, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v16, v4, v18
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v11
-; GFX11-NEXT: v_or_b32_e32 v2, v2, v17
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off
-; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:16
-; GFX11-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v10f32_to_v40i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s21 :: v_dual_mov_b32 v1, s20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s19 :: v_dual_mov_b32 v5, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s6 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s8 :: v_dual_mov_b32 v32, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v3, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v15, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB33_3
+; GFX11-TRUE16-NEXT: .LBB33_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, s3, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, s2, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, s17, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, s19, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, s21, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, s20, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, s18, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, s16, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s0, 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v15
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v39, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v34, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v29, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v11, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v28, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v25, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v20, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v12, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v23, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v10, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v5, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX11-TRUE16-NEXT: s_clause 0x2
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[15:18], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v10f32_to_v40i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB33_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB33_3
+; GFX11-FAKE16-NEXT: .LBB33_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: .LBB33_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s14, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB33_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, s21, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, s20, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, s19, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, s18, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, s17, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, s16, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, s3, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, s2, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, s0, 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX11-FAKE16-NEXT: s_branch .LBB33_6
+; GFX11-FAKE16-NEXT: .LBB33_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v8, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v2, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v48, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s62 :: v_dual_mov_b32 v37, s59
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s60 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s57 :: v_dual_mov_b32 v29, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s47 :: v_dual_mov_b32 v31, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s42 :: v_dual_mov_b32 v24, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v23, s26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v17, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v21, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s24 :: v_dual_mov_b32 v19, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s22 :: v_dual_mov_b32 v15, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s12
+; GFX11-FAKE16-NEXT: .LBB33_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v48, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v36, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v7, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v34, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v32, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v31, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v8, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v27, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v22, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v5, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v26, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v21, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v18, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v35, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v6, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v4, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v17
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -12961,215 +13596,414 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3
; GFX9-NEXT: .LBB35_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i8_to_v10f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s58, v22
-; GFX11-NEXT: v_readfirstlane_b32 s4, v21
-; GFX11-NEXT: v_readfirstlane_b32 s5, v20
-; GFX11-NEXT: v_readfirstlane_b32 s6, v19
-; GFX11-NEXT: v_readfirstlane_b32 s7, v18
-; GFX11-NEXT: v_readfirstlane_b32 s8, v17
-; GFX11-NEXT: v_readfirstlane_b32 s9, v16
-; GFX11-NEXT: v_readfirstlane_b32 s10, v15
-; GFX11-NEXT: v_readfirstlane_b32 s11, v14
-; GFX11-NEXT: v_readfirstlane_b32 s12, v13
-; GFX11-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-NEXT: v_readfirstlane_b32 s14, v11
-; GFX11-NEXT: v_readfirstlane_b32 s15, v10
-; GFX11-NEXT: v_readfirstlane_b32 s40, v9
-; GFX11-NEXT: v_readfirstlane_b32 s41, v8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v7
-; GFX11-NEXT: v_readfirstlane_b32 s43, v6
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s45, v4
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s47, v2
-; GFX11-NEXT: v_readfirstlane_b32 s56, v1
-; GFX11-NEXT: v_readfirstlane_b32 s57, v0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB35_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v5
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_perm_b32 v6, s45, s44, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v13, s5, s4, v5
-; GFX11-NEXT: v_perm_b32 v8, s47, s46, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v9, s43, s42, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v12, s15, s14, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v14, s11, s10, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v15, s7, s6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v10
-; GFX11-NEXT: v_or_b32_e32 v8, v14, v11
-; GFX11-NEXT: v_or_b32_e32 v9, v15, v13
-; GFX11-NEXT: s_branch .LBB35_3
-; GFX11-NEXT: .LBB35_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
-; GFX11-NEXT: .LBB35_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s57, s57, 3
-; GFX11-NEXT: s_add_i32 s47, s47, 3
-; GFX11-NEXT: s_add_i32 s45, s45, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: s_add_i32 s43, s43, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v6, s47, s46, v5
-; GFX11-NEXT: v_perm_b32 v7, s45, s44, v5
-; GFX11-NEXT: v_perm_b32 v8, s43, s42, v5
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v5
-; GFX11-NEXT: v_perm_b32 v11, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v5
-; GFX11-NEXT: v_perm_b32 v13, s9, s8, v5
-; GFX11-NEXT: v_perm_b32 v14, s7, s6, v5
-; GFX11-NEXT: v_perm_b32 v5, s5, s4, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v5
-; GFX11-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v8, v12, v13
-; GFX11-NEXT: v_or_b32_e32 v9, v14, v15
-; GFX11-NEXT: .LBB35_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = add <40 x i8> %a, splat (i8 3)
- %a2 = bitcast <40 x i8> %a1 to <10 x float>
- br label %end
-
-cmp.false:
- %a3 = bitcast <40 x i8> %a to <10 x float>
- br label %end
-
-end:
- %phi = phi <10 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
- ret <10 x float> %phi
-}
-
-define <5 x double> @bitcast_v10f32_to_v5f64(<10 x float> %a, i32 %b) #0 {
-; SI-LABEL: bitcast_v10f32_to_v5f64:
-; SI: ; %bb.0:
-; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10
-; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
-; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
-; SI-NEXT: s_cbranch_execz .LBB36_2
-; SI-NEXT: ; %bb.1: ; %cmp.true
-; SI-NEXT: v_add_f32_e32 v9, 1.0, v9
-; SI-NEXT: v_add_f32_e32 v8, 1.0, v8
-; SI-NEXT: v_add_f32_e32 v7, 1.0, v7
-; SI-NEXT: v_add_f32_e32 v6, 1.0, v6
-; SI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; SI-NEXT: v_add_f32_e32 v4, 1.0, v4
+; GFX11-TRUE16-LABEL: bitcast_v40i8_to_v10f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s5 :: v_dual_mov_b32 v13, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s4 :: v_dual_mov_b32 v26, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s3 :: v_dual_mov_b32 v64, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s4 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v31, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s29 :: v_dual_mov_b32 v37, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s27 :: v_dual_mov_b32 v38, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s25 :: v_dual_mov_b32 v36, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s24 :: v_dual_mov_b32 v48, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s21 :: v_dual_mov_b32 v52, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s19 :: v_dual_mov_b32 v51, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s18 :: v_dual_mov_b32 v55, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s1 :: v_dual_mov_b32 v65, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v64, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v54, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v48, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v34, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v65, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v55, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v52, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v37, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v9, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v26, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v68, v21, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v30, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v27, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v67, v14, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v69, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-TRUE16-NEXT: v_perm_b32 v70, v18, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v67, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v69, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v70, v68
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v30
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v29
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v13, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v18, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v14
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i8_to_v10f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v22
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v19
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v18
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v17
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s43, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v14, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v15, v13
+; GFX11-FAKE16-NEXT: s_branch .LBB35_3
+; GFX11-FAKE16-NEXT: .LBB35_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
+; GFX11-FAKE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s57, s57, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s47, s47, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s43, s43, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v15
+; GFX11-FAKE16-NEXT: .LBB35_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = add <40 x i8> %a, splat (i8 3)
+ %a2 = bitcast <40 x i8> %a1 to <10 x float>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast <40 x i8> %a to <10 x float>
+ br label %end
+
+end:
+ %phi = phi <10 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
+ ret <10 x float> %phi
+}
+
+define <5 x double> @bitcast_v10f32_to_v5f64(<10 x float> %a, i32 %b) #0 {
+; SI-LABEL: bitcast_v10f32_to_v5f64:
+; SI: ; %bb.0:
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10
+; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
+; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
+; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_cbranch_execz .LBB36_2
+; SI-NEXT: ; %bb.1: ; %cmp.true
+; SI-NEXT: v_add_f32_e32 v9, 1.0, v9
+; SI-NEXT: v_add_f32_e32 v8, 1.0, v8
+; SI-NEXT: v_add_f32_e32 v7, 1.0, v7
+; SI-NEXT: v_add_f32_e32 v6, 1.0, v6
+; SI-NEXT: v_add_f32_e32 v5, 1.0, v5
+; SI-NEXT: v_add_f32_e32 v4, 1.0, v4
; SI-NEXT: v_add_f32_e32 v3, 1.0, v3
; SI-NEXT: v_add_f32_e32 v2, 1.0, v2
; SI-NEXT: v_add_f32_e32 v1, 1.0, v1
@@ -17338,192 +18172,393 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v20i16_to_v40i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s22, 0
-; GFX11-NEXT: s_mov_b32 s14, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB49_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s15, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s24, s21, 8
-; GFX11-NEXT: s_lshr_b32 s23, s20, 16
-; GFX11-NEXT: s_lshr_b32 s25, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s29, s19, 8
-; GFX11-NEXT: s_lshr_b32 s28, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 8
-; GFX11-NEXT: s_lshr_b32 s46, s3, 24
-; GFX11-NEXT: s_lshr_b32 s47, s3, 16
-; GFX11-NEXT: s_lshr_b32 s57, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s58, s2, 8
-; GFX11-NEXT: s_lshr_b32 s59, s1, 24
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s62, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s63, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB49_3
-; GFX11-NEXT: .LBB49_2:
-; GFX11-NEXT: s_mov_b32 s14, -1
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: .LBB49_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s14, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB49_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v2, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b32_e32 v19, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v20, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v24, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v9
-; GFX11-NEXT: s_branch .LBB49_6
-; GFX11-NEXT: .LBB49_5:
-; GFX11-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1
-; GFX11-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v8, s3
-; GFX11-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, s17
-; GFX11-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v2, s21
-; GFX11-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v48, s61
-; GFX11-NEXT: v_dual_mov_b32 v38, s62 :: v_dual_mov_b32 v37, s59
-; GFX11-NEXT: v_dual_mov_b32 v36, s60 :: v_dual_mov_b32 v35, s58
-; GFX11-NEXT: v_dual_mov_b32 v34, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-NEXT: v_dual_mov_b32 v30, s57 :: v_dual_mov_b32 v29, s45
-; GFX11-NEXT: v_dual_mov_b32 v32, s47 :: v_dual_mov_b32 v31, s43
-; GFX11-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s41
-; GFX11-NEXT: v_dual_mov_b32 v27, s42 :: v_dual_mov_b32 v24, s40
-; GFX11-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v23, s26
-; GFX11-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v17, s25
-; GFX11-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v21, s23
-; GFX11-NEXT: v_dual_mov_b32 v16, s24 :: v_dual_mov_b32 v19, s15
-; GFX11-NEXT: v_dual_mov_b32 v18, s22 :: v_dual_mov_b32 v11, s12
-; GFX11-NEXT: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v15, s4
-; GFX11-NEXT: .LBB49_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v15, v48, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v37, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v35, v7, v35, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v34, v14, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v15
-; GFX11-NEXT: v_perm_b32 v15, v32, v33, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v31, v13, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v10, v38, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v36
-; GFX11-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v14
-; GFX11-NEXT: v_perm_b32 v14, v8, v30, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v8, v10, v31
-; GFX11-NEXT: v_perm_b32 v27, v27, v28, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-NEXT: v_perm_b32 v14, v22, v23, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v13, v5, v13
-; GFX11-NEXT: v_perm_b32 v5, v26, v12, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v11, v21, v11, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v18, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v27
-; GFX11-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v20, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-NEXT: v_perm_b32 v1, v1, v17, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v2, v2, v16, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v15
-; GFX11-NEXT: v_or_b32_e32 v9, v35, v9
-; GFX11-NEXT: v_or_b32_e32 v14, v6, v12
-; GFX11-NEXT: v_or_b32_e32 v15, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v16, v4, v18
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v11
-; GFX11-NEXT: v_or_b32_e32 v2, v2, v17
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off
-; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:16
-; GFX11-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v20i16_to_v40i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s21 :: v_dual_mov_b32 v1, s20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s19 :: v_dual_mov_b32 v5, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s6 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s8 :: v_dual_mov_b32 v32, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v3, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v15, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB49_3
+; GFX11-TRUE16-NEXT: .LBB49_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v15
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v39, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v34, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v29, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v11, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v28, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v25, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v20, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v12, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v23, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v10, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v5, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX11-TRUE16-NEXT: s_clause 0x2
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[15:18], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v20i16_to_v40i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB49_3
+; GFX11-FAKE16-NEXT: .LBB49_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s14, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX11-FAKE16-NEXT: s_branch .LBB49_6
+; GFX11-FAKE16-NEXT: .LBB49_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v8, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v2, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v48, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s62 :: v_dual_mov_b32 v37, s59
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s60 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s57 :: v_dual_mov_b32 v29, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s47 :: v_dual_mov_b32 v31, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s42 :: v_dual_mov_b32 v24, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v23, s26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v17, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v21, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s24 :: v_dual_mov_b32 v19, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s22 :: v_dual_mov_b32 v11, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v15, s4
+; GFX11-FAKE16-NEXT: .LBB49_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v48, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v36, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v7, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v34, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v32, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v31, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v8, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v27, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v22, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v5, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v26, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v21, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v18, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v35, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v6, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v4, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v17
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -19661,146 +20696,175 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32
; GFX11-TRUE16-LABEL: bitcast_v40i8_to_v20i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v22
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s3 :: v_dual_mov_b32 v28, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s8 :: v_dual_mov_b32 v48, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s28 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s8 :: v_dual_mov_b32 v33, s27
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v71, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s25 :: v_dual_mov_b32 v55, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s23 :: v_dual_mov_b32 v19, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s21 :: v_dual_mov_b32 v51, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s19 :: v_dual_mov_b32 v17, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v23, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s2 :: v_dual_mov_b32 v26, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, 0x6050400
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s45, s14, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s42, s13, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s40, s10, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s12, s9, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s7, s11, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s4, s6, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s57, s56, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s47, s44, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s41, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s8, s43, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s15, s5, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v27, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v24, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v50, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v54, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v70, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v64, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v48, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v26, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v23, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v29, v35, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v20, v28, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v51, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v55, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v71, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v67, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v65, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v31, v69, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v53, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
; GFX11-TRUE16-NEXT: s_branch .LBB51_3
; GFX11-TRUE16-NEXT: .LBB51_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s15, s5, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s6, s4, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s11, s7, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s47, s47, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s46, s41, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s57, s57, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s12, s9, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s47, s44, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s57, s56, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s45, s45, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s28, s29, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s43, s8, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s45, s14, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s20, s21, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s40, s10, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s42, s13, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s26, s27, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s22, s23, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, s2, s3, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, s18, s19, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, s16, s17, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v67
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v70
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v51
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v4, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v3, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v20, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v23, v22, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v20.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v11.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v10.l
; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
@@ -23777,192 +24841,393 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v20f16_to_v40i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s22, 0
-; GFX11-NEXT: s_mov_b32 s14, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB61_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s15, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s24, s21, 8
-; GFX11-NEXT: s_lshr_b32 s23, s20, 16
-; GFX11-NEXT: s_lshr_b32 s25, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s29, s19, 8
-; GFX11-NEXT: s_lshr_b32 s28, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 8
-; GFX11-NEXT: s_lshr_b32 s46, s3, 24
-; GFX11-NEXT: s_lshr_b32 s47, s3, 16
-; GFX11-NEXT: s_lshr_b32 s57, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s58, s2, 8
-; GFX11-NEXT: s_lshr_b32 s59, s1, 24
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s62, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s63, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB61_3
-; GFX11-NEXT: .LBB61_2:
-; GFX11-NEXT: s_mov_b32 s14, -1
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: .LBB61_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s14, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB61_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b32_e32 v19, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v20, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v24, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v9
-; GFX11-NEXT: s_branch .LBB61_6
-; GFX11-NEXT: .LBB61_5:
-; GFX11-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1
-; GFX11-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v8, s3
-; GFX11-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, s17
-; GFX11-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v2, s21
-; GFX11-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v48, s61
-; GFX11-NEXT: v_dual_mov_b32 v38, s62 :: v_dual_mov_b32 v37, s59
-; GFX11-NEXT: v_dual_mov_b32 v36, s60 :: v_dual_mov_b32 v35, s58
-; GFX11-NEXT: v_dual_mov_b32 v34, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-NEXT: v_dual_mov_b32 v30, s57 :: v_dual_mov_b32 v29, s45
-; GFX11-NEXT: v_dual_mov_b32 v32, s47 :: v_dual_mov_b32 v31, s43
-; GFX11-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s41
-; GFX11-NEXT: v_dual_mov_b32 v27, s42 :: v_dual_mov_b32 v24, s40
-; GFX11-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v23, s26
-; GFX11-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v17, s25
-; GFX11-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v21, s23
-; GFX11-NEXT: v_dual_mov_b32 v16, s24 :: v_dual_mov_b32 v19, s15
-; GFX11-NEXT: v_dual_mov_b32 v18, s22 :: v_dual_mov_b32 v11, s12
-; GFX11-NEXT: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v15, s4
-; GFX11-NEXT: .LBB61_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v15, v48, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v37, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v35, v7, v35, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v34, v14, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v15
-; GFX11-NEXT: v_perm_b32 v15, v32, v33, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v31, v13, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v10, v38, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v36
-; GFX11-NEXT: v_or_b32_e32 v7, v9, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v14
-; GFX11-NEXT: v_perm_b32 v14, v8, v30, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v8, v10, v31
-; GFX11-NEXT: v_perm_b32 v27, v27, v28, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-NEXT: v_perm_b32 v14, v22, v23, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v13, v5, v13
-; GFX11-NEXT: v_perm_b32 v5, v26, v12, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v11, v21, v11, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v18, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v27
-; GFX11-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v20, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-NEXT: v_perm_b32 v1, v1, v17, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v2, v2, v16, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v15
-; GFX11-NEXT: v_or_b32_e32 v9, v35, v9
-; GFX11-NEXT: v_or_b32_e32 v14, v6, v12
-; GFX11-NEXT: v_or_b32_e32 v15, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v16, v4, v18
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v11
-; GFX11-NEXT: v_or_b32_e32 v2, v2, v17
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off
-; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:16
-; GFX11-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v20f16_to_v40i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB61_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s21 :: v_dual_mov_b32 v1, s20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s19 :: v_dual_mov_b32 v5, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s6 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s8 :: v_dual_mov_b32 v32, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v3, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v15, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB61_3
+; GFX11-TRUE16-NEXT: .LBB61_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: .LBB61_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB61_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v15
+; GFX11-TRUE16-NEXT: .LBB61_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v39, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v34, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v33, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v36, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v29, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v11, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v28, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v25, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v20, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v12, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v23, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v10, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v36
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v5, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX11-TRUE16-NEXT: s_clause 0x2
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[15:18], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v20f16_to_v40i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB61_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB61_3
+; GFX11-FAKE16-NEXT: .LBB61_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: .LBB61_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s14, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB61_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX11-FAKE16-NEXT: s_branch .LBB61_6
+; GFX11-FAKE16-NEXT: .LBB61_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v8, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v2, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v48, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s62 :: v_dual_mov_b32 v37, s59
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s60 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s57 :: v_dual_mov_b32 v29, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s47 :: v_dual_mov_b32 v31, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s42 :: v_dual_mov_b32 v24, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v23, s26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v17, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v21, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s24 :: v_dual_mov_b32 v19, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s22 :: v_dual_mov_b32 v11, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v15, s4
+; GFX11-FAKE16-NEXT: .LBB61_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v48, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v36, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v7, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v34, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v32, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v31, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v8, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v27, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v22, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v5, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v26, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v21, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v18, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v35, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v6, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v4, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v17
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -26100,146 +27365,175 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32
; GFX11-TRUE16-LABEL: bitcast_v40i8_to_v20f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v22
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s3 :: v_dual_mov_b32 v28, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s8 :: v_dual_mov_b32 v48, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s28 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s8 :: v_dual_mov_b32 v33, s27
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v71, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s25 :: v_dual_mov_b32 v55, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s23 :: v_dual_mov_b32 v19, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s21 :: v_dual_mov_b32 v51, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s19 :: v_dual_mov_b32 v17, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v23, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s2 :: v_dual_mov_b32 v26, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s1
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB63_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, 0x6050400
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s45, s14, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s42, s13, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s40, s10, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s12, s9, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s7, s11, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s4, s6, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s57, s56, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s47, s44, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s41, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s8, s43, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s15, s5, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v27, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v24, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v50, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v54, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v70, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v64, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v48, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v26, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v23, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v29, v35, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v20, v28, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v51, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v55, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v71, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v67, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v65, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v31, v69, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v53, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
; GFX11-TRUE16-NEXT: s_branch .LBB63_3
; GFX11-TRUE16-NEXT: .LBB63_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB63_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB63_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s15, s5, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s6, s4, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s11, s7, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s47, s47, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s46, s41, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s57, s57, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s12, s9, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s47, s44, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s57, s56, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s45, s45, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s28, s29, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s43, s8, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s45, s14, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s20, s21, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s40, s10, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s42, s13, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s26, s27, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s22, s23, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, s2, s3, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, s18, s19, v0
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, s16, s17, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v48
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v67
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v70
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v55
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v51
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v50
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v4, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v3, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v20, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v23, v22, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v20.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v11.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v10.l
; GFX11-TRUE16-NEXT: .LBB63_5: ; %end
@@ -30490,187 +31784,387 @@ define inreg <5 x double> @bitcast_v40i8_to_v5f64_scalar(<40 x i8> inreg %a, i32
; GFX9-NEXT: .LBB73_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i8_to_v5f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s58, v22
-; GFX11-NEXT: v_readfirstlane_b32 s4, v21
-; GFX11-NEXT: v_readfirstlane_b32 s5, v20
-; GFX11-NEXT: v_readfirstlane_b32 s6, v19
-; GFX11-NEXT: v_readfirstlane_b32 s7, v18
-; GFX11-NEXT: v_readfirstlane_b32 s8, v17
-; GFX11-NEXT: v_readfirstlane_b32 s9, v16
-; GFX11-NEXT: v_readfirstlane_b32 s10, v15
-; GFX11-NEXT: v_readfirstlane_b32 s11, v14
-; GFX11-NEXT: v_readfirstlane_b32 s12, v13
-; GFX11-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-NEXT: v_readfirstlane_b32 s14, v11
-; GFX11-NEXT: v_readfirstlane_b32 s15, v10
-; GFX11-NEXT: v_readfirstlane_b32 s40, v9
-; GFX11-NEXT: v_readfirstlane_b32 s41, v8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v7
-; GFX11-NEXT: v_readfirstlane_b32 s43, v6
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s45, v4
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s47, v2
-; GFX11-NEXT: v_readfirstlane_b32 s56, v1
-; GFX11-NEXT: v_readfirstlane_b32 s57, v0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB73_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v5
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_perm_b32 v6, s45, s44, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v13, s5, s4, v5
-; GFX11-NEXT: v_perm_b32 v8, s47, s46, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v9, s43, s42, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v12, s15, s14, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v14, s11, s10, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v15, s7, s6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v10
-; GFX11-NEXT: v_or_b32_e32 v8, v14, v11
-; GFX11-NEXT: v_or_b32_e32 v9, v15, v13
-; GFX11-NEXT: s_branch .LBB73_3
-; GFX11-NEXT: .LBB73_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-NEXT: .LBB73_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB73_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s57, s57, 3
-; GFX11-NEXT: s_add_i32 s47, s47, 3
-; GFX11-NEXT: s_add_i32 s45, s45, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: s_add_i32 s43, s43, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v6, s47, s46, v5
-; GFX11-NEXT: v_perm_b32 v7, s45, s44, v5
-; GFX11-NEXT: v_perm_b32 v8, s43, s42, v5
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v5
-; GFX11-NEXT: v_perm_b32 v11, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v5
-; GFX11-NEXT: v_perm_b32 v13, s9, s8, v5
-; GFX11-NEXT: v_perm_b32 v14, s7, s6, v5
-; GFX11-NEXT: v_perm_b32 v5, s5, s4, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v5
-; GFX11-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v8, v12, v13
-; GFX11-NEXT: v_or_b32_e32 v9, v14, v15
-; GFX11-NEXT: .LBB73_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = add <40 x i8> %a, splat (i8 3)
+; GFX11-TRUE16-LABEL: bitcast_v40i8_to_v5f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s6 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s4 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s4 :: v_dual_mov_b32 v32, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s6 :: v_dual_mov_b32 v33, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s3 :: v_dual_mov_b32 v70, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s4 :: v_dual_mov_b32 v36, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v37, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s29 :: v_dual_mov_b32 v51, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s27 :: v_dual_mov_b32 v52, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v50, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s24 :: v_dual_mov_b32 v54, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s21 :: v_dual_mov_b32 v66, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s19 :: v_dual_mov_b32 v65, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s18 :: v_dual_mov_b32 v69, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s1 :: v_dual_mov_b32 v71, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB73_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v70, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v68, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v54, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v52, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v48, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v71, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v69, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v53, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v51, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v35, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v9, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v32, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v26, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v23, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v21, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v36, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v33, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v28, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v25, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v13, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v12
+; GFX11-TRUE16-NEXT: s_branch .LBB73_3
+; GFX11-TRUE16-NEXT: .LBB73_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+; GFX11-TRUE16-NEXT: .LBB73_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB73_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v71
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v68
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v51
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v14
+; GFX11-TRUE16-NEXT: .LBB73_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i8_to_v5f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v22
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v19
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v18
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v17
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s43, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB73_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v14, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v15, v13
+; GFX11-FAKE16-NEXT: s_branch .LBB73_3
+; GFX11-FAKE16-NEXT: .LBB73_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+; GFX11-FAKE16-NEXT: .LBB73_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB73_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s57, s57, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s47, s47, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s43, s43, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v15
+; GFX11-FAKE16-NEXT: .LBB73_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = add <40 x i8> %a, splat (i8 3)
%a2 = bitcast <40 x i8> %a1 to <5 x double>
br label %end
@@ -32202,187 +33696,382 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v5f64_to_v40i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s22, 0
-; GFX11-NEXT: s_mov_b32 s14, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB75_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s45, s21, 24
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s43, s21, 8
-; GFX11-NEXT: s_lshr_b32 s47, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s20, 8
-; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: s_lshr_b32 s41, s19, 16
-; GFX11-NEXT: s_lshr_b32 s40, s19, 8
-; GFX11-NEXT: s_lshr_b32 s57, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s18, 8
-; GFX11-NEXT: s_lshr_b32 s29, s17, 24
-; GFX11-NEXT: s_lshr_b32 s28, s17, 16
-; GFX11-NEXT: s_lshr_b32 s27, s17, 8
-; GFX11-NEXT: s_lshr_b32 s59, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s16, 8
-; GFX11-NEXT: s_lshr_b32 s26, s3, 24
-; GFX11-NEXT: s_lshr_b32 s25, s3, 16
-; GFX11-NEXT: s_lshr_b32 s24, s3, 8
-; GFX11-NEXT: s_lshr_b32 s61, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s2, 8
-; GFX11-NEXT: s_lshr_b32 s23, s1, 24
-; GFX11-NEXT: s_lshr_b32 s22, s1, 16
-; GFX11-NEXT: s_lshr_b32 s15, s1, 8
-; GFX11-NEXT: s_lshr_b32 s63, s0, 16
-; GFX11-NEXT: s_lshr_b32 s62, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB75_3
-; GFX11-NEXT: .LBB75_2:
-; GFX11-NEXT: s_mov_b32 s14, -1
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: .LBB75_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s14, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB75_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[5:6], s[16:17], 1.0
-; GFX11-NEXT: v_add_f64 v[1:2], s[20:21], 1.0
-; GFX11-NEXT: v_add_f64 v[7:8], s[2:3], 1.0
-; GFX11-NEXT: v_add_f64 v[3:4], s[18:19], 1.0
-; GFX11-NEXT: v_add_f64 v[12:13], s[0:1], 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[14:15], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[9:10], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[10:11], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[16:17], 24, v[12:13]
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v11, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v24, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 24, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX11-NEXT: s_branch .LBB75_6
-; GFX11-NEXT: .LBB75_5:
-; GFX11-NEXT: v_dual_mov_b32 v12, s0 :: v_dual_mov_b32 v7, s2
-; GFX11-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v2, s21
-; GFX11-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
-; GFX11-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v6, s17
-; GFX11-NEXT: v_dual_mov_b32 v8, s3 :: v_dual_mov_b32 v13, s1
-; GFX11-NEXT: v_dual_mov_b32 v34, s63 :: v_dual_mov_b32 v35, s62
-; GFX11-NEXT: v_dual_mov_b32 v31, s61 :: v_dual_mov_b32 v32, s60
-; GFX11-NEXT: v_dual_mov_b32 v28, s59 :: v_dual_mov_b32 v23, s57
-; GFX11-NEXT: v_dual_mov_b32 v26, s58 :: v_dual_mov_b32 v19, s47
-; GFX11-NEXT: v_dual_mov_b32 v22, s56 :: v_dual_mov_b32 v11, s46
-; GFX11-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v15, s6
-; GFX11-NEXT: v_dual_mov_b32 v14, s8 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v17, s43
-; GFX11-NEXT: v_dual_mov_b32 v18, s45 :: v_dual_mov_b32 v25, s41
-; GFX11-NEXT: v_dual_mov_b32 v20, s44 :: v_dual_mov_b32 v21, s40
-; GFX11-NEXT: v_dual_mov_b32 v24, s42 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s28 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v36, s26 :: v_dual_mov_b32 v37, s25
-; GFX11-NEXT: v_dual_mov_b32 v33, s24 :: v_dual_mov_b32 v38, s23
-; GFX11-NEXT: v_dual_mov_b32 v39, s22 :: v_dual_mov_b32 v48, s15
-; GFX11-NEXT: .LBB75_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v16, v34, v16, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v12, v12, v35, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v31, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v31, v37, v36, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v32, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-NEXT: v_perm_b32 v14, v28, v14, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v8, v8, v33, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v34, v39, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v16
-; GFX11-NEXT: v_lshlrev_b32_e32 v16, 16, v31
-; GFX11-NEXT: v_perm_b32 v5, v5, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v26, 16, v14
-; GFX11-NEXT: v_or_b32_e32 v14, v7, v15
-; GFX11-NEXT: v_perm_b32 v7, v30, v29, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v15, v8, v16
-; GFX11-NEXT: v_perm_b32 v8, v23, v10, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v25, v24, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v19, v9, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v16, v20, v18, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v13, v48, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v34
-; GFX11-NEXT: v_perm_b32 v6, v6, v27, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v3, v3, v22, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v4, v4, v21, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v1, v1, v11, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v2, v2, v17, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v16
-; GFX11-NEXT: v_or_b32_e32 v13, v13, v28
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v26
-; GFX11-NEXT: v_or_b32_e32 v6, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v3, v8
-; GFX11-NEXT: v_or_b32_e32 v8, v4, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v9
-; GFX11-NEXT: v_or_b32_e32 v2, v2, v11
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[12:15], off
-; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v5f64_to_v40i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB75_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v20, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v13, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s5 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v17, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s21 :: v_dual_mov_b32 v1, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s19 :: v_dual_mov_b32 v3, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v9, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s1 :: v_dual_mov_b32 v14, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB75_3
+; GFX11-TRUE16-NEXT: .LBB75_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: .LBB75_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB75_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f64 v[3:4], s[18:19], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[9:10], s[2:3], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[1:2], s[20:21], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[7:8], s[16:17], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[0:1], 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[14:15]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 24, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v14
+; GFX11-TRUE16-NEXT: .LBB75_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v18, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v38, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v35, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v34, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v30, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v10, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v27, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v25, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v22, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v20, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v3, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v4, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v6
+; GFX11-TRUE16-NEXT: s_clause 0x2
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[12:15], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v5f64_to_v40i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB75_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB75_3
+; GFX11-FAKE16-NEXT: .LBB75_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: .LBB75_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s14, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB75_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f64 v[5:6], s[16:17], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[1:2], s[20:21], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[7:8], s[2:3], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[3:4], s[18:19], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[12:13], s[0:1], 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[12:13]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 24, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v12
+; GFX11-FAKE16-NEXT: s_branch .LBB75_6
+; GFX11-FAKE16-NEXT: .LBB75_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s0 :: v_dual_mov_b32 v7, s2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v2, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s20 :: v_dual_mov_b32 v6, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s3 :: v_dual_mov_b32 v13, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s63 :: v_dual_mov_b32 v35, s62
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s61 :: v_dual_mov_b32 v32, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s59 :: v_dual_mov_b32 v23, s57
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s58 :: v_dual_mov_b32 v19, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s56 :: v_dual_mov_b32 v11, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v15, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s8 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v17, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s45 :: v_dual_mov_b32 v25, s41
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s44 :: v_dual_mov_b32 v21, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s42 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s28 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s26 :: v_dual_mov_b32 v37, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s24 :: v_dual_mov_b32 v38, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s22 :: v_dual_mov_b32 v48, s15
+; GFX11-FAKE16-NEXT: .LBB75_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v34, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v31, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v31, v37, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v28, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v39, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v7, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v30, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v8, v16
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v23, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v25, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v19, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v20, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v27, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v13, v28
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v3, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v4, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v11
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[12:15], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -34355,182 +36044,382 @@ define inreg <5 x i64> @bitcast_v40i8_to_v5i64_scalar(<40 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB77_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i8_to_v5i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s58, v22
-; GFX11-NEXT: v_readfirstlane_b32 s4, v21
-; GFX11-NEXT: v_readfirstlane_b32 s5, v20
-; GFX11-NEXT: v_readfirstlane_b32 s6, v19
-; GFX11-NEXT: v_readfirstlane_b32 s7, v18
-; GFX11-NEXT: v_readfirstlane_b32 s8, v17
-; GFX11-NEXT: v_readfirstlane_b32 s9, v16
-; GFX11-NEXT: v_readfirstlane_b32 s10, v15
-; GFX11-NEXT: v_readfirstlane_b32 s11, v14
-; GFX11-NEXT: v_readfirstlane_b32 s12, v13
-; GFX11-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-NEXT: v_readfirstlane_b32 s14, v11
-; GFX11-NEXT: v_readfirstlane_b32 s15, v10
-; GFX11-NEXT: v_readfirstlane_b32 s40, v9
-; GFX11-NEXT: v_readfirstlane_b32 s41, v8
-; GFX11-NEXT: v_readfirstlane_b32 s42, v7
-; GFX11-NEXT: v_readfirstlane_b32 s43, v6
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s45, v4
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s47, v2
-; GFX11-NEXT: v_readfirstlane_b32 s56, v1
-; GFX11-NEXT: v_readfirstlane_b32 s57, v0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB77_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v11, s9, s8, v5
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_perm_b32 v6, s45, s44, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v7, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v13, s5, s4, v5
-; GFX11-NEXT: v_perm_b32 v8, s47, s46, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v9, s43, s42, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v12, s15, s14, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v14, s11, s10, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v15, s7, s6, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_or_b32_e32 v5, v8, v6
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v12, v10
-; GFX11-NEXT: v_or_b32_e32 v8, v14, v11
-; GFX11-NEXT: v_or_b32_e32 v9, v15, v13
-; GFX11-NEXT: s_branch .LBB77_3
-; GFX11-NEXT: .LBB77_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-NEXT: .LBB77_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB77_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v5, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_perm_b32 v6, s22, s23, v5
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s57, s57, 3
-; GFX11-NEXT: s_add_i32 s47, s47, 3
-; GFX11-NEXT: s_add_i32 s45, s45, 3
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v5
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v5
-; GFX11-NEXT: v_perm_b32 v2, s16, s17, v5
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v5
-; GFX11-NEXT: v_perm_b32 v4, s20, s21, v5
-; GFX11-NEXT: v_perm_b32 v7, s24, s25, v5
-; GFX11-NEXT: v_perm_b32 v8, s26, s27, v5
-; GFX11-NEXT: v_perm_b32 v9, s28, s29, v5
-; GFX11-NEXT: v_perm_b32 v10, s57, s56, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: s_add_i32 s43, s43, 3
-; GFX11-NEXT: s_add_i32 s41, s41, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-NEXT: v_or_b32_e32 v3, v7, v8
-; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v6, s47, s46, v5
-; GFX11-NEXT: v_perm_b32 v7, s45, s44, v5
-; GFX11-NEXT: v_perm_b32 v8, s43, s42, v5
-; GFX11-NEXT: v_perm_b32 v9, s41, s40, v5
-; GFX11-NEXT: v_perm_b32 v10, s15, s14, v5
-; GFX11-NEXT: v_perm_b32 v11, s13, s12, v5
-; GFX11-NEXT: v_perm_b32 v12, s11, s10, v5
-; GFX11-NEXT: v_perm_b32 v13, s9, s8, v5
-; GFX11-NEXT: v_perm_b32 v14, s7, s6, v5
-; GFX11-NEXT: v_perm_b32 v5, s5, s4, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
-; GFX11-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
-; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
-; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
-; GFX11-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
-; GFX11-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v5
-; GFX11-NEXT: v_or_b32_e32 v5, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_or_b32_e32 v8, v12, v13
-; GFX11-NEXT: v_or_b32_e32 v9, v14, v15
-; GFX11-NEXT: .LBB77_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40i8_to_v5i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s6 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v23, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s4 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s4 :: v_dual_mov_b32 v32, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s6 :: v_dual_mov_b32 v33, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s3 :: v_dual_mov_b32 v70, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s4 :: v_dual_mov_b32 v36, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v37, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s29 :: v_dual_mov_b32 v51, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s27 :: v_dual_mov_b32 v52, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v50, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s24 :: v_dual_mov_b32 v54, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s21 :: v_dual_mov_b32 v66, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s19 :: v_dual_mov_b32 v65, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s18 :: v_dual_mov_b32 v69, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s1 :: v_dual_mov_b32 v71, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB77_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v70, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v68, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v54, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v52, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v48, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v71, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v69, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v53, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v51, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v35, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v9, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v32, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v26, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v23, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v21, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v36, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v33, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v28, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v25, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v13, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v12
+; GFX11-TRUE16-NEXT: s_branch .LBB77_3
+; GFX11-TRUE16-NEXT: .LBB77_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+; GFX11-TRUE16-NEXT: .LBB77_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB77_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v71
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v68
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v54
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v51
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v48
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v35
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v33
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v32
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v14
+; GFX11-TRUE16-NEXT: .LBB77_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i8_to_v5i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v22
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v21
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v20
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v19
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v18
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v17
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v14
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s43, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB77_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v8, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v12, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v14, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v15, v13
+; GFX11-FAKE16-NEXT: s_branch .LBB77_3
+; GFX11-FAKE16-NEXT: .LBB77_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+; GFX11-FAKE16-NEXT: .LBB77_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB77_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s22, s23, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s57, s57, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s47, s47, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, 3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s24, s25, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s26, s27, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s28, s29, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s57, s56, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s43, s43, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s41, s41, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v7, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v9, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s47, s46, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s45, s44, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s43, s42, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s41, s40, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s15, s14, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s13, s12, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s11, s10, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s9, s8, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s7, s6, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s5, s4, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v15
+; GFX11-FAKE16-NEXT: .LBB77_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -36046,171 +37935,406 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v5i64_to_v40i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s22, 0
-; GFX11-NEXT: s_mov_b32 s63, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB79_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s15, s21, 8
-; GFX11-NEXT: s_lshr_b32 s24, s20, 16
-; GFX11-NEXT: s_lshr_b32 s23, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s25, s19, 8
-; GFX11-NEXT: s_lshr_b32 s29, s18, 16
-; GFX11-NEXT: s_lshr_b32 s28, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s44, s16, 8
-; GFX11-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s57, s2, 8
-; GFX11-NEXT: s_lshr_b32 s58, s1, 24
-; GFX11-NEXT: s_lshr_b32 s59, s1, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s62, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB79_3
-; GFX11-NEXT: .LBB79_2:
-; GFX11-NEXT: s_mov_b32 s63, -1
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr29
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr25
-; GFX11-NEXT: ; implicit-def: $sgpr27
-; GFX11-NEXT: ; implicit-def: $sgpr26
-; GFX11-NEXT: ; implicit-def: $sgpr23
-; GFX11-NEXT: ; implicit-def: $sgpr24
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr22
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB79_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s63, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB79_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s14, s21, 24
-; GFX11-NEXT: s_lshr_b32 s22, s21, 16
-; GFX11-NEXT: s_lshr_b32 s15, s21, 8
-; GFX11-NEXT: s_lshr_b32 s24, s20, 16
-; GFX11-NEXT: s_lshr_b32 s23, s20, 8
-; GFX11-NEXT: s_lshr_b32 s26, s19, 24
-; GFX11-NEXT: s_lshr_b32 s27, s19, 16
-; GFX11-NEXT: s_lshr_b32 s25, s19, 8
-; GFX11-NEXT: s_lshr_b32 s29, s18, 16
-; GFX11-NEXT: s_lshr_b32 s28, s18, 8
-; GFX11-NEXT: s_lshr_b32 s41, s17, 24
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 8
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s44, s16, 8
-; GFX11-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s3, 8
-; GFX11-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-NEXT: s_lshr_b32 s57, s2, 8
-; GFX11-NEXT: s_lshr_b32 s58, s1, 24
-; GFX11-NEXT: s_lshr_b32 s59, s1, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 8
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_lshr_b32 s62, s0, 8
-; GFX11-NEXT: .LBB79_5: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v6, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v7, s56, s10, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v2, s61, s12, v6
-; GFX11-NEXT: v_perm_b32 v4, s59, s58, v6
-; GFX11-NEXT: v_perm_b32 v9, s46, s45, v6
-; GFX11-NEXT: v_perm_b32 v11, s43, s8, v6
-; GFX11-NEXT: v_perm_b32 v1, s0, s62, v6
-; GFX11-NEXT: v_perm_b32 v3, s1, s60, v6
-; GFX11-NEXT: v_perm_b32 v5, s2, s57, v6
-; GFX11-NEXT: v_perm_b32 v8, s3, s47, v6
-; GFX11-NEXT: v_perm_b32 v10, s16, s44, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v12, s24, s4, v6
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v5, v7
-; GFX11-NEXT: v_perm_b32 v7, s42, s41, v6
-; GFX11-NEXT: v_or_b32_e32 v4, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v5, v10, v11
-; GFX11-NEXT: v_perm_b32 v8, s29, s6, v6
-; GFX11-NEXT: v_perm_b32 v11, s27, s26, v6
-; GFX11-NEXT: v_perm_b32 v14, s22, s14, v6
-; GFX11-NEXT: v_perm_b32 v9, s17, s40, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v10, s18, s28, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v13, s19, s25, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v15, s20, s23, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-NEXT: v_perm_b32 v16, s21, s15, v6
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_or_b32_e32 v6, v9, v7
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v8
-; GFX11-NEXT: v_or_b32_e32 v8, v13, v11
-; GFX11-NEXT: v_or_b32_e32 v9, v15, v12
-; GFX11-NEXT: v_or_b32_e32 v10, v16, v14
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off
-; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v5i64_to_v40i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB79_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v8, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s21 :: v_dual_mov_b32 v9, s20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s8 :: v_dual_mov_b32 v32, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s6 :: v_dual_mov_b32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s6 :: v_dual_mov_b32 v36, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s19 :: v_dual_mov_b32 v18, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s17 :: v_dual_mov_b32 v20, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s3 :: v_dual_mov_b32 v28, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s1 :: v_dual_mov_b32 v30, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB79_3
+; GFX11-TRUE16-NEXT: .LBB79_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB79_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB79_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s4, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s21, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s8 :: v_dual_mov_b32 v10, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s10 :: v_dual_mov_b32 v2, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s9 :: v_dual_mov_b32 v4, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s7, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s7 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v14, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v15, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s3 :: v_dual_mov_b32 v28, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s8 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s6 :: v_dual_mov_b32 v32, s3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s1 :: v_dual_mov_b32 v30, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v34, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: .LBB79_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v38, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v30, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v35, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v32, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v33, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v8, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v34
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v30, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v18, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v13, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v9, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v10, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v31
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v28, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v23, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v11, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v6, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v7
+; GFX11-TRUE16-NEXT: s_clause 0x2
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[26:29], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[1:2], off offset:32
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v5i64_to_v40i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s22, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s63, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB79_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB79_3
+; GFX11-FAKE16-NEXT: .LBB79_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s63, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB79_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s63, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB79_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s0, 8
+; GFX11-FAKE16-NEXT: .LBB79_5: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s56, s10, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s61, s12, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s59, s58, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s43, s8, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s62, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s1, s60, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s2, s57, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s3, s47, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s16, s44, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, s24, s4, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v5, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s42, s41, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s29, s6, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s27, s26, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s22, s14, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s17, s40, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s18, s28, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s19, s25, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s20, s23, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s21, s15, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v10, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v13, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v15, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v16, v14
+; GFX11-FAKE16-NEXT: s_clause 0x2
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
index 38a3d781676eff..5db9eb77c52c8c 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
@@ -2343,39 +2343,77 @@ define inreg <4 x i8> @bitcast_i32_to_v4i8_scalar(i32 inreg %a, i32 inreg %b) #0
; GFX9-NEXT: v_mov_b32_e32 v3, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_i32_to_v4i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB21_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s1, s0, 24
-; GFX11-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-NEXT: s_lshr_b32 s3, s0, 8
-; GFX11-NEXT: s_branch .LBB21_3
-; GFX11-NEXT: .LBB21_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr1
-; GFX11-NEXT: .LBB21_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB21_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-NEXT: s_lshr_b32 s1, s0, 24
-; GFX11-NEXT: s_lshr_b32 s3, s0, 8
-; GFX11-NEXT: .LBB21_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s3
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_i32_to_v4i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB21_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s2
+; GFX11-TRUE16-NEXT: s_branch .LBB21_3
+; GFX11-TRUE16-NEXT: .LBB21_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB21_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB21_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB21_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_i32_to_v4i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB21_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB21_3
+; GFX11-FAKE16-NEXT: .LBB21_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr1
+; GFX11-FAKE16-NEXT: .LBB21_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB21_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-FAKE16-NEXT: .LBB21_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -2745,46 +2783,88 @@ define inreg i32 @bitcast_v4i8_to_i32_scalar(<4 x i8> inreg %a, i32 inreg %b) #0
; GFX9-NEXT: .LBB23_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i8_to_i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB23_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: s_branch .LBB23_3
-; GFX11-NEXT: .LBB23_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0
-; GFX11-NEXT: .LBB23_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB23_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v0, s2, s3, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: .LBB23_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i8_to_i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB23_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
+; GFX11-TRUE16-NEXT: s_branch .LBB23_3
+; GFX11-TRUE16-NEXT: .LBB23_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-TRUE16-NEXT: .LBB23_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB23_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: .LBB23_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i8_to_i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB23_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB23_3
+; GFX11-FAKE16-NEXT: .LBB23_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-FAKE16-NEXT: .LBB23_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB23_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: .LBB23_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -4816,39 +4896,74 @@ define inreg <4 x i8> @bitcast_f32_to_v4i8_scalar(float inreg %a, i32 inreg %b)
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_f32_to_v4i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s3, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s2, s0, 24
-; GFX11-NEXT: s_lshr_b32 s1, s0, 16
-; GFX11-NEXT: s_lshr_b32 s4, s0, 8
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s3, -1
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr1
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s3, s3, exec_lo
-; GFX11-NEXT: s_cselect_b32 s3, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s3, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v0, s0, 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v3, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB41_5:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4
-; GFX11-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_f32_to_v4i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s2
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, s0, 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_f32_to_v4i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, s0, 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB41_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -5218,46 +5333,88 @@ define inreg float @bitcast_v4i8_to_f32_scalar(<4 x i8> inreg %a, i32 inreg %b)
; GFX9-NEXT: .LBB43_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i8_to_f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB43_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: s_branch .LBB43_3
-; GFX11-NEXT: .LBB43_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0
-; GFX11-NEXT: .LBB43_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v0, s2, s3, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: .LBB43_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i8_to_f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i8_to_f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB43_3
+; GFX11-FAKE16-NEXT: .LBB43_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-FAKE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: .LBB43_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -6973,39 +7130,74 @@ define inreg <4 x i8> @bitcast_v2i16_to_v4i8_scalar(<2 x i16> inreg %a, i32 inre
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v2i16_to_v4i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s3, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB57_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s2, s0, 24
-; GFX11-NEXT: s_lshr_b32 s1, s0, 16
-; GFX11-NEXT: s_lshr_b32 s4, s0, 8
-; GFX11-NEXT: s_branch .LBB57_3
-; GFX11-NEXT: .LBB57_2:
-; GFX11-NEXT: s_mov_b32 s3, -1
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr1
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: .LBB57_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s3, s3, exec_lo
-; GFX11-NEXT: s_cselect_b32 s3, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s3, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB57_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v3, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB57_5:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4
-; GFX11-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v2i16_to_v4i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB57_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s2
+; GFX11-TRUE16-NEXT: s_branch .LBB57_3
+; GFX11-TRUE16-NEXT: .LBB57_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB57_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v2i16_to_v4i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB57_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB57_3
+; GFX11-FAKE16-NEXT: .LBB57_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: .LBB57_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB57_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB57_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7381,46 +7573,88 @@ define inreg <2 x i16> @bitcast_v4i8_to_v2i16_scalar(<4 x i8> inreg %a, i32 inre
; GFX9-NEXT: .LBB59_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i8_to_v2i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB59_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: s_branch .LBB59_3
-; GFX11-NEXT: .LBB59_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0
-; GFX11-NEXT: .LBB59_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB59_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v0, s2, s3, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: .LBB59_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i8_to_v2i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB59_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
+; GFX11-TRUE16-NEXT: s_branch .LBB59_3
+; GFX11-TRUE16-NEXT: .LBB59_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-TRUE16-NEXT: .LBB59_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i8_to_v2i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB59_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB59_3
+; GFX11-FAKE16-NEXT: .LBB59_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-FAKE16-NEXT: .LBB59_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB59_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: .LBB59_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8758,39 +8992,74 @@ define inreg <4 x i8> @bitcast_v2f16_to_v4i8_scalar(<2 x half> inreg %a, i32 inr
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v2f16_to_v4i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s3, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB69_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s2, s0, 24
-; GFX11-NEXT: s_lshr_b32 s1, s0, 16
-; GFX11-NEXT: s_lshr_b32 s4, s0, 8
-; GFX11-NEXT: s_branch .LBB69_3
-; GFX11-NEXT: .LBB69_2:
-; GFX11-NEXT: s_mov_b32 s3, -1
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr1
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: .LBB69_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s3, s3, exec_lo
-; GFX11-NEXT: s_cselect_b32 s3, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s3, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB69_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v3, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB69_5:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4
-; GFX11-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v2f16_to_v4i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s2
+; GFX11-TRUE16-NEXT: s_branch .LBB69_3
+; GFX11-TRUE16-NEXT: .LBB69_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-TRUE16-NEXT: .LBB69_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v2f16_to_v4i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB69_3
+; GFX11-FAKE16-NEXT: .LBB69_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB69_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -9166,46 +9435,88 @@ define inreg <2 x half> @bitcast_v4i8_to_v2f16_scalar(<4 x i8> inreg %a, i32 inr
; GFX9-NEXT: .LBB71_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i8_to_v2f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB71_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: s_branch .LBB71_3
-; GFX11-NEXT: .LBB71_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0
-; GFX11-NEXT: .LBB71_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB71_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v0, s2, s3, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: .LBB71_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i8_to_v2f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
+; GFX11-TRUE16-NEXT: s_branch .LBB71_3
+; GFX11-TRUE16-NEXT: .LBB71_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-TRUE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: .LBB71_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i8_to_v2f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB71_3
+; GFX11-FAKE16-NEXT: .LBB71_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-FAKE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: .LBB71_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -10215,27 +10526,31 @@ define inreg <4 x i8> @bitcast_v2bf16_to_v4i8_scalar(<2 x bfloat> inreg %a, i32
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB77_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s2
; GFX11-TRUE16-NEXT: s_branch .LBB77_3
; GFX11-TRUE16-NEXT: .LBB77_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr3
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr1
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: .LBB77_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB77_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s0, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
@@ -10253,19 +10568,14 @@ define inreg <4 x i8> @bitcast_v2bf16_to_v4i8_scalar(<2 x bfloat> inreg %a, i32
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-; GFX11-TRUE16-NEXT: .LBB77_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v1, s3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX11-TRUE16-NEXT: .LBB77_5: ; %end
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v2bf16_to_v4i8_scalar:
@@ -10692,46 +11002,88 @@ define inreg <2 x bfloat> @bitcast_v4i8_to_v2bf16_scalar(<4 x i8> inreg %a, i32
; GFX9-NEXT: .LBB79_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i8_to_v2bf16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB79_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: s_branch .LBB79_3
-; GFX11-NEXT: .LBB79_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0
-; GFX11-NEXT: .LBB79_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB79_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v0, s2, s3, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: .LBB79_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i8_to_v2bf16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB79_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
+; GFX11-TRUE16-NEXT: s_branch .LBB79_3
+; GFX11-TRUE16-NEXT: .LBB79_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-TRUE16-NEXT: .LBB79_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB79_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: .LBB79_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i8_to_v2bf16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB79_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB79_3
+; GFX11-FAKE16-NEXT: .LBB79_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-FAKE16-NEXT: .LBB79_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB79_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: .LBB79_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11017,39 +11369,77 @@ define inreg <4 x i8> @bitcast_v1i32_to_v4i8_scalar(<1 x i32> inreg %a, i32 inre
; GFX9-NEXT: v_mov_b32_e32 v3, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v1i32_to_v4i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s1, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB81_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s1, s0, 24
-; GFX11-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-NEXT: s_lshr_b32 s3, s0, 8
-; GFX11-NEXT: s_branch .LBB81_3
-; GFX11-NEXT: .LBB81_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr1
-; GFX11-NEXT: .LBB81_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB81_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-NEXT: s_lshr_b32 s1, s0, 24
-; GFX11-NEXT: s_lshr_b32 s3, s0, 8
-; GFX11-NEXT: .LBB81_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s3
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v1i32_to_v4i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB81_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s2
+; GFX11-TRUE16-NEXT: s_branch .LBB81_3
+; GFX11-TRUE16-NEXT: .LBB81_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: .LBB81_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB81_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB81_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v1i32_to_v4i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB81_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB81_3
+; GFX11-FAKE16-NEXT: .LBB81_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr1
+; GFX11-FAKE16-NEXT: .LBB81_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB81_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s0, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-FAKE16-NEXT: .LBB81_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11419,46 +11809,88 @@ define inreg <1 x i32> @bitcast_v4i8_to_v1i32_scalar(<4 x i8> inreg %a, i32 inre
; GFX9-NEXT: .LBB83_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i8_to_v1i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s16, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB83_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-NEXT: v_perm_b32 v0, s0, s1, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-NEXT: s_branch .LBB83_3
-; GFX11-NEXT: .LBB83_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0
-; GFX11-NEXT: .LBB83_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB83_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v0, s2, s3, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: .LBB83_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i8_to_v1i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB83_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
+; GFX11-TRUE16-NEXT: s_branch .LBB83_3
+; GFX11-TRUE16-NEXT: .LBB83_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-TRUE16-NEXT: .LBB83_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB83_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: .LBB83_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i8_to_v1i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s16, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB83_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB83_3
+; GFX11-FAKE16-NEXT: .LBB83_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0
+; GFX11-FAKE16-NEXT: .LBB83_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB83_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: .LBB83_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
index ffff9da12fe9fe..bb93d11566dc08 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
@@ -144,39 +144,38 @@ define <3 x half> @bitcast_v3bf16_to_v3f16(<3 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB0_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_lshlrev_b32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0x7fc0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
; GFX11-TRUE16-NEXT: .LBB0_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -406,40 +405,39 @@ define inreg <3 x half> @bitcast_v3bf16_to_v3f16_scalar(<3 x bfloat> inreg %a, i
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB1_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v0, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v3, v7 :: v_dual_add_nc_u32 v4, v4, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v4, v6 :: v_dual_add_nc_u32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 0x7fc0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB1_4:
@@ -906,38 +904,39 @@ define <3 x i16> @bitcast_v3bf16_to_v3i16(<3 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB4_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v5, v6, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v3, v7 :: v_dual_mov_b32 v3, 0x7fc0
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, 0x7fc0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
; GFX11-TRUE16-NEXT: .LBB4_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -1164,38 +1163,37 @@ define inreg <3 x i16> @bitcast_v3bf16_to_v3i16_scalar(<3 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB5_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s0, 16
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v0, 16, s0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v7 :: v_dual_add_nc_u32 v4, v4, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v3, v6 :: v_dual_add_nc_u32 v4, v4, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 0x7fc0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v4, v8 :: v_dual_mov_b32 v4, 0x7fc0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB5_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -1330,7 +1328,7 @@ define <3 x bfloat> @bitcast_v3i16_to_v3bf16(<3 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: ; %bb.1: ; %cmp.true
-; GFX9-NEXT: v_pk_add_u16 v1, v1, 3
+; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: ; %bb.2: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -1345,7 +1343,7 @@ define <3 x bfloat> @bitcast_v3i16_to_v3bf16(<3 x i16> %a, i32 %b) #0 {
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v1, v1, 3
+; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-NEXT: ; %bb.2: ; %end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
@@ -1452,7 +1450,7 @@ define inreg <3 x bfloat> @bitcast_v3i16_to_v3bf16_scalar(<3 x i16> inreg %a, i3
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB7_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_pk_add_u16 v1, s17, 3
+; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_setpc_b64 s[30:31]
; GFX9-NEXT: .LBB7_5:
@@ -1475,7 +1473,7 @@ define inreg <3 x bfloat> @bitcast_v3i16_to_v3bf16_scalar(<3 x i16> inreg %a, i3
; GFX11-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB7_4
; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3
+; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT: s_setpc_b64 s[30:31]
; GFX11-NEXT: .LBB7_4:
@@ -1789,7 +1787,7 @@ define <3 x half> @bitcast_v3i16_to_v3f16(<3 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: ; %bb.1: ; %cmp.true
-; GFX9-NEXT: v_pk_add_u16 v1, v1, 3
+; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT: ; %bb.2: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -1804,7 +1802,7 @@ define <3 x half> @bitcast_v3i16_to_v3f16(<3 x i16> %a, i32 %b) #0 {
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v1, v1, 3
+; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-NEXT: ; %bb.2: ; %end
; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0
@@ -1912,7 +1910,7 @@ define inreg <3 x half> @bitcast_v3i16_to_v3f16_scalar(<3 x i16> inreg %a, i32 i
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB11_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_pk_add_u16 v1, s17, 3
+; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_setpc_b64 s[30:31]
; GFX9-NEXT: .LBB11_5:
@@ -1935,7 +1933,7 @@ define inreg <3 x half> @bitcast_v3i16_to_v3f16_scalar(<3 x i16> inreg %a, i32 i
; GFX11-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB11_4
; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3
+; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT: s_setpc_b64 s[30:31]
; GFX11-NEXT: .LBB11_4:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index 280a0f17a4bc8a..a9c900e1c56451 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -11301,281 +11301,642 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16i32_to_v64i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_xor_saveexec_b32 s4, -1
-; GFX11-NEXT: scratch_store_b32 off, v23, s32 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v23, s34, 0
-; GFX11-NEXT: v_writelane_b32 v23, s35, 1
-; GFX11-NEXT: v_writelane_b32 v23, s36, 2
-; GFX11-NEXT: v_writelane_b32 v23, s37, 3
-; GFX11-NEXT: v_writelane_b32 v23, s38, 4
-; GFX11-NEXT: v_writelane_b32 v23, s39, 5
-; GFX11-NEXT: v_writelane_b32 v23, s48, 6
-; GFX11-NEXT: v_writelane_b32 v23, s30, 7
-; GFX11-NEXT: v_writelane_b32 v23, s31, 8
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s48, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB25_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s27, 8
-; GFX11-NEXT: s_lshr_b32 s46, s26, 16
-; GFX11-NEXT: s_lshr_b32 s45, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s47, s25, 8
-; GFX11-NEXT: s_lshr_b32 s59, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s60, s23, 8
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s21, 8
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s76, s20, 8
-; GFX11-NEXT: s_lshr_b32 s78, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s19, 8
-; GFX11-NEXT: s_lshr_b32 s90, s18, 16
-; GFX11-NEXT: s_lshr_b32 s89, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s91, s17, 8
-; GFX11-NEXT: s_lshr_b32 s95, s16, 16
-; GFX11-NEXT: s_lshr_b32 s94, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB25_3
-; GFX11-NEXT: .LBB25_2:
-; GFX11-NEXT: s_mov_b32 s48, -1
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr95
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: .LBB25_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s48, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB25_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s27, 8
-; GFX11-NEXT: s_lshr_b32 s46, s26, 16
-; GFX11-NEXT: s_lshr_b32 s45, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s47, s25, 8
-; GFX11-NEXT: s_lshr_b32 s59, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s60, s23, 8
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s21, 8
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s76, s20, 8
-; GFX11-NEXT: s_lshr_b32 s78, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s19, 8
-; GFX11-NEXT: s_lshr_b32 s90, s18, 16
-; GFX11-NEXT: s_lshr_b32 s89, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s91, s17, 8
-; GFX11-NEXT: s_lshr_b32 s95, s16, 16
-; GFX11-NEXT: s_lshr_b32 s94, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: .LBB25_5: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v12, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s48, v23, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s31, s28, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v2, s38, s40, v12
-; GFX11-NEXT: v_perm_b32 v4, s36, s35, v12
-; GFX11-NEXT: v_perm_b32 v1, s0, s39, v12
-; GFX11-NEXT: v_perm_b32 v3, s1, s37, v12
-; GFX11-NEXT: v_perm_b32 v6, s2, s34, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v8, vcc_hi, vcc_lo, v12
-; GFX11-NEXT: v_perm_b32 v9, s95, s14, v12
-; GFX11-NEXT: v_perm_b32 v10, s17, s91, v12
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v6, v5
-; GFX11-NEXT: v_perm_b32 v5, s93, s92, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX11-NEXT: v_perm_b32 v6, s16, s94, v12
-; GFX11-NEXT: v_perm_b32 v8, s90, s12, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX11-NEXT: v_perm_b32 v7, s3, s30, v12
-; GFX11-NEXT: v_perm_b32 v13, s18, s89, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_or_b32_e32 v5, v6, v9
-; GFX11-NEXT: v_perm_b32 v9, s88, s78, v12
-; GFX11-NEXT: v_or_b32_e32 v6, v10, v11
-; GFX11-NEXT: v_perm_b32 v10, s77, s10, v12
-; GFX11-NEXT: v_perm_b32 v11, s75, s74, v12
-; GFX11-NEXT: v_perm_b32 v14, s72, s8, v12
-; GFX11-NEXT: v_or_b32_e32 v4, v7, v4
-; GFX11-NEXT: v_or_b32_e32 v7, v13, v8
-; GFX11-NEXT: v_perm_b32 v8, s19, s79, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v13, s20, s76, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v15, s21, s73, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v16, s22, s63, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v9, v13, v10
-; GFX11-NEXT: v_perm_b32 v13, s62, s61, v12
-; GFX11-NEXT: v_or_b32_e32 v10, v15, v11
-; GFX11-NEXT: v_or_b32_e32 v11, v16, v14
-; GFX11-NEXT: v_perm_b32 v14, s59, s6, v12
-; GFX11-NEXT: v_perm_b32 v17, s57, s56, v12
-; GFX11-NEXT: v_perm_b32 v18, s46, s4, v12
-; GFX11-NEXT: v_perm_b32 v20, s44, s42, v12
-; GFX11-NEXT: v_perm_b32 v15, s23, s60, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_perm_b32 v16, s24, s58, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v19, s25, s47, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v21, s26, s45, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v22, s27, s43, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-NEXT: v_or_b32_e32 v12, v15, v13
-; GFX11-NEXT: v_or_b32_e32 v13, v16, v14
-; GFX11-NEXT: v_or_b32_e32 v14, v19, v17
-; GFX11-NEXT: v_or_b32_e32 v15, v21, v18
-; GFX11-NEXT: v_or_b32_e32 v16, v22, v20
-; GFX11-NEXT: v_readlane_b32 s30, v23, 7
-; GFX11-NEXT: s_clause 0x3
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off
-; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v23, 8
-; GFX11-NEXT: v_readlane_b32 s39, v23, 5
-; GFX11-NEXT: v_readlane_b32 s38, v23, 4
-; GFX11-NEXT: v_readlane_b32 s37, v23, 3
-; GFX11-NEXT: v_readlane_b32 s36, v23, 2
-; GFX11-NEXT: v_readlane_b32 s35, v23, 1
-; GFX11-NEXT: v_readlane_b32 s34, v23, 0
-; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
-; GFX11-NEXT: scratch_load_b32 v23, off, s32 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16i32_to_v64i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s5 :: v_dual_mov_b32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s5 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s5 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v53, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s6 :: v_dual_mov_b32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s6 :: v_dual_mov_b32 v83, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v85, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v87, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s5 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s6 :: v_dual_mov_b32 v19, s26
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s8 :: v_dual_mov_b32 v23, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s6 :: v_dual_mov_b32 v18, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s24 :: v_dual_mov_b32 v28, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s22 :: v_dual_mov_b32 v32, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s19 :: v_dual_mov_b32 v36, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s17 :: v_dual_mov_b32 v50, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s3 :: v_dual_mov_b32 v68, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s1 :: v_dual_mov_b32 v70, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB25_3
+; GFX11-TRUE16-NEXT: .LBB25_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s26, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s22, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s24, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[16:17], s[14:15], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s18, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s20, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[18:19], s[12:13], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[16:17], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s18
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[18:19], s[8:9], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[16:17], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s18
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[18:19], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s16 :: v_dual_mov_b32 v35, s18
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[16:17], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[18:19], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s16 :: v_dual_mov_b32 v54, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s15, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s13 :: v_dual_mov_b32 v28, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s16 :: v_dual_mov_b32 v6, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s14, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s1 :: v_dual_mov_b32 v4, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v32, s9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s10 :: v_dual_mov_b32 v36, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s11, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v10, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v50, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s11 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s7, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v68, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s9 :: v_dual_mov_b32 v38, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s4 :: v_dual_mov_b32 v70, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s6 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s5 :: v_dual_mov_b32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s3 :: v_dual_mov_b32 v2, s17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s4 :: v_dual_mov_b32 v80, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s3 :: v_dual_mov_b32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s2 :: v_dual_mov_b32 v84, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s2 :: v_dual_mov_b32 v85, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s12 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s1 :: v_dual_mov_b32 v87, s0
+; GFX11-TRUE16-NEXT: .LBB25_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v96, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v82, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v38, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v84, v86, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v70, v70, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-TRUE16-NEXT: v_perm_b32 v83, v68, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v71, v80, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v66, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v64, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v50, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v34, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v29, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v25, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v14, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v8, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v69, v69, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v84
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v68, v70, v54
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v70, v83, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v67, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v55, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v51, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v52
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v50, v50, v30
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v39, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v33
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v36, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v32, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v31, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v28, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v27, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v23, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v18, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v69, v69, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v71, v49, v54
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, v55, v35
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, v38, v51
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, v30, v29
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v25, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v22, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v17, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v12, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v10
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[68:71], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[48:51], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[20:23], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16i32_to_v64i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v23, s32 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s31, 8
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s48, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB25_3
+; GFX11-FAKE16-NEXT: .LBB25_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s48, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s48, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-FAKE16-NEXT: .LBB25_5: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v23, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s31, s28, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s38, s40, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s36, s35, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s39, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s1, s37, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s2, s34, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, vcc_hi, vcc_lo, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s95, s14, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s17, s91, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s93, s92, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s16, s94, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s90, s12, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s3, s30, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s18, s89, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s88, s78, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s77, s10, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s75, s74, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s72, s8, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v7, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v13, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s19, s79, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s20, s76, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s21, s73, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s22, s63, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v13, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s62, s61, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s59, s6, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, s57, s56, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, s46, s4, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, s44, s42, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s23, s60, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s24, s58, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, s25, s47, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, s26, s45, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, s27, s43, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v15, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v19, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v22, v20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v23, 7
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v23, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v23, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v23, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v23, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v23, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v23, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v23, 0
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v23, off, s32 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -14929,15 +15290,15 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v116, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:20
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:12
@@ -14945,268 +15306,300 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s7 :: v_dual_mov_b32 v69, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s4 :: v_dual_mov_b32 v70, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s6 :: v_dual_mov_b32 v71, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v86, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s7 :: v_dual_mov_b32 v85, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s8 :: v_dual_mov_b32 v84, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s26 :: v_dual_mov_b32 v96, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s24 :: v_dual_mov_b32 v98, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s23 :: v_dual_mov_b32 v112, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s20 :: v_dual_mov_b32 v100, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s17 :: v_dual_mov_b32 v102, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s16 :: v_dual_mov_b32 v114, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_mov_b32 v118, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v116
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB27_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v37, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v33, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v52, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v36, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v118, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v114, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v112, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v119, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v117, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v113, v100, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v97, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v87, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v83, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v101, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v96, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v86, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v66, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v24, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v22, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v65, v54, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v18, v16, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v23, v20, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v27, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v12
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v130, v34, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v28, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v30, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v52, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v19, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
+; GFX11-TRUE16-NEXT: v_perm_b32 v132, v36, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v129, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v131, v128
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v132, v130
; GFX11-TRUE16-NEXT: s_branch .LBB27_3
; GFX11-TRUE16-NEXT: .LBB27_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB27_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB27_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v112
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v96
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v87
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v86
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s74, s73, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s62, s61, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s58, s57, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v71
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v53
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v30
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v52
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v48
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v38
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v33
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s6, s5, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v25, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff, v19
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v12, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v17, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v19, v20
; GFX11-TRUE16-NEXT: .LBB27_5: ; %end
@@ -26463,314 +26856,624 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v16f32_to_v64i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v40, s34, 0
-; GFX11-NEXT: v_writelane_b32 v40, s35, 1
-; GFX11-NEXT: v_writelane_b32 v40, s36, 2
-; GFX11-NEXT: v_writelane_b32 v40, s37, 3
-; GFX11-NEXT: v_writelane_b32 v40, s38, 4
-; GFX11-NEXT: v_writelane_b32 v40, s39, 5
-; GFX11-NEXT: v_writelane_b32 v40, s48, 6
-; GFX11-NEXT: v_writelane_b32 v40, s30, 7
-; GFX11-NEXT: v_writelane_b32 v40, s31, 8
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB49_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 8
-; GFX11-NEXT: s_lshr_b32 s45, s26, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s59, s25, 8
-; GFX11-NEXT: s_lshr_b32 s58, s24, 16
-; GFX11-NEXT: s_lshr_b32 s60, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s72, s23, 8
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s73, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s21, 8
-; GFX11-NEXT: s_lshr_b32 s76, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s90, s19, 8
-; GFX11-NEXT: s_lshr_b32 s89, s18, 16
-; GFX11-NEXT: s_lshr_b32 s91, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s95, s17, 8
-; GFX11-NEXT: s_lshr_b32 s94, s16, 16
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
-; GFX11-NEXT: s_lshr_b32 s30, s3, 16
-; GFX11-NEXT: s_lshr_b32 s34, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s35, s2, 8
-; GFX11-NEXT: s_lshr_b32 s36, s1, 24
-; GFX11-NEXT: s_lshr_b32 s37, s1, 16
-; GFX11-NEXT: s_lshr_b32 s39, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s48, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB49_3
-; GFX11-NEXT: .LBB49_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr95
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: .LBB49_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB49_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v4, s25, 1.0
-; GFX11-NEXT: v_add_f32_e64 v3, s24, 1.0
-; GFX11-NEXT: v_add_f32_e64 v6, s23, 1.0
-; GFX11-NEXT: v_add_f32_e64 v5, s22, 1.0
-; GFX11-NEXT: v_add_f32_e64 v8, s21, 1.0
-; GFX11-NEXT: v_add_f32_e64 v7, s20, 1.0
-; GFX11-NEXT: v_add_f32_e64 v10, s19, 1.0
-; GFX11-NEXT: v_add_f32_e64 v9, s18, 1.0
-; GFX11-NEXT: v_add_f32_e64 v12, s17, 1.0
-; GFX11-NEXT: v_add_f32_e64 v11, s16, 1.0
-; GFX11-NEXT: v_add_f32_e64 v14, s3, 1.0
-; GFX11-NEXT: v_add_f32_e64 v13, s2, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[3:4]
-; GFX11-NEXT: v_add_f32_e64 v18, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v17, s0, 1.0
-; GFX11-NEXT: v_add_f32_e64 v2, s27, 1.0
-; GFX11-NEXT: v_add_f32_e64 v1, s26, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v51, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v50, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v52, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v49, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v64, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v69, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v68, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v65, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v70, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v67, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 8, v17
-; GFX11-NEXT: s_branch .LBB49_6
-; GFX11-NEXT: .LBB49_5:
-; GFX11-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1
-; GFX11-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s3
-; GFX11-NEXT: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
-; GFX11-NEXT: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, s19
-; GFX11-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v8, s21
-; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
-; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
-; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
-; GFX11-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
-; GFX11-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
-; GFX11-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
-; GFX11-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
-; GFX11-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
-; GFX11-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
-; GFX11-NEXT: v_dual_mov_b32 v69, s92 :: v_dual_mov_b32 v64, s91
-; GFX11-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v53, s90
-; GFX11-NEXT: v_dual_mov_b32 v54, s88 :: v_dual_mov_b32 v55, s79
-; GFX11-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v52, s76
-; GFX11-NEXT: v_dual_mov_b32 v39, s77 :: v_dual_mov_b32 v50, s75
-; GFX11-NEXT: v_dual_mov_b32 v51, s74 :: v_dual_mov_b32 v38, s73
-; GFX11-NEXT: v_dual_mov_b32 v48, s63 :: v_dual_mov_b32 v37, s61
-; GFX11-NEXT: v_dual_mov_b32 v34, s72 :: v_dual_mov_b32 v33, s60
-; GFX11-NEXT: v_dual_mov_b32 v36, s62 :: v_dual_mov_b32 v35, s58
-; GFX11-NEXT: v_dual_mov_b32 v29, s59 :: v_dual_mov_b32 v32, s56
-; GFX11-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v26, s47
-; GFX11-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v27, s44
-; GFX11-NEXT: v_dual_mov_b32 v16, s46 :: v_dual_mov_b32 v15, s40
-; GFX11-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v19, s28
-; GFX11-NEXT: v_dual_mov_b32 v20, s14 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: .LBB49_6: ; %end
-; GFX11-NEXT: v_perm_b32 v86, v86, v87, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v24, v84, v24, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v96, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v18, v83, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v13, v82, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v83, 16, v86
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v85, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-NEXT: v_perm_b32 v84, v80, v81, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v66, v22, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v81, v18, v83
-; GFX11-NEXT: v_or_b32_e32 v82, v13, v24
-; GFX11-NEXT: v_perm_b32 v13, v14, v71, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v70, v23, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v68, v69, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v80, v17, v25
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v84
-; GFX11-NEXT: v_perm_b32 v9, v9, v64, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v11, v11, v67, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v83, v13, v17
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v22
-; GFX11-NEXT: v_perm_b32 v9, v10, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v52, v21, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v54, v55, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v18
-; GFX11-NEXT: v_perm_b32 v17, v50, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v48, v20, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v39, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v5, v5, v38, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v36, v37, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v17
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v18
-; GFX11-NEXT: v_perm_b32 v5, v35, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v17, v31, v32, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v30, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v27, v28, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v34, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v3, v3, v33, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v19, v1, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v16, v2, v16, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v17
-; GFX11-NEXT: v_or_b32_e32 v3, v19, v15
-; GFX11-NEXT: v_or_b32_e32 v4, v16, v18
-; GFX11-NEXT: v_readlane_b32 s30, v40, 7
-; GFX11-NEXT: s_clause 0x3
-; GFX11-NEXT: scratch_store_b128 v0, v[80:83], off
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v40, 8
-; GFX11-NEXT: v_readlane_b32 s48, v40, 6
-; GFX11-NEXT: v_readlane_b32 s39, v40, 5
-; GFX11-NEXT: v_readlane_b32 s38, v40, 4
-; GFX11-NEXT: v_readlane_b32 s37, v40, 3
-; GFX11-NEXT: v_readlane_b32 s36, v40, 2
-; GFX11-NEXT: v_readlane_b32 s35, v40, 1
-; GFX11-NEXT: v_readlane_b32 s34, v40, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v16f32_to_v64i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v37, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s5 :: v_dual_mov_b32 v69, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v80, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v82, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s5 :: v_dual_mov_b32 v87, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v3, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v14, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s6 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s8 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s25 :: v_dual_mov_b32 v7, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s23 :: v_dual_mov_b32 v9, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s21 :: v_dual_mov_b32 v11, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s19 :: v_dual_mov_b32 v16, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s17 :: v_dual_mov_b32 v18, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s3 :: v_dual_mov_b32 v22, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s1 :: v_dual_mov_b32 v26, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB49_3
+; GFX11-TRUE16-NEXT: .LBB49_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s3, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s2, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, s23, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, s22, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s0, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s17, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s16, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s19, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, s21, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, s25, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, s27, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, s26, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, s24, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, s20, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s18, 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[22:23]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[16:17]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[26:27]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 24, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v26
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v96, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v52, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v64, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v22, v28
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v23, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v70, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v26, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v68, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v38, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v64, v18, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v54, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v85, v86, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v71, v80, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v65, v19, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v66, v16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v17, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v50, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v9, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v34, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v32, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v25, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v6, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v85
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v67, v16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v22, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v15
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[26:29], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[64:67], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v16f32_to_v64i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 8
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB49_3
+; GFX11-FAKE16-NEXT: .LBB49_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, s25, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, s24, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, s23, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, s22, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, s21, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, s20, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, s19, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, s18, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, s17, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, s16, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, s3, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, s2, 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, s0, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, s27, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, s26, 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v17
+; GFX11-FAKE16-NEXT: s_branch .LBB49_6
+; GFX11-FAKE16-NEXT: .LBB49_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v8, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s92 :: v_dual_mov_b32 v64, s91
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v53, s90
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s88 :: v_dual_mov_b32 v55, s79
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v52, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s77 :: v_dual_mov_b32 v50, s75
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s74 :: v_dual_mov_b32 v38, s73
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s63 :: v_dual_mov_b32 v37, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s72 :: v_dual_mov_b32 v33, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s62 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s59 :: v_dual_mov_b32 v32, s56
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v26, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v27, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s46 :: v_dual_mov_b32 v15, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v19, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s14 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: .LBB49_6: ; %end
+; GFX11-FAKE16-NEXT: v_perm_b32 v86, v86, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v84, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v83, 16, v86
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v80, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v66, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v81, v18, v83
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v82, v13, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v70, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v68, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v80, v17, v25
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v84
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v83, v13, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v52, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v54, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v50, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v48, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v36, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v35, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v31, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v30, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v27, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v1, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v2, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v19, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v16, v18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 7
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[80:83], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v40, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v40, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v40, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v40, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v40, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v40, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v40, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -30124,15 +30827,15 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v116, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:20
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:12
@@ -30140,268 +30843,300 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s7 :: v_dual_mov_b32 v69, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s4 :: v_dual_mov_b32 v70, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s6 :: v_dual_mov_b32 v71, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v86, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s7 :: v_dual_mov_b32 v85, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s8 :: v_dual_mov_b32 v84, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s26 :: v_dual_mov_b32 v96, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s24 :: v_dual_mov_b32 v98, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s23 :: v_dual_mov_b32 v112, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s20 :: v_dual_mov_b32 v100, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s17 :: v_dual_mov_b32 v102, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s16 :: v_dual_mov_b32 v114, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_mov_b32 v118, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v116
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v37, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v33, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v52, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v36, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v118, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v114, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v112, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v119, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v117, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v113, v100, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v97, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v87, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v83, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v101, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v96, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v86, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v66, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v24, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v22, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v65, v54, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v18, v16, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v23, v20, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v27, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v12
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v130, v34, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v28, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v30, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v52, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v19, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
+; GFX11-TRUE16-NEXT: v_perm_b32 v132, v36, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v129, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v131, v128
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v132, v130
; GFX11-TRUE16-NEXT: s_branch .LBB51_3
; GFX11-TRUE16-NEXT: .LBB51_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v112
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v96
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v87
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v86
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s74, s73, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s62, s61, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s58, s57, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v71
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v53
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v30
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v52
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v48
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v38
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v33
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s6, s5, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v25, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff, v19
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v12, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v17, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v19, v20
; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
@@ -40569,281 +41304,643 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i64_to_v64i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_xor_saveexec_b32 s4, -1
-; GFX11-NEXT: scratch_store_b32 off, v23, s32 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v23, s34, 0
-; GFX11-NEXT: v_writelane_b32 v23, s35, 1
-; GFX11-NEXT: v_writelane_b32 v23, s36, 2
-; GFX11-NEXT: v_writelane_b32 v23, s37, 3
-; GFX11-NEXT: v_writelane_b32 v23, s38, 4
-; GFX11-NEXT: v_writelane_b32 v23, s39, 5
-; GFX11-NEXT: v_writelane_b32 v23, s48, 6
-; GFX11-NEXT: v_writelane_b32 v23, s30, 7
-; GFX11-NEXT: v_writelane_b32 v23, s31, 8
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s48, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB69_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s27, 8
-; GFX11-NEXT: s_lshr_b32 s46, s26, 16
-; GFX11-NEXT: s_lshr_b32 s45, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s47, s25, 8
-; GFX11-NEXT: s_lshr_b32 s59, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s60, s23, 8
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s21, 8
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s76, s20, 8
-; GFX11-NEXT: s_lshr_b32 s78, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s19, 8
-; GFX11-NEXT: s_lshr_b32 s90, s18, 16
-; GFX11-NEXT: s_lshr_b32 s89, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s91, s17, 8
-; GFX11-NEXT: s_lshr_b32 s95, s16, 16
-; GFX11-NEXT: s_lshr_b32 s94, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB69_3
-; GFX11-NEXT: .LBB69_2:
-; GFX11-NEXT: s_mov_b32 s48, -1
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr95
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: .LBB69_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s48, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB69_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s27, 8
-; GFX11-NEXT: s_lshr_b32 s46, s26, 16
-; GFX11-NEXT: s_lshr_b32 s45, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s47, s25, 8
-; GFX11-NEXT: s_lshr_b32 s59, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s60, s23, 8
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s21, 8
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s76, s20, 8
-; GFX11-NEXT: s_lshr_b32 s78, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s19, 8
-; GFX11-NEXT: s_lshr_b32 s90, s18, 16
-; GFX11-NEXT: s_lshr_b32 s89, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s91, s17, 8
-; GFX11-NEXT: s_lshr_b32 s95, s16, 16
-; GFX11-NEXT: s_lshr_b32 s94, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: .LBB69_5: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v12, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s48, v23, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s31, s28, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v2, s38, s40, v12
-; GFX11-NEXT: v_perm_b32 v4, s36, s35, v12
-; GFX11-NEXT: v_perm_b32 v1, s0, s39, v12
-; GFX11-NEXT: v_perm_b32 v3, s1, s37, v12
-; GFX11-NEXT: v_perm_b32 v6, s2, s34, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_perm_b32 v8, vcc_hi, vcc_lo, v12
-; GFX11-NEXT: v_perm_b32 v9, s95, s14, v12
-; GFX11-NEXT: v_perm_b32 v10, s17, s91, v12
-; GFX11-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v3, v6, v5
-; GFX11-NEXT: v_perm_b32 v5, s93, s92, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX11-NEXT: v_perm_b32 v6, s16, s94, v12
-; GFX11-NEXT: v_perm_b32 v8, s90, s12, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX11-NEXT: v_perm_b32 v7, s3, s30, v12
-; GFX11-NEXT: v_perm_b32 v13, s18, s89, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_or_b32_e32 v5, v6, v9
-; GFX11-NEXT: v_perm_b32 v9, s88, s78, v12
-; GFX11-NEXT: v_or_b32_e32 v6, v10, v11
-; GFX11-NEXT: v_perm_b32 v10, s77, s10, v12
-; GFX11-NEXT: v_perm_b32 v11, s75, s74, v12
-; GFX11-NEXT: v_perm_b32 v14, s72, s8, v12
-; GFX11-NEXT: v_or_b32_e32 v4, v7, v4
-; GFX11-NEXT: v_or_b32_e32 v7, v13, v8
-; GFX11-NEXT: v_perm_b32 v8, s19, s79, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v13, s20, s76, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v15, s21, s73, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_perm_b32 v16, s22, s63, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v9, v13, v10
-; GFX11-NEXT: v_perm_b32 v13, s62, s61, v12
-; GFX11-NEXT: v_or_b32_e32 v10, v15, v11
-; GFX11-NEXT: v_or_b32_e32 v11, v16, v14
-; GFX11-NEXT: v_perm_b32 v14, s59, s6, v12
-; GFX11-NEXT: v_perm_b32 v17, s57, s56, v12
-; GFX11-NEXT: v_perm_b32 v18, s46, s4, v12
-; GFX11-NEXT: v_perm_b32 v20, s44, s42, v12
-; GFX11-NEXT: v_perm_b32 v15, s23, s60, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_perm_b32 v16, s24, s58, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v19, s25, s47, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v21, s26, s45, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v22, s27, s43, v12
-; GFX11-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-NEXT: v_or_b32_e32 v12, v15, v13
-; GFX11-NEXT: v_or_b32_e32 v13, v16, v14
-; GFX11-NEXT: v_or_b32_e32 v14, v19, v17
-; GFX11-NEXT: v_or_b32_e32 v15, v21, v18
-; GFX11-NEXT: v_or_b32_e32 v16, v22, v20
-; GFX11-NEXT: v_readlane_b32 s30, v23, 7
-; GFX11-NEXT: s_clause 0x3
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off
-; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v23, 8
-; GFX11-NEXT: v_readlane_b32 s39, v23, 5
-; GFX11-NEXT: v_readlane_b32 s38, v23, 4
-; GFX11-NEXT: v_readlane_b32 s37, v23, 3
-; GFX11-NEXT: v_readlane_b32 s36, v23, 2
-; GFX11-NEXT: v_readlane_b32 s35, v23, 1
-; GFX11-NEXT: v_readlane_b32 s34, v23, 0
-; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
-; GFX11-NEXT: scratch_load_b32 v23, off, s32 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i64_to_v64i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s5 :: v_dual_mov_b32 v7, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s5 :: v_dual_mov_b32 v9, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s5 :: v_dual_mov_b32 v13, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s27 :: v_dual_mov_b32 v18, s25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s6 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v50, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v54, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s5 :: v_dual_mov_b32 v71, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s5 :: v_dual_mov_b32 v83, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s8 :: v_dual_mov_b32 v85, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s6 :: v_dual_mov_b32 v96, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s26 :: v_dual_mov_b32 v24, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s24 :: v_dual_mov_b32 v28, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s21 :: v_dual_mov_b32 v30, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s19 :: v_dual_mov_b32 v35, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s17 :: v_dual_mov_b32 v48, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s3 :: v_dual_mov_b32 v64, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s2 :: v_dual_mov_b32 v66, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB69_3
+; GFX11-TRUE16-NEXT: .LBB69_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s4, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s27, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s14 :: v_dual_mov_b32 v18, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s15 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s16 :: v_dual_mov_b32 v2, s17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s18, s15, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[16:17], s[14:15], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s14, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s12 :: v_dual_mov_b32 v28, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s16 :: v_dual_mov_b32 v6, s14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s16 :: v_dual_mov_b32 v10, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s11, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v12, s12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s11, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v16, s10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s9 :: v_dual_mov_b32 v30, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s12 :: v_dual_mov_b32 v19, s10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s7, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s10 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s9
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v48, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s6 :: v_dual_mov_b32 v50, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s3 :: v_dual_mov_b32 v64, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s2 :: v_dual_mov_b32 v66, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s6 :: v_dual_mov_b32 v68, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s3 :: v_dual_mov_b32 v80, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s4 :: v_dual_mov_b32 v82, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s6 :: v_dual_mov_b32 v83, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s1 :: v_dual_mov_b32 v85, s0
+; GFX11-TRUE16-NEXT: .LBB69_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v71, v71, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v82, v84, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v55, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v86, v86, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v64, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v71, 16, v71
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v80, v68, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v49, v51, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v38, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v68, v55, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v65, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v32, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v22, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v13, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v8, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v2, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v66, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v83, 16, v86
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v67, v64, v82
+; GFX11-TRUE16-NEXT: v_perm_b32 v53, v53, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v64, 16, v80
+; GFX11-TRUE16-NEXT: v_perm_b32 v48, v48, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v55
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v37, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; GFX11-TRUE16-NEXT: v_perm_b32 v35, v35, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v34, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v30, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v29, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v28, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v24, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v23, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v18, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v15, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v17, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v66, v66, v83
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v69, v53, v64
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, v48, v51
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, v37, v49
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v50, v35, v38
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, v32, v31
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v22, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v20, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v10
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[66:69], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[48:51], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[28:31], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i64_to_v64i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v23, s32 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v23, s31, 8
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s48, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB69_3
+; GFX11-FAKE16-NEXT: .LBB69_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s48, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s48, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-FAKE16-NEXT: .LBB69_5: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v23, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s31, s28, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s38, s40, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s36, s35, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s39, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s1, s37, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s2, s34, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, vcc_hi, vcc_lo, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s95, s14, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s17, s91, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s93, s92, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s16, s94, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s90, s12, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, s3, s30, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s18, s89, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, s88, s78, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v10, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, s77, s10, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, s75, s74, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s72, s8, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v7, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v13, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, s19, s79, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s20, s76, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s21, s73, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s22, s63, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v13, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, s62, s61, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, s59, s6, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, s57, s56, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, s46, s4, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, s44, s42, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, s23, s60, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, s24, s58, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, s25, s47, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, s26, s45, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, s27, s43, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v15, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v19, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v22, v20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v23, 7
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v23, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v23, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v23, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v23, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v23, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v23, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v23, 0
+; GFX11-FAKE16-NEXT: s_xor_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v23, off, s32 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -44197,15 +45294,15 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v116, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:20
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:12
@@ -44213,268 +45310,300 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s7 :: v_dual_mov_b32 v69, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s4 :: v_dual_mov_b32 v70, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s6 :: v_dual_mov_b32 v71, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v86, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s7 :: v_dual_mov_b32 v85, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s8 :: v_dual_mov_b32 v84, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s26 :: v_dual_mov_b32 v96, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s24 :: v_dual_mov_b32 v98, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s23 :: v_dual_mov_b32 v112, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s20 :: v_dual_mov_b32 v100, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s17 :: v_dual_mov_b32 v102, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s16 :: v_dual_mov_b32 v114, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_mov_b32 v118, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v116
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB71_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v37, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v33, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v52, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v36, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v118, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v114, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v112, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v119, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v117, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v113, v100, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v97, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v87, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v83, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v101, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v96, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v86, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v66, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v24, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v22, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v65, v54, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v18, v16, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v23, v20, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v27, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v12
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v130, v34, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v28, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v30, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v52, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v19, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
+; GFX11-TRUE16-NEXT: v_perm_b32 v132, v36, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v129, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v131, v128
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v132, v130
; GFX11-TRUE16-NEXT: s_branch .LBB71_3
; GFX11-TRUE16-NEXT: .LBB71_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB71_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB71_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v112
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v96
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v87
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v86
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s74, s73, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s62, s61, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s58, s57, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v71
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v53
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v30
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v52
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v48
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v38
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v33
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s6, s5, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v25, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff, v19
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v12, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v17, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v19, v20
; GFX11-TRUE16-NEXT: .LBB71_5: ; %end
@@ -54035,306 +55164,608 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8f64_to_v64i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v40, s34, 0
-; GFX11-NEXT: v_writelane_b32 v40, s35, 1
-; GFX11-NEXT: v_writelane_b32 v40, s36, 2
-; GFX11-NEXT: v_writelane_b32 v40, s37, 3
-; GFX11-NEXT: v_writelane_b32 v40, s38, 4
-; GFX11-NEXT: v_writelane_b32 v40, s39, 5
-; GFX11-NEXT: v_writelane_b32 v40, s48, 6
-; GFX11-NEXT: v_writelane_b32 v40, s30, 7
-; GFX11-NEXT: v_writelane_b32 v40, s31, 8
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB85_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s90, s27, 24
-; GFX11-NEXT: s_lshr_b32 s89, s27, 16
-; GFX11-NEXT: s_lshr_b32 s88, s27, 8
-; GFX11-NEXT: s_lshr_b32 s92, s26, 16
-; GFX11-NEXT: s_lshr_b32 s91, s26, 8
-; GFX11-NEXT: s_lshr_b32 s79, s25, 24
-; GFX11-NEXT: s_lshr_b32 s78, s25, 16
-; GFX11-NEXT: s_lshr_b32 s77, s25, 8
-; GFX11-NEXT: s_lshr_b32 s94, s24, 16
-; GFX11-NEXT: s_lshr_b32 s93, s24, 8
-; GFX11-NEXT: s_lshr_b32 s76, s23, 24
-; GFX11-NEXT: s_lshr_b32 s75, s23, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 8
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s22, 16
-; GFX11-NEXT: s_lshr_b32 s95, s22, 8
-; GFX11-NEXT: s_lshr_b32 s73, s21, 24
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s63, s21, 8
-; GFX11-NEXT: s_lshr_b32 s30, s20, 16
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s20, 8
-; GFX11-NEXT: s_lshr_b32 s62, s19, 24
-; GFX11-NEXT: s_lshr_b32 s61, s19, 16
-; GFX11-NEXT: s_lshr_b32 s60, s19, 8
-; GFX11-NEXT: s_lshr_b32 s34, s18, 16
-; GFX11-NEXT: s_lshr_b32 s31, s18, 8
-; GFX11-NEXT: s_lshr_b32 s59, s17, 24
-; GFX11-NEXT: s_lshr_b32 s58, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s17, 8
-; GFX11-NEXT: s_lshr_b32 s36, s16, 16
-; GFX11-NEXT: s_lshr_b32 s35, s16, 8
-; GFX11-NEXT: s_lshr_b32 s56, s3, 24
-; GFX11-NEXT: s_lshr_b32 s47, s3, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 8
-; GFX11-NEXT: s_lshr_b32 s38, s2, 16
-; GFX11-NEXT: s_lshr_b32 s37, s2, 8
-; GFX11-NEXT: s_lshr_b32 s45, s1, 24
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: s_lshr_b32 s48, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB85_3
-; GFX11-NEXT: .LBB85_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr95
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: .LBB85_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB85_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[7:8], s[20:21], 1.0
-; GFX11-NEXT: v_add_f64 v[11:12], s[18:19], 1.0
-; GFX11-NEXT: v_add_f64 v[15:16], s[16:17], 1.0
-; GFX11-NEXT: v_add_f64 v[17:18], s[2:3], 1.0
-; GFX11-NEXT: v_add_f64 v[1:2], s[26:27], 1.0
-; GFX11-NEXT: v_add_f64 v[3:4], s[24:25], 1.0
-; GFX11-NEXT: v_add_f64 v[5:6], s[22:23], 1.0
-; GFX11-NEXT: v_add_f64 v[21:22], s[0:1], 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[24:25], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b64 v[26:27], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[9:10], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[27:28], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v20, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v51, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v52, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v50, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v49, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v65, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v67, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v66, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v54, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v53, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v70, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v64, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v69, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v68, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 24, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 16, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 8, v21
-; GFX11-NEXT: s_branch .LBB85_6
-; GFX11-NEXT: .LBB85_5:
-; GFX11-NEXT: v_dual_mov_b32 v21, s0 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v4, s25
-; GFX11-NEXT: v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v6, s23
-; GFX11-NEXT: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v8, s21
-; GFX11-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v12, s19
-; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v16, s17
-; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v18, s3
-; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v22, s1
-; GFX11-NEXT: v_dual_mov_b32 v82, s48 :: v_dual_mov_b32 v81, s39
-; GFX11-NEXT: v_dual_mov_b32 v69, s38 :: v_dual_mov_b32 v68, s37
-; GFX11-NEXT: v_dual_mov_b32 v64, s36 :: v_dual_mov_b32 v55, s35
-; GFX11-NEXT: v_dual_mov_b32 v54, s34 :: v_dual_mov_b32 v53, s31
-; GFX11-NEXT: v_dual_mov_b32 v49, s30 :: v_dual_mov_b32 v30, s93
-; GFX11-NEXT: v_dual_mov_b32 v39, vcc_hi :: v_dual_mov_b32 v14, s92
-; GFX11-NEXT: v_dual_mov_b32 v37, vcc_lo :: v_dual_mov_b32 v10, s91
-; GFX11-NEXT: v_dual_mov_b32 v35, s95 :: v_dual_mov_b32 v26, s6
-; GFX11-NEXT: v_dual_mov_b32 v31, s94 :: v_dual_mov_b32 v24, s10
-; GFX11-NEXT: v_dual_mov_b32 v27, s4 :: v_dual_mov_b32 v28, s90
-; GFX11-NEXT: v_dual_mov_b32 v25, s8 :: v_dual_mov_b32 v20, s88
-; GFX11-NEXT: v_dual_mov_b32 v23, s12 :: v_dual_mov_b32 v34, s78
-; GFX11-NEXT: v_dual_mov_b32 v19, s14 :: v_dual_mov_b32 v32, s77
-; GFX11-NEXT: v_dual_mov_b32 v13, s28 :: v_dual_mov_b32 v38, s76
-; GFX11-NEXT: v_dual_mov_b32 v9, s40 :: v_dual_mov_b32 v48, s75
-; GFX11-NEXT: v_dual_mov_b32 v29, s89 :: v_dual_mov_b32 v36, s74
-; GFX11-NEXT: v_dual_mov_b32 v33, s79 :: v_dual_mov_b32 v52, s72
-; GFX11-NEXT: v_dual_mov_b32 v51, s73 :: v_dual_mov_b32 v50, s63
-; GFX11-NEXT: v_dual_mov_b32 v65, s62 :: v_dual_mov_b32 v66, s60
-; GFX11-NEXT: v_dual_mov_b32 v67, s61 :: v_dual_mov_b32 v80, s58
-; GFX11-NEXT: v_dual_mov_b32 v71, s59 :: v_dual_mov_b32 v70, s57
-; GFX11-NEXT: v_dual_mov_b32 v84, s56 :: v_dual_mov_b32 v85, s47
-; GFX11-NEXT: v_dual_mov_b32 v83, s46 :: v_dual_mov_b32 v96, s44
-; GFX11-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v86, s43
-; GFX11-NEXT: .LBB85_6: ; %end
-; GFX11-NEXT: v_perm_b32 v26, v69, v26, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v27, v82, v27, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v82, v96, v87, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v17, v17, v68, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v21, v21, v81, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v68, v85, v84, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v54, v24, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v22, v86, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v82
-; GFX11-NEXT: v_or_b32_e32 v86, v17, v26
-; GFX11-NEXT: v_perm_b32 v17, v18, v83, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v64, v25, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v84, v21, v27
-; GFX11-NEXT: v_lshlrev_b32_e32 v21, 16, v68
-; GFX11-NEXT: v_perm_b32 v11, v11, v53, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_or_b32_e32 v85, v22, v69
-; GFX11-NEXT: v_perm_b32 v22, v80, v71, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v15, v55, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v87, v17, v21
-; GFX11-NEXT: v_or_b32_e32 v17, v11, v24
-; GFX11-NEXT: v_perm_b32 v11, v12, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v12, v49, v23, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v16, v16, v70, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
-; GFX11-NEXT: v_perm_b32 v18, v67, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v21, v52, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v19, v37, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v39, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-NEXT: v_or_b32_e32 v16, v16, v22
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v8, v8, v50, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v21
-; GFX11-NEXT: v_perm_b32 v5, v5, v35, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-NEXT: v_or_b32_e32 v21, v7, v12
-; GFX11-NEXT: v_perm_b32 v7, v48, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v18, v11, v18
-; GFX11-NEXT: v_or_b32_e32 v22, v8, v22
-; GFX11-NEXT: v_or_b32_e32 v23, v5, v19
-; GFX11-NEXT: v_perm_b32 v5, v31, v13, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v8, v34, v33, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v14, v9, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v11, v29, v28, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v36, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-NEXT: v_perm_b32 v3, v3, v30, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v32, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v10, v1, v10, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-NEXT: v_perm_b32 v12, v2, v20, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_or_b32_e32 v24, v6, v7
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v8
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v9
-; GFX11-NEXT: v_or_b32_e32 v4, v12, v11
-; GFX11-NEXT: v_readlane_b32 s30, v40, 7
-; GFX11-NEXT: s_clause 0x3
-; GFX11-NEXT: scratch_store_b128 v0, v[84:87], off
-; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:16
-; GFX11-NEXT: scratch_store_b128 v0, v[21:24], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v40, 8
-; GFX11-NEXT: v_readlane_b32 s48, v40, 6
-; GFX11-NEXT: v_readlane_b32 s39, v40, 5
-; GFX11-NEXT: v_readlane_b32 s38, v40, 4
-; GFX11-NEXT: v_readlane_b32 s37, v40, 3
-; GFX11-NEXT: v_readlane_b32 s36, v40, 2
-; GFX11-NEXT: v_readlane_b32 s35, v40, 1
-; GFX11-NEXT: v_readlane_b32 s34, v40, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8f64_to_v64i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s6 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s27 :: v_dual_mov_b32 v1, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s25 :: v_dual_mov_b32 v3, s24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s23 :: v_dual_mov_b32 v7, s22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s21 :: v_dual_mov_b32 v11, s20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s19 :: v_dual_mov_b32 v15, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v65, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s5 :: v_dual_mov_b32 v81, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s5 :: v_dual_mov_b32 v83, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s6 :: v_dual_mov_b32 v71, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s5 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v87, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s6 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s6 :: v_dual_mov_b32 v28, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s17 :: v_dual_mov_b32 v17, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s3 :: v_dual_mov_b32 v21, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s1 :: v_dual_mov_b32 v23, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB85_3
+; GFX11-TRUE16-NEXT: .LBB85_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f64 v[15:16], s[18:19], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[17:18], s[16:17], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[21:22], s[2:3], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[1:2], s[26:27], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[3:4], s[24:25], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[7:8], s[22:23], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[11:12], s[20:21], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[23:24], s[0:1], 1.0
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v23
+; GFX11-TRUE16-NEXT: .LBB85_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v96, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v83, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v86, v87, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v80, v81, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v65, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v86
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v83, v23, v28
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v85, v21, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v22, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v80
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v84, v24, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v71, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v69, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v86, v21, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v15, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v16, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v53, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v14, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v17, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v55, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v18, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v52, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v48, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v7, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v37, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v36, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v33, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v31, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v1, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v2, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v16
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[83:86], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8f64_to_v64i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 8
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB85_3
+; GFX11-FAKE16-NEXT: .LBB85_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f64 v[7:8], s[20:21], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[11:12], s[18:19], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[15:16], s[16:17], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[17:18], s[2:3], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[1:2], s[26:27], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[3:4], s[24:25], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[5:6], s[22:23], 1.0
+; GFX11-FAKE16-NEXT: v_add_f64 v[21:22], s[0:1], 1.0
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v21
+; GFX11-FAKE16-NEXT: s_branch .LBB85_6
+; GFX11-FAKE16-NEXT: .LBB85_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s0 :: v_dual_mov_b32 v2, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v4, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v6, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v8, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v12, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v16, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v18, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v22, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s48 :: v_dual_mov_b32 v81, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s38 :: v_dual_mov_b32 v68, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s36 :: v_dual_mov_b32 v55, s35
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s34 :: v_dual_mov_b32 v53, s31
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s30 :: v_dual_mov_b32 v30, s93
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, vcc_hi :: v_dual_mov_b32 v14, s92
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, vcc_lo :: v_dual_mov_b32 v10, s91
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s95 :: v_dual_mov_b32 v26, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s94 :: v_dual_mov_b32 v24, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s4 :: v_dual_mov_b32 v28, s90
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s8 :: v_dual_mov_b32 v20, s88
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s12 :: v_dual_mov_b32 v34, s78
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s14 :: v_dual_mov_b32 v32, s77
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s28 :: v_dual_mov_b32 v38, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s40 :: v_dual_mov_b32 v48, s75
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s89 :: v_dual_mov_b32 v36, s74
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s79 :: v_dual_mov_b32 v52, s72
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s73 :: v_dual_mov_b32 v50, s63
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s62 :: v_dual_mov_b32 v66, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s61 :: v_dual_mov_b32 v80, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s59 :: v_dual_mov_b32 v70, s57
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s56 :: v_dual_mov_b32 v85, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s46 :: v_dual_mov_b32 v96, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v86, s43
+; GFX11-FAKE16-NEXT: .LBB85_6: ; %end
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v69, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v82, v27, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v82, v96, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v68, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v85, v84, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v54, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v22, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v82
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v86, v17, v26
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v18, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v64, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v84, v21, v27
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v68
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v85, v22, v69
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v80, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v87, v17, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v11, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v12, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v49, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v67, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v52, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v37, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v22
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v21
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v7, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v48, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v11, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v8, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v5, v19
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v31, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v34, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v14, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v29, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v1, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v2, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v10, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v12, v11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 7
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[84:87], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v40, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v40, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v40, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v40, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v40, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v40, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v40, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -57688,15 +59119,15 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:52
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:48
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:36
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v116, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:24
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:20
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:16
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:12
@@ -57704,268 +59135,300 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v14
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s5 :: v_dual_mov_b32 v26, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s7 :: v_dual_mov_b32 v69, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s4 :: v_dual_mov_b32 v70, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s6 :: v_dual_mov_b32 v71, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v86, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s7 :: v_dual_mov_b32 v85, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s8 :: v_dual_mov_b32 v84, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s26 :: v_dual_mov_b32 v96, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s24 :: v_dual_mov_b32 v98, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s23 :: v_dual_mov_b32 v112, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s20 :: v_dual_mov_b32 v100, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s17 :: v_dual_mov_b32 v102, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s16 :: v_dual_mov_b32 v114, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_mov_b32 v118, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v116
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB87_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v37, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v33, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v52, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v36, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v118, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v114, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v112, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v119, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v117, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v113, v100, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v97, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v87, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v83, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v101, v98, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v96, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v86, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v66, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v19, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v24, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v22, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v65, v54, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v18, v16, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v23, v20, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v11, v9
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v27, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v13, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v12
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v48, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v38, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v130, v34, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v28, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v30, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v52, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v19, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v39, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
+; GFX11-TRUE16-NEXT: v_perm_b32 v132, v36, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v129, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v131, v128
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v132, v130
; GFX11-TRUE16-NEXT: s_branch .LBB87_3
; GFX11-TRUE16-NEXT: .LBB87_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB87_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB87_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v112
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v101
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v116, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v115, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v99, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v117
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v96
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v87
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v86
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v83
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s74, s73, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s62, s61, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s58, s57, v11
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s46, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v6, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v7, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v71
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
-; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s42, s41, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v53
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v52
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v30
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v53
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v52
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 3, v48
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v37
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v38
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v33
-; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s6, s5, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v34
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v25, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v37, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff, v19
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v12, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v17, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v19, v20
; GFX11-TRUE16-NEXT: .LBB87_5: ; %end
@@ -62028,15 +63491,14 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_lshlrev_b32 v18, 16, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; GFX11-TRUE16-NEXT: v_dual_add_f32 v17, 0x40c00000, v17 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v16, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v16
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
@@ -62050,37 +63512,37 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: v_add3_u32 v22, v24, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v23, v17, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v20, v21, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v21, v22, v25, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v22, v25, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v18, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v21
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v19, v20 :: v_dual_lshlrev_b32 v20, 16, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v22, v18, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v19, v20 :: v_dual_and_b32 v2, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v17.l
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v16.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v18, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v16.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v19, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v1, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v21, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v3, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v3
@@ -62088,76 +63550,77 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v21, v23, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v4
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v19, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_add_f32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v17.h
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v19, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v4, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v20, v24, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v19, v24, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v3, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v4
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v21, v25, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v5, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v3, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v18.h
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v5, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v21, v25, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v20, v26, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v19, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v20.l
; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v19.h
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v18.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v4, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v20, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v4, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v19, v26, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v6
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v21, v27, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v7, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.h
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v7, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v22.l
@@ -62166,157 +63629,157 @@ define <32 x i16> @bitcast_v32bf16_to_v32i16(<32 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v6
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v8
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v20, v28, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v19, v28, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_add_f32 v6, 0x40c00000, v6
; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v23.l
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v8, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, 0x400000, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v6
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v8, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v20, v28, vcc_lo
+; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v8, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v23.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v19, v28, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v21, v29, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v19, v7, 0x7fff
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v6, v21, v29 :: v_dual_lshlrev_b32 v19, 16, v10
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, 0x400000, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v9, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v24.l
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v9, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v19
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v21, v29, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v20, v7, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v20, 16, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v8, v30 :: v_dual_add_f32 v20, 0x40c00000, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v20, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v30, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, 0x400000, v10
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v19, 16, 1
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v10, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v19, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v21, v30, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v30, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v30, v30, v11, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v31, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v9, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v6.h
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v9, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v30, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_add3_u32 v30, v30, v11, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v30, v31, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v30, v10, 16, 1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v21, v32, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.h
-; GFX11-TRUE16-NEXT: v_bfe_u32 v30, v10, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v27.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
; GFX11-TRUE16-NEXT: v_add3_u32 v11, v30, v10, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v31
; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v12, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
; GFX11-TRUE16-NEXT: v_bfe_u32 v34, v30, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v11, v31, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v14
-; GFX11-TRUE16-NEXT: v_add3_u32 v13, v34, v30, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v27.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v21, v33, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v30
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v13
+; GFX11-TRUE16-NEXT: v_add3_u32 v13, v34, v30, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v30, 0xffff0000, v15
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v13, v21 :: v_dual_lshlrev_b32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v31
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v33, v11, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v13, v21 :: v_dual_add_f32 v13, 0x40c00000, v31
; GFX11-TRUE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, 0x400000, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v33, v11, 0x7fff
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v38, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, 0x400000, v30
; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v13, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, 0x400000, v30
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v21, v31, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v13, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; GFX11-TRUE16-NEXT: v_bfe_u32 v31, v30, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v14, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-TRUE16-NEXT: v_bfe_u32 v36, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v39, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX11-TRUE16-NEXT: v_add3_u32 v31, v31, v30, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v13, 0x7fff
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_add3_u32 v36, v36, v15, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v31, v31, v30, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v14, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.h
-; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v38, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v30, v31, v37, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v14, 0x7fff
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v28.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v19.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v21, v38, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v36, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v39, 0x400000, v15
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v14
+; GFX11-TRUE16-NEXT: v_add3_u32 v36, v36, v15, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v36, v39, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v15.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v33, v35, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v21.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v12.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v13.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v11.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.h
@@ -67664,314 +69127,624 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32i16_to_v64i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v40, s34, 0
-; GFX11-NEXT: v_writelane_b32 v40, s35, 1
-; GFX11-NEXT: v_writelane_b32 v40, s36, 2
-; GFX11-NEXT: v_writelane_b32 v40, s37, 3
-; GFX11-NEXT: v_writelane_b32 v40, s38, 4
-; GFX11-NEXT: v_writelane_b32 v40, s39, 5
-; GFX11-NEXT: v_writelane_b32 v40, s48, 6
-; GFX11-NEXT: v_writelane_b32 v40, s30, 7
-; GFX11-NEXT: v_writelane_b32 v40, s31, 8
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB97_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 8
-; GFX11-NEXT: s_lshr_b32 s45, s26, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s59, s25, 8
-; GFX11-NEXT: s_lshr_b32 s58, s24, 16
-; GFX11-NEXT: s_lshr_b32 s60, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s72, s23, 8
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s73, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s21, 8
-; GFX11-NEXT: s_lshr_b32 s76, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s90, s19, 8
-; GFX11-NEXT: s_lshr_b32 s89, s18, 16
-; GFX11-NEXT: s_lshr_b32 s91, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s95, s17, 8
-; GFX11-NEXT: s_lshr_b32 s94, s16, 16
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
-; GFX11-NEXT: s_lshr_b32 s30, s3, 16
-; GFX11-NEXT: s_lshr_b32 s34, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s35, s2, 8
-; GFX11-NEXT: s_lshr_b32 s36, s1, 24
-; GFX11-NEXT: s_lshr_b32 s37, s1, 16
-; GFX11-NEXT: s_lshr_b32 s39, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s48, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB97_3
-; GFX11-NEXT: .LBB97_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr95
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: .LBB97_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB97_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v4, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[3:4]
-; GFX11-NEXT: v_pk_add_u16 v18, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v51, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v50, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v52, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v49, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v64, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v69, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v68, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v65, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v70, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v67, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 8, v17
-; GFX11-NEXT: s_branch .LBB97_6
-; GFX11-NEXT: .LBB97_5:
-; GFX11-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1
-; GFX11-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s3
-; GFX11-NEXT: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
-; GFX11-NEXT: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, s19
-; GFX11-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v8, s21
-; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
-; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
-; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
-; GFX11-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
-; GFX11-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
-; GFX11-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
-; GFX11-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
-; GFX11-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
-; GFX11-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
-; GFX11-NEXT: v_dual_mov_b32 v69, s92 :: v_dual_mov_b32 v64, s91
-; GFX11-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v53, s90
-; GFX11-NEXT: v_dual_mov_b32 v54, s88 :: v_dual_mov_b32 v55, s79
-; GFX11-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v52, s76
-; GFX11-NEXT: v_dual_mov_b32 v39, s77 :: v_dual_mov_b32 v50, s75
-; GFX11-NEXT: v_dual_mov_b32 v51, s74 :: v_dual_mov_b32 v38, s73
-; GFX11-NEXT: v_dual_mov_b32 v48, s63 :: v_dual_mov_b32 v37, s61
-; GFX11-NEXT: v_dual_mov_b32 v34, s72 :: v_dual_mov_b32 v33, s60
-; GFX11-NEXT: v_dual_mov_b32 v36, s62 :: v_dual_mov_b32 v35, s58
-; GFX11-NEXT: v_dual_mov_b32 v29, s59 :: v_dual_mov_b32 v32, s56
-; GFX11-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v26, s47
-; GFX11-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v27, s44
-; GFX11-NEXT: v_dual_mov_b32 v16, s46 :: v_dual_mov_b32 v15, s40
-; GFX11-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v19, s28
-; GFX11-NEXT: v_dual_mov_b32 v20, s14 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: .LBB97_6: ; %end
-; GFX11-NEXT: v_perm_b32 v86, v86, v87, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v24, v84, v24, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v96, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v18, v83, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v13, v82, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v83, 16, v86
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v85, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-NEXT: v_perm_b32 v84, v80, v81, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v66, v22, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v81, v18, v83
-; GFX11-NEXT: v_or_b32_e32 v82, v13, v24
-; GFX11-NEXT: v_perm_b32 v13, v14, v71, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v70, v23, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v68, v69, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v80, v17, v25
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v84
-; GFX11-NEXT: v_perm_b32 v9, v9, v64, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v11, v11, v67, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v83, v13, v17
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v22
-; GFX11-NEXT: v_perm_b32 v9, v10, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v52, v21, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v54, v55, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v18
-; GFX11-NEXT: v_perm_b32 v17, v50, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v48, v20, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v39, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v5, v5, v38, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v36, v37, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v17
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v18
-; GFX11-NEXT: v_perm_b32 v5, v35, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v17, v31, v32, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v30, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v27, v28, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v34, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v3, v3, v33, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v19, v1, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v16, v2, v16, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v17
-; GFX11-NEXT: v_or_b32_e32 v3, v19, v15
-; GFX11-NEXT: v_or_b32_e32 v4, v16, v18
-; GFX11-NEXT: v_readlane_b32 s30, v40, 7
-; GFX11-NEXT: s_clause 0x3
-; GFX11-NEXT: scratch_store_b128 v0, v[80:83], off
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v40, 8
-; GFX11-NEXT: v_readlane_b32 s48, v40, 6
-; GFX11-NEXT: v_readlane_b32 s39, v40, 5
-; GFX11-NEXT: v_readlane_b32 s38, v40, 4
-; GFX11-NEXT: v_readlane_b32 s37, v40, 3
-; GFX11-NEXT: v_readlane_b32 s36, v40, 2
-; GFX11-NEXT: v_readlane_b32 s35, v40, 1
-; GFX11-NEXT: v_readlane_b32 s34, v40, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32i16_to_v64i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v37, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s5 :: v_dual_mov_b32 v69, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v80, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v82, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s5 :: v_dual_mov_b32 v87, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v3, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v14, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s6 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s8 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s25 :: v_dual_mov_b32 v7, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s23 :: v_dual_mov_b32 v9, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s21 :: v_dual_mov_b32 v11, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s19 :: v_dual_mov_b32 v16, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s17 :: v_dual_mov_b32 v18, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s3 :: v_dual_mov_b32 v22, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s1 :: v_dual_mov_b32 v26, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB97_3
+; GFX11-TRUE16-NEXT: .LBB97_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, s3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, s2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[22:23]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[16:17]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[26:27]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 24, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v26
+; GFX11-TRUE16-NEXT: .LBB97_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v96, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v52, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v64, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v22, v28
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v23, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v70, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v26, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v68, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v38, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v64, v18, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v54, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v85, v86, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v71, v80, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v65, v19, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v66, v16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v17, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v50, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v9, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v34, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v32, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v25, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v6, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v85
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v67, v16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v22, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v15
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[26:29], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[64:67], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32i16_to_v64i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 8
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB97_3
+; GFX11-FAKE16-NEXT: .LBB97_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v17
+; GFX11-FAKE16-NEXT: s_branch .LBB97_6
+; GFX11-FAKE16-NEXT: .LBB97_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v8, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s92 :: v_dual_mov_b32 v64, s91
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v53, s90
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s88 :: v_dual_mov_b32 v55, s79
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v52, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s77 :: v_dual_mov_b32 v50, s75
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s74 :: v_dual_mov_b32 v38, s73
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s63 :: v_dual_mov_b32 v37, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s72 :: v_dual_mov_b32 v33, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s62 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s59 :: v_dual_mov_b32 v32, s56
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v26, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v27, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s46 :: v_dual_mov_b32 v15, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v19, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s14 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: .LBB97_6: ; %end
+; GFX11-FAKE16-NEXT: v_perm_b32 v86, v86, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v84, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v83, 16, v86
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v80, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v66, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v81, v18, v83
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v82, v13, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v70, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v68, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v80, v17, v25
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v84
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v83, v13, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v52, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v54, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v50, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v48, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v36, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v35, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v31, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v30, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v27, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v1, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v2, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v19, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v16, v18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 7
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[80:83], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v40, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v40, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v40, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v40, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v40, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v40, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v40, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -71883,239 +73656,274 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v14
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v128, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v115, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s29 :: v_dual_mov_b32 v34, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s8 :: v_dual_mov_b32 v80, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v26, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s28 :: v_dual_mov_b32 v27, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s25 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s24 :: v_dual_mov_b32 v16, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s22 :: v_dual_mov_b32 v18, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s21 :: v_dual_mov_b32 v22, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v20, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s2
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v128
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB99_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0x6050400
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v48, v52, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v31, v37, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v32, v36, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s10, s4, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s41, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s15, s6, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s13, s5, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s9, s43, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s60, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s14, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s59, s40, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s12, s56, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s63, s58, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s62, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v9.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s61, s42, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s11, s46, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s57, s73, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v13.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v25, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v23, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v34, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v39, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v80, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v68, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v64, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v24, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v22, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v48, v69, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v31, v65, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v35, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v49, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v97, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v51, v83, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v98, v71, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v34, v38, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s72, s47, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v32, v70, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v81, v103, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v84, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v99, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v54, v112, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v96, v116, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v52, v113, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v101, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v85, v114, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v102, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v13.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v50, s74, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v13.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v14.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v35, v49, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v15.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v39, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v87, v115, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v117, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v15.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v67, v118, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v119, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.h, v129.l
; GFX11-TRUE16-NEXT: s_branch .LBB99_3
; GFX11-TRUE16-NEXT: .LBB99_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB99_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB99_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v116
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v112
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v53
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v37
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v49
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v52
-; GFX11-TRUE16-NEXT: s_add_i32 s61, s61, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s73, s73, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s63, s63, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v5, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s73, s57, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v117
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v103
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v115
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s72, s47, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v96, 0x300, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v5, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s74, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s14, s8, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s43, s9, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s59, s59, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s61, s42, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s46, s11, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s56, s12, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v6, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v54, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v102
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v101
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v83
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v53, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v99
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v82, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s63, s58, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s59, s40, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s60, s45, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s13, s5, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s62, s44, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s28, s29, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s10, s4, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v98
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v80
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v68
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v3, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v4, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s20, s21, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s15, s6, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, s41, s7, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, s26, s27, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s22, s23, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, s2, s3, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, s18, s19, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, s16, s17, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, s0, s1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v32
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v49
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v22, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v23, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v96.l
; GFX11-TRUE16-NEXT: .LBB99_5: ; %end
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -80401,314 +82209,624 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v32f16_to_v64i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-NEXT: v_writelane_b32 v40, s34, 0
-; GFX11-NEXT: v_writelane_b32 v40, s35, 1
-; GFX11-NEXT: v_writelane_b32 v40, s36, 2
-; GFX11-NEXT: v_writelane_b32 v40, s37, 3
-; GFX11-NEXT: v_writelane_b32 v40, s38, 4
-; GFX11-NEXT: v_writelane_b32 v40, s39, 5
-; GFX11-NEXT: v_writelane_b32 v40, s48, 6
-; GFX11-NEXT: v_writelane_b32 v40, s30, 7
-; GFX11-NEXT: v_writelane_b32 v40, s31, 8
-; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s42, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB105_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s27, 24
-; GFX11-NEXT: s_lshr_b32 s44, s27, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 8
-; GFX11-NEXT: s_lshr_b32 s45, s26, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 8
-; GFX11-NEXT: s_lshr_b32 s56, s25, 24
-; GFX11-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-NEXT: s_lshr_b32 s59, s25, 8
-; GFX11-NEXT: s_lshr_b32 s58, s24, 16
-; GFX11-NEXT: s_lshr_b32 s60, s24, 8
-; GFX11-NEXT: s_lshr_b32 s61, s23, 24
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s72, s23, 8
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s73, s22, 8
-; GFX11-NEXT: s_lshr_b32 s74, s21, 24
-; GFX11-NEXT: s_lshr_b32 s75, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s21, 8
-; GFX11-NEXT: s_lshr_b32 s76, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s88, s19, 16
-; GFX11-NEXT: s_lshr_b32 s90, s19, 8
-; GFX11-NEXT: s_lshr_b32 s89, s18, 16
-; GFX11-NEXT: s_lshr_b32 s91, s18, 8
-; GFX11-NEXT: s_lshr_b32 s92, s17, 24
-; GFX11-NEXT: s_lshr_b32 s93, s17, 16
-; GFX11-NEXT: s_lshr_b32 s95, s17, 8
-; GFX11-NEXT: s_lshr_b32 s94, s16, 16
-; GFX11-NEXT: s_lshr_b32 vcc_lo, s16, 8
-; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
-; GFX11-NEXT: s_lshr_b32 s30, s3, 16
-; GFX11-NEXT: s_lshr_b32 s34, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s35, s2, 8
-; GFX11-NEXT: s_lshr_b32 s36, s1, 24
-; GFX11-NEXT: s_lshr_b32 s37, s1, 16
-; GFX11-NEXT: s_lshr_b32 s39, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s48, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB105_3
-; GFX11-NEXT: .LBB105_2:
-; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $vcc_hi
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr95
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr28
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: .LBB105_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB105_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_lshrrev_b64 v[19:20], 24, v[3:4]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b32_e32 v28, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v38, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v51, 24, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v50, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v52, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v49, 8, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 24, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v64, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v69, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v68, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v65, 8, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v70, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v67, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v71, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v86, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v85, 8, v17
-; GFX11-NEXT: s_branch .LBB105_6
-; GFX11-NEXT: .LBB105_5:
-; GFX11-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1
-; GFX11-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s3
-; GFX11-NEXT: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
-; GFX11-NEXT: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, s19
-; GFX11-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v8, s21
-; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
-; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
-; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
-; GFX11-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
-; GFX11-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
-; GFX11-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
-; GFX11-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
-; GFX11-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
-; GFX11-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
-; GFX11-NEXT: v_dual_mov_b32 v69, s92 :: v_dual_mov_b32 v64, s91
-; GFX11-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v53, s90
-; GFX11-NEXT: v_dual_mov_b32 v54, s88 :: v_dual_mov_b32 v55, s79
-; GFX11-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v52, s76
-; GFX11-NEXT: v_dual_mov_b32 v39, s77 :: v_dual_mov_b32 v50, s75
-; GFX11-NEXT: v_dual_mov_b32 v51, s74 :: v_dual_mov_b32 v38, s73
-; GFX11-NEXT: v_dual_mov_b32 v48, s63 :: v_dual_mov_b32 v37, s61
-; GFX11-NEXT: v_dual_mov_b32 v34, s72 :: v_dual_mov_b32 v33, s60
-; GFX11-NEXT: v_dual_mov_b32 v36, s62 :: v_dual_mov_b32 v35, s58
-; GFX11-NEXT: v_dual_mov_b32 v29, s59 :: v_dual_mov_b32 v32, s56
-; GFX11-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v26, s47
-; GFX11-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v27, s44
-; GFX11-NEXT: v_dual_mov_b32 v16, s46 :: v_dual_mov_b32 v15, s40
-; GFX11-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v19, s28
-; GFX11-NEXT: v_dual_mov_b32 v20, s14 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: .LBB105_6: ; %end
-; GFX11-NEXT: v_perm_b32 v86, v86, v87, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v24, v84, v24, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v96, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v18, v83, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v13, v82, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v83, 16, v86
-; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v85, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-NEXT: v_perm_b32 v84, v80, v81, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v66, v22, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v81, v18, v83
-; GFX11-NEXT: v_or_b32_e32 v82, v13, v24
-; GFX11-NEXT: v_perm_b32 v13, v14, v71, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v70, v23, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v68, v69, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v80, v17, v25
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v84
-; GFX11-NEXT: v_perm_b32 v9, v9, v64, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v11, v11, v67, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v83, v13, v17
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v22
-; GFX11-NEXT: v_perm_b32 v9, v10, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v52, v21, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
-; GFX11-NEXT: v_perm_b32 v14, v54, v55, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v18
-; GFX11-NEXT: v_perm_b32 v17, v50, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v48, v20, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v39, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v5, v5, v38, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
-; GFX11-NEXT: v_perm_b32 v10, v36, v37, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v17
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v18
-; GFX11-NEXT: v_perm_b32 v5, v35, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v17, v31, v32, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v15, v30, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v27, v28, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v34, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v3, v3, v33, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-NEXT: v_perm_b32 v19, v1, v26, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-NEXT: v_perm_b32 v16, v2, v16, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v17
-; GFX11-NEXT: v_or_b32_e32 v3, v19, v15
-; GFX11-NEXT: v_or_b32_e32 v4, v16, v18
-; GFX11-NEXT: v_readlane_b32 s30, v40, 7
-; GFX11-NEXT: s_clause 0x3
-; GFX11-NEXT: scratch_store_b128 v0, v[80:83], off
-; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
-; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:32
-; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v40, 8
-; GFX11-NEXT: v_readlane_b32 s48, v40, 6
-; GFX11-NEXT: v_readlane_b32 s39, v40, 5
-; GFX11-NEXT: v_readlane_b32 s38, v40, 4
-; GFX11-NEXT: v_readlane_b32 s37, v40, 3
-; GFX11-NEXT: v_readlane_b32 s36, v40, 2
-; GFX11-NEXT: v_readlane_b32 s35, v40, 1
-; GFX11-NEXT: v_readlane_b32 s34, v40, 0
-; GFX11-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v32f16_to_v64i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v37, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s5 :: v_dual_mov_b32 v69, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v80, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s5 :: v_dual_mov_b32 v82, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s5 :: v_dual_mov_b32 v87, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v3, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v14, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s6 :: v_dual_mov_b32 v24, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v20, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s8 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s25 :: v_dual_mov_b32 v7, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s23 :: v_dual_mov_b32 v9, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s21 :: v_dual_mov_b32 v11, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s19 :: v_dual_mov_b32 v16, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s17 :: v_dual_mov_b32 v18, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s3 :: v_dual_mov_b32 v22, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s1 :: v_dual_mov_b32 v26, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB105_3
+; GFX11-TRUE16-NEXT: .LBB105_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[22:23]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[16:17]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[26:27]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 24, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v26
+; GFX11-TRUE16-NEXT: .LBB105_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v28, v82, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v96, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v52, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v64, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v22, v28
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v23, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v70, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v26, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v29, v68, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v38, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v29
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v64, v18, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v54, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v37, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v85, v86, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v71, v80, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v65, v19, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v66, v16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v17, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v50, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v9, v13
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v34, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v32, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v25, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v6, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v85
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v71
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v67, v16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v14
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v82
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v22, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v15
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[26:29], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[64:67], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v32f16_to_v64i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 8
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s28, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_lo, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s3, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB105_3
+; GFX11-FAKE16-NEXT: .LBB105_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v17
+; GFX11-FAKE16-NEXT: s_branch .LBB105_6
+; GFX11-FAKE16-NEXT: .LBB105_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s20 :: v_dual_mov_b32 v8, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s92 :: v_dual_mov_b32 v64, s91
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v53, s90
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s88 :: v_dual_mov_b32 v55, s79
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v52, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s77 :: v_dual_mov_b32 v50, s75
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s74 :: v_dual_mov_b32 v38, s73
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s63 :: v_dual_mov_b32 v37, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s72 :: v_dual_mov_b32 v33, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s62 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s59 :: v_dual_mov_b32 v32, s56
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v26, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v27, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s46 :: v_dual_mov_b32 v15, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v19, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s14 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: .LBB105_6: ; %end
+; GFX11-FAKE16-NEXT: v_perm_b32 v86, v86, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v84, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v83, 16, v86
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v80, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v66, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v81, v18, v83
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v82, v13, v24
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v70, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v68, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v80, v17, v25
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v84
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v83, v13, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v9, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v52, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v54, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v50, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v48, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v36, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v9, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v5, v18
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v35, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v31, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v30, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v27, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v1, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v2, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v6, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v19, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v16, v18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 7
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[80:83], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[7:10], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:48
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v40, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v40, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v40, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v40, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v40, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v40, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v40, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -84620,239 +86738,274 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v14
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v128, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v115, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s29 :: v_dual_mov_b32 v34, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s8 :: v_dual_mov_b32 v80, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v26, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s28 :: v_dual_mov_b32 v27, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s25 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s24 :: v_dual_mov_b32 v16, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s22 :: v_dual_mov_b32 v18, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s21 :: v_dual_mov_b32 v22, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v20, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s2
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v128
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB107_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0x6050400
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v48, v52, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v31, v37, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v32, v36, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s10, s4, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s41, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s15, s6, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s13, s5, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s9, s43, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s60, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s14, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s59, s40, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s12, s56, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s63, s58, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s62, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v9.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s61, s42, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s11, s46, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s57, s73, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v13.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v25, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v23, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v34, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v39, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v80, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v68, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v64, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v24, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v22, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v48, v69, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v31, v65, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v35, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v49, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v97, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v51, v83, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v98, v71, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v34, v38, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s72, s47, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v32, v70, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v81, v103, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v84, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v99, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v54, v112, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v96, v116, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v52, v113, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v101, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v85, v114, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v102, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v13.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v50, s74, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v13.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v14.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v35, v49, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v15.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v39, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v87, v115, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v117, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v15.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v67, v118, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v119, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.h, v129.l
; GFX11-TRUE16-NEXT: s_branch .LBB107_3
; GFX11-TRUE16-NEXT: .LBB107_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB107_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB107_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v116
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v112
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v53
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v37
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v49
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v52
-; GFX11-TRUE16-NEXT: s_add_i32 s61, s61, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s73, s73, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s63, s63, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v5, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s73, s57, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v117
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v103
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v115
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s72, s47, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v96, 0x300, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v5, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s74, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s14, s8, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s43, s9, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s59, s59, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s61, s42, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s46, s11, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s56, s12, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v6, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v54, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v102
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v101
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v83
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v53, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v99
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v82, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s63, s58, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s59, s40, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s60, s45, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s13, s5, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s62, s44, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s28, s29, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s10, s4, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v98
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v80
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v68
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v3, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v4, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s20, s21, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s15, s6, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, s41, s7, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, s26, s27, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s22, s23, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, s2, s3, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, s18, s19, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, s16, s17, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, s0, s1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v32
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v49
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v22, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v23, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v96.l
; GFX11-TRUE16-NEXT: .LBB107_5: ; %end
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -90172,598 +92325,581 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-LABEL: bitcast_v32bf16_to_v64i8_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill
-; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s34, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s35, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s36, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s37, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s38, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s39, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s48, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 8
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s22, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s21, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s21, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s20, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s19, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s19, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s18, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s17, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_lo, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s16, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s2, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s0, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s5 :: v_dual_mov_b32 v38, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s25, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v52, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v54, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s23, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s21, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v34, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s17, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v80, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s6 :: v_dual_mov_b32 v71, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v87, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v96, s6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s6 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v85, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s6 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s27 :: v_dual_mov_b32 v15, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s25 :: v_dual_mov_b32 v13, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s23 :: v_dual_mov_b32 v11, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s21 :: v_dual_mov_b32 v9, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s19 :: v_dual_mov_b32 v7, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s17 :: v_dual_mov_b32 v5, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v3, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
; GFX11-TRUE16-NEXT: s_branch .LBB109_3
; GFX11-TRUE16-NEXT: .LBB109_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_lo
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr95
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: .LBB109_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB109_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_and_b32 s4, s0, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v3, v7 :: v_dual_add_nc_u32 v8, v8, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s3, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v17.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v10, v7
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v26.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v4, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s2, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v28.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v5, v9
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s17, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v21.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v8, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v9 :: v_dual_add_nc_u32 v6, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v3, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v6, v6, v9 :: v_dual_add_nc_u32 v7, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s16, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v10, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v11, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v23.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v10, v12, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v12 :: v_dual_add_nc_u32 v7, v9, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v30.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v32.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v13, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v11, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v15, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v12
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v10, v14
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v13 :: v_dual_add_nc_u32 v10, 0x7fff, v15
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v9, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v14
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v7, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v9, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v34.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v14, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v15, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v14 :: v_dual_add_nc_u32 v7, v9, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v12, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v14
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v35.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v8
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v12 :: v_dual_add_nc_u32 v8, v9, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v13, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v8 :: v_dual_add_nc_u32 v8, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v10, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v34.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v13
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v48.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v33.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.l, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.h, v29.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v10 :: v_dual_add_nc_u32 v10, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 24, v12
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v11, v19 :: v_dual_add_nc_u32 v14, v16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v17, v20
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v39.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v31.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v10, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v32.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v19, v15
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v52, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v49.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v51 :: v_dual_add_nc_u32 v10, v10, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v25.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v15, v51, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v20.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v52, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.l, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v24.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v19.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 24, v67
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v54.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 24, v81
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v80
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v84
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[66:67]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[68:69]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[80:81]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[83:84]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[85:86]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v67
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v66
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v81
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v84
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v83
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v86
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v86
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; GFX11-TRUE16-NEXT: s_branch .LBB109_6
-; GFX11-TRUE16-NEXT: .LBB109_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s26 :: v_dual_mov_b32 v51, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s48 :: v_dual_mov_b32 v53, s39
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v50, s38
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v48, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s37 :: v_dual_mov_b32 v38, s36
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s23 :: v_dual_mov_b32 v37, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v36, s34
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v33, s31
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s18 :: v_dual_mov_b32 v32, s30
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, vcc_hi
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s16 :: v_dual_mov_b32 v27, vcc_lo
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v22, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s95 :: v_dual_mov_b32 v24, s94
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s3 :: v_dual_mov_b32 v21, s93
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s92
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v17, s91
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s90 :: v_dual_mov_b32 v65, s78
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s88 :: v_dual_mov_b32 v68, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s75 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s79 :: v_dual_mov_b32 v70, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s74 :: v_dual_mov_b32 v82, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s76 :: v_dual_mov_b32 v80, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s73 :: v_dual_mov_b32 v84, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s60 :: v_dual_mov_b32 v86, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s62 :: v_dual_mov_b32 v6, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s59 :: v_dual_mov_b32 v4, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v96, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s40 :: v_dual_mov_b32 v8, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v10, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s6 :: v_dual_mov_b32 v14, s4
-; GFX11-TRUE16-NEXT: .LBB109_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v19, v14, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v18, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v24, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v27, v12, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v16, v2, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v22, v3, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v25, v86, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v21, v87, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v26, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v32, v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v23, v6, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v5, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v84, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v20, v4, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v31, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v6, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v36, v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v33, v82, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v38, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v28, v83, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v35, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v30, v80, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v48, v71, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v6, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v37, v70, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v17, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v50, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v39, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v54, v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v53, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v34, v69, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v55, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v49, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v52, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v51, v15, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v8, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v20, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v22
-; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v21
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v19, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s26, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v22, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, v24, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v21, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v48.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v21, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v38.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v49.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v3
+; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v32, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v34, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v35, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v28, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v39, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v31, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v30, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v21
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v70, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v36, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v83, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v24, v29, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v33, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v19
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v48, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v37, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v49, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v38, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v84, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v15, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v21
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[16:19], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
-; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v40, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v40, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v40, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v40, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v40, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v40, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v40, 0
-; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload
-; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v32bf16_to_v64i8_scalar:
@@ -95259,239 +97395,274 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0xf
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v31, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v30
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v29
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v28
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v27
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v26
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v25
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v24
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v23
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v22
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v21
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v20
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v19
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v18
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v17
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v16
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v15
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v14
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v116, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v119, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v118, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v128, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v117, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v30
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v27
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v26
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v28
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v25
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v115, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v29
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v22
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v21
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v97, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v19
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v23
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s29 :: v_dual_mov_b32 v34, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v101, s5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v13
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v84, s7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s8 :: v_dual_mov_b32 v80, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s5 :: v_dual_mov_b32 v26, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s28 :: v_dual_mov_b32 v27, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s25 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s24 :: v_dual_mov_b32 v16, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s22 :: v_dual_mov_b32 v18, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s21 :: v_dual_mov_b32 v22, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v20, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v17, s17
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v21, s3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v25, s2
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v54
-; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v128
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB111_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0x6050400
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v48, v52, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v31, v37, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v32, v36, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s10, s4, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s41, s7, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s15, s6, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s13, s5, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s9, s43, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s60, s45, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s8, s14, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, s59, s40, v11
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, s12, s56, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, s63, s58, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v8.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s62, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v9.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, s61, s42, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, s11, s46, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, s57, s73, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v13.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v25, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v23, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v34, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v39, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v80, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v68, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v64, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v24, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v22, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v48, v69, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v31, v65, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v35, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v49, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v53, v97, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v51, v83, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v66, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v98, v71, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v34, v38, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, s72, s47, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v32, v70, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v81, v103, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v7.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v84, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v99, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v54, v112, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v96, v116, 0x6050400
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v52, v113, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v101, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v85, v114, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v102, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v13.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v50, s74, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v13.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v53, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v14.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v35, v49, 0x6050400
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v15.l
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v39, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v87, v115, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v117, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v15.l
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v67, v118, 0x6050400
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v119, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.h, v129.l
; GFX11-TRUE16-NEXT: s_branch .LBB111_3
; GFX11-TRUE16-NEXT: .LBB111_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s75, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX11-TRUE16-NEXT: .LBB111_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s75, s75, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s75, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s75, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB111_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v36
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v119
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v116
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v118
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v112
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v53
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v39
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v37
-; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v49
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v52
-; GFX11-TRUE16-NEXT: s_add_i32 s61, s61, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v51, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s73, s73, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s63, s63, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v5, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s73, s57, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v117
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v100, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 3, v103
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v115
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v19
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s72, s47, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v96, 0x300, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v2, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v3, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v5, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s74, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s14, s8, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s43, s9, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, v3, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s59, s59, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s61, s42, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s46, s11, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, s56, s12, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v6, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v54, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v70
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v102
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v67, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v114
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v97
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v85, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v32, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v101
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v65
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v83
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v53, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v69
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v99
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v50, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v82, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s63, s58, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s59, s40, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, s60, s45, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s13, s5, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s62, s44, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s28, s29, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v4
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, s10, s4, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v31, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v64
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v84
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v51, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v113
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v48, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v98
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v80
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v66
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v39
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v68
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v37, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v34
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v35
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v3, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v4, v33, 0xc0c0004
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s20, s21, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s41, s41, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s15, s6, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, s41, s7, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, s26, s27, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v28, 0x300, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v0
-; GFX11-TRUE16-NEXT: v_perm_b32 v0, s22, s23, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v29, s2, s3, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, s18, s19, v1
-; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
-; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, s16, s17, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, s0, s1, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x300, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v27, 0x300, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v30, 0x300, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v33, 0x300, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v31
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v32
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v25
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v36, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v49
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v22, 3, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 3, v24
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v19, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v30, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v22, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v23, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v26, 0x300, v26
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v27
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v96.l
; GFX11-TRUE16-NEXT: .LBB111_5: ; %end
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
index 9b079dccf1023a..fa6dce4fb2821f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
@@ -3771,126 +3771,299 @@ define inreg <36 x i16> @bitcast_v18i32_to_v36i16_scalar(<18 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v17, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v18i32_to_v36i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-NEXT: s_mov_b32 s46, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s46, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s46, s46, exec_lo
-; GFX11-NEXT: s_cselect_b32 s46, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s46, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s18, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s19, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s20, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s21, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s22, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s23, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s24, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s25, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s26, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s27, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s28, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s29, s4
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
-; GFX11-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
-; GFX11-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
-; GFX11-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v18i32_to_v36i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s28, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s4 :: v_dual_mov_b32 v16, s5
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s26, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s6 :: v_dual_mov_b32 v14, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s8 :: v_dual_mov_b32 v12, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v10, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v8, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v6, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s3 :: v_dual_mov_b32 v33, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s1 :: v_dual_mov_b32 v35, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v18i32_to_v36i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s46, s46, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s46, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s46, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s18, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s19, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s20, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s21, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s22, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s23, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s24, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s25, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s26, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s27, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s28, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s29, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -5356,95 +5529,210 @@ define inreg <18 x i32> @bitcast_v36i16_to_v18i32_scalar(<36 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36i16_to_v18i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36i16_to_v18i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36i16_to_v18i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -6537,126 +6825,299 @@ define inreg <36 x half> @bitcast_v18i32_to_v36f16_scalar(<18 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v17, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v18i32_to_v36f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-NEXT: s_mov_b32 s46, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s46, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s46, s46, exec_lo
-; GFX11-NEXT: s_cselect_b32 s46, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s46, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s18, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s19, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s20, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s21, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s22, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s23, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s24, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s25, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s26, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s27, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s28, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s29, s4
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
-; GFX11-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
-; GFX11-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
-; GFX11-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v18i32_to_v36f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s28, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s4 :: v_dual_mov_b32 v16, s5
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s26, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s6 :: v_dual_mov_b32 v14, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s8 :: v_dual_mov_b32 v12, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v10, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v8, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v6, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s3 :: v_dual_mov_b32 v33, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s1 :: v_dual_mov_b32 v35, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v18i32_to_v36f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s46, s46, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s46, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s46, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s18, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s19, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s20, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s21, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s22, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s23, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s24, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s25, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s26, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s27, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s28, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s29, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8266,95 +8727,210 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36f16_to_v18i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36f16_to_v18i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36f16_to_v18i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11627,54 +12203,95 @@ define inreg <36 x i16> @bitcast_v18f32_to_v36i16_scalar(<18 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
@@ -11713,27 +12330,7 @@ define inreg <36 x i16> @bitcast_v18f32_to_v36i16_scalar(<18 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s12 :: v_dual_mov_b32 v24, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s10 :: v_dual_mov_b32 v22, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s8 :: v_dual_mov_b32 v20, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
@@ -13368,95 +13965,210 @@ define inreg <18 x float> @bitcast_v36i16_to_v18f32_scalar(<36 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36i16_to_v18f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36i16_to_v18f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36i16_to_v18f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -14595,54 +15307,95 @@ define inreg <36 x half> @bitcast_v18f32_to_v36f16_scalar(<18 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
@@ -14681,27 +15434,7 @@ define inreg <36 x half> @bitcast_v18f32_to_v36f16_scalar(<18 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s12 :: v_dual_mov_b32 v24, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s10 :: v_dual_mov_b32 v22, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s8 :: v_dual_mov_b32 v20, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
@@ -16480,95 +17213,210 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36f16_to_v18f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36f16_to_v18f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36f16_to_v18f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -18600,126 +19448,301 @@ define inreg <36 x i16> @bitcast_v9i64_to_v36i16_scalar(<9 x i64> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v17, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v9i64_to_v36i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-NEXT: s_mov_b32 s46, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s46, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s46, s46, exec_lo
-; GFX11-NEXT: s_cselect_b32 s46, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s46, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s18, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s19, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s20, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s21, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s22, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s23, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s24, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s25, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s26, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s27, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s28, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s29, s4
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
-; GFX11-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
-; GFX11-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
-; GFX11-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v9i64_to_v36i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s4, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s5 :: v_dual_mov_b32 v16, s4
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s7 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s9 :: v_dual_mov_b32 v12, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v10, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v8, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s15 :: v_dual_mov_b32 v6, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s3 :: v_dual_mov_b32 v33, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s1 :: v_dual_mov_b32 v35, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v9i64_to_v36i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s46, s46, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s46, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s46, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s18, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s19, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s20, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s21, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s22, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s23, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s24, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s25, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s26, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s27, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s28, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s29, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -20185,95 +21208,210 @@ define inreg <9 x i64> @bitcast_v36i16_to_v9i64_scalar(<36 x i16> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36i16_to_v9i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36i16_to_v9i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36i16_to_v9i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -21376,126 +22514,301 @@ define inreg <36 x half> @bitcast_v9i64_to_v36f16_scalar(<9 x i64> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v17, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v9i64_to_v36f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-NEXT: s_mov_b32 s46, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s46, -1
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s46, s46, exec_lo
-; GFX11-NEXT: s_cselect_b32 s46, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s46, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-NEXT: s_lshr_b32 s5, s28, 16
-; GFX11-NEXT: s_lshr_b32 s6, s27, 16
-; GFX11-NEXT: s_lshr_b32 s7, s26, 16
-; GFX11-NEXT: s_lshr_b32 s8, s25, 16
-; GFX11-NEXT: s_lshr_b32 s9, s24, 16
-; GFX11-NEXT: s_lshr_b32 s10, s23, 16
-; GFX11-NEXT: s_lshr_b32 s11, s22, 16
-; GFX11-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-NEXT: s_lshr_b32 s13, s20, 16
-; GFX11-NEXT: s_lshr_b32 s14, s19, 16
-; GFX11-NEXT: s_lshr_b32 s15, s18, 16
-; GFX11-NEXT: s_lshr_b32 s40, s17, 16
-; GFX11-NEXT: s_lshr_b32 s41, s16, 16
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: s_lshr_b32 s44, s1, 16
-; GFX11-NEXT: s_lshr_b32 s45, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s18, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s19, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s20, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s21, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s22, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s23, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s24, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s25, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s26, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s27, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s28, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s29, s4
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
-; GFX11-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
-; GFX11-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
-; GFX11-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
-; GFX11-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
-; GFX11-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v9i64_to_v36f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s4, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s5 :: v_dual_mov_b32 v16, s4
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s7 :: v_dual_mov_b32 v14, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s9 :: v_dual_mov_b32 v12, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v10, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v8, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s15 :: v_dual_mov_b32 v6, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s3 :: v_dual_mov_b32 v33, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s1 :: v_dual_mov_b32 v35, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v9i64_to_v36f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s46, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s46, s46, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s46, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s46, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s18, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s19, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s20, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s21, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s22, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s23, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s24, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s25, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s26, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s27, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s28, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s29, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s9 :: v_dual_mov_b32 v13, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v17, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -23105,95 +24418,210 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36f16_to_v9i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36f16_to_v9i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36f16_to_v9i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -24278,54 +25706,86 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
@@ -24337,64 +25797,44 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s46 :: v_dual_mov_b32 v18, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s45 :: v_dual_mov_b32 v34, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s44 :: v_dual_mov_b32 v32, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s43 :: v_dual_mov_b32 v30, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s42 :: v_dual_mov_b32 v28, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s41 :: v_dual_mov_b32 v26, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s40 :: v_dual_mov_b32 v24, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v22, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s13 :: v_dual_mov_b32 v20, s4
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v9f64_to_v36i16_scalar:
@@ -26001,95 +27441,210 @@ define inreg <9 x double> @bitcast_v36i16_to_v9f64_scalar(<36 x i16> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36i16_to_v9f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36i16_to_v9f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36i16_to_v9f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -27174,54 +28729,86 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s6
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
@@ -27233,64 +28820,44 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s46 :: v_dual_mov_b32 v18, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s45 :: v_dual_mov_b32 v34, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s44 :: v_dual_mov_b32 v32, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s43 :: v_dual_mov_b32 v30, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s42 :: v_dual_mov_b32 v28, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s41 :: v_dual_mov_b32 v26, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s40 :: v_dual_mov_b32 v24, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v22, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s13 :: v_dual_mov_b32 v20, s4
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v9f64_to_v36f16_scalar:
@@ -29041,95 +30608,210 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v36f16_to_v9f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v0
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s44, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v36f16_to_v9f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v36f16_to_v9f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s44, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -30645,93 +32327,39 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v36i16_to_v36f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s4 :: v_dual_mov_b32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s4 :: v_dual_mov_b32 v32, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s4 :: v_dual_mov_b32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s4 :: v_dual_mov_b32 v28, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s4 :: v_dual_mov_b32 v26, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s4 :: v_dual_mov_b32 v24, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v20, s5
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s46, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s46, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s46, -1
-; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s46, s46, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s46, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s46, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s16, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s6, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v22, s5
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
@@ -30739,38 +32367,92 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s45 :: v_dual_mov_b32 v19, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s43 :: v_dual_mov_b32 v21, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s41 :: v_dual_mov_b32 v23, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s15 :: v_dual_mov_b32 v25, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s8 :: v_dual_mov_b32 v33, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
+; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
+; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v17
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v36i16_to_v36f16_scalar:
@@ -32241,93 +33923,39 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v36f16_to_v36i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s4 :: v_dual_mov_b32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s4 :: v_dual_mov_b32 v32, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s4 :: v_dual_mov_b32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s4 :: v_dual_mov_b32 v28, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s4 :: v_dual_mov_b32 v26, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s4 :: v_dual_mov_b32 v24, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v20, s5
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s46, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s46, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s46, -1
-; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s46, s46, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s46, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s46, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s16, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v22, s5
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
@@ -32335,38 +33963,92 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s45 :: v_dual_mov_b32 v19, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s43 :: v_dual_mov_b32 v21, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s41 :: v_dual_mov_b32 v23, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s15 :: v_dual_mov_b32 v25, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s8 :: v_dual_mov_b32 v33, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v34.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
+; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
+; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v18.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v17
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v35.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v36f16_to_v36i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
index 78b54755887fca..8c94073fab3815 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
@@ -4072,139 +4072,330 @@ define inreg <40 x i16> @bitcast_v20i32_to_v40i16_scalar(<20 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v19, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v20i32_to_v40i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-NEXT: v_readfirstlane_b32 s5, v0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cmp_lg_u32 s6, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s22, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s23, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s24, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s25, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s26, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s27, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s28, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s29, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s6
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
-; GFX11-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
-; GFX11-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
-; GFX11-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
-; GFX11-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v20i32_to_v40i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s6 :: v_dual_mov_b32 v16, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s8 :: v_dual_mov_b32 v14, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s10 :: v_dual_mov_b32 v12, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v10, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v8, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s3 :: v_dual_mov_b32 v37, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v20i32_to_v40i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s22, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s23, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s24, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s25, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s26, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s27, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s28, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s29, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -5845,103 +6036,234 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i16_to_v20i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40i16_to_v20i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i16_to_v20i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7140,139 +7462,330 @@ define inreg <40 x half> @bitcast_v20i32_to_v40f16_scalar(<20 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v19, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v20i32_to_v40f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-NEXT: v_readfirstlane_b32 s5, v0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cmp_lg_u32 s6, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s22, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s23, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s24, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s25, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s26, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s27, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s28, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s29, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s6
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
-; GFX11-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
-; GFX11-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
-; GFX11-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
-; GFX11-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v20i32_to_v40f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s7, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s6 :: v_dual_mov_b32 v16, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s8 :: v_dual_mov_b32 v14, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s10 :: v_dual_mov_b32 v12, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v10, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v8, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s3 :: v_dual_mov_b32 v37, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v20i32_to_v40f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s22, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s23, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s24, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s25, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s26, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s27, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s28, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s29, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -9068,103 +9581,234 @@ define inreg <20 x i32> @bitcast_v40f16_to_v20i32_scalar(<40 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40f16_to_v20i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40f16_to_v20i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40f16_to_v20i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -12688,64 +13332,109 @@ define inreg <40 x i16> @bitcast_v20f32_to_v40i16_scalar(<20 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s4, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s4, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -12784,29 +13473,7 @@ define inreg <40 x i16> @bitcast_v20f32_to_v40i16_scalar(<20 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s12 :: v_dual_mov_b32 v24, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s10 :: v_dual_mov_b32 v22, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s6
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
@@ -14634,103 +15301,234 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i16_to_v20f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40i16_to_v20f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i16_to_v20f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -15979,64 +16777,109 @@ define inreg <40 x half> @bitcast_v20f32_to_v40f16_scalar(<20 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s4, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s4, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -16075,29 +16918,7 @@ define inreg <40 x half> @bitcast_v20f32_to_v40f16_scalar(<20 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s12 :: v_dual_mov_b32 v24, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s10 :: v_dual_mov_b32 v22, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s6
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
@@ -18080,103 +18901,234 @@ define inreg <20 x float> @bitcast_v40f16_to_v20f32_scalar(<40 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40f16_to_v20f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40f16_to_v20f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40f16_to_v20f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -20377,139 +21329,332 @@ define inreg <40 x i16> @bitcast_v10i64_to_v40i16_scalar(<10 x i64> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v19, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v10i64_to_v40i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-NEXT: v_readfirstlane_b32 s5, v0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cmp_lg_u32 s6, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s22, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s23, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s24, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s25, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s26, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s27, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s28, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s29, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s6
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
-; GFX11-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
-; GFX11-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
-; GFX11-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
-; GFX11-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v10i64_to_v40i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s7 :: v_dual_mov_b32 v16, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s9 :: v_dual_mov_b32 v14, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s11 :: v_dual_mov_b32 v12, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v10, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v8, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s3 :: v_dual_mov_b32 v37, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v10i64_to_v40i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s22, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s23, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s24, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s25, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s26, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s27, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s28, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s29, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -22150,103 +23295,234 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i16_to_v10i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40i16_to_v10i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i16_to_v10i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -23455,139 +24731,332 @@ define inreg <40 x half> @bitcast_v10i64_to_v40f16_scalar(<10 x i64> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v19, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v10i64_to_v40f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-NEXT: v_readfirstlane_b32 s4, v1
-; GFX11-NEXT: v_readfirstlane_b32 s5, v0
-; GFX11-NEXT: s_mov_b32 s58, 0
-; GFX11-NEXT: s_cmp_lg_u32 s6, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s58, -1
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s58, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s6, s4, 16
-; GFX11-NEXT: s_lshr_b32 s7, s5, 16
-; GFX11-NEXT: s_lshr_b32 s8, s29, 16
-; GFX11-NEXT: s_lshr_b32 s9, s28, 16
-; GFX11-NEXT: s_lshr_b32 s10, s27, 16
-; GFX11-NEXT: s_lshr_b32 s11, s26, 16
-; GFX11-NEXT: s_lshr_b32 s12, s25, 16
-; GFX11-NEXT: s_lshr_b32 s13, s24, 16
-; GFX11-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-NEXT: s_lshr_b32 s15, s22, 16
-; GFX11-NEXT: s_lshr_b32 s40, s21, 16
-; GFX11-NEXT: s_lshr_b32 s41, s20, 16
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-NEXT: s_lshr_b32 s45, s16, 16
-; GFX11-NEXT: s_lshr_b32 s46, s3, 16
-; GFX11-NEXT: s_lshr_b32 s47, s2, 16
-; GFX11-NEXT: s_lshr_b32 s56, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s22, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s23, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s24, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s25, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s26, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s27, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s28, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s29, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s6
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
-; GFX11-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
-; GFX11-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
-; GFX11-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
-; GFX11-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v10i64_to_v40f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s7 :: v_dual_mov_b32 v16, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s9 :: v_dual_mov_b32 v14, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s11 :: v_dual_mov_b32 v12, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v10, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v8, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s3 :: v_dual_mov_b32 v37, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s1 :: v_dual_mov_b32 v39, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v10i64_to_v40f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v0
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s58, s58, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s58, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s22, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s23, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s24, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s25, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s26, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s27, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s28, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s29, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v11, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v17, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s5 :: v_dual_mov_b32 v19, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -25383,103 +26852,234 @@ define inreg <10 x i64> @bitcast_v40f16_to_v10i64_scalar(<40 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40f16_to_v10i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40f16_to_v10i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40f16_to_v10i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -26670,58 +28270,93 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[4:5], 1.0
@@ -26734,70 +28369,48 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s58 :: v_dual_mov_b32 v20, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s57 :: v_dual_mov_b32 v38, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s56 :: v_dual_mov_b32 v36, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s47 :: v_dual_mov_b32 v34, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s46 :: v_dual_mov_b32 v32, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s45 :: v_dual_mov_b32 v30, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s43 :: v_dual_mov_b32 v26, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s42 :: v_dual_mov_b32 v24, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s40 :: v_dual_mov_b32 v22, s6
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v22.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v10f64_to_v40i16_scalar:
@@ -28594,103 +30207,234 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40i16_to_v10f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40i16_to_v10f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40i16_to_v10f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -29881,58 +31625,93 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s8
; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s7 :: v_dual_mov_b32 v31, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v35, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v39, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s6, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s6, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[4:5], 1.0
@@ -29945,70 +31724,48 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s58 :: v_dual_mov_b32 v20, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s57 :: v_dual_mov_b32 v38, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s56 :: v_dual_mov_b32 v36, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s47 :: v_dual_mov_b32 v34, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s46 :: v_dual_mov_b32 v32, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s45 :: v_dual_mov_b32 v30, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s44 :: v_dual_mov_b32 v28, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s43 :: v_dual_mov_b32 v26, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s42 :: v_dual_mov_b32 v24, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s40 :: v_dual_mov_b32 v22, s6
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v22.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v10f64_to_v40f16_scalar:
@@ -31960,103 +33717,234 @@ define inreg <10 x double> @bitcast_v40f16_to_v10f64_scalar(<40 x half> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v40f16_to_v10f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v1
-; GFX11-NEXT: v_readfirstlane_b32 s46, v0
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s56, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v40f16_to_v10f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v24, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s5 :: v_dual_mov_b32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s5 :: v_dual_mov_b32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s5 :: v_dual_mov_b32 v38, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s7 :: v_dual_mov_b32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v28, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v40f16_to_v10f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s56, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -33778,146 +35666,148 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v40i16_to_v40f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s57, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s56, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s57, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s56, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s4
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s5
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s8, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s57 :: v_dual_mov_b32 v18, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s47 :: v_dual_mov_b32 v21, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s45 :: v_dual_mov_b32 v23, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s43 :: v_dual_mov_b32 v25, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s41 :: v_dual_mov_b32 v27, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s6 :: v_dual_mov_b32 v37, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v39, s7
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v20.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v19
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v39.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v40i16_to_v40f16_scalar:
@@ -35546,146 +37436,148 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v40f16_to_v40i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s56, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v2 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s57, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s56, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s7 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v19, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s6
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s58, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s58, s58, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s58, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s58, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s57, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s56, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s4
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s5
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s46 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s57 :: v_dual_mov_b32 v18, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s47 :: v_dual_mov_b32 v21, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s45 :: v_dual_mov_b32 v23, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s43 :: v_dual_mov_b32 v25, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s41 :: v_dual_mov_b32 v27, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s6 :: v_dual_mov_b32 v37, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v39, s7
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v38.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v20.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v19
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v39.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v40f16_to_v40i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
index 26821b059cb6c0..b626bbb41627a0 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
@@ -2400,47 +2400,45 @@ define i64 @bitcast_v4bf16_to_i64(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v4, v5 :: v_dual_add_f32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX11-TRUE16-NEXT: .LBB22_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -2689,46 +2687,48 @@ define inreg i64 @bitcast_v4bf16_to_i64_scalar(<4 x bfloat> inreg %a, i32 inreg
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB23_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v1, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_nc_u32 v8, v8, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v3, v5 :: v_dual_add_nc_u32 v5, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v2, v5 :: v_dual_add_nc_u32 v9, v9, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v5, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v9.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB23_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -3174,50 +3174,105 @@ define inreg <8 x i8> @bitcast_i64_to_v8i8_scalar(i64 inreg %a, i32 inreg %b) #0
; GFX9-NEXT: v_mov_b32_e32 v7, s5
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_i64_to_v8i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB25_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-NEXT: s_lshr_b32 s5, s1, 8
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b32 s7, s0, 8
-; GFX11-NEXT: s_branch .LBB25_3
-; GFX11-NEXT: .LBB25_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: .LBB25_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s8, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s8, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB25_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-NEXT: s_lshr_b32 s5, s1, 8
-; GFX11-NEXT: s_lshr_b32 s7, s0, 8
-; GFX11-NEXT: .LBB25_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s7
-; GFX11-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s2
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_i64_to_v8i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB25_3
+; GFX11-TRUE16-NEXT: .LBB25_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v7, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s4
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v2, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB25_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_i64_to_v8i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB25_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB25_3
+; GFX11-FAKE16-NEXT: .LBB25_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: .LBB25_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB25_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s0, 8
+; GFX11-FAKE16-NEXT: .LBB25_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s3
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -3738,62 +3793,122 @@ define inreg i64 @bitcast_v8i8_to_i64_scalar(<8 x i8> inreg %a, i32 inreg %b) #0
; GFX9-NEXT: .LBB27_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB27_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB27_3
-; GFX11-NEXT: .LBB27_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB27_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB27_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB27_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB27_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB27_3
+; GFX11-TRUE16-NEXT: .LBB27_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB27_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB27_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB27_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB27_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB27_3
+; GFX11-FAKE16-NEXT: .LBB27_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB27_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB27_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB27_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -5829,47 +5944,45 @@ define double @bitcast_v4bf16_to_f64(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v4, v5 :: v_dual_add_f32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX11-TRUE16-NEXT: .LBB46_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -6118,46 +6231,48 @@ define inreg double @bitcast_v4bf16_to_f64_scalar(<4 x bfloat> inreg %a, i32 inr
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v1, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_nc_u32 v8, v8, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v3, v5 :: v_dual_add_nc_u32 v5, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v2, v5 :: v_dual_add_nc_u32 v9, v9, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v5, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v9.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB47_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -6605,67 +6720,116 @@ define inreg <8 x i8> @bitcast_f64_to_v8i8_scalar(double inreg %a, i32 inreg %b)
; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_f64_to_v8i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB49_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s6, s1, 24
-; GFX11-NEXT: s_lshr_b32 s5, s1, 16
-; GFX11-NEXT: s_lshr_b32 s3, s1, 8
-; GFX11-NEXT: s_lshr_b32 s8, s0, 16
-; GFX11-NEXT: s_lshr_b32 s7, s0, 8
-; GFX11-NEXT: s_branch .LBB49_3
-; GFX11-NEXT: .LBB49_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB49_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB49_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[8:9], s[0:1], 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v8
-; GFX11-NEXT: s_branch .LBB49_6
-; GFX11-NEXT: .LBB49_5:
-; GFX11-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v1, s7
-; GFX11-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, s5
-; GFX11-NEXT: v_mov_b32_e32 v7, s6
-; GFX11-NEXT: v_mov_b32_e32 v5, s3
-; GFX11-NEXT: .LBB49_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v8
-; GFX11-NEXT: v_mov_b32_e32 v4, v9
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = fadd double %a, 1.000000e+00
- %a2 = bitcast double %a1 to <8 x i8>
- br label %end
-
-cmp.false:
- %a3 = bitcast double %a to <8 x i8>
- br label %end
-
-end:
+; GFX11-TRUE16-LABEL: bitcast_f64_to_v8i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB49_3
+; GFX11-TRUE16-NEXT: .LBB49_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f64 v[3:4], s[0:1], 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_f64_to_v8i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB49_3
+; GFX11-FAKE16-NEXT: .LBB49_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB49_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB49_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f64 v[8:9], s[0:1], 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-FAKE16-NEXT: s_branch .LBB49_6
+; GFX11-FAKE16-NEXT: .LBB49_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v1, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, s3
+; GFX11-FAKE16-NEXT: .LBB49_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v9
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = fadd double %a, 1.000000e+00
+ %a2 = bitcast double %a1 to <8 x i8>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast double %a to <8 x i8>
+ br label %end
+
+end:
%phi = phi <8 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
ret <8 x i8> %phi
}
@@ -7173,62 +7337,122 @@ define inreg double @bitcast_v8i8_to_f64_scalar(<8 x i8> inreg %a, i32 inreg %b)
; GFX9-NEXT: .LBB51_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB51_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB51_3
-; GFX11-NEXT: .LBB51_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB51_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB51_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB51_3
+; GFX11-FAKE16-NEXT: .LBB51_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB51_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8910,47 +9134,45 @@ define <2 x i32> @bitcast_v4bf16_to_v2i32(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB66_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v4, v5 :: v_dual_add_f32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX11-TRUE16-NEXT: .LBB66_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -9199,46 +9421,48 @@ define inreg <2 x i32> @bitcast_v4bf16_to_v2i32_scalar(<4 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB67_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v1, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_nc_u32 v8, v8, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v3, v5 :: v_dual_add_nc_u32 v5, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v2, v5 :: v_dual_add_nc_u32 v9, v9, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v5, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v9.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB67_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -9682,50 +9906,106 @@ define inreg <8 x i8> @bitcast_v2i32_to_v8i8_scalar(<2 x i32> inreg %a, i32 inre
; GFX9-NEXT: v_mov_b32_e32 v7, s5
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v2i32_to_v8i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB69_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-NEXT: s_lshr_b32 s5, s1, 8
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b32 s7, s0, 8
-; GFX11-NEXT: s_branch .LBB69_3
-; GFX11-NEXT: .LBB69_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: .LBB69_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s8, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s8, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB69_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s5, s1, 8
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b32 s7, s0, 8
-; GFX11-NEXT: .LBB69_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s7
-; GFX11-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s2
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v2i32_to_v8i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB69_3
+; GFX11-TRUE16-NEXT: .LBB69_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v7, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v5, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: .LBB69_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v2i32_to_v8i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB69_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB69_3
+; GFX11-FAKE16-NEXT: .LBB69_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: .LBB69_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB69_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s0, 8
+; GFX11-FAKE16-NEXT: .LBB69_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s3
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -10246,76 +10526,136 @@ define inreg <2 x i32> @bitcast_v8i8_to_v2i32_scalar(<8 x i8> inreg %a, i32 inre
; GFX9-NEXT: .LBB71_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_v2i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB71_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB71_3
-; GFX11-NEXT: .LBB71_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB71_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB71_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB71_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = add <8 x i8> %a, splat (i8 3)
- %a2 = bitcast <8 x i8> %a1 to <2 x i32>
- br label %end
-
-cmp.false:
- %a3 = bitcast <8 x i8> %a to <2 x i32>
- br label %end
-
-end:
- %phi = phi <2 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_v2i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB71_3
+; GFX11-TRUE16-NEXT: .LBB71_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB71_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_v2i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB71_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB71_3
+; GFX11-FAKE16-NEXT: .LBB71_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB71_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB71_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB71_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = add <8 x i8> %a, splat (i8 3)
+ %a2 = bitcast <8 x i8> %a1 to <2 x i32>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast <8 x i8> %a to <2 x i32>
+ br label %end
+
+end:
+ %phi = phi <2 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
ret <2 x i32> %phi
}
@@ -11634,47 +11974,45 @@ define <2 x float> @bitcast_v4bf16_to_v2f32(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v4, v5 :: v_dual_add_f32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX11-TRUE16-NEXT: .LBB82_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -11923,46 +12261,48 @@ define inreg <2 x float> @bitcast_v4bf16_to_v2f32_scalar(<4 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB83_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v1, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_nc_u32 v8, v8, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v3, v5 :: v_dual_add_nc_u32 v5, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v2, v5 :: v_dual_add_nc_u32 v9, v9, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v5, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v9.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB83_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -12417,55 +12757,106 @@ define inreg <8 x i8> @bitcast_v2f32_to_v8i8_scalar(<2 x float> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v2f32_to_v8i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB85_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s5, s1, 16
-; GFX11-NEXT: s_lshr_b32 s7, s1, 8
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b32 s8, s0, 8
-; GFX11-NEXT: s_branch .LBB85_3
-; GFX11-NEXT: .LBB85_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: .LBB85_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB85_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v9, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v8, s0, 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v9
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v8
-; GFX11-NEXT: s_branch .LBB85_6
-; GFX11-NEXT: .LBB85_5:
-; GFX11-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
-; GFX11-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s6
-; GFX11-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s5
-; GFX11-NEXT: v_mov_b32_e32 v7, s3
-; GFX11-NEXT: v_mov_b32_e32 v3, s2
-; GFX11-NEXT: .LBB85_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v8
-; GFX11-NEXT: v_mov_b32_e32 v4, v9
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v2f32_to_v8i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v8, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s1
+; GFX11-TRUE16-NEXT: s_branch .LBB85_3
+; GFX11-TRUE16-NEXT: .LBB85_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, s0, 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-TRUE16-NEXT: .LBB85_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v9.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v2f32_to_v8i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB85_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB85_3
+; GFX11-FAKE16-NEXT: .LBB85_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: .LBB85_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB85_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, s0, 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-FAKE16-NEXT: s_branch .LBB85_6
+; GFX11-FAKE16-NEXT: .LBB85_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s2
+; GFX11-FAKE16-NEXT: .LBB85_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v9
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -12986,62 +13377,122 @@ define inreg <2 x float> @bitcast_v8i8_to_v2f32_scalar(<8 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB87_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_v2f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB87_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB87_3
-; GFX11-NEXT: .LBB87_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB87_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB87_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB87_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_v2f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB87_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB87_3
+; GFX11-TRUE16-NEXT: .LBB87_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB87_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB87_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB87_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_v2f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB87_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB87_3
+; GFX11-FAKE16-NEXT: .LBB87_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB87_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB87_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB87_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -13983,50 +14434,44 @@ define <4 x i16> @bitcast_v4bf16_to_v4i16(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB94_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v3, 16, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v6, v7 :: v_dual_and_b32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v9, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v6, v9 :: v_dual_add_f32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v10, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v5.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
; GFX11-TRUE16-NEXT: .LBB94_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -14286,41 +14731,44 @@ define inreg <4 x i16> @bitcast_v4bf16_to_v4i16_scalar(<4 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB95_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s0, 16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v0, 16, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v6.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB95_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -14814,55 +15262,106 @@ define inreg <8 x i8> @bitcast_v4i16_to_v8i8_scalar(<4 x i16> inreg %a, i32 inre
; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4i16_to_v8i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB97_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s5, s1, 16
-; GFX11-NEXT: s_lshr_b32 s7, s1, 8
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b32 s8, s0, 8
-; GFX11-NEXT: s_branch .LBB97_3
-; GFX11-NEXT: .LBB97_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: .LBB97_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB97_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v9
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v8
-; GFX11-NEXT: s_branch .LBB97_6
-; GFX11-NEXT: .LBB97_5:
-; GFX11-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
-; GFX11-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s6
-; GFX11-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s5
-; GFX11-NEXT: v_mov_b32_e32 v7, s3
-; GFX11-NEXT: v_mov_b32_e32 v3, s2
-; GFX11-NEXT: .LBB97_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v8
-; GFX11-NEXT: v_mov_b32_e32 v4, v9
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4i16_to_v8i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v8, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s1
+; GFX11-TRUE16-NEXT: s_branch .LBB97_3
+; GFX11-TRUE16-NEXT: .LBB97_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-TRUE16-NEXT: .LBB97_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v9.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4i16_to_v8i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB97_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB97_3
+; GFX11-FAKE16-NEXT: .LBB97_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: .LBB97_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB97_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-FAKE16-NEXT: s_branch .LBB97_6
+; GFX11-FAKE16-NEXT: .LBB97_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s2
+; GFX11-FAKE16-NEXT: .LBB97_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v9
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -15404,62 +15903,122 @@ define inreg <4 x i16> @bitcast_v8i8_to_v4i16_scalar(<8 x i8> inreg %a, i32 inre
; GFX9-NEXT: .LBB99_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_v4i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB99_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB99_3
-; GFX11-NEXT: .LBB99_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB99_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB99_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB99_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_v4i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB99_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB99_3
+; GFX11-TRUE16-NEXT: .LBB99_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB99_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB99_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB99_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_v4i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB99_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB99_3
+; GFX11-FAKE16-NEXT: .LBB99_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB99_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB99_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB99_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -15915,46 +16474,45 @@ define <4 x half> @bitcast_v4bf16_to_v4f16(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB102_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_lshlrev_b32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v8, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v9, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v9, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
; GFX11-TRUE16-NEXT: .LBB102_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -16216,48 +16774,48 @@ define inreg <4 x half> @bitcast_v4bf16_to_v4f16_scalar(<4 x bfloat> inreg %a, i
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB103_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v0, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s1, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v3, v7 :: v_dual_add_nc_u32 v5, v5, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v3, v7 :: v_dual_add_nc_u32 v8, v8, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB103_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
@@ -16770,55 +17328,106 @@ define inreg <8 x i8> @bitcast_v4f16_to_v8i8_scalar(<4 x half> inreg %a, i32 inr
; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v4f16_to_v8i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB105_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s3, s1, 24
-; GFX11-NEXT: s_lshr_b32 s5, s1, 16
-; GFX11-NEXT: s_lshr_b32 s7, s1, 8
-; GFX11-NEXT: s_lshr_b32 s6, s0, 16
-; GFX11-NEXT: s_lshr_b32 s8, s0, 8
-; GFX11-NEXT: s_branch .LBB105_3
-; GFX11-NEXT: .LBB105_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr2
-; GFX11-NEXT: ; implicit-def: $sgpr7
-; GFX11-NEXT: ; implicit-def: $sgpr5
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: .LBB105_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB105_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v9
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v8
-; GFX11-NEXT: s_branch .LBB105_6
-; GFX11-NEXT: .LBB105_5:
-; GFX11-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
-; GFX11-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s6
-; GFX11-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s5
-; GFX11-NEXT: v_mov_b32_e32 v7, s3
-; GFX11-NEXT: v_mov_b32_e32 v3, s2
-; GFX11-NEXT: .LBB105_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v8
-; GFX11-NEXT: v_mov_b32_e32 v4, v9
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v4f16_to_v8i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v8, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s1
+; GFX11-TRUE16-NEXT: s_branch .LBB105_3
+; GFX11-TRUE16-NEXT: .LBB105_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-TRUE16-NEXT: .LBB105_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v9.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v4f16_to_v8i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s2, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB105_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s0, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB105_3
+; GFX11-FAKE16-NEXT: .LBB105_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: .LBB105_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB105_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-FAKE16-NEXT: s_branch .LBB105_6
+; GFX11-FAKE16-NEXT: .LBB105_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s2
+; GFX11-FAKE16-NEXT: .LBB105_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v9
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -17360,62 +17969,122 @@ define inreg <4 x half> @bitcast_v8i8_to_v4f16_scalar(<8 x i8> inreg %a, i32 inr
; GFX9-NEXT: .LBB107_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_v4f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB107_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB107_3
-; GFX11-NEXT: .LBB107_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB107_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB107_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB107_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_v4f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB107_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB107_3
+; GFX11-TRUE16-NEXT: .LBB107_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB107_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB107_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB107_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_v4f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB107_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB107_3
+; GFX11-FAKE16-NEXT: .LBB107_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB107_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB107_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB107_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -17672,61 +18341,55 @@ define <8 x i8> @bitcast_v4bf16_to_v8i8(<4 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.l
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v0, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v3, v0, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v7, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v5, v6, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add3_u32 v5, v10, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
; GFX11-TRUE16-NEXT: .LBB108_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -18059,87 +18722,90 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
; GFX11-TRUE16-NEXT: s_branch .LBB109_3
; GFX11-TRUE16-NEXT: .LBB109_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s4, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr3
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr2
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
; GFX11-TRUE16-NEXT: .LBB109_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB109_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s1, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e64 v1, 16, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v5, v9 :: v_dual_add_nc_u32 v6, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v0, v7, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v5, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v10
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v8
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-; GFX11-TRUE16-NEXT: .LBB109_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v5, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v1, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v9, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v4bf16_to_v8i8_scalar:
@@ -18768,62 +19434,122 @@ define inreg <4 x bfloat> @bitcast_v8i8_to_v4bf16_scalar(<8 x i8> inreg %a, i32
; GFX9-NEXT: .LBB111_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v8i8_to_v4bf16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s20, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB111_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v1, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v2, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v3, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v4, s16, s17, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX11-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX11-NEXT: s_branch .LBB111_3
-; GFX11-NEXT: .LBB111_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX11-NEXT: .LBB111_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB111_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v0, s18, s19, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: .LBB111_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v8i8_to_v4bf16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s19 :: v_dual_mov_b32 v3, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v9, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB111_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v8, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v9, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v1
+; GFX11-TRUE16-NEXT: s_branch .LBB111_3
+; GFX11-TRUE16-NEXT: .LBB111_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-TRUE16-NEXT: .LBB111_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB111_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: .LBB111_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v8i8_to_v4bf16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s20, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB111_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v3, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX11-FAKE16-NEXT: s_branch .LBB111_3
+; GFX11-FAKE16-NEXT: .LBB111_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX11-FAKE16-NEXT: .LBB111_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB111_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s18, s19, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: .LBB111_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
index 2a5574397fad8e..d2dcc76cfa6309 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
@@ -4342,152 +4342,362 @@ define inreg <44 x i16> @bitcast_v22i32_to_v44i16_scalar(<22 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v21, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v22i32_to_v44i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s8, v4
-; GFX11-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-NEXT: v_readfirstlane_b32 s5, v2
-; GFX11-NEXT: v_readfirstlane_b32 s6, v1
-; GFX11-NEXT: v_readfirstlane_b32 s7, v0
-; GFX11-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-NEXT: s_mov_b32 s62, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s62, -1
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s62, s62, exec_lo
-; GFX11-NEXT: s_cselect_b32 s62, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s62, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s26, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s27, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s28, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s29, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s8
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
-; GFX11-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
-; GFX11-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
-; GFX11-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v22i32_to_v44i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s8 :: v_dual_mov_b32 v16, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s10 :: v_dual_mov_b32 v14, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s12 :: v_dual_mov_b32 v12, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v10, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s3 :: v_dual_mov_b32 v49, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s1 :: v_dual_mov_b32 v51, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v22i32_to_v44i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s62, s62, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s62, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s62, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s26, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s27, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s28, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s29, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -6300,111 +6510,252 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44i16_to_v22i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44i16_to_v22i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44i16_to_v22i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7709,152 +8060,362 @@ define inreg <44 x half> @bitcast_v22i32_to_v44f16_scalar(<22 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v21, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v22i32_to_v44f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s8, v4
-; GFX11-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-NEXT: v_readfirstlane_b32 s5, v2
-; GFX11-NEXT: v_readfirstlane_b32 s6, v1
-; GFX11-NEXT: v_readfirstlane_b32 s7, v0
-; GFX11-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-NEXT: s_mov_b32 s62, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s62, -1
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s62, s62, exec_lo
-; GFX11-NEXT: s_cselect_b32 s62, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s62, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s26, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s27, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s28, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s29, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s8
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
-; GFX11-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
-; GFX11-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
-; GFX11-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v22i32_to_v44f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s9, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s8 :: v_dual_mov_b32 v16, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s10 :: v_dual_mov_b32 v14, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s12 :: v_dual_mov_b32 v12, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v10, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s3 :: v_dual_mov_b32 v49, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s1 :: v_dual_mov_b32 v51, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v22i32_to_v44f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s62, s62, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s62, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s62, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s26, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s27, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s28, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s29, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -9836,111 +10397,252 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44f16_to_v22i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44f16_to_v22i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44f16_to_v22i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -13669,71 +14371,121 @@ define inreg <44 x i16> @bitcast_v22f32_to_v44i16_scalar(<22 x float> inreg %a,
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s7, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s5, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -13774,31 +14526,7 @@ define inreg <44 x i16> @bitcast_v22f32_to_v44i16_scalar(<22 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s12 :: v_dual_mov_b32 v24, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
@@ -15816,111 +16544,252 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44i16_to_v22f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44i16_to_v22f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44i16_to_v22f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -17280,71 +18149,121 @@ define inreg <44 x half> @bitcast_v22f32_to_v44f16_scalar(<22 x float> inreg %a,
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s6 :: v_dual_mov_b32 v18, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s7, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s5, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -17385,31 +18304,7 @@ define inreg <44 x half> @bitcast_v22f32_to_v44f16_scalar(<22 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s12 :: v_dual_mov_b32 v24, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
@@ -19596,111 +20491,252 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44f16_to_v22f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44f16_to_v22f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44f16_to_v22f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -22057,152 +23093,365 @@ define inreg <44 x i16> @bitcast_v11i64_to_v44i16_scalar(<11 x i64> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v21, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v11i64_to_v44i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s8, v4
-; GFX11-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-NEXT: v_readfirstlane_b32 s5, v2
-; GFX11-NEXT: v_readfirstlane_b32 s6, v1
-; GFX11-NEXT: v_readfirstlane_b32 s7, v0
-; GFX11-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-NEXT: s_mov_b32 s62, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s62, -1
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s62, s62, exec_lo
-; GFX11-NEXT: s_cselect_b32 s62, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s62, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s26, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s27, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s28, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s29, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s8
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
-; GFX11-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
-; GFX11-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
-; GFX11-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v11i64_to_v44i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s9 :: v_dual_mov_b32 v16, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s11 :: v_dual_mov_b32 v14, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s13 :: v_dual_mov_b32 v12, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s15 :: v_dual_mov_b32 v10, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s3 :: v_dual_mov_b32 v49, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s1 :: v_dual_mov_b32 v51, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v11i64_to_v44i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s62, s62, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s62, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s62, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s26, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s27, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s28, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s29, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -24015,111 +25264,252 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44i16_to_v11i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44i16_to_v11i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44i16_to_v11i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -25436,152 +26826,365 @@ define inreg <44 x half> @bitcast_v11i64_to_v44f16_scalar(<11 x i64> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v21, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v11i64_to_v44f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s8, v4
-; GFX11-NEXT: v_readfirstlane_b32 s4, v3
-; GFX11-NEXT: v_readfirstlane_b32 s5, v2
-; GFX11-NEXT: v_readfirstlane_b32 s6, v1
-; GFX11-NEXT: v_readfirstlane_b32 s7, v0
-; GFX11-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-NEXT: s_mov_b32 s62, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s62, -1
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s62, s62, exec_lo
-; GFX11-NEXT: s_cselect_b32 s62, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s62, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s8, s4, 16
-; GFX11-NEXT: s_lshr_b32 s9, s5, 16
-; GFX11-NEXT: s_lshr_b32 s10, s6, 16
-; GFX11-NEXT: s_lshr_b32 s11, s7, 16
-; GFX11-NEXT: s_lshr_b32 s12, s29, 16
-; GFX11-NEXT: s_lshr_b32 s13, s28, 16
-; GFX11-NEXT: s_lshr_b32 s14, s27, 16
-; GFX11-NEXT: s_lshr_b32 s15, s26, 16
-; GFX11-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-NEXT: s_lshr_b32 s41, s24, 16
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s44, s21, 16
-; GFX11-NEXT: s_lshr_b32 s45, s20, 16
-; GFX11-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-NEXT: s_lshr_b32 s47, s18, 16
-; GFX11-NEXT: s_lshr_b32 s56, s17, 16
-; GFX11-NEXT: s_lshr_b32 s57, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s3, 16
-; GFX11-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-NEXT: s_lshr_b32 s61, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s26, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s27, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s28, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s29, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s8
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
-; GFX11-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
-; GFX11-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
-; GFX11-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v11i64_to_v44f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s9, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s9 :: v_dual_mov_b32 v16, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s11 :: v_dual_mov_b32 v14, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s13 :: v_dual_mov_b32 v12, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s15 :: v_dual_mov_b32 v10, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s3 :: v_dual_mov_b32 v49, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s1 :: v_dual_mov_b32 v51, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v11i64_to_v44f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s8, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s62, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s62, s62, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s62, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s62, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s26, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s27, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s28, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s29, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s15 :: v_dual_mov_b32 v15, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s13 :: v_dual_mov_b32 v17, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s7 :: v_dual_mov_b32 v19, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s5 :: v_dual_mov_b32 v21, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -27563,111 +29166,252 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44f16_to_v11i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44f16_to_v11i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44f16_to_v11i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -28965,61 +30709,100 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s7 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
@@ -29033,76 +30816,52 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s6 :: v_dual_mov_b32 v19, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s62 :: v_dual_mov_b32 v22, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s61 :: v_dual_mov_b32 v50, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s60 :: v_dual_mov_b32 v48, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s59 :: v_dual_mov_b32 v38, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s58 :: v_dual_mov_b32 v36, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v34, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s56 :: v_dual_mov_b32 v32, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s47 :: v_dual_mov_b32 v30, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s46 :: v_dual_mov_b32 v28, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s45 :: v_dual_mov_b32 v26, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s43 :: v_dual_mov_b32 v24, s8
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v24.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v11f64_to_v44i16_scalar:
@@ -31086,111 +32845,252 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44i16_to_v11f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44i16_to_v11f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44i16_to_v11f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -32488,61 +34388,100 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s10
; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s9 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s9 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v49, s10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s7 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: s_mov_b32 s8, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
@@ -32556,76 +34495,52 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s6 :: v_dual_mov_b32 v19, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s62 :: v_dual_mov_b32 v22, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s61 :: v_dual_mov_b32 v50, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s60 :: v_dual_mov_b32 v48, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s59 :: v_dual_mov_b32 v38, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s58 :: v_dual_mov_b32 v36, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s57 :: v_dual_mov_b32 v34, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s56 :: v_dual_mov_b32 v32, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s47 :: v_dual_mov_b32 v30, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s46 :: v_dual_mov_b32 v28, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s45 :: v_dual_mov_b32 v26, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s43 :: v_dual_mov_b32 v24, s8
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v24.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v11f64_to_v44f16_scalar:
@@ -34778,111 +36693,252 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v44f16_to_v11f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v3
-; GFX11-NEXT: v_readfirstlane_b32 s56, v2
-; GFX11-NEXT: v_readfirstlane_b32 s57, v1
-; GFX11-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-NEXT: v_readfirstlane_b32 s60, v4
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s62, s57, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s60, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s57, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v44f16_to_v11f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v44f16_to_v11f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s57, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s60, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s57, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -36813,160 +38869,163 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v44i16_to_v44f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s61, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s60, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s59, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s58, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s62, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s62, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s62, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s62, s62, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s62, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s62, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s61, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s60, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s59, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s58, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, s56, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s8, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s61 :: v_dual_mov_b32 v20, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s59 :: v_dual_mov_b32 v18, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s57 :: v_dual_mov_b32 v23, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s47 :: v_dual_mov_b32 v25, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s45 :: v_dual_mov_b32 v27, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v29, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s7 :: v_dual_mov_b32 v49, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v21
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v51.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v44i16_to_v44f16_scalar:
@@ -38757,160 +40816,163 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v44f16_to_v44i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s61, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s60, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s59, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s58, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s62, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s62, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v21, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s6, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s9 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s6 :: v_dual_mov_b32 v19, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s8
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s62, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s62, s62, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s62, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s62, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s61, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s60, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s59, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s58, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, s56 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s46 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s61 :: v_dual_mov_b32 v20, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s59 :: v_dual_mov_b32 v18, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s57 :: v_dual_mov_b32 v23, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s47 :: v_dual_mov_b32 v25, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s45 :: v_dual_mov_b32 v27, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s43 :: v_dual_mov_b32 v29, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s9 :: v_dual_mov_b32 v39, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s7 :: v_dual_mov_b32 v49, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v50.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v21
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v51.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v44f16_to_v44i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
index d7b8411c8f1460..32881e92b7c7b2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
@@ -4623,165 +4623,393 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v23, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v24i32_to_v48i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s10, v6
-; GFX11-NEXT: v_readfirstlane_b32 s4, v5
-; GFX11-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-NEXT: v_readfirstlane_b32 s6, v3
-; GFX11-NEXT: v_readfirstlane_b32 s7, v2
-; GFX11-NEXT: v_readfirstlane_b32 s8, v1
-; GFX11-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-NEXT: s_mov_b32 s74, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s74, -1
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s74, s74, exec_lo
-; GFX11-NEXT: s_cselect_b32 s74, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s74, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s10
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
-; GFX11-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
-; GFX11-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v24i32_to_v48i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s10 :: v_dual_mov_b32 v16, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s12 :: v_dual_mov_b32 v14, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s14 :: v_dual_mov_b32 v12, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s3 :: v_dual_mov_b32 v53, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s1 :: v_dual_mov_b32 v55, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v24i32_to_v48i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s74, s74, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s74, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s74, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -6769,119 +6997,275 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48i16_to_v24i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48i16_to_v24i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48i16_to_v24i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8304,165 +8688,393 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v23, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v24i32_to_v48f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s10, v6
-; GFX11-NEXT: v_readfirstlane_b32 s4, v5
-; GFX11-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-NEXT: v_readfirstlane_b32 s6, v3
-; GFX11-NEXT: v_readfirstlane_b32 s7, v2
-; GFX11-NEXT: v_readfirstlane_b32 s8, v1
-; GFX11-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-NEXT: s_mov_b32 s74, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s74, -1
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s74, s74, exec_lo
-; GFX11-NEXT: s_cselect_b32 s74, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s74, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s10
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
-; GFX11-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
-; GFX11-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v24i32_to_v48f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s11, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s10 :: v_dual_mov_b32 v16, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s12 :: v_dual_mov_b32 v14, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s14 :: v_dual_mov_b32 v12, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s3 :: v_dual_mov_b32 v53, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s1 :: v_dual_mov_b32 v55, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v24i32_to_v48f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s74, s74, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s74, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s74, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -10632,119 +11244,275 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48f16_to_v24i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48f16_to_v24i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48f16_to_v24i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -14687,80 +15455,134 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s9, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -14803,33 +15625,7 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
@@ -17040,119 +17836,275 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48i16_to_v24f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48i16_to_v24f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48i16_to_v24f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -18633,80 +19585,134 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s9, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -18749,33 +19755,7 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s14 :: v_dual_mov_b32 v26, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
@@ -21168,119 +22148,275 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48f16_to_v24f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48f16_to_v24f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48f16_to_v24f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -23802,165 +24938,396 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v23, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i64_to_v48i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s10, v6
-; GFX11-NEXT: v_readfirstlane_b32 s4, v5
-; GFX11-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-NEXT: v_readfirstlane_b32 s6, v3
-; GFX11-NEXT: v_readfirstlane_b32 s7, v2
-; GFX11-NEXT: v_readfirstlane_b32 s8, v1
-; GFX11-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-NEXT: s_mov_b32 s74, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s74, -1
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s74, s74, exec_lo
-; GFX11-NEXT: s_cselect_b32 s74, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s74, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s10
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
-; GFX11-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
-; GFX11-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i64_to_v48i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s11 :: v_dual_mov_b32 v16, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s13 :: v_dual_mov_b32 v14, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s15 :: v_dual_mov_b32 v12, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s3 :: v_dual_mov_b32 v53, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s1 :: v_dual_mov_b32 v55, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i64_to_v48i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s74, s74, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s74, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s74, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -25948,119 +27315,275 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48i16_to_v12i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48i16_to_v12i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48i16_to_v12i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -27495,165 +29018,396 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v23, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i64_to_v48f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s10, v6
-; GFX11-NEXT: v_readfirstlane_b32 s4, v5
-; GFX11-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-NEXT: v_readfirstlane_b32 s6, v3
-; GFX11-NEXT: v_readfirstlane_b32 s7, v2
-; GFX11-NEXT: v_readfirstlane_b32 s8, v1
-; GFX11-NEXT: v_readfirstlane_b32 s9, v0
-; GFX11-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-NEXT: s_mov_b32 s74, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s74, -1
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s74, s74, exec_lo
-; GFX11-NEXT: s_cselect_b32 s74, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s74, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s10, s4, 16
-; GFX11-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-NEXT: s_lshr_b32 s12, s6, 16
-; GFX11-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-NEXT: s_lshr_b32 s14, s8, 16
-; GFX11-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-NEXT: s_lshr_b32 s40, s29, 16
-; GFX11-NEXT: s_lshr_b32 s41, s28, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s43, s26, 16
-; GFX11-NEXT: s_lshr_b32 s44, s25, 16
-; GFX11-NEXT: s_lshr_b32 s45, s24, 16
-; GFX11-NEXT: s_lshr_b32 s46, s23, 16
-; GFX11-NEXT: s_lshr_b32 s47, s22, 16
-; GFX11-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-NEXT: s_lshr_b32 s57, s20, 16
-; GFX11-NEXT: s_lshr_b32 s58, s19, 16
-; GFX11-NEXT: s_lshr_b32 s59, s18, 16
-; GFX11-NEXT: s_lshr_b32 s60, s17, 16
-; GFX11-NEXT: s_lshr_b32 s61, s16, 16
-; GFX11-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-NEXT: s_lshr_b32 s63, s2, 16
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s73, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s10
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
-; GFX11-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
-; GFX11-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i64_to_v48f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s10, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s11, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v31, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s11 :: v_dual_mov_b32 v16, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s13 :: v_dual_mov_b32 v14, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s15 :: v_dual_mov_b32 v12, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s3 :: v_dual_mov_b32 v53, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s1 :: v_dual_mov_b32 v55, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i64_to_v48f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s10, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s74, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s74, s74, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s74, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s74, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v19, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s7 :: v_dual_mov_b32 v21, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s5 :: v_dual_mov_b32 v23, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -29823,119 +31577,275 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48f16_to_v12i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48f16_to_v12i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48f16_to_v12i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -31351,65 +33261,107 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
@@ -31424,82 +33376,56 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v19, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s74 :: v_dual_mov_b32 v24, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s73 :: v_dual_mov_b32 v54, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s72 :: v_dual_mov_b32 v52, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v50, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s62 :: v_dual_mov_b32 v48, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s61 :: v_dual_mov_b32 v38, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s60 :: v_dual_mov_b32 v36, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s59 :: v_dual_mov_b32 v34, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s58 :: v_dual_mov_b32 v32, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s57 :: v_dual_mov_b32 v30, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s56 :: v_dual_mov_b32 v28, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s46 :: v_dual_mov_b32 v26, s10
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v26.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v12f64_to_v48i16_scalar:
@@ -33673,119 +35599,275 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48i16_to_v12f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48i16_to_v12f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48i16_to_v12f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -35201,65 +37283,107 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s11 :: v_dual_mov_b32 v25, s12
; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s11 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s11 :: v_dual_mov_b32 v37, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s11 :: v_dual_mov_b32 v39, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v51, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v55, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
@@ -35274,82 +37398,56 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v19, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s74 :: v_dual_mov_b32 v24, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s73 :: v_dual_mov_b32 v54, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s72 :: v_dual_mov_b32 v52, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s63 :: v_dual_mov_b32 v50, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s62 :: v_dual_mov_b32 v48, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s61 :: v_dual_mov_b32 v38, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s60 :: v_dual_mov_b32 v36, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s59 :: v_dual_mov_b32 v34, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s58 :: v_dual_mov_b32 v32, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s57 :: v_dual_mov_b32 v30, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s56 :: v_dual_mov_b32 v28, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s46 :: v_dual_mov_b32 v26, s10
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v26.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v12f64_to_v48f16_scalar:
@@ -37705,119 +39803,275 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v48f16_to_v12f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v5
-; GFX11-NEXT: v_readfirstlane_b32 s46, v4
-; GFX11-NEXT: v_readfirstlane_b32 s58, v3
-; GFX11-NEXT: v_readfirstlane_b32 s60, v2
-; GFX11-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-NEXT: v_readfirstlane_b32 s72, v6
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s56, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s74, s61, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s72, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s61, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v48f16_to_v12f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s4 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s5 :: v_dual_mov_b32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v39, s11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v48f16_to_v12f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s72, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s61, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -39947,174 +42201,178 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v48i16_to_v48f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v6
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s72, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s63, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s73, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s62, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s61, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s60, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s74, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s74, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v21, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s8 :: v_dual_mov_b32 v19, s9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s74, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s74, s74, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s74, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s74, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s72, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s63, s47
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s73, s59
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s62, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s61, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s60, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s7, s16, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s56, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s7, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s72 :: v_dual_mov_b32 v22, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s73 :: v_dual_mov_b32 v20, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s61 :: v_dual_mov_b32 v18, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s57 :: v_dual_mov_b32 v25, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s59 :: v_dual_mov_b32 v27, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s56 :: v_dual_mov_b32 v29, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v31, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s43 :: v_dual_mov_b32 v33, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s6 :: v_dual_mov_b32 v53, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v24.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v23
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v48i16_to_v48f16_scalar:
@@ -42070,174 +44328,178 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v48f16_to_v48i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v6
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v6 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s72, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s63, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s73, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s62, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s61, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s60, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s74, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s74, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s8, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v23, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s11 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s11 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v21, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s8 :: v_dual_mov_b32 v19, s9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s10
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s74, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s74, s74, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s74, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s74, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s72, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s63, s47
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s73, s59
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s62, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s61, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s60, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s7, s16, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s56 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s46 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s72 :: v_dual_mov_b32 v22, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s73 :: v_dual_mov_b32 v20, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s61 :: v_dual_mov_b32 v18, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s57 :: v_dual_mov_b32 v25, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s59 :: v_dual_mov_b32 v27, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s56 :: v_dual_mov_b32 v29, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v31, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s43 :: v_dual_mov_b32 v33, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s11 :: v_dual_mov_b32 v49, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s9 :: v_dual_mov_b32 v51, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s6 :: v_dual_mov_b32 v53, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v54.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v24.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v23
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v48f16_to_v48i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
index d070d09aa3dc39..71f7a48cec0743 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
@@ -4939,178 +4939,425 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v25, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v26i32_to_v52i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-NEXT: v_readfirstlane_b32 s4, v7
-; GFX11-NEXT: v_readfirstlane_b32 s5, v6
-; GFX11-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-NEXT: v_readfirstlane_b32 s7, v4
-; GFX11-NEXT: v_readfirstlane_b32 s8, v3
-; GFX11-NEXT: v_readfirstlane_b32 s9, v2
-; GFX11-NEXT: v_readfirstlane_b32 s10, v1
-; GFX11-NEXT: v_readfirstlane_b32 s11, v0
-; GFX11-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-NEXT: s_mov_b32 s78, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s78, -1
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s78, s78, exec_lo
-; GFX11-NEXT: s_cselect_b32 s78, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s78, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s12
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
-; GFX11-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
-; GFX11-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
-; GFX11-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v26i32_to_v52i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s12 :: v_dual_mov_b32 v16, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s14 :: v_dual_mov_b32 v14, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s6 :: v_dual_mov_b32 v31, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s3 :: v_dual_mov_b32 v65, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s1 :: v_dual_mov_b32 v67, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v26i32_to_v52i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s78, s78, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s78, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s78, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7276,127 +7523,296 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52i16_to_v26i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52i16_to_v26i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52i16_to_v26i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8971,178 +9387,425 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v25, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v26i32_to_v52f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-NEXT: v_readfirstlane_b32 s4, v7
-; GFX11-NEXT: v_readfirstlane_b32 s5, v6
-; GFX11-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-NEXT: v_readfirstlane_b32 s7, v4
-; GFX11-NEXT: v_readfirstlane_b32 s8, v3
-; GFX11-NEXT: v_readfirstlane_b32 s9, v2
-; GFX11-NEXT: v_readfirstlane_b32 s10, v1
-; GFX11-NEXT: v_readfirstlane_b32 s11, v0
-; GFX11-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-NEXT: s_mov_b32 s78, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s78, -1
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s78, s78, exec_lo
-; GFX11-NEXT: s_cselect_b32 s78, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s78, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s12
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
-; GFX11-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
-; GFX11-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
-; GFX11-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v26i32_to_v52f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s13, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s12 :: v_dual_mov_b32 v16, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s14 :: v_dual_mov_b32 v14, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s11 :: v_dual_mov_b32 v27, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s9 :: v_dual_mov_b32 v29, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s6 :: v_dual_mov_b32 v31, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s3 :: v_dual_mov_b32 v65, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s1 :: v_dual_mov_b32 v67, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v26i32_to_v52f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s78, s78, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s78, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s78, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11499,127 +12162,296 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52f16_to_v26i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52f16_to_v26i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52f16_to_v26i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -15846,88 +16678,147 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s7, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s8, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s9, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s10, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s10, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -15972,35 +16863,7 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s78 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s76 :: v_dual_mov_b32 v64, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
@@ -18407,127 +19270,296 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52i16_to_v26f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52i16_to_v26f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52i16_to_v26f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -20198,88 +21230,147 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s7, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s8, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s9, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s10, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s10, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -20324,35 +21415,7 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s78 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s76 :: v_dual_mov_b32 v64, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s40 :: v_dual_mov_b32 v28, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
@@ -22950,127 +24013,296 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52f16_to_v26f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52f16_to_v26f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52f16_to_v26f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -25794,178 +27026,428 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v25, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v13i64_to_v52i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-NEXT: v_readfirstlane_b32 s4, v7
-; GFX11-NEXT: v_readfirstlane_b32 s5, v6
-; GFX11-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-NEXT: v_readfirstlane_b32 s7, v4
-; GFX11-NEXT: v_readfirstlane_b32 s8, v3
-; GFX11-NEXT: v_readfirstlane_b32 s9, v2
-; GFX11-NEXT: v_readfirstlane_b32 s10, v1
-; GFX11-NEXT: v_readfirstlane_b32 s11, v0
-; GFX11-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-NEXT: s_mov_b32 s78, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s78, -1
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s78, s78, exec_lo
-; GFX11-NEXT: s_cselect_b32 s78, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s78, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s11, s11, 3
-; GFX11-NEXT: s_addc_u32 s10, s10, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s12
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
-; GFX11-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
-; GFX11-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
-; GFX11-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v13i64_to_v52i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s13 :: v_dual_mov_b32 v16, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s15 :: v_dual_mov_b32 v14, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s3 :: v_dual_mov_b32 v65, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s1 :: v_dual_mov_b32 v67, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v13i64_to_v52i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s78, s78, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s78, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s78, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -28131,127 +29613,296 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52i16_to_v13i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52i16_to_v13i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52i16_to_v13i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -29840,178 +31491,428 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v25, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v13i64_to_v52f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-NEXT: v_readfirstlane_b32 s4, v7
-; GFX11-NEXT: v_readfirstlane_b32 s5, v6
-; GFX11-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-NEXT: v_readfirstlane_b32 s7, v4
-; GFX11-NEXT: v_readfirstlane_b32 s8, v3
-; GFX11-NEXT: v_readfirstlane_b32 s9, v2
-; GFX11-NEXT: v_readfirstlane_b32 s10, v1
-; GFX11-NEXT: v_readfirstlane_b32 s11, v0
-; GFX11-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-NEXT: s_mov_b32 s78, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s78, -1
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s78, s78, exec_lo
-; GFX11-NEXT: s_cselect_b32 s78, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s78, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s11, s11, 3
-; GFX11-NEXT: s_addc_u32 s10, s10, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s12, s4, 16
-; GFX11-NEXT: s_lshr_b32 s13, s5, 16
-; GFX11-NEXT: s_lshr_b32 s14, s6, 16
-; GFX11-NEXT: s_lshr_b32 s15, s7, 16
-; GFX11-NEXT: s_lshr_b32 s40, s8, 16
-; GFX11-NEXT: s_lshr_b32 s41, s9, 16
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b32 s43, s11, 16
-; GFX11-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-NEXT: s_lshr_b32 s45, s28, 16
-; GFX11-NEXT: s_lshr_b32 s46, s27, 16
-; GFX11-NEXT: s_lshr_b32 s47, s26, 16
-; GFX11-NEXT: s_lshr_b32 s56, s25, 16
-; GFX11-NEXT: s_lshr_b32 s57, s24, 16
-; GFX11-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-NEXT: s_lshr_b32 s59, s22, 16
-; GFX11-NEXT: s_lshr_b32 s60, s21, 16
-; GFX11-NEXT: s_lshr_b32 s61, s20, 16
-; GFX11-NEXT: s_lshr_b32 s62, s19, 16
-; GFX11-NEXT: s_lshr_b32 s63, s18, 16
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s73, s16, 16
-; GFX11-NEXT: s_lshr_b32 s74, s3, 16
-; GFX11-NEXT: s_lshr_b32 s75, s2, 16
-; GFX11-NEXT: s_lshr_b32 s76, s1, 16
-; GFX11-NEXT: s_lshr_b32 s77, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s12
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
-; GFX11-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
-; GFX11-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
-; GFX11-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v13i64_to_v52f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s12, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s13, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v29, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s4 :: v_dual_mov_b32 v35, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s13 :: v_dual_mov_b32 v16, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s15 :: v_dual_mov_b32 v14, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s3 :: v_dual_mov_b32 v65, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s1 :: v_dual_mov_b32 v67, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v13i64_to_v52f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s12, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s78, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s78, s78, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s78, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s78, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v19, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v21, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s7 :: v_dual_mov_b32 v23, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v25, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -32368,127 +34269,296 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52f16_to_v13i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52f16_to_v13i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52f16_to_v13i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -34085,84 +36155,130 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[10:11], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[8:9], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[12:13], s[24:25], 1.0
@@ -34172,88 +36288,60 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s10 :: v_dual_mov_b32 v19, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v25, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s78 :: v_dual_mov_b32 v29, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s77 :: v_dual_mov_b32 v27, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s76 :: v_dual_mov_b32 v67, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s75 :: v_dual_mov_b32 v65, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s74 :: v_dual_mov_b32 v55, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s73 :: v_dual_mov_b32 v53, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s72 :: v_dual_mov_b32 v51, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s63 :: v_dual_mov_b32 v49, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s62 :: v_dual_mov_b32 v39, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s61 :: v_dual_mov_b32 v37, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s58 :: v_dual_mov_b32 v35, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s56 :: v_dual_mov_b32 v33, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s13 :: v_dual_mov_b32 v28, s12
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v13f64_to_v52i16_scalar:
@@ -36620,127 +38708,296 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52i16_to_v13f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52i16_to_v13f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52i16_to_v13f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -38337,84 +40594,130 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s13 :: v_dual_mov_b32 v27, s14
; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s13 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s13 :: v_dual_mov_b32 v35, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s13 :: v_dual_mov_b32 v37, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s13 :: v_dual_mov_b32 v39, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s13 :: v_dual_mov_b32 v49, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v53, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s13 :: v_dual_mov_b32 v65, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: s_mov_b32 s12, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[10:11], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[8:9], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[12:13], s[24:25], 1.0
@@ -38424,88 +40727,60 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s10 :: v_dual_mov_b32 v19, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v25, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s78 :: v_dual_mov_b32 v29, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s77 :: v_dual_mov_b32 v27, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s76 :: v_dual_mov_b32 v67, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s75 :: v_dual_mov_b32 v65, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s74 :: v_dual_mov_b32 v55, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s73 :: v_dual_mov_b32 v53, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s72 :: v_dual_mov_b32 v51, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s63 :: v_dual_mov_b32 v49, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s62 :: v_dual_mov_b32 v39, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s61 :: v_dual_mov_b32 v37, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s58 :: v_dual_mov_b32 v35, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s56 :: v_dual_mov_b32 v33, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s13 :: v_dual_mov_b32 v28, s12
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v13f64_to_v52f16_scalar:
@@ -41063,127 +43338,296 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v52f16_to_v13f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s46, v7
-; GFX11-NEXT: v_readfirstlane_b32 s47, v6
-; GFX11-NEXT: v_readfirstlane_b32 s56, v5
-; GFX11-NEXT: v_readfirstlane_b32 s58, v4
-; GFX11-NEXT: v_readfirstlane_b32 s62, v3
-; GFX11-NEXT: v_readfirstlane_b32 s72, v2
-; GFX11-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-NEXT: v_readfirstlane_b32 s76, v8
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s45, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s60, s47, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s78, s73, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s76, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s73, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s47, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s46, s59
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v52f16_to_v13f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v28, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s13 :: v_dual_mov_b32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s13 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s6 :: v_dual_mov_b32 v23, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v21, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v19, s11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v52f16_to_v13f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s76, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s73, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s47, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s46, s59
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -43548,137 +45992,63 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v52i16_to_v52f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s77, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s76, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s75, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s78, v8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s77, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s76, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s74, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s72, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s75, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s73, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s63, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s62, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s78, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s78, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s78, -1
-; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s78, s78, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s78, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s78, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s74, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s72, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s61, s77, s61
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s76, s59
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s75, s60
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s73, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s63, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s62, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, s61, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s56, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s8, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s77 :: v_dual_mov_b32 v24, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s74 :: v_dual_mov_b32 v22, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s75 :: v_dual_mov_b32 v20, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s63 :: v_dual_mov_b32 v18, s62
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v55, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s4 :: v_dual_mov_b32 v52, s13
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
@@ -43687,49 +46057,127 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s61 :: v_dual_mov_b32 v27, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s57 :: v_dual_mov_b32 v29, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s45 :: v_dual_mov_b32 v35, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s43 :: v_dual_mov_b32 v37, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s9 :: v_dual_mov_b32 v55, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s6 :: v_dual_mov_b32 v65, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s7
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v24, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s9 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s11 :: v_dual_mov_b32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
+; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
+; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v25
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v54.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v52i16_to_v52f16_scalar:
@@ -45887,137 +48335,63 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v52f16_to_v52i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s77, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s76, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s75, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s78, v8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s77, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s76, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s74, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s72, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s75, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s73, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s63, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s62, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s78, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s78, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s78, -1
-; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s78, s78, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s78, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s78, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s74, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s72, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s61, s77, s61
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s76, s59
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s75, s60
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s73, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s63, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s62, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, s61 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s56 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s46 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s77 :: v_dual_mov_b32 v24, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s74 :: v_dual_mov_b32 v22, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s75 :: v_dual_mov_b32 v20, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s63 :: v_dual_mov_b32 v18, s62
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v55, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v25, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s12, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s4 :: v_dual_mov_b32 v52, s13
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
@@ -46026,49 +48400,127 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s61 :: v_dual_mov_b32 v27, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s57 :: v_dual_mov_b32 v29, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s45 :: v_dual_mov_b32 v35, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s43 :: v_dual_mov_b32 v37, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s13 :: v_dual_mov_b32 v51, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s11 :: v_dual_mov_b32 v53, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s9 :: v_dual_mov_b32 v55, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s6 :: v_dual_mov_b32 v65, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s7
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v66.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v24, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s9 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s11 :: v_dual_mov_b32 v18, s12
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
+; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
+; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v26.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v25
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v54.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v52f16_to_v52i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
index 8319358c1e3563..376553c0355b0f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
@@ -5259,191 +5259,456 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v27, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v28i32_to_v56i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-NEXT: v_readfirstlane_b32 s4, v9
-; GFX11-NEXT: v_readfirstlane_b32 s5, v8
-; GFX11-NEXT: v_readfirstlane_b32 s6, v7
-; GFX11-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-NEXT: v_readfirstlane_b32 s9, v4
-; GFX11-NEXT: v_readfirstlane_b32 s10, v3
-; GFX11-NEXT: v_readfirstlane_b32 s11, v2
-; GFX11-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-NEXT: v_readfirstlane_b32 s13, v0
-; GFX11-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-NEXT: s_mov_b32 s90, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s90, -1
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s90, s90, exec_lo
-; GFX11-NEXT: s_cselect_b32 s90, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s90, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s12, s12, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s14
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
-; GFX11-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
-; GFX11-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
-; GFX11-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v28i32_to_v56i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s14 :: v_dual_mov_b32 v16, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s6 :: v_dual_mov_b32 v35, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s3 :: v_dual_mov_b32 v69, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s1 :: v_dual_mov_b32 v71, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v28i32_to_v56i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s90, s90, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s90, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s90, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -7858,135 +8123,317 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56i16_to_v28i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v28i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v28i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -9718,191 +10165,456 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v27, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v28i32_to_v56f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-NEXT: v_readfirstlane_b32 s4, v9
-; GFX11-NEXT: v_readfirstlane_b32 s5, v8
-; GFX11-NEXT: v_readfirstlane_b32 s6, v7
-; GFX11-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-NEXT: v_readfirstlane_b32 s9, v4
-; GFX11-NEXT: v_readfirstlane_b32 s10, v3
-; GFX11-NEXT: v_readfirstlane_b32 s11, v2
-; GFX11-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-NEXT: v_readfirstlane_b32 s13, v0
-; GFX11-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-NEXT: s_mov_b32 s90, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s90, -1
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s90, s90, exec_lo
-; GFX11-NEXT: s_cselect_b32 s90, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s90, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s12, s12, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s14
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
-; GFX11-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
-; GFX11-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
-; GFX11-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v28i32_to_v56f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s15, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s14 :: v_dual_mov_b32 v16, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s13 :: v_dual_mov_b32 v29, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s11 :: v_dual_mov_b32 v31, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s9 :: v_dual_mov_b32 v33, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s6 :: v_dual_mov_b32 v35, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s3 :: v_dual_mov_b32 v69, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s1 :: v_dual_mov_b32 v71, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v28i32_to_v56f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s90, s90, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s90, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s90, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -12466,135 +13178,317 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56f16_to_v28i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v28i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v28i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -17101,96 +17995,159 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s7, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s8, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s9, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s10, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s11, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s12, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s12, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s10, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -17237,37 +18194,7 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s90 :: v_dual_mov_b32 v70, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s88 :: v_dual_mov_b32 v68, s79
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s78 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s76 :: v_dual_mov_b32 v64, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
@@ -19941,135 +20868,317 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56i16_to_v28f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v28f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v28f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -21927,96 +23036,159 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s5, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s7, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s8, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s9, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s10, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s11, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s12, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s12, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s11, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s9, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s10, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -22063,37 +23235,7 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s90 :: v_dual_mov_b32 v70, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s88 :: v_dual_mov_b32 v68, s79
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s78 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s76 :: v_dual_mov_b32 v64, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s42 :: v_dual_mov_b32 v30, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
@@ -24916,135 +26058,317 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56f16_to_v28f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v28f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v28f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -27972,191 +29296,459 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v27, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v14i64_to_v56i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-NEXT: v_readfirstlane_b32 s4, v9
-; GFX11-NEXT: v_readfirstlane_b32 s5, v8
-; GFX11-NEXT: v_readfirstlane_b32 s6, v7
-; GFX11-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-NEXT: v_readfirstlane_b32 s9, v4
-; GFX11-NEXT: v_readfirstlane_b32 s10, v3
-; GFX11-NEXT: v_readfirstlane_b32 s11, v2
-; GFX11-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-NEXT: v_readfirstlane_b32 s13, v0
-; GFX11-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-NEXT: s_mov_b32 s90, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s90, -1
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s90, s90, exec_lo
-; GFX11-NEXT: s_cselect_b32 s90, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s90, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s11, s11, 3
-; GFX11-NEXT: s_addc_u32 s10, s10, 0
-; GFX11-NEXT: s_add_u32 s13, s13, 3
-; GFX11-NEXT: s_addc_u32 s12, s12, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s14
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
-; GFX11-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
-; GFX11-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
-; GFX11-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v14i64_to_v56i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s15 :: v_dual_mov_b32 v16, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s12 :: v_dual_mov_b32 v29, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s10 :: v_dual_mov_b32 v31, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s3 :: v_dual_mov_b32 v69, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s1 :: v_dual_mov_b32 v71, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v14i64_to_v56i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s90, s90, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s90, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s90, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -30571,135 +32163,317 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56i16_to_v14i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v14i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v14i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -32445,191 +34219,459 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v27, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v14i64_to_v56f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-NEXT: v_readfirstlane_b32 s4, v9
-; GFX11-NEXT: v_readfirstlane_b32 s5, v8
-; GFX11-NEXT: v_readfirstlane_b32 s6, v7
-; GFX11-NEXT: v_readfirstlane_b32 s7, v6
-; GFX11-NEXT: v_readfirstlane_b32 s8, v5
-; GFX11-NEXT: v_readfirstlane_b32 s9, v4
-; GFX11-NEXT: v_readfirstlane_b32 s10, v3
-; GFX11-NEXT: v_readfirstlane_b32 s11, v2
-; GFX11-NEXT: v_readfirstlane_b32 s12, v1
-; GFX11-NEXT: v_readfirstlane_b32 s13, v0
-; GFX11-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-NEXT: s_mov_b32 s90, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s90, -1
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s90, s90, exec_lo
-; GFX11-NEXT: s_cselect_b32 s90, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s90, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s11, s11, 3
-; GFX11-NEXT: s_addc_u32 s10, s10, 0
-; GFX11-NEXT: s_add_u32 s13, s13, 3
-; GFX11-NEXT: s_addc_u32 s12, s12, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s14, s4, 16
-; GFX11-NEXT: s_lshr_b32 s15, s5, 16
-; GFX11-NEXT: s_lshr_b32 s40, s6, 16
-; GFX11-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-NEXT: s_lshr_b32 s44, s10, 16
-; GFX11-NEXT: s_lshr_b32 s45, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s12, 16
-; GFX11-NEXT: s_lshr_b32 s47, s13, 16
-; GFX11-NEXT: s_lshr_b32 s56, s29, 16
-; GFX11-NEXT: s_lshr_b32 s57, s28, 16
-; GFX11-NEXT: s_lshr_b32 s58, s27, 16
-; GFX11-NEXT: s_lshr_b32 s59, s26, 16
-; GFX11-NEXT: s_lshr_b32 s60, s25, 16
-; GFX11-NEXT: s_lshr_b32 s61, s24, 16
-; GFX11-NEXT: s_lshr_b32 s62, s23, 16
-; GFX11-NEXT: s_lshr_b32 s63, s22, 16
-; GFX11-NEXT: s_lshr_b32 s72, s21, 16
-; GFX11-NEXT: s_lshr_b32 s73, s20, 16
-; GFX11-NEXT: s_lshr_b32 s74, s19, 16
-; GFX11-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-NEXT: s_lshr_b32 s76, s17, 16
-; GFX11-NEXT: s_lshr_b32 s77, s16, 16
-; GFX11-NEXT: s_lshr_b32 s78, s3, 16
-; GFX11-NEXT: s_lshr_b32 s79, s2, 16
-; GFX11-NEXT: s_lshr_b32 s88, s1, 16
-; GFX11-NEXT: s_lshr_b32 s89, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s40
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s14
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
-; GFX11-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
-; GFX11-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
-; GFX11-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
-; GFX11-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v14i64_to_v56f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s14, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s15, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s7 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v35, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s4 :: v_dual_mov_b32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s14, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v39, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s15 :: v_dual_mov_b32 v16, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s12 :: v_dual_mov_b32 v29, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s10 :: v_dual_mov_b32 v31, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s3 :: v_dual_mov_b32 v69, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s1 :: v_dual_mov_b32 v71, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v14i64_to_v56f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s14, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s90, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s90, s90, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s90, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s90, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -35193,135 +37235,317 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56f16_to_v14i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v14i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v14i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -37101,91 +39325,140 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[10:11], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[8:9], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[12:13], s[24:25], 1.0
@@ -37195,95 +39468,64 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s12 :: v_dual_mov_b32 v19, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v25, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s90 :: v_dual_mov_b32 v29, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v71, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s88 :: v_dual_mov_b32 v69, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s79 :: v_dual_mov_b32 v67, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s78 :: v_dual_mov_b32 v65, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s77 :: v_dual_mov_b32 v55, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s76 :: v_dual_mov_b32 v53, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s75 :: v_dual_mov_b32 v51, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s74 :: v_dual_mov_b32 v49, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s73 :: v_dual_mov_b32 v39, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s72 :: v_dual_mov_b32 v37, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s63 :: v_dual_mov_b32 v35, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s61 :: v_dual_mov_b32 v33, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s59 :: v_dual_mov_b32 v31, s14
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v66.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14f64_to_v56i16_scalar:
@@ -39914,135 +42156,317 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56i16_to_v14f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v14f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v14f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -41822,91 +44246,140 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s15 :: v_dual_mov_b32 v29, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s10, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s15 :: v_dual_mov_b32 v33, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s15 :: v_dual_mov_b32 v35, s40
; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s15 :: v_dual_mov_b32 v37, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s15 :: v_dual_mov_b32 v39, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s15 :: v_dual_mov_b32 v49, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s15 :: v_dual_mov_b32 v51, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v55, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s18, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s16, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s15 :: v_dual_mov_b32 v67, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v69, s40
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s15 :: v_dual_mov_b32 v71, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-TRUE16-NEXT: s_mov_b32 s14, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s14, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s14, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[10:11], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[8:9], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[12:13], s[24:25], 1.0
@@ -41916,95 +44389,64 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s12 :: v_dual_mov_b32 v19, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v25, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s90 :: v_dual_mov_b32 v29, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s89 :: v_dual_mov_b32 v71, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s88 :: v_dual_mov_b32 v69, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s79 :: v_dual_mov_b32 v67, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s78 :: v_dual_mov_b32 v65, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s77 :: v_dual_mov_b32 v55, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s76 :: v_dual_mov_b32 v53, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s75 :: v_dual_mov_b32 v51, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s74 :: v_dual_mov_b32 v49, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s73 :: v_dual_mov_b32 v39, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s72 :: v_dual_mov_b32 v37, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s63 :: v_dual_mov_b32 v35, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s61 :: v_dual_mov_b32 v33, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s59 :: v_dual_mov_b32 v31, s14
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v66.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14f64_to_v56f16_scalar:
@@ -44784,135 +47226,317 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v56f16_to_v14f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s44, v9
-; GFX11-NEXT: v_readfirstlane_b32 s56, v8
-; GFX11-NEXT: v_readfirstlane_b32 s58, v7
-; GFX11-NEXT: v_readfirstlane_b32 s59, v6
-; GFX11-NEXT: v_readfirstlane_b32 s60, v5
-; GFX11-NEXT: v_readfirstlane_b32 s62, v4
-; GFX11-NEXT: v_readfirstlane_b32 s74, v3
-; GFX11-NEXT: v_readfirstlane_b32 s76, v2
-; GFX11-NEXT: v_readfirstlane_b32 s77, v1
-; GFX11-NEXT: v_readfirstlane_b32 s78, v0
-; GFX11-NEXT: v_readfirstlane_b32 s88, v10
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s45, s2, 16
-; GFX11-NEXT: s_lshr_b32 s46, s1, 16
-; GFX11-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-NEXT: s_lshr_b32 s57, s44, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s63, s58, 16
-; GFX11-NEXT: s_lshr_b32 s72, s59, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s89, s76, 16
-; GFX11-NEXT: s_lshr_b32 s90, s77, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s88, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s77, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s76, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s59, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s58, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s44, s57
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v14f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s4 :: v_dual_mov_b32 v33, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s4 :: v_dual_mov_b32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s5 :: v_dual_mov_b32 v54, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s5 :: v_dual_mov_b32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s5 :: v_dual_mov_b32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s5 :: v_dual_mov_b32 v70, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s4 :: v_dual_mov_b32 v53, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v65, s15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v29.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v14f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s76, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s77, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s76, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s77, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s88, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s77, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s76, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s59, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s58, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s44, s57
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -47516,202 +50140,208 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v56f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s79, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s89, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s88, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s78, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s76, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s77, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s75, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s90, v10
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s79, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s89, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s88, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s78, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s76, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s74, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s77, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s75, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s73, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s72, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s90, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s90, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s90, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s90, s90, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s90, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s90, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s79, s59
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s76, s57
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s88, s62
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s74, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s63, s89, s63
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s78, s60
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s77, s61
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s75, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s73, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s72, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s16, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, s63, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s56, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s6, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s79 :: v_dual_mov_b32 v26, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s88 :: v_dual_mov_b32 v24, s78
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s76 :: v_dual_mov_b32 v22, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s77 :: v_dual_mov_b32 v20, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s73 :: v_dual_mov_b32 v18, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s59 :: v_dual_mov_b32 v29, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s62 :: v_dual_mov_b32 v31, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v33, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s61 :: v_dual_mov_b32 v35, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s56 :: v_dual_mov_b32 v37, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s45 :: v_dual_mov_b32 v39, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v49, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s11 :: v_dual_mov_b32 v65, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s9 :: v_dual_mov_b32 v67, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s8 :: v_dual_mov_b32 v69, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v27
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v64.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v56f16_scalar:
@@ -50072,202 +52702,208 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v56i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s79, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s89, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s88, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s78, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s76, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s77, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s75, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s90, v10
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s79, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s89, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s88, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s78, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s76, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s74, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s77, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s75, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s73, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s72, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s90, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s90, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v64, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v69, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s12, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v27, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s14, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v13, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v11, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v7, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v5, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v3, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v25, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v23, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s10 :: v_dual_mov_b32 v21, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s12 :: v_dual_mov_b32 v19, s13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v18, s14
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s90, -1
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s90, s90, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s90, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s90, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s79, s59
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s76, s57
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s88, s62
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s74, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s63, s89, s63
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s78, s60
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s77, s61
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s75, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s73, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s72, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s16, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s5
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s4
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, s63 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s56 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s46 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s79 :: v_dual_mov_b32 v26, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s88 :: v_dual_mov_b32 v24, s78
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s76 :: v_dual_mov_b32 v22, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s77 :: v_dual_mov_b32 v20, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s73 :: v_dual_mov_b32 v18, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s59 :: v_dual_mov_b32 v29, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s62 :: v_dual_mov_b32 v31, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v33, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s61 :: v_dual_mov_b32 v35, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s56 :: v_dual_mov_b32 v37, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s45 :: v_dual_mov_b32 v39, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v49, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s11 :: v_dual_mov_b32 v65, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s9 :: v_dual_mov_b32 v67, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s8 :: v_dual_mov_b32 v69, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v70.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v27
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v64.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v56i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
index deced731f537bd..1b94f790088c14 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
@@ -5614,204 +5614,488 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v30i32_to_v60i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s40, v12
-; GFX11-NEXT: v_readfirstlane_b32 s4, v11
-; GFX11-NEXT: v_readfirstlane_b32 s5, v10
-; GFX11-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-NEXT: v_readfirstlane_b32 s7, v8
-; GFX11-NEXT: v_readfirstlane_b32 s8, v7
-; GFX11-NEXT: v_readfirstlane_b32 s9, v6
-; GFX11-NEXT: v_readfirstlane_b32 s10, v5
-; GFX11-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-NEXT: v_readfirstlane_b32 s12, v3
-; GFX11-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-NEXT: v_readfirstlane_b32 s15, v0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-NEXT: s_mov_b32 s94, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: s_branch .LBB13_3
-; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: s_mov_b32 s94, -1
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s94, s94, exec_lo
-; GFX11-NEXT: s_cselect_b32 s94, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s94, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s12, s12, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s14, s14, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: .LBB13_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s92
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s15, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s14, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s40
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
-; GFX11-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
-; GFX11-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
-; GFX11-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
-; GFX11-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v30i32_to_v60i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB13_3
+; GFX11-TRUE16-NEXT: .LBB13_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s4 :: v_dual_mov_b32 v69, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s6 :: v_dual_mov_b32 v39, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s3 :: v_dual_mov_b32 v81, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s1 :: v_dual_mov_b32 v83, s0
+; GFX11-TRUE16-NEXT: .LBB13_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v30i32_to_v60i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB13_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB13_3
+; GFX11-FAKE16-NEXT: .LBB13_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: .LBB13_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s94, s94, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s94, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s94, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB13_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: .LBB13_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s92
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s15, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s14, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8410,143 +8694,340 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60i16_to_v30i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB15_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB15_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB15_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60i16_to_v30i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB15_3
+; GFX11-TRUE16-NEXT: .LBB15_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB15_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB15_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB15_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60i16_to_v30i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB15_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB15_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB15_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -10437,204 +10918,488 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v30i32_to_v60f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s40, v12
-; GFX11-NEXT: v_readfirstlane_b32 s4, v11
-; GFX11-NEXT: v_readfirstlane_b32 s5, v10
-; GFX11-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-NEXT: v_readfirstlane_b32 s7, v8
-; GFX11-NEXT: v_readfirstlane_b32 s8, v7
-; GFX11-NEXT: v_readfirstlane_b32 s9, v6
-; GFX11-NEXT: v_readfirstlane_b32 s10, v5
-; GFX11-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-NEXT: v_readfirstlane_b32 s12, v3
-; GFX11-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-NEXT: v_readfirstlane_b32 s15, v0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-NEXT: s_mov_b32 s94, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB17_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: s_branch .LBB17_3
-; GFX11-NEXT: .LBB17_2:
-; GFX11-NEXT: s_mov_b32 s94, -1
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: .LBB17_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s94, s94, exec_lo
-; GFX11-NEXT: s_cselect_b32 s94, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s94, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB17_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: s_add_i32 s5, s5, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s8, s8, 3
-; GFX11-NEXT: s_add_i32 s9, s9, 3
-; GFX11-NEXT: s_add_i32 s10, s10, 3
-; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: s_add_i32 s12, s12, 3
-; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: s_add_i32 s14, s14, 3
-; GFX11-NEXT: s_add_i32 s15, s15, 3
-; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
-; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: .LBB17_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s92
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s15, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s14, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s40
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
-; GFX11-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
-; GFX11-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
-; GFX11-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
-; GFX11-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v30i32_to_v60f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB17_3
+; GFX11-TRUE16-NEXT: .LBB17_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v18, s4
+; GFX11-TRUE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s9 :: v_dual_mov_b32 v22, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v20, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s4 :: v_dual_mov_b32 v69, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s15 :: v_dual_mov_b32 v31, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s13 :: v_dual_mov_b32 v33, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s11 :: v_dual_mov_b32 v35, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s9 :: v_dual_mov_b32 v37, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s6 :: v_dual_mov_b32 v39, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s3 :: v_dual_mov_b32 v81, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s1 :: v_dual_mov_b32 v83, s0
+; GFX11-TRUE16-NEXT: .LBB17_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v30i32_to_v60f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB17_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB17_3
+; GFX11-FAKE16-NEXT: .LBB17_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: .LBB17_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s94, s94, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s94, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s94, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB17_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s27, s27, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s25, s25, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s23, s23, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s21, s21, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s19, s19, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s17, s17, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: .LBB17_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s92
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s15, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s14, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -13381,143 +14146,340 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60f16_to_v30i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB19_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB19_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB19_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60f16_to_v30i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB19_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB19_3
+; GFX11-TRUE16-NEXT: .LBB19_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB19_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB19_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB19_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60f16_to_v30i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB19_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB19_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB19_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -18352,104 +19314,172 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s14, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB29_3
; GFX11-TRUE16-NEXT: .LBB29_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: .LBB29_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB29_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s7, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, s15, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, s14, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s12, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s11, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s9, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s10, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s11, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s12, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s13, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s14, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s15, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s10, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -18498,39 +19528,7 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB29_6
-; GFX11-TRUE16-NEXT: .LBB29_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s94 :: v_dual_mov_b32 v82, s93
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s92 :: v_dual_mov_b32 v80, s91
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s90 :: v_dual_mov_b32 v70, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s88 :: v_dual_mov_b32 v68, s79
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s78 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s76 :: v_dual_mov_b32 v64, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s41 :: v_dual_mov_b32 v30, s40
-; GFX11-TRUE16-NEXT: .LBB29_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB29_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
@@ -21406,143 +22404,340 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60i16_to_v30f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB31_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB31_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB31_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60i16_to_v30f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB31_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB31_3
+; GFX11-TRUE16-NEXT: .LBB31_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB31_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB31_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB31_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60i16_to_v30f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB31_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB31_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB31_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -23586,104 +24781,172 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s14, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s4 :: v_dual_mov_b32 v20, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s8 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB33_3
; GFX11-TRUE16-NEXT: .LBB33_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: .LBB33_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB33_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, s4, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, s5, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s6, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s7, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v29, s15, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, s14, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, s13, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, s12, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, s11, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, s9, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s10, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s11, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s12, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s13, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s14, 1.0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s15, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, s7, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, s5, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, s4, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, s10, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, s8, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, s6, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, s27, 1.0
@@ -23732,39 +24995,7 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB33_6
-; GFX11-TRUE16-NEXT: .LBB33_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s94 :: v_dual_mov_b32 v82, s93
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s92 :: v_dual_mov_b32 v80, s91
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s90 :: v_dual_mov_b32 v70, s89
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s88 :: v_dual_mov_b32 v68, s79
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s78 :: v_dual_mov_b32 v66, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s76 :: v_dual_mov_b32 v64, s75
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s74 :: v_dual_mov_b32 v54, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s72 :: v_dual_mov_b32 v52, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s62 :: v_dual_mov_b32 v50, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s60 :: v_dual_mov_b32 v48, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s58 :: v_dual_mov_b32 v38, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s56 :: v_dual_mov_b32 v36, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s46 :: v_dual_mov_b32 v34, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s44 :: v_dual_mov_b32 v32, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s41 :: v_dual_mov_b32 v30, s40
-; GFX11-TRUE16-NEXT: .LBB33_6: ; %end
+; GFX11-TRUE16-NEXT: .LBB33_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
@@ -26788,143 +28019,340 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60f16_to_v30f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB35_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB35_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB35_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60f16_to_v30f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB35_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB35_3
+; GFX11-TRUE16-NEXT: .LBB35_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB35_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB35_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB35_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60f16_to_v30f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB35_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB35_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB35_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -30077,204 +31505,491 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v15i64_to_v60i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s40, v12
-; GFX11-NEXT: v_readfirstlane_b32 s4, v11
-; GFX11-NEXT: v_readfirstlane_b32 s5, v10
-; GFX11-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-NEXT: v_readfirstlane_b32 s7, v8
-; GFX11-NEXT: v_readfirstlane_b32 s8, v7
-; GFX11-NEXT: v_readfirstlane_b32 s9, v6
-; GFX11-NEXT: v_readfirstlane_b32 s10, v5
-; GFX11-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-NEXT: v_readfirstlane_b32 s12, v3
-; GFX11-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-NEXT: v_readfirstlane_b32 s15, v0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-NEXT: s_mov_b32 s94, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s94, -1
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s94, s94, exec_lo
-; GFX11-NEXT: s_cselect_b32 s94, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s94, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s11, s11, 3
-; GFX11-NEXT: s_addc_u32 s10, s10, 0
-; GFX11-NEXT: s_add_u32 s13, s13, 3
-; GFX11-NEXT: s_addc_u32 s12, s12, 0
-; GFX11-NEXT: s_add_u32 s15, s15, 3
-; GFX11-NEXT: s_addc_u32 s14, s14, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s92
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s15, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s14, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s40
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
-; GFX11-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
-; GFX11-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
-; GFX11-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
-; GFX11-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v15i64_to_v60i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s14 :: v_dual_mov_b32 v28, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s15, s15, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s14, s14, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v39, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s14 :: v_dual_mov_b32 v28, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s4 :: v_dual_mov_b32 v69, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s14 :: v_dual_mov_b32 v31, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s12 :: v_dual_mov_b32 v33, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s10 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s3 :: v_dual_mov_b32 v81, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s1 :: v_dual_mov_b32 v83, s0
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v15i64_to_v60i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s94, s94, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s94, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s94, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s14, s14, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s92
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s15, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s14, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -32873,143 +34588,340 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60i16_to_v15i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB43_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB43_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60i16_to_v15i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60i16_to_v15i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB43_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB43_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -34916,204 +36828,491 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v15i64_to_v60f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s40, v12
-; GFX11-NEXT: v_readfirstlane_b32 s4, v11
-; GFX11-NEXT: v_readfirstlane_b32 s5, v10
-; GFX11-NEXT: v_readfirstlane_b32 s6, v9
-; GFX11-NEXT: v_readfirstlane_b32 s7, v8
-; GFX11-NEXT: v_readfirstlane_b32 s8, v7
-; GFX11-NEXT: v_readfirstlane_b32 s9, v6
-; GFX11-NEXT: v_readfirstlane_b32 s10, v5
-; GFX11-NEXT: v_readfirstlane_b32 s11, v4
-; GFX11-NEXT: v_readfirstlane_b32 s12, v3
-; GFX11-NEXT: v_readfirstlane_b32 s13, v2
-; GFX11-NEXT: v_readfirstlane_b32 s14, v1
-; GFX11-NEXT: v_readfirstlane_b32 s15, v0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-NEXT: s_mov_b32 s94, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s94, -1
-; GFX11-NEXT: ; implicit-def: $sgpr93
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr91
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr89
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr75
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr73
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr47
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr41
-; GFX11-NEXT: ; implicit-def: $sgpr40
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s94, s94, exec_lo
-; GFX11-NEXT: s_cselect_b32 s94, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s94, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_u32 s5, s5, 3
-; GFX11-NEXT: s_addc_u32 s4, s4, 0
-; GFX11-NEXT: s_add_u32 s7, s7, 3
-; GFX11-NEXT: s_addc_u32 s6, s6, 0
-; GFX11-NEXT: s_add_u32 s9, s9, 3
-; GFX11-NEXT: s_addc_u32 s8, s8, 0
-; GFX11-NEXT: s_add_u32 s11, s11, 3
-; GFX11-NEXT: s_addc_u32 s10, s10, 0
-; GFX11-NEXT: s_add_u32 s13, s13, 3
-; GFX11-NEXT: s_addc_u32 s12, s12, 0
-; GFX11-NEXT: s_add_u32 s15, s15, 3
-; GFX11-NEXT: s_addc_u32 s14, s14, 0
-; GFX11-NEXT: s_add_u32 s28, s28, 3
-; GFX11-NEXT: s_addc_u32 s29, s29, 0
-; GFX11-NEXT: s_add_u32 s26, s26, 3
-; GFX11-NEXT: s_addc_u32 s27, s27, 0
-; GFX11-NEXT: s_add_u32 s24, s24, 3
-; GFX11-NEXT: s_addc_u32 s25, s25, 0
-; GFX11-NEXT: s_add_u32 s22, s22, 3
-; GFX11-NEXT: s_addc_u32 s23, s23, 0
-; GFX11-NEXT: s_add_u32 s20, s20, 3
-; GFX11-NEXT: s_addc_u32 s21, s21, 0
-; GFX11-NEXT: s_add_u32 s18, s18, 3
-; GFX11-NEXT: s_addc_u32 s19, s19, 0
-; GFX11-NEXT: s_add_u32 s16, s16, 3
-; GFX11-NEXT: s_addc_u32 s17, s17, 0
-; GFX11-NEXT: s_add_u32 s2, s2, 3
-; GFX11-NEXT: s_addc_u32 s3, s3, 0
-; GFX11-NEXT: s_add_u32 s0, s0, 3
-; GFX11-NEXT: s_addc_u32 s1, s1, 0
-; GFX11-NEXT: s_lshr_b32 s40, s4, 16
-; GFX11-NEXT: s_lshr_b32 s41, s5, 16
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s43, s7, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 16
-; GFX11-NEXT: s_lshr_b32 s46, s10, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 16
-; GFX11-NEXT: s_lshr_b32 s56, s12, 16
-; GFX11-NEXT: s_lshr_b32 s57, s13, 16
-; GFX11-NEXT: s_lshr_b32 s58, s14, 16
-; GFX11-NEXT: s_lshr_b32 s59, s15, 16
-; GFX11-NEXT: s_lshr_b32 s60, s29, 16
-; GFX11-NEXT: s_lshr_b32 s61, s28, 16
-; GFX11-NEXT: s_lshr_b32 s62, s27, 16
-; GFX11-NEXT: s_lshr_b32 s63, s26, 16
-; GFX11-NEXT: s_lshr_b32 s72, s25, 16
-; GFX11-NEXT: s_lshr_b32 s73, s24, 16
-; GFX11-NEXT: s_lshr_b32 s74, s23, 16
-; GFX11-NEXT: s_lshr_b32 s75, s22, 16
-; GFX11-NEXT: s_lshr_b32 s76, s21, 16
-; GFX11-NEXT: s_lshr_b32 s77, s20, 16
-; GFX11-NEXT: s_lshr_b32 s78, s19, 16
-; GFX11-NEXT: s_lshr_b32 s79, s18, 16
-; GFX11-NEXT: s_lshr_b32 s88, s17, 16
-; GFX11-NEXT: s_lshr_b32 s89, s16, 16
-; GFX11-NEXT: s_lshr_b32 s90, s3, 16
-; GFX11-NEXT: s_lshr_b32 s91, s2, 16
-; GFX11-NEXT: s_lshr_b32 s92, s1, 16
-; GFX11-NEXT: s_lshr_b32 s93, s0, 16
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s92
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s90
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s16, s89
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s17, s88
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s18, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s19, s78
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s20, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s21, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s22, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s23, s74
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s24, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s25, s72
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s26, s63
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s27, s62
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s28, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s29, s60
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s15, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s14, s58
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s13, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s12, s56
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s11, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s10, s46
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s9, s45
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s8, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s7, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s6, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s5, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s4, s40
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
-; GFX11-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
-; GFX11-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
-; GFX11-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
-; GFX11-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
-; GFX11-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v15i64_to_v60f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s14 :: v_dual_mov_b32 v28, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_u32 s15, s15, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s14, s14, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s7, s7, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s8, s8, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s5, s5, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s6, s6, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s8
+; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s4 :: v_dual_mov_b32 v18, s6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s7 :: v_dual_mov_b32 v37, s9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v39, s7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s6, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s4 :: v_dual_mov_b32 v49, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v53, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v65, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v67, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s14 :: v_dual_mov_b32 v28, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s12 :: v_dual_mov_b32 v26, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v24, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s4 :: v_dual_mov_b32 v69, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s14 :: v_dual_mov_b32 v31, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s12 :: v_dual_mov_b32 v33, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s10 :: v_dual_mov_b32 v35, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s3 :: v_dual_mov_b32 v81, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s1 :: v_dual_mov_b32 v83, s0
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v15i64_to_v60f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s10, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s12, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s15, v0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s94, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s94, s94, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s94, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s94, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_u32 s5, s5, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s4, s4, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s6, s6, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s9, s9, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s8, s8, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s10, s10, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s13, s13, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s12, s12, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s14, s14, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s28, s28, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s29, s29, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s26, s26, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s27, s27, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s24, s24, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s25, s25, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s22, s22, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s23, s23, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s21, s21, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s19, s19, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s17, s17, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, 0
+; GFX11-FAKE16-NEXT: s_add_u32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_addc_u32 s1, s1, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s0, 16
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s92
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s90
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s89
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s88
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s18, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s19, s78
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s20, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s21, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s22, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s23, s74
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s24, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s25, s72
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s26, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s27, s62
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s28, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s29, s60
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s15, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s14, s58
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s56
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s46
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s45
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v19, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s13 :: v_dual_mov_b32 v21, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v23, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v25, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v27, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s5 :: v_dual_mov_b32 v29, s4
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -37860,143 +40059,340 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60f16_to_v15i64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB47_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB47_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60f16_to_v15i64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60f16_to_v15i64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB47_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB47_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -39958,96 +42354,149 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v11
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB49_3
; GFX11-TRUE16-NEXT: .LBB49_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: .LBB49_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[28:29], s[14:15], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[10:11], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[8:9], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[12:13], s[24:25], 1.0
@@ -40057,101 +42506,68 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB49_6
-; GFX11-TRUE16-NEXT: .LBB49_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s12 :: v_dual_mov_b32 v19, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v25, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s14 :: v_dual_mov_b32 v29, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s94 :: v_dual_mov_b32 v31, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s93 :: v_dual_mov_b32 v83, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s92 :: v_dual_mov_b32 v81, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s91 :: v_dual_mov_b32 v71, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s90 :: v_dual_mov_b32 v69, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s89 :: v_dual_mov_b32 v67, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s88 :: v_dual_mov_b32 v65, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s79 :: v_dual_mov_b32 v55, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s78 :: v_dual_mov_b32 v53, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s77 :: v_dual_mov_b32 v51, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s76 :: v_dual_mov_b32 v49, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s75 :: v_dual_mov_b32 v39, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s74 :: v_dual_mov_b32 v37, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s72 :: v_dual_mov_b32 v35, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s62 :: v_dual_mov_b32 v33, s40
-; GFX11-TRUE16-NEXT: .LBB49_6: ; %end
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v0
+; GFX11-TRUE16-NEXT: .LBB49_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v70.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v15f64_to_v60i16_scalar:
@@ -42981,143 +45397,340 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a,
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60i16_to_v15f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB51_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB51_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB51_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60i16_to_v15f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB51_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB51_3
+; GFX11-TRUE16-NEXT: .LBB51_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB51_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB51_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: .LBB51_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60i16_to_v15f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB51_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB51_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, s4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, s5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, s7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, s10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, s11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, s15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, s17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, s18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, s19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, s20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, s21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, s22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, s23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, s24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, s25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, s26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, s27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, s28, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, s29, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB51_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -45079,96 +47692,149 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v12
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v11
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v5
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s41 :: v_dual_mov_b32 v31, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s41 :: v_dual_mov_b32 v33, s42
; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s41 :: v_dual_mov_b32 v35, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s41 :: v_dual_mov_b32 v37, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s41 :: v_dual_mov_b32 v39, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s41 :: v_dual_mov_b32 v49, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s41 :: v_dual_mov_b32 v67, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s41 :: v_dual_mov_b32 v69, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s41 :: v_dual_mov_b32 v71, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s41 :: v_dual_mov_b32 v81, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s41 :: v_dual_mov_b32 v83, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s13 :: v_dual_mov_b32 v26, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s11 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s7 :: v_dual_mov_b32 v22, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s5 :: v_dual_mov_b32 v20, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s9 :: v_dual_mov_b32 v18, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: s_branch .LBB53_3
; GFX11-TRUE16-NEXT: .LBB53_2:
-; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: s_mov_b32 s40, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: .LBB53_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s40, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB53_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_f64 v[28:29], s[14:15], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[10:11], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[8:9], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[26:27], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[22:23], s[6:7], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[20:21], s[4:5], 1.0
-; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[12:13], 1.0
+; GFX11-TRUE16-NEXT: v_add_f64 v[18:19], s[8:9], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[12:13], s[24:25], 1.0
@@ -45178,101 +47844,68 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a
; GFX11-TRUE16-NEXT: v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT: v_add_f64 v[0:1], s[0:1], 1.0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v0
-; GFX11-TRUE16-NEXT: s_branch .LBB53_6
-; GFX11-TRUE16-NEXT: .LBB53_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s12 :: v_dual_mov_b32 v19, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s6 :: v_dual_mov_b32 v23, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s8 :: v_dual_mov_b32 v25, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s14 :: v_dual_mov_b32 v29, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s94 :: v_dual_mov_b32 v31, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s93 :: v_dual_mov_b32 v83, s63
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s92 :: v_dual_mov_b32 v81, s61
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s91 :: v_dual_mov_b32 v71, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s90 :: v_dual_mov_b32 v69, s59
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s89 :: v_dual_mov_b32 v67, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s88 :: v_dual_mov_b32 v65, s57
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s79 :: v_dual_mov_b32 v55, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s78 :: v_dual_mov_b32 v53, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s77 :: v_dual_mov_b32 v51, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s76 :: v_dual_mov_b32 v49, s45
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s75 :: v_dual_mov_b32 v39, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s74 :: v_dual_mov_b32 v37, s43
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s72 :: v_dual_mov_b32 v35, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s62 :: v_dual_mov_b32 v33, s40
-; GFX11-TRUE16-NEXT: .LBB53_6: ; %end
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v0
+; GFX11-TRUE16-NEXT: .LBB53_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v70.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v15f64_to_v60f16_scalar:
@@ -48250,143 +50883,340 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v60f16_to_v15f64_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s45, v11
-; GFX11-NEXT: v_readfirstlane_b32 s46, v10
-; GFX11-NEXT: v_readfirstlane_b32 s56, v9
-; GFX11-NEXT: v_readfirstlane_b32 s60, v8
-; GFX11-NEXT: v_readfirstlane_b32 s62, v7
-; GFX11-NEXT: v_readfirstlane_b32 s63, v6
-; GFX11-NEXT: v_readfirstlane_b32 s72, v5
-; GFX11-NEXT: v_readfirstlane_b32 s74, v4
-; GFX11-NEXT: v_readfirstlane_b32 s78, v3
-; GFX11-NEXT: v_readfirstlane_b32 s88, v2
-; GFX11-NEXT: v_readfirstlane_b32 s89, v1
-; GFX11-NEXT: v_readfirstlane_b32 s90, v0
-; GFX11-NEXT: v_readfirstlane_b32 s92, v12
-; GFX11-NEXT: s_lshr_b32 s41, s29, 16
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_lshr_b32 s15, s27, 16
-; GFX11-NEXT: s_lshr_b32 s14, s26, 16
-; GFX11-NEXT: s_lshr_b32 s13, s25, 16
-; GFX11-NEXT: s_lshr_b32 s12, s24, 16
-; GFX11-NEXT: s_lshr_b32 s11, s23, 16
-; GFX11-NEXT: s_lshr_b32 s10, s22, 16
-; GFX11-NEXT: s_lshr_b32 s9, s21, 16
-; GFX11-NEXT: s_lshr_b32 s8, s20, 16
-; GFX11-NEXT: s_lshr_b32 s7, s19, 16
-; GFX11-NEXT: s_lshr_b32 s6, s18, 16
-; GFX11-NEXT: s_lshr_b32 s5, s17, 16
-; GFX11-NEXT: s_lshr_b32 s4, s16, 16
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s44, s2, 16
-; GFX11-NEXT: s_lshr_b32 s47, s1, 16
-; GFX11-NEXT: s_lshr_b32 s57, s0, 16
-; GFX11-NEXT: s_lshr_b32 s58, s45, 16
-; GFX11-NEXT: s_lshr_b32 s59, s46, 16
-; GFX11-NEXT: s_lshr_b32 s61, s56, 16
-; GFX11-NEXT: s_lshr_b32 s73, s60, 16
-; GFX11-NEXT: s_lshr_b32 s75, s62, 16
-; GFX11-NEXT: s_lshr_b32 s76, s63, 16
-; GFX11-NEXT: s_lshr_b32 s77, s72, 16
-; GFX11-NEXT: s_lshr_b32 s79, s74, 16
-; GFX11-NEXT: s_lshr_b32 s91, s78, 16
-; GFX11-NEXT: s_lshr_b32 s93, s88, 16
-; GFX11-NEXT: s_lshr_b32 s94, s89, 16
-; GFX11-NEXT: s_lshr_b32 s95, s90, 16
-; GFX11-NEXT: s_mov_b32 s40, 0
-; GFX11-NEXT: s_cmp_lg_u32 s92, 0
-; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s57
-; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s47
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s43
-; GFX11-NEXT: s_pack_ll_b32_b16 s4, s16, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s5, s17, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s6, s18, s6
-; GFX11-NEXT: s_pack_ll_b32_b16 s7, s19, s7
-; GFX11-NEXT: s_pack_ll_b32_b16 s8, s20, s8
-; GFX11-NEXT: s_pack_ll_b32_b16 s9, s21, s9
-; GFX11-NEXT: s_pack_ll_b32_b16 s10, s22, s10
-; GFX11-NEXT: s_pack_ll_b32_b16 s11, s23, s11
-; GFX11-NEXT: s_pack_ll_b32_b16 s12, s24, s12
-; GFX11-NEXT: s_pack_ll_b32_b16 s13, s25, s13
-; GFX11-NEXT: s_pack_ll_b32_b16 s14, s26, s14
-; GFX11-NEXT: s_pack_ll_b32_b16 s15, s27, s15
-; GFX11-NEXT: s_pack_ll_b32_b16 s16, s28, s42
-; GFX11-NEXT: s_pack_ll_b32_b16 s17, s29, s41
-; GFX11-NEXT: s_pack_ll_b32_b16 s18, s90, s95
-; GFX11-NEXT: s_pack_ll_b32_b16 s19, s89, s94
-; GFX11-NEXT: s_pack_ll_b32_b16 s20, s88, s93
-; GFX11-NEXT: s_pack_ll_b32_b16 s21, s78, s91
-; GFX11-NEXT: s_pack_ll_b32_b16 s22, s74, s79
-; GFX11-NEXT: s_pack_ll_b32_b16 s23, s72, s77
-; GFX11-NEXT: s_pack_ll_b32_b16 s24, s63, s76
-; GFX11-NEXT: s_pack_ll_b32_b16 s25, s62, s75
-; GFX11-NEXT: s_pack_ll_b32_b16 s26, s60, s73
-; GFX11-NEXT: s_pack_ll_b32_b16 s27, s56, s61
-; GFX11-NEXT: s_pack_ll_b32_b16 s28, s46, s59
-; GFX11-NEXT: s_pack_ll_b32_b16 s29, s45, s58
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_2
-; GFX11-NEXT: ; %bb.1:
-; GFX11-NEXT: s_mov_b32 s40, -1
-; GFX11-NEXT: .LBB55_2: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s40, s40, exec_lo
-; GFX11-NEXT: s_cselect_b32 s40, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s40, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB55_4
-; GFX11-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-; GFX11-NEXT: .LBB55_4:
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX11-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
-; GFX11-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
-; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
-; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
-; GFX11-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
-; GFX11-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
-; GFX11-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
-; GFX11-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
-; GFX11-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
-; GFX11-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
-; GFX11-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
-; GFX11-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
-; GFX11-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
-; GFX11-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v60f16_to_v15f64_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s4 :: v_dual_mov_b32 v51, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v55, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v66, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s4 :: v_dual_mov_b32 v81, s5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s4 :: v_dual_mov_b32 v67, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s4 :: v_dual_mov_b32 v71, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s4 :: v_dual_mov_b32 v17, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v65, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v15, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s4 :: v_dual_mov_b32 v14, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB55_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: s_branch .LBB55_3
+; GFX11-TRUE16-NEXT: .LBB55_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB55_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB55_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: .LBB55_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v60f16_to_v15f64_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v8
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s74, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s78, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s88, v2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s89, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s90, v0
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s92, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s45, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s60, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s63, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s74, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s78, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s88, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s89, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s90, 16
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s92, 0
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s0, s57
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s1, s47
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s44
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s43
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s16, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s17, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s18, s6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s19, s7
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s20, s8
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s21, s9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s22, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s23, s11
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s24, s12
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s25, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s26, s14
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s27, s15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s28, s42
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s29, s41
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s18, s90, s95
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s19, s89, s94
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s20, s88, s93
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s21, s78, s91
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s22, s74, s79
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s23, s72, s77
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s24, s63, s76
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s25, s62, s75
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s26, s60, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s27, s56, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s46, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s45, s58
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_2
+; GFX11-FAKE16-NEXT: ; %bb.1:
+; GFX11-FAKE16-NEXT: s_mov_b32 s40, -1
+; GFX11-FAKE16-NEXT: .LBB55_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s40, s40, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s40, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s40, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB55_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, s4 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, s5 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, s6 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, s7 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s8 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, s9 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, s10 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v11, 0x200, s11 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v12, 0x200, s12 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v13, 0x200, s13 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s14 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s15 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v16, 0x200, s16 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, s17 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, s18 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, s19 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, s21 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v22, 0x200, s22 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, s23 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, s24 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, s25 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, s26 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, s27 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v28, 0x200, s28 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, s29 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-NEXT: .LBB55_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -51240,159 +54070,75 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v60i16_to_v60f16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s93, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s92, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s89, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s91, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s90, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s88, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s78, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s76, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s79, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s77, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s75, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s94, v12
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s93, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s92, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s89, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s91, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s90, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s88, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s78, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s76, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s79, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s77, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s75, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s74, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s94, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s94, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s94, -1
-; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s94, s94, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s94, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s94, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s89, s59
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s62, s92, s62
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s91, s73
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s78, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s76, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s72, s93, s72
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, s62, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s62, s90, s63
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s88, s60
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s79, s61
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s77, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s75, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s74, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s4
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s5
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, s72, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, s62, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, s59, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, s47, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, s56, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s8, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
-; GFX11-TRUE16-NEXT: s_branch .LBB57_5
-; GFX11-TRUE16-NEXT: .LBB57_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s93 :: v_dual_mov_b32 v28, s92
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s89 :: v_dual_mov_b32 v26, s91
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s90 :: v_dual_mov_b32 v24, s88
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s78 :: v_dual_mov_b32 v22, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s79 :: v_dual_mov_b32 v20, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s75 :: v_dual_mov_b32 v18, s74
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v69, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s4 :: v_dual_mov_b32 v64, s41
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
@@ -51401,55 +54147,145 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s72 :: v_dual_mov_b32 v31, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s59 :: v_dual_mov_b32 v33, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s63 :: v_dual_mov_b32 v35, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s57 :: v_dual_mov_b32 v37, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s61 :: v_dual_mov_b32 v39, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s56 :: v_dual_mov_b32 v49, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s45 :: v_dual_mov_b32 v51, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s43 :: v_dual_mov_b32 v53, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s11 :: v_dual_mov_b32 v69, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s9 :: v_dual_mov_b32 v71, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s6 :: v_dual_mov_b32 v81, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s5 :: v_dual_mov_b32 v83, s7
-; GFX11-TRUE16-NEXT: .LBB57_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_2
+; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB57_2: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB57_4
+; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v29
+; GFX11-TRUE16-NEXT: .LBB57_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v70.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v60i16_to_v60f16_scalar:
@@ -54044,159 +56880,75 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i
; GFX11-TRUE16-LABEL: bitcast_v60f16_to_v60i16_scalar:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s93, v11
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s92, v10
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s89, v9
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s91, v8
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s90, v7
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s88, v6
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s78, v5
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s76, v4
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s79, v3
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s77, v2
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s75, v1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s74, v0
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s94, v12
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s29, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s93, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s92, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s89, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s91, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s90, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s88, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s78, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s76, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s79, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s77, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s75, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s74, 16
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s94, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s94, 0
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
-; GFX11-TRUE16-NEXT: ; %bb.1:
-; GFX11-TRUE16-NEXT: s_mov_b32 s94, -1
-; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s94, s94, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s94, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s94, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
-; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s89, s59
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s62, s92, s62
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s91, s73
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s78, s57
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s76, s47
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s72, s93, s72
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, s62 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s62, s90, s63
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s59, s88, s60
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s57, s79, s61
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s77, s58
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s56, s75, s56
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s74, s46
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s29, s45
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s28, s44
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s27, s27, s43
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s26, s26, s42
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s25, s25, s41
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s24, s24, s40
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s23, s15
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s22, s14
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s21, s13
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s20, s12
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s19, s11
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s18, s10
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s17, s9
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s16, s8
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s6
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s4
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s7
-; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s5
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, s72 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, s62 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, s59 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, s57 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, s47 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, s56 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, s46 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, s29 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, s28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, s27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, s26 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, s25 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, s24 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, s14 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, s13 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, s12 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, s11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, s10 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, s9 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s8 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
-; GFX11-TRUE16-NEXT: s_branch .LBB59_5
-; GFX11-TRUE16-NEXT: .LBB59_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s93 :: v_dual_mov_b32 v28, s92
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s89 :: v_dual_mov_b32 v26, s91
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s90 :: v_dual_mov_b32 v24, s88
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s78 :: v_dual_mov_b32 v22, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s79 :: v_dual_mov_b32 v20, s77
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s75 :: v_dual_mov_b32 v18, s74
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s28, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v55, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s5 :: v_dual_mov_b32 v53, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s5 :: v_dual_mov_b32 v51, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s5 :: v_dual_mov_b32 v49, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s5 :: v_dual_mov_b32 v39, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s5 :: v_dual_mov_b32 v37, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s5 :: v_dual_mov_b32 v35, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s5 :: v_dual_mov_b32 v31, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v33, s4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v11
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s6, v10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v70, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s6, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v71, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s7, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s8, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v81, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s9, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s12, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s10, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s14, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s4 :: v_dual_mov_b32 v69, s41
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s11, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s15, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v67, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s12, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v29, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s40, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v83, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s15, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s4 :: v_dual_mov_b32 v64, s41
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
@@ -54205,55 +56957,145 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s72 :: v_dual_mov_b32 v31, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s59 :: v_dual_mov_b32 v33, s73
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s63 :: v_dual_mov_b32 v35, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v36, s57 :: v_dual_mov_b32 v37, s47
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s61 :: v_dual_mov_b32 v39, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s56 :: v_dual_mov_b32 v49, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s45 :: v_dual_mov_b32 v51, s44
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s43 :: v_dual_mov_b32 v53, s42
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v65, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s13 :: v_dual_mov_b32 v67, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s11 :: v_dual_mov_b32 v69, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s9 :: v_dual_mov_b32 v71, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s6 :: v_dual_mov_b32 v81, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s5 :: v_dual_mov_b32 v83, s7
-; GFX11-TRUE16-NEXT: .LBB59_5: ; %end
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v82.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v50.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v48.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v31.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v28, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s7 :: v_dual_mov_b32 v26, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s9 :: v_dual_mov_b32 v24, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s11 :: v_dual_mov_b32 v22, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s13 :: v_dual_mov_b32 v20, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v18, s40
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_2
+; GFX11-TRUE16-NEXT: ; %bb.1:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: .LBB59_2: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB59_4
+; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v30.l
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v22, 0x200, v22 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v29
+; GFX11-TRUE16-NEXT: .LBB59_4: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v31.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v39.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v48.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v49.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v65.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v68.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v70.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v60f16_to_v60i16_scalar:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
index 374626a2578fb5..2a9407414d4b37 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
@@ -856,61 +856,131 @@ define inreg <12 x i8> @bitcast_v3i32_to_v12i8_scalar(<3 x i32> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v11, s6
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v3i32_to_v12i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s3, 0
-; GFX11-NEXT: s_mov_b32 s14, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB5_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s3, s2, 16
-; GFX11-NEXT: s_lshr_b32 s8, s2, 8
-; GFX11-NEXT: s_lshr_b32 s9, s1, 24
-; GFX11-NEXT: s_lshr_b32 s10, s1, 16
-; GFX11-NEXT: s_lshr_b32 s11, s1, 8
-; GFX11-NEXT: s_lshr_b32 s12, s0, 16
-; GFX11-NEXT: s_lshr_b32 s13, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB5_3
-; GFX11-NEXT: .LBB5_2:
-; GFX11-NEXT: s_mov_b32 s14, -1
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr8
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB5_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s14, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB5_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_lshr_b32 s3, s2, 16
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_lshr_b32 s8, s2, 8
-; GFX11-NEXT: s_lshr_b32 s9, s1, 24
-; GFX11-NEXT: s_lshr_b32 s10, s1, 16
-; GFX11-NEXT: s_lshr_b32 s11, s1, 8
-; GFX11-NEXT: s_lshr_b32 s12, s0, 16
-; GFX11-NEXT: s_lshr_b32 s13, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: .LBB5_5: ; %end
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13
-; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s4
-; GFX11-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s11
-; GFX11-NEXT: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, s9
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s8
-; GFX11-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v11, s6
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v3i32_to_v12i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB5_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v2, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v0, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v11, s4
+; GFX11-TRUE16-NEXT: s_branch .LBB5_3
+; GFX11-TRUE16-NEXT: .LBB5_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: .LBB5_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB5_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v7, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v9, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s1
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[0:1], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v1, s3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s0
+; GFX11-TRUE16-NEXT: .LBB5_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v3i32_to_v12i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB5_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB5_3
+; GFX11-FAKE16-NEXT: .LBB5_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s14, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB5_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s14, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB5_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s1, s1, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: .LBB5_5: ; %end
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v11, s6
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -1578,71 +1648,141 @@ define inreg <3 x i32> @bitcast_v12i8_to_v3i32_scalar(<12 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB7_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i8_to_v3i32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s24, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB7_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v4, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v5, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v3
-; GFX11-NEXT: s_branch .LBB7_3
-; GFX11-NEXT: .LBB7_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
-; GFX11-NEXT: .LBB7_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB7_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v0, s22, s23, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: .LBB7_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v3i32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s23 :: v_dual_mov_b32 v6, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s21 :: v_dual_mov_b32 v9, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s19 :: v_dual_mov_b32 v12, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v8, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v10, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB7_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v13, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v11, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v6, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v14, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v12, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v9, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v17, v15
+; GFX11-TRUE16-NEXT: s_branch .LBB7_3
+; GFX11-TRUE16-NEXT: .LBB7_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
+; GFX11-TRUE16-NEXT: .LBB7_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB7_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v11, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v9, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v6, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v3
+; GFX11-TRUE16-NEXT: .LBB7_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v3i32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB7_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v5, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v3
+; GFX11-FAKE16-NEXT: s_branch .LBB7_3
+; GFX11-FAKE16-NEXT: .LBB7_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
+; GFX11-FAKE16-NEXT: .LBB7_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB7_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: .LBB7_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -2118,63 +2258,62 @@ define <3 x i32> @bitcast_v6bf16_to_v3i32(<6 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB10_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v6, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v8, v6 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_cndmask_b32 v5, v7, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v11, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v5.l
; GFX11-TRUE16-NEXT: .LBB10_2: ; %end
@@ -4187,67 +4326,133 @@ define inreg <12 x i8> @bitcast_v3f32_to_v12i8_scalar(<3 x float> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v4, v14
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v3f32_to_v12i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s3, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB21_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s3, s2, 16
-; GFX11-NEXT: s_lshr_b32 s9, s2, 8
-; GFX11-NEXT: s_lshr_b32 s10, s1, 24
-; GFX11-NEXT: s_lshr_b32 s11, s1, 16
-; GFX11-NEXT: s_lshr_b32 s13, s1, 8
-; GFX11-NEXT: s_lshr_b32 s12, s0, 16
-; GFX11-NEXT: s_lshr_b32 s14, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB21_3
-; GFX11-NEXT: .LBB21_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB21_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB21_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f32_e64 v8, s2, 1.0
-; GFX11-NEXT: v_add_f32_e64 v14, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v13, s0, 1.0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v14
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v13
-; GFX11-NEXT: s_branch .LBB21_6
-; GFX11-NEXT: .LBB21_5:
-; GFX11-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s1
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s14
-; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s13
-; GFX11-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s10
-; GFX11-NEXT: v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s3
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB21_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v13
-; GFX11-NEXT: v_mov_b32_e32 v4, v14
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v3f32_to_v12i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB21_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v2, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v8, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s4
+; GFX11-TRUE16-NEXT: s_branch .LBB21_3
+; GFX11-TRUE16-NEXT: .LBB21_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: .LBB21_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB21_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, s2, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, s1, 1.0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, s0, 1.0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[8:9]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB21_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v12.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v3f32_to_v12i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB21_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB21_3
+; GFX11-FAKE16-NEXT: .LBB21_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB21_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB21_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, s2, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, s1, 1.0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, s0, 1.0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v13
+; GFX11-FAKE16-NEXT: s_branch .LBB21_6
+; GFX11-FAKE16-NEXT: .LBB21_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB21_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v14
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -4915,71 +5120,141 @@ define inreg <3 x float> @bitcast_v12i8_to_v3f32_scalar(<12 x i8> inreg %a, i32
; GFX9-NEXT: .LBB23_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i8_to_v3f32_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s24, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB23_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v4, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v5, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v3
-; GFX11-NEXT: s_branch .LBB23_3
-; GFX11-NEXT: .LBB23_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
-; GFX11-NEXT: .LBB23_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB23_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v0, s22, s23, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: .LBB23_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v3f32_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s23 :: v_dual_mov_b32 v6, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s21 :: v_dual_mov_b32 v9, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s19 :: v_dual_mov_b32 v12, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v8, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v10, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s2 :: v_dual_mov_b32 v14, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB23_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v13, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v11, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v6, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v14, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v12, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v9, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v17, v15
+; GFX11-TRUE16-NEXT: s_branch .LBB23_3
+; GFX11-TRUE16-NEXT: .LBB23_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
+; GFX11-TRUE16-NEXT: .LBB23_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB23_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 3, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 3, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 3, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v11, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v9, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v6, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v3
+; GFX11-TRUE16-NEXT: .LBB23_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v3f32_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB23_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v5, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v3
+; GFX11-FAKE16-NEXT: s_branch .LBB23_3
+; GFX11-FAKE16-NEXT: .LBB23_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
+; GFX11-FAKE16-NEXT: .LBB23_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB23_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: .LBB23_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -5466,63 +5741,62 @@ define <3 x float> @bitcast_v6bf16_to_v3f32(<6 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB26_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v6, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v8, v6 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_cndmask_b32 v5, v7, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v11, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v5.l
; GFX11-TRUE16-NEXT: .LBB26_2: ; %end
@@ -7765,71 +8039,141 @@ define inreg <6 x bfloat> @bitcast_v12i8_to_v6bf16_scalar(<12 x i8> inreg %a, i3
; GFX9-NEXT: .LBB37_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i8_to_v6bf16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s24, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB37_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v4, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v5, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v3
-; GFX11-NEXT: s_branch .LBB37_3
-; GFX11-NEXT: .LBB37_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB37_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB37_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v0, s22, s23, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: .LBB37_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v6bf16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s23 :: v_dual_mov_b32 v7, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s21 :: v_dual_mov_b32 v10, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s19 :: v_dual_mov_b32 v13, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s18 :: v_dual_mov_b32 v9, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v11, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s2 :: v_dual_mov_b32 v15, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB37_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v14, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v12, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v15, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v13, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v17, v3
+; GFX11-TRUE16-NEXT: s_branch .LBB37_3
+; GFX11-TRUE16-NEXT: .LBB37_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB37_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB37_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-TRUE16-NEXT: .LBB37_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v6bf16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB37_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v5, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v3
+; GFX11-FAKE16-NEXT: s_branch .LBB37_3
+; GFX11-FAKE16-NEXT: .LBB37_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB37_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB37_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: .LBB37_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -8173,65 +8517,64 @@ define <12 x i8> @bitcast_v6bf16_to_v12i8(<6 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB38_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v13.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, 0x7fc07fc0 :: v_dual_lshlrev_b32 v3, 16, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v14
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v9, v10 :: v_dual_lshlrev_b32 v3, 16, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v4 :: v_dual_add_f32 v4, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v10, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v6.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v1, v7, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v5, 16, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_cndmask_b32 v4, v7, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v0, v0, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v14
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_add3_u32 v0, v0, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v14
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v2.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
@@ -8698,27 +9041,39 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB39_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s0, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v2, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s6 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s4
; GFX11-TRUE16-NEXT: s_branch .LBB39_3
; GFX11-TRUE16-NEXT: .LBB39_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s3, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: .LBB39_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, exec_lo
@@ -8730,87 +9085,76 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s0
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3
; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v3
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v4
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v4, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v14
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v10.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-; GFX11-TRUE16-NEXT: .LBB39_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v1, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v7, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v5, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v11, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1
+; GFX11-TRUE16-NEXT: .LBB39_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v12.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v12i8_scalar:
@@ -9637,71 +9981,141 @@ define inreg <6 x half> @bitcast_v12i8_to_v6f16_scalar(<12 x i8> inreg %a, i32 i
; GFX9-NEXT: .LBB41_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i8_to_v6f16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s24, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB41_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v4, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v5, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v3
-; GFX11-NEXT: s_branch .LBB41_3
-; GFX11-NEXT: .LBB41_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB41_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB41_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v0, s22, s23, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: .LBB41_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v6f16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s23 :: v_dual_mov_b32 v7, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s21 :: v_dual_mov_b32 v10, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s19 :: v_dual_mov_b32 v13, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s18 :: v_dual_mov_b32 v9, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v11, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s2 :: v_dual_mov_b32 v15, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v14, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v12, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v15, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v13, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v17, v3
+; GFX11-TRUE16-NEXT: s_branch .LBB41_3
+; GFX11-TRUE16-NEXT: .LBB41_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-TRUE16-NEXT: .LBB41_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v6f16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB41_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v5, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v3
+; GFX11-FAKE16-NEXT: s_branch .LBB41_3
+; GFX11-FAKE16-NEXT: .LBB41_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB41_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB41_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: .LBB41_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -10281,70 +10695,139 @@ define inreg <12 x i8> @bitcast_v6f16_to_v12i8_scalar(<6 x half> inreg %a, i32 i
; GFX9-NEXT: v_mov_b32_e32 v9, v13
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v6f16_to_v12i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s3, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB43_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s3, s2, 16
-; GFX11-NEXT: s_lshr_b32 s9, s2, 8
-; GFX11-NEXT: s_lshr_b32 s10, s1, 24
-; GFX11-NEXT: s_lshr_b32 s11, s1, 16
-; GFX11-NEXT: s_lshr_b32 s13, s1, 8
-; GFX11-NEXT: s_lshr_b32 s12, s0, 16
-; GFX11-NEXT: s_lshr_b32 s14, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB43_3
-; GFX11-NEXT: .LBB43_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB43_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB43_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s1 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s0 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s2 op_sel_hi:[0,1]
-; GFX11-NEXT: v_mov_b32_e32 v9, 0x7e007e00
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v15
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v14
-; GFX11-NEXT: s_branch .LBB43_6
-; GFX11-NEXT: .LBB43_5:
-; GFX11-NEXT: v_dual_mov_b32 v14, s0 :: v_dual_mov_b32 v15, s1
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s14
-; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s13
-; GFX11-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s10
-; GFX11-NEXT: v_dual_mov_b32 v13, s9 :: v_dual_mov_b32 v10, s3
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB43_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_dual_mov_b32 v0, v14 :: v_dual_mov_b32 v9, v13
-; GFX11-NEXT: v_mov_b32_e32 v4, v15
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v6f16_to_v12i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v2, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s6 :: v_dual_mov_b32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s4
+; GFX11-TRUE16-NEXT: s_branch .LBB43_3
+; GFX11-TRUE16-NEXT: .LBB43_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, 0x7e007e00
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[3:4]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB43_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v12.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v6f16_to_v12i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB43_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB43_3
+; GFX11-FAKE16-NEXT: .LBB43_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB43_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB43_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v15, 0x200, s1 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v14, 0x200, s0 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, s2 op_sel_hi:[0,1]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v9, 0x7e007e00
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v14
+; GFX11-FAKE16-NEXT: s_branch .LBB43_6
+; GFX11-FAKE16-NEXT: .LBB43_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s0 :: v_dual_mov_b32 v15, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s9 :: v_dual_mov_b32 v10, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB43_6: ; %end
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, v14 :: v_dual_mov_b32 v9, v13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v15
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11049,71 +11532,141 @@ define inreg <6 x i16> @bitcast_v12i8_to_v6i16_scalar(<12 x i8> inreg %a, i32 in
; GFX9-NEXT: .LBB45_5: ; %end
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v12i8_to_v6i16_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s24, 0
-; GFX11-NEXT: s_mov_b32 s4, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB45_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v4, s22, s23, v0
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v5, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v6, s20, s21, v0
-; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v2
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v2, v6, v3
-; GFX11-NEXT: s_branch .LBB45_3
-; GFX11-NEXT: .LBB45_2:
-; GFX11-NEXT: s_mov_b32 s4, -1
-; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
-; GFX11-NEXT: .LBB45_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s4, s4, exec_lo
-; GFX11-NEXT: s_cselect_b32 s4, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s4, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB45_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; GFX11-NEXT: s_add_i32 s0, s0, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: v_perm_b32 v1, s0, s1, v0
-; GFX11-NEXT: v_perm_b32 v2, s2, s3, v0
-; GFX11-NEXT: v_perm_b32 v3, s16, s17, v0
-; GFX11-NEXT: v_perm_b32 v4, s18, s19, v0
-; GFX11-NEXT: v_perm_b32 v5, s20, s21, v0
-; GFX11-NEXT: v_perm_b32 v0, s22, s23, v0
-; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
-; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
-; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
-; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
-; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
-; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
-; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v0
-; GFX11-NEXT: v_or_b32_e32 v0, v1, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_or_b32_e32 v1, v3, v4
-; GFX11-NEXT: v_or_b32_e32 v2, v5, v6
-; GFX11-NEXT: .LBB45_5: ; %end
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v12i8_to_v6i16_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s23 :: v_dual_mov_b32 v7, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s21 :: v_dual_mov_b32 v10, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s19 :: v_dual_mov_b32 v13, s16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s18 :: v_dual_mov_b32 v9, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s17 :: v_dual_mov_b32 v11, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s2 :: v_dual_mov_b32 v15, s0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v14, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v12, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v15, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v13, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v17, v3
+; GFX11-TRUE16-NEXT: s_branch .LBB45_3
+; GFX11-TRUE16-NEXT: .LBB45_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-TRUE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s0, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 3, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 3, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 3, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 3, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 3, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 3, v7
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v10, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v7, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
+; GFX11-TRUE16-NEXT: .LBB45_5: ; %end
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v12i8_to_v6i16_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s24, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB45_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v5, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v6, v3
+; GFX11-FAKE16-NEXT: s_branch .LBB45_3
+; GFX11-FAKE16-NEXT: .LBB45_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s4, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-FAKE16-NEXT: .LBB45_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB45_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3
+; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, s0, s1, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, s2, s3, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, s18, s19, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v0
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, s22, s23, v0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v6
+; GFX11-FAKE16-NEXT: .LBB45_5: ; %end
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11674,69 +12227,135 @@ define inreg <12 x i8> @bitcast_v6i16_to_v12i8_scalar(<6 x i16> inreg %a, i32 in
; GFX9-NEXT: v_mov_b32_e32 v4, v14
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: bitcast_v6i16_to_v12i8_scalar:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_cmp_lg_u32 s3, 0
-; GFX11-NEXT: s_mov_b32 s8, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB47_2
-; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s3, s2, 16
-; GFX11-NEXT: s_lshr_b32 s9, s2, 8
-; GFX11-NEXT: s_lshr_b32 s10, s1, 24
-; GFX11-NEXT: s_lshr_b32 s11, s1, 16
-; GFX11-NEXT: s_lshr_b32 s13, s1, 8
-; GFX11-NEXT: s_lshr_b32 s12, s0, 16
-; GFX11-NEXT: s_lshr_b32 s14, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
-; GFX11-NEXT: s_branch .LBB47_3
-; GFX11-NEXT: .LBB47_2:
-; GFX11-NEXT: s_mov_b32 s8, -1
-; GFX11-NEXT: ; implicit-def: $sgpr14
-; GFX11-NEXT: ; implicit-def: $sgpr12
-; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr13
-; GFX11-NEXT: ; implicit-def: $sgpr11
-; GFX11-NEXT: ; implicit-def: $sgpr10
-; GFX11-NEXT: ; implicit-def: $sgpr9
-; GFX11-NEXT: ; implicit-def: $sgpr3
-; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: .LBB47_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB47_5
-; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_pk_add_u16 v14, s1, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v9, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v8, s2, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v13, s0, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v14
-; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v13
-; GFX11-NEXT: s_branch .LBB47_6
-; GFX11-NEXT: .LBB47_5:
-; GFX11-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s1
-; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s14
-; GFX11-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s13
-; GFX11-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s10
-; GFX11-NEXT: v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s3
-; GFX11-NEXT: v_mov_b32_e32 v11, s6
-; GFX11-NEXT: v_mov_b32_e32 v3, s4
-; GFX11-NEXT: .LBB47_6: ; %end
-; GFX11-NEXT: v_mov_b32_e32 v0, v13
-; GFX11-NEXT: v_mov_b32_e32 v4, v14
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: bitcast_v6i16_to_v12i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v9, s5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v2, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s6 :: v_dual_mov_b32 v1, s5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v11, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
+; GFX11-TRUE16-NEXT: s_branch .LBB47_3
+; GFX11-TRUE16-NEXT: .LBB47_2:
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s3, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 1
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, s2, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, s1, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, s0, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: .LBB47_5: ; %end
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v12.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v6i16_to_v12i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB47_2
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_branch .LBB47_3
+; GFX11-FAKE16-NEXT: .LBB47_2:
+; GFX11-FAKE16-NEXT: s_mov_b32 s8, -1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: .LBB47_3: ; %Flow
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s8, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB47_5
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, s1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, s2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, s0, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9]
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v13
+; GFX11-FAKE16-NEXT: s_branch .LBB47_6
+; GFX11-FAKE16-NEXT: .LBB47_5:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v1, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v5, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
+; GFX11-FAKE16-NEXT: .LBB47_6: ; %end
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v13
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v14
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -11970,60 +12589,59 @@ define <6 x half> @bitcast_v6bf16_to_v6f16(<6 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB48_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_add_f32 v0, 0x40c00000, v0
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v6, v7 :: v_dual_add_f32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v0, v7, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v6, v7 :: v_dual_add_f32 v5, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v8, v9, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_cndmask_b32 v5, v8, v9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v10, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l
; GFX11-TRUE16-NEXT: .LBB48_2: ; %end
@@ -13078,53 +13696,51 @@ define <6 x i16> @bitcast_v6bf16_to_v6i16(<6 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB52_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v4, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v3, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v4, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v6, v7 :: v_dual_and_b32 v1, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_lshlrev_b32 v5, 16, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_add3_u32 v8, v10, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v7, v11 :: v_dual_and_b32 v1, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v6, v12, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
diff --git a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
index 3e3b5ac65eabc2..891405b398dc3e 100644
--- a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
@@ -9630,36 +9630,37 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1164-TRUE16-LABEL: uniform_or_i8:
; GFX1164-TRUE16: ; %bb.0:
; GFX1164-TRUE16-NEXT: s_clause 0x1
-; GFX1164-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1164-TRUE16-NEXT: s_load_b32 s14, s[4:5], 0x34
+; GFX1164-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1164-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1164-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX1164-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX1164-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v4, s0
; GFX1164-TRUE16-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX1164-TRUE16-NEXT: s_cbranch_execz .LBB12_4
; GFX1164-TRUE16-NEXT: ; %bb.1:
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1164-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1164-TRUE16-NEXT: s_and_b32 s1, s10, 3
-; GFX1164-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s10, s1, 3
-; GFX1164-TRUE16-NEXT: s_and_b32 s1, s14, 0xff
+; GFX1164-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1164-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v4
+; GFX1164-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1164-TRUE16-NEXT: s_and_b32 s1, s6, 3
; GFX1164-TRUE16-NEXT: s_mov_b64 s[12:13], 0
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s15, s1, s10
-; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s6, s1, 3
+; GFX1164-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s6, v0
+; GFX1164-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX1164-TRUE16-NEXT: .LBB12_2: ; %atomicrmw.start
; GFX1164-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1164-TRUE16-NEXT: v_or_b32_e32 v0, s15, v1
+; GFX1164-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v2, v0
-; GFX1164-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1164-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], 0 glc
; GFX1164-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1164-TRUE16-NEXT: v_cmp_eq_u32_e64 s[0:1], v2, v1
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, v2
@@ -9669,17 +9670,16 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1164-TRUE16-NEXT: s_cbranch_execnz .LBB12_2
; GFX1164-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[12:13]
-; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
+; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s6, v2
; GFX1164-TRUE16-NEXT: .LBB12_4: ; %Flow
; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1164-TRUE16-NEXT: v_cndmask_b16 v0.l, s14, 0, vcc
-; GFX1164-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1164-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1164-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc
+; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1164-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1164-TRUE16-NEXT: buffer_store_b8 v0, off, s[8:11], 0
+; GFX1164-TRUE16-NEXT: buffer_store_b8 v0, off, s[4:7], 0
; GFX1164-TRUE16-NEXT: s_endpgm
;
; GFX1164-FAKE16-LABEL: uniform_or_i8:
@@ -9740,56 +9740,54 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1132-TRUE16-LABEL: uniform_or_i8:
; GFX1132-TRUE16: ; %bb.0:
; GFX1132-TRUE16-NEXT: s_clause 0x1
-; GFX1132-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1132-TRUE16-NEXT: s_load_b32 s1, s[4:5], 0x34
+; GFX1132-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1132-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1132-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
-; GFX1132-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1132-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1132-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1132-TRUE16-NEXT: s_and_saveexec_b32 s2, vcc_lo
+; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX1132-TRUE16-NEXT: s_and_saveexec_b32 s1, vcc_lo
; GFX1132-TRUE16-NEXT: s_cbranch_execz .LBB12_4
; GFX1132-TRUE16-NEXT: ; %bb.1:
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1132-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1132-TRUE16-NEXT: s_and_b32 s5, s10, 3
-; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s10, s5, 3
-; GFX1132-TRUE16-NEXT: s_and_b32 s5, s1, 0xff
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s12, s5, s10
-; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s11
+; GFX1132-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1132-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1132-TRUE16-NEXT: s_and_b32 s3, s6, 3
+; GFX1132-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1132-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v4
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1132-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1132-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s3, v0
; GFX1132-TRUE16-NEXT: .LBB12_2: ; %atomicrmw.start
; GFX1132-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_or_b32_e32 v0, s12, v1
+; GFX1132-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], 0 glc
; GFX1132-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v2, v1
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1132-TRUE16-NEXT: s_or_b32 s3, s0, s3
+; GFX1132-TRUE16-NEXT: s_or_b32 s2, s0, s2
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1132-TRUE16-NEXT: s_cbranch_execnz .LBB12_2
; GFX1132-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
-; GFX1132-TRUE16-NEXT: .LBB12_4: ; %Flow
; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s2
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s3, v2
+; GFX1132-TRUE16-NEXT: .LBB12_4: ; %Flow
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-TRUE16-NEXT: v_cndmask_b16 v0.l, s1, 0, vcc_lo
-; GFX1132-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1132-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1132-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc_lo
+; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1132-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1132-TRUE16-NEXT: buffer_store_b8 v0, off, s[8:11], 0
+; GFX1132-TRUE16-NEXT: buffer_store_b8 v0, off, s[4:7], 0
; GFX1132-TRUE16-NEXT: s_endpgm
;
; GFX1132-FAKE16-LABEL: uniform_or_i8:
@@ -9850,36 +9848,38 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1264-TRUE16-LABEL: uniform_or_i8:
; GFX1264-TRUE16: ; %bb.0:
; GFX1264-TRUE16-NEXT: s_clause 0x1
-; GFX1264-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1264-TRUE16-NEXT: s_load_b32 s14, s[4:5], 0x34
+; GFX1264-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1264-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1264-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX1264-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX1264-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v4, s0
; GFX1264-TRUE16-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX1264-TRUE16-NEXT: s_cbranch_execz .LBB12_4
; GFX1264-TRUE16-NEXT: ; %bb.1:
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1264-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1264-TRUE16-NEXT: s_and_b32 s1, s10, 3
-; GFX1264-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s10, s1, 3
-; GFX1264-TRUE16-NEXT: s_and_b32 s1, s14, 0xff
+; GFX1264-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1264-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v4
+; GFX1264-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1264-TRUE16-NEXT: s_and_b32 s1, s6, 3
; GFX1264-TRUE16-NEXT: s_mov_b64 s[12:13], 0
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s15, s1, s10
-; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s6, s1, 3
+; GFX1264-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s6, v0
+; GFX1264-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX1264-TRUE16-NEXT: .LBB12_2: ; %atomicrmw.start
; GFX1264-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1264-TRUE16-NEXT: v_or_b32_e32 v0, s15, v1
+; GFX1264-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v2, v0
-; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1264-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1264-TRUE16-NEXT: v_cmp_eq_u32_e64 s[0:1], v2, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, v2
@@ -9889,19 +9889,17 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1264-TRUE16-NEXT: s_cbranch_execnz .LBB12_2
; GFX1264-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[12:13]
-; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
+; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s6, v2
; GFX1264-TRUE16-NEXT: .LBB12_4: ; %Flow
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1264-TRUE16-NEXT: v_cndmask_b16 v0.l, s14, 0, vcc
-; GFX1264-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1264-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1264-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc
+; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1264-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1264-TRUE16-NEXT: buffer_store_b8 v0, off, s[8:11], null
+; GFX1264-TRUE16-NEXT: buffer_store_b8 v0, off, s[4:7], null
; GFX1264-TRUE16-NEXT: s_endpgm
;
; GFX1264-FAKE16-LABEL: uniform_or_i8:
@@ -9964,58 +9962,56 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1232-TRUE16-LABEL: uniform_or_i8:
; GFX1232-TRUE16: ; %bb.0:
; GFX1232-TRUE16-NEXT: s_clause 0x1
-; GFX1232-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1232-TRUE16-NEXT: s_load_b32 s1, s[4:5], 0x34
+; GFX1232-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1232-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1232-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
-; GFX1232-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1232-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1232-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1232-TRUE16-NEXT: s_and_saveexec_b32 s2, vcc_lo
+; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX1232-TRUE16-NEXT: s_and_saveexec_b32 s1, vcc_lo
; GFX1232-TRUE16-NEXT: s_cbranch_execz .LBB12_4
; GFX1232-TRUE16-NEXT: ; %bb.1:
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1232-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1232-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1232-TRUE16-NEXT: s_and_b32 s5, s10, 3
-; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s10, s5, 3
-; GFX1232-TRUE16-NEXT: s_and_b32 s5, s1, 0xff
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s12, s5, s10
-; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s11
+; GFX1232-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1232-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1232-TRUE16-NEXT: s_and_b32 s3, s6, 3
+; GFX1232-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1232-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v4
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1232-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1232-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s3, v0
; GFX1232-TRUE16-NEXT: .LBB12_2: ; %atomicrmw.start
; GFX1232-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_or_b32_e32 v0, s12, v1
+; GFX1232-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1232-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v2, v1
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1232-TRUE16-NEXT: s_or_b32 s3, s0, s3
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX1232-TRUE16-NEXT: s_or_b32 s2, s0, s2
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1232-TRUE16-NEXT: s_cbranch_execnz .LBB12_2
; GFX1232-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
-; GFX1232-TRUE16-NEXT: .LBB12_4: ; %Flow
; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s2
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s3, v2
+; GFX1232-TRUE16-NEXT: .LBB12_4: ; %Flow
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1232-TRUE16-NEXT: v_cndmask_b16 v0.l, s1, 0, vcc_lo
-; GFX1232-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1232-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1232-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc_lo
+; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1232-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1232-TRUE16-NEXT: buffer_store_b8 v0, off, s[8:11], null
+; GFX1232-TRUE16-NEXT: buffer_store_b8 v0, off, s[4:7], null
; GFX1232-TRUE16-NEXT: s_endpgm
;
; GFX1232-FAKE16-LABEL: uniform_or_i8:
@@ -10078,55 +10074,56 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1364-TRUE16-LABEL: uniform_or_i8:
; GFX1364-TRUE16: ; %bb.0:
; GFX1364-TRUE16-NEXT: s_clause 0x1
-; GFX1364-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24 nv
-; GFX1364-TRUE16-NEXT: s_load_b32 s12, s[4:5], 0x34 nv
+; GFX1364-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34 nv
+; GFX1364-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24 nv
; GFX1364-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX1364-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX1364-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v4, s0
; GFX1364-TRUE16-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX1364-TRUE16-NEXT: s_cbranch_execz .LBB12_4
; GFX1364-TRUE16-NEXT: ; %bb.1:
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1364-TRUE16-NEXT: s_and_b64 s[4:5], s[10:11], -4
-; GFX1364-TRUE16-NEXT: s_and_b32 s1, s10, 3
-; GFX1364-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s13, s1, 3
-; GFX1364-TRUE16-NEXT: s_and_b32 s1, s12, 0xff
-; GFX1364-TRUE16-NEXT: s_mov_b64 s[10:11], 0
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s14, s1, s13
-; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-TRUE16-NEXT: s_and_b64 s[8:9], s[6:7], -4
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v4
+; GFX1364-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1364-TRUE16-NEXT: s_and_b32 s1, s6, 3
+; GFX1364-TRUE16-NEXT: s_mov_b64 s[6:7], 0
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s12, s1, 3
+; GFX1364-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s12, v0
+; GFX1364-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX1364-TRUE16-NEXT: .LBB12_2: ; %atomicrmw.start
; GFX1364-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1364-TRUE16-NEXT: v_or_b32_e32 v0, s14, v1
+; GFX1364-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v2, v0
-; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1364-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1364-TRUE16-NEXT: v_cmp_eq_u32_e64 s[0:1], v2, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1364-TRUE16-NEXT: s_or_b64 s[10:11], s[0:1], s[10:11]
+; GFX1364-TRUE16-NEXT: s_or_b64 s[6:7], s[0:1], s[6:7]
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1364-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[10:11]
+; GFX1364-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[6:7]
; GFX1364-TRUE16-NEXT: s_cbranch_execnz .LBB12_2
; GFX1364-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[10:11]
-; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s13, v2
+; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s12, v2
; GFX1364-TRUE16-NEXT: .LBB12_4: ; %Flow
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1364-TRUE16-NEXT: v_cndmask_b16 v0.l, s12, 0, vcc
-; GFX1364-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1364-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1364-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc
+; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1364-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1364-TRUE16-NEXT: buffer_store_b8 v0, off, s[8:11], null
+; GFX1364-TRUE16-NEXT: buffer_store_b8 v0, off, s[4:7], null
; GFX1364-TRUE16-NEXT: s_endpgm
;
; GFX1364-FAKE16-LABEL: uniform_or_i8:
@@ -10186,53 +10183,53 @@ define amdgpu_kernel void @uniform_or_i8(ptr addrspace(1) %result, ptr addrspace
; GFX1332-TRUE16-LABEL: uniform_or_i8:
; GFX1332-TRUE16: ; %bb.0:
; GFX1332-TRUE16-NEXT: s_clause 0x1
-; GFX1332-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24 nv
-; GFX1332-TRUE16-NEXT: s_load_b32 s1, s[4:5], 0x34 nv
+; GFX1332-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34 nv
+; GFX1332-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24 nv
; GFX1332-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
-; GFX1332-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1332-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1332-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1332-TRUE16-NEXT: s_and_saveexec_b32 s2, vcc_lo
+; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX1332-TRUE16-NEXT: s_and_saveexec_b32 s1, vcc_lo
; GFX1332-TRUE16-NEXT: s_cbranch_execz .LBB12_4
; GFX1332-TRUE16-NEXT: ; %bb.1:
+; GFX1332-TRUE16-NEXT: s_and_b64 s[8:9], s[6:7], -4
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v4
+; GFX1332-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1332-TRUE16-NEXT: s_and_b32 s3, s6, 3
+; GFX1332-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1332-TRUE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1332-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: s_and_b64 s[4:5], s[10:11], -4
-; GFX1332-TRUE16-NEXT: s_and_b32 s6, s10, 3
-; GFX1332-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1332-TRUE16-NEXT: s_lshl_b32 s10, s6, 3
-; GFX1332-TRUE16-NEXT: s_and_b32 s6, s1, 0xff
-; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1332-TRUE16-NEXT: s_lshl_b32 s11, s6, s10
-; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX1332-TRUE16-NEXT: v_dual_lshlrev_b32 v5, s3, v0 :: v_dual_mov_b32 v1, s0
; GFX1332-TRUE16-NEXT: .LBB12_2: ; %atomicrmw.start
; GFX1332-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-TRUE16-NEXT: v_or_b32_e32 v0, s11, v1
+; GFX1332-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1332-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v2, v1
; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1332-TRUE16-NEXT: s_or_b32 s3, s0, s3
+; GFX1332-TRUE16-NEXT: s_or_b32 s2, s0, s2
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1332-TRUE16-NEXT: s_cbranch_execnz .LBB12_2
; GFX1332-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
-; GFX1332-TRUE16-NEXT: .LBB12_4: ; %Flow
; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s2
-; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s3, v2
+; GFX1332-TRUE16-NEXT: .LBB12_4: ; %Flow
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_cndmask_b16 v0.l, s1, 0, vcc_lo
-; GFX1332-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1332-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1332-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc_lo
+; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1332-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1332-TRUE16-NEXT: buffer_store_b8 v0, off, s[8:11], null
+; GFX1332-TRUE16-NEXT: buffer_store_b8 v0, off, s[4:7], null
; GFX1332-TRUE16-NEXT: s_endpgm
;
; GFX1332-FAKE16-LABEL: uniform_or_i8:
@@ -10588,42 +10585,45 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1164-TRUE16-LABEL: uniform_add_i8:
; GFX1164-TRUE16: ; %bb.0:
; GFX1164-TRUE16-NEXT: s_clause 0x1
+; GFX1164-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1164-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1164-TRUE16-NEXT: s_load_b32 s12, s[4:5], 0x34
; GFX1164-TRUE16-NEXT: s_mov_b64 s[6:7], exec
-; GFX1164-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
-; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v4, s7, v0
; GFX1164-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX1164-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1164-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1164-TRUE16-NEXT: s_cbranch_execz .LBB13_4
; GFX1164-TRUE16-NEXT: ; %bb.1:
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1164-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1164-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1164-TRUE16-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1164-TRUE16-NEXT: s_mul_i32 s6, s12, s6
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s13, 0xff, s2
-; GFX1164-TRUE16-NEXT: s_and_b32 s6, s6, 0xff
-; GFX1164-TRUE16-NEXT: s_not_b32 s14, s13
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s15, s6, s2
+; GFX1164-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1164-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1164-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1164-TRUE16-NEXT: s_mov_b64 s[10:11], 0
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s12, 0xff, s2
; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-TRUE16-NEXT: s_not_b32 s13, s12
+; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1164-TRUE16-NEXT: .LBB13_2: ; %atomicrmw.start
; GFX1164-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1164-TRUE16-NEXT: v_add_nc_u32_e32 v0, s15, v1
-; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, s13, v0
+; GFX1164-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, s12, v0
; GFX1164-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s14, v0
+; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s13, v0
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v2, v0
@@ -10640,11 +10640,10 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1164-TRUE16-NEXT: .LBB13_4: ; %Flow
; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1164-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1164-TRUE16-NEXT: v_mad_u16 v0.l, s12, v4.l, s2
+; GFX1164-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1164-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1164-TRUE16-NEXT: buffer_store_b8 v0, off, s[0:3], 0
; GFX1164-TRUE16-NEXT: s_endpgm
@@ -10716,60 +10715,60 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1132-TRUE16-LABEL: uniform_add_i8:
; GFX1132-TRUE16: ; %bb.0:
; GFX1132-TRUE16-NEXT: s_clause 0x1
+; GFX1132-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x34
; GFX1132-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1132-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1132-TRUE16-NEXT: s_mov_b32 s6, exec_lo
-; GFX1132-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX1132-TRUE16-NEXT: s_mov_b32 s9, 0
; GFX1132-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v4, s6, 0
-; GFX1132-TRUE16-NEXT: s_mov_b32 s9, exec_lo
+; GFX1132-TRUE16-NEXT: s_mov_b32 s8, exec_lo
; GFX1132-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v5, s7
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1132-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1132-TRUE16-NEXT: s_cbranch_execz .LBB13_4
; GFX1132-TRUE16-NEXT: ; %bb.1:
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1132-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1132-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1132-TRUE16-NEXT: s_bcnt1_i32_b32 s6, s6
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1132-TRUE16-NEXT: s_mul_i32 s6, s8, s6
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s11, 0xff, s2
-; GFX1132-TRUE16-NEXT: s_and_b32 s6, s6, 0xff
-; GFX1132-TRUE16-NEXT: s_not_b32 s12, s11
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s13, s6, s2
+; GFX1132-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1132-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1132-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s10, 0xff, s2
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: s_not_b32 s11, s10
; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_and_b32 v0, 0xff, v0
+; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1132-TRUE16-NEXT: .LBB13_2: ; %atomicrmw.start
; GFX1132-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_add_nc_u32_e32 v0, s13, v1
-; GFX1132-TRUE16-NEXT: v_and_b32_e32 v0, s11, v0
+; GFX1132-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1132-TRUE16-NEXT: v_and_b32_e32 v0, s10, v0
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s12, v0
+; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
; GFX1132-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1132-TRUE16-NEXT: s_or_b32 s10, vcc_lo, s10
+; GFX1132-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s10
+; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
; GFX1132-TRUE16-NEXT: s_cbranch_execnz .LBB13_2
; GFX1132-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s10
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1132-TRUE16-NEXT: .LBB13_4: ; %Flow
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1132-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1132-TRUE16-NEXT: v_mad_u16 v0.l, s8, v4.l, s2
+; GFX1132-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1132-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1132-TRUE16-NEXT: buffer_store_b8 v0, off, s[0:3], 0
; GFX1132-TRUE16-NEXT: s_endpgm
@@ -10838,45 +10837,45 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1264-TRUE16-LABEL: uniform_add_i8:
; GFX1264-TRUE16: ; %bb.0:
; GFX1264-TRUE16-NEXT: s_clause 0x1
+; GFX1264-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1264-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1264-TRUE16-NEXT: s_load_b32 s12, s[4:5], 0x34
; GFX1264-TRUE16-NEXT: s_mov_b64 s[6:7], exec
-; GFX1264-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v4, s7, v0
; GFX1264-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX1264-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1264-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1264-TRUE16-NEXT: s_cbranch_execz .LBB13_4
; GFX1264-TRUE16-NEXT: ; %bb.1:
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1264-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1264-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1264-TRUE16-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1264-TRUE16-NEXT: s_mul_i32 s6, s12, s6
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s13, 0xff, s2
-; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1264-TRUE16-NEXT: s_and_b32 s6, s6, 0xff
-; GFX1264-TRUE16-NEXT: s_not_b32 s14, s13
-; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s15, s6, s2
+; GFX1264-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1264-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1264-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1264-TRUE16-NEXT: s_mov_b64 s[10:11], 0
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s12, 0xff, s2
; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-TRUE16-NEXT: s_not_b32 s13, s12
+; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1264-TRUE16-NEXT: .LBB13_2: ; %atomicrmw.start
; GFX1264-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1264-TRUE16-NEXT: v_add_nc_u32_e32 v0, s15, v1
-; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, s13, v0
+; GFX1264-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, s12, v0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s14, v0
+; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s13, v0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -10891,13 +10890,13 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[10:11]
; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1264-TRUE16-NEXT: .LBB13_4: ; %Flow
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1264-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1264-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1264-TRUE16-NEXT: v_mad_u16 v0.l, s12, v4.l, s2
+; GFX1264-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1264-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1264-TRUE16-NEXT: buffer_store_b8 v0, off, s[0:3], null
; GFX1264-TRUE16-NEXT: s_endpgm
@@ -10972,64 +10971,61 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1232-TRUE16-LABEL: uniform_add_i8:
; GFX1232-TRUE16: ; %bb.0:
; GFX1232-TRUE16-NEXT: s_clause 0x1
+; GFX1232-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x34
; GFX1232-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1232-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1232-TRUE16-NEXT: s_mov_b32 s6, exec_lo
-; GFX1232-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX1232-TRUE16-NEXT: s_mov_b32 s9, 0
; GFX1232-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v4, s6, 0
-; GFX1232-TRUE16-NEXT: s_mov_b32 s9, exec_lo
+; GFX1232-TRUE16-NEXT: s_mov_b32 s8, exec_lo
; GFX1232-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v5, s7
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1232-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1232-TRUE16-NEXT: s_cbranch_execz .LBB13_4
; GFX1232-TRUE16-NEXT: ; %bb.1:
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1232-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1232-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1232-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1232-TRUE16-NEXT: s_bcnt1_i32_b32 s6, s6
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_mul_i32 s6, s8, s6
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s11, 0xff, s2
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_and_b32 s6, s6, 0xff
-; GFX1232-TRUE16-NEXT: s_not_b32 s12, s11
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s13, s6, s2
+; GFX1232-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1232-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1232-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s10, 0xff, s2
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: s_not_b32 s11, s10
; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_and_b32 v0, 0xff, v0
+; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1232-TRUE16-NEXT: .LBB13_2: ; %atomicrmw.start
; GFX1232-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_add_nc_u32_e32 v0, s13, v1
-; GFX1232-TRUE16-NEXT: v_and_b32_e32 v0, s11, v0
+; GFX1232-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1232-TRUE16-NEXT: v_and_b32_e32 v0, s10, v0
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s12, v0
+; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1232-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1232-TRUE16-NEXT: s_or_b32 s10, vcc_lo, s10
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s10
+; GFX1232-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
; GFX1232-TRUE16-NEXT: s_cbranch_execnz .LBB13_2
; GFX1232-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s10
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1232-TRUE16-NEXT: .LBB13_4: ; %Flow
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1232-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1232-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1232-TRUE16-NEXT: v_mad_u16 v0.l, s8, v4.l, s2
+; GFX1232-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1232-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1232-TRUE16-NEXT: buffer_store_b8 v0, off, s[0:3], null
; GFX1232-TRUE16-NEXT: s_endpgm
@@ -11102,40 +11098,44 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1364-TRUE16-LABEL: uniform_add_i8:
; GFX1364-TRUE16: ; %bb.0:
; GFX1364-TRUE16-NEXT: s_clause 0x1
+; GFX1364-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
; GFX1364-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1364-TRUE16-NEXT: s_load_b32 s10, s[4:5], 0x34 nv
; GFX1364-TRUE16-NEXT: s_mov_b64 s[6:7], exec
-; GFX1364-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
-; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v4, s7, v0
; GFX1364-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX1364-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1364-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1364-TRUE16-NEXT: s_cbranch_execz .LBB13_4
; GFX1364-TRUE16-NEXT: ; %bb.1:
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
-; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1364-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x0
; GFX1364-TRUE16-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s11, s2, 3
-; GFX1364-TRUE16-NEXT: s_mul_i32 s2, s10, s6
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s12, 0xff, s11
-; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 0xff
-; GFX1364-TRUE16-NEXT: s_not_b32 s13, s12
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s14, s2, s11
+; GFX1364-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x0
+; GFX1364-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s10, s2, 3
; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s11, 0xff, s10
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: s_not_b32 s12, s11
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s10, v0
; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, s3
; GFX1364-TRUE16-NEXT: s_mov_b64 s[2:3], 0
; GFX1364-TRUE16-NEXT: .LBB13_2: ; %atomicrmw.start
; GFX1364-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1364-TRUE16-NEXT: v_add_nc_u32_e32 v0, s14, v1
-; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, s12, v0
+; GFX1364-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, s11, v0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s13, v0
+; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s12, v0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -11148,14 +11148,13 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1364-TRUE16-NEXT: s_cbranch_execnz .LBB13_2
; GFX1364-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s11, v2
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
; GFX1364-TRUE16-NEXT: .LBB13_4: ; %Flow
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1364-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1364-TRUE16-NEXT: v_mad_u16 v0.l, s10, v4.l, s2
+; GFX1364-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1364-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1364-TRUE16-NEXT: buffer_store_b8 v0, off, s[0:3], null
; GFX1364-TRUE16-NEXT: s_endpgm
@@ -11224,58 +11223,59 @@ define amdgpu_kernel void @uniform_add_i8(ptr addrspace(1) %result, ptr addrspac
; GFX1332-TRUE16-LABEL: uniform_add_i8:
; GFX1332-TRUE16: ; %bb.0:
; GFX1332-TRUE16-NEXT: s_clause 0x1
+; GFX1332-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x34 nv
; GFX1332-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1332-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
; GFX1332-TRUE16-NEXT: s_mov_b32 s6, exec_lo
-; GFX1332-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX1332-TRUE16-NEXT: s_mov_b32 s9, 0
; GFX1332-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v4, s6, 0
-; GFX1332-TRUE16-NEXT: s_mov_b32 s9, exec_lo
+; GFX1332-TRUE16-NEXT: s_mov_b32 s8, exec_lo
; GFX1332-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v5, s7
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1332-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1332-TRUE16-NEXT: s_cbranch_execz .LBB13_4
; GFX1332-TRUE16-NEXT: ; %bb.1:
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1332-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
-; GFX1332-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1332-TRUE16-NEXT: s_bcnt1_i32_b32 s3, s6
; GFX1332-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x0
-; GFX1332-TRUE16-NEXT: s_bcnt1_i32_b32 s6, s6
+; GFX1332-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s3
+; GFX1332-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1332-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1332-TRUE16-NEXT: s_mul_i32 s6, s8, s6
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX1332-TRUE16-NEXT: s_lshl_b32 s3, 0xff, s2
-; GFX1332-TRUE16-NEXT: s_and_b32 s6, s6, 0xff
-; GFX1332-TRUE16-NEXT: s_not_b32 s11, s3
-; GFX1332-TRUE16-NEXT: s_lshl_b32 s12, s6, s2
-; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1332-TRUE16-NEXT: s_not_b32 s10, s3
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_lshlrev_b32 v6, s2, v0
; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1332-TRUE16-NEXT: .LBB13_2: ; %atomicrmw.start
; GFX1332-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-TRUE16-NEXT: v_add_nc_u32_e32 v0, s12, v1
+; GFX1332-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, s3, v0
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
+; GFX1332-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1332-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1332-TRUE16-NEXT: s_or_b32 s10, vcc_lo, s10
+; GFX1332-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s10
+; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
; GFX1332-TRUE16-NEXT: s_cbranch_execnz .LBB13_2
; GFX1332-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s10
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1332-TRUE16-NEXT: .LBB13_4: ; %Flow
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1332-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1332-TRUE16-NEXT: v_mad_u16 v0.l, s8, v4.l, s2
+; GFX1332-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1332-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1332-TRUE16-NEXT: buffer_store_b8 v0, off, s[0:3], null
; GFX1332-TRUE16-NEXT: s_endpgm
@@ -12065,36 +12065,37 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1164-TRUE16-LABEL: uniform_or_i16:
; GFX1164-TRUE16: ; %bb.0:
; GFX1164-TRUE16-NEXT: s_clause 0x1
-; GFX1164-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1164-TRUE16-NEXT: s_load_b32 s14, s[4:5], 0x34
+; GFX1164-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1164-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1164-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX1164-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX1164-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v4, s0
; GFX1164-TRUE16-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX1164-TRUE16-NEXT: s_cbranch_execz .LBB15_4
; GFX1164-TRUE16-NEXT: ; %bb.1:
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1164-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1164-TRUE16-NEXT: s_and_b32 s1, s10, 3
-; GFX1164-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s10, s1, 3
-; GFX1164-TRUE16-NEXT: s_and_b32 s1, 0xffff, s14
+; GFX1164-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1164-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; GFX1164-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1164-TRUE16-NEXT: s_and_b32 s1, s6, 3
; GFX1164-TRUE16-NEXT: s_mov_b64 s[12:13], 0
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s15, s1, s10
-; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s6, s1, 3
+; GFX1164-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s6, v0
+; GFX1164-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX1164-TRUE16-NEXT: .LBB15_2: ; %atomicrmw.start
; GFX1164-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1164-TRUE16-NEXT: v_or_b32_e32 v0, s15, v1
+; GFX1164-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v2, v0
-; GFX1164-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1164-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], 0 glc
; GFX1164-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1164-TRUE16-NEXT: v_cmp_eq_u32_e64 s[0:1], v2, v1
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, v2
@@ -12104,17 +12105,16 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1164-TRUE16-NEXT: s_cbranch_execnz .LBB15_2
; GFX1164-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[12:13]
-; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
+; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s6, v2
; GFX1164-TRUE16-NEXT: .LBB15_4: ; %Flow
; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1164-TRUE16-NEXT: v_cndmask_b16 v0.l, s14, 0, vcc
-; GFX1164-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1164-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1164-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc
+; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1164-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1164-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0
+; GFX1164-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0
; GFX1164-TRUE16-NEXT: s_endpgm
;
; GFX1164-FAKE16-LABEL: uniform_or_i16:
@@ -12175,56 +12175,54 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1132-TRUE16-LABEL: uniform_or_i16:
; GFX1132-TRUE16: ; %bb.0:
; GFX1132-TRUE16-NEXT: s_clause 0x1
-; GFX1132-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1132-TRUE16-NEXT: s_load_b32 s1, s[4:5], 0x34
+; GFX1132-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1132-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1132-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
-; GFX1132-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1132-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1132-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1132-TRUE16-NEXT: s_and_saveexec_b32 s2, vcc_lo
+; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX1132-TRUE16-NEXT: s_and_saveexec_b32 s1, vcc_lo
; GFX1132-TRUE16-NEXT: s_cbranch_execz .LBB15_4
; GFX1132-TRUE16-NEXT: ; %bb.1:
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1132-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1132-TRUE16-NEXT: s_and_b32 s5, s10, 3
-; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s10, s5, 3
-; GFX1132-TRUE16-NEXT: s_and_b32 s5, 0xffff, s1
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s12, s5, s10
-; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s11
+; GFX1132-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1132-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1132-TRUE16-NEXT: s_and_b32 s3, s6, 3
+; GFX1132-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1132-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1132-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1132-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s3, v0
; GFX1132-TRUE16-NEXT: .LBB15_2: ; %atomicrmw.start
; GFX1132-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_or_b32_e32 v0, s12, v1
+; GFX1132-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], 0 glc
; GFX1132-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v2, v1
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1132-TRUE16-NEXT: s_or_b32 s3, s0, s3
+; GFX1132-TRUE16-NEXT: s_or_b32 s2, s0, s2
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1132-TRUE16-NEXT: s_cbranch_execnz .LBB15_2
; GFX1132-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
-; GFX1132-TRUE16-NEXT: .LBB15_4: ; %Flow
; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s2
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s3, v2
+; GFX1132-TRUE16-NEXT: .LBB15_4: ; %Flow
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-TRUE16-NEXT: v_cndmask_b16 v0.l, s1, 0, vcc_lo
-; GFX1132-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1132-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1132-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc_lo
+; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1132-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1132-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0
+; GFX1132-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0
; GFX1132-TRUE16-NEXT: s_endpgm
;
; GFX1132-FAKE16-LABEL: uniform_or_i16:
@@ -12285,36 +12283,38 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1264-TRUE16-LABEL: uniform_or_i16:
; GFX1264-TRUE16: ; %bb.0:
; GFX1264-TRUE16-NEXT: s_clause 0x1
-; GFX1264-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1264-TRUE16-NEXT: s_load_b32 s14, s[4:5], 0x34
+; GFX1264-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1264-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1264-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX1264-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX1264-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v4, s0
; GFX1264-TRUE16-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX1264-TRUE16-NEXT: s_cbranch_execz .LBB15_4
; GFX1264-TRUE16-NEXT: ; %bb.1:
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1264-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1264-TRUE16-NEXT: s_and_b32 s1, s10, 3
-; GFX1264-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s10, s1, 3
-; GFX1264-TRUE16-NEXT: s_and_b32 s1, 0xffff, s14
+; GFX1264-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1264-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; GFX1264-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1264-TRUE16-NEXT: s_and_b32 s1, s6, 3
; GFX1264-TRUE16-NEXT: s_mov_b64 s[12:13], 0
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s15, s1, s10
-; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s6, s1, 3
+; GFX1264-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s6, v0
+; GFX1264-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX1264-TRUE16-NEXT: .LBB15_2: ; %atomicrmw.start
; GFX1264-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1264-TRUE16-NEXT: v_or_b32_e32 v0, s15, v1
+; GFX1264-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v2, v0
-; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1264-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1264-TRUE16-NEXT: v_cmp_eq_u32_e64 s[0:1], v2, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, v2
@@ -12324,19 +12324,17 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1264-TRUE16-NEXT: s_cbranch_execnz .LBB15_2
; GFX1264-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[12:13]
-; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
+; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s6, v2
; GFX1264-TRUE16-NEXT: .LBB15_4: ; %Flow
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1264-TRUE16-NEXT: v_cndmask_b16 v0.l, s14, 0, vcc
-; GFX1264-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1264-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1264-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc
+; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1264-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1264-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
+; GFX1264-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
; GFX1264-TRUE16-NEXT: s_endpgm
;
; GFX1264-FAKE16-LABEL: uniform_or_i16:
@@ -12399,58 +12397,56 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1232-TRUE16-LABEL: uniform_or_i16:
; GFX1232-TRUE16: ; %bb.0:
; GFX1232-TRUE16-NEXT: s_clause 0x1
-; GFX1232-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX1232-TRUE16-NEXT: s_load_b32 s1, s[4:5], 0x34
+; GFX1232-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34
+; GFX1232-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24
; GFX1232-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
-; GFX1232-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1232-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1232-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1232-TRUE16-NEXT: s_and_saveexec_b32 s2, vcc_lo
+; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX1232-TRUE16-NEXT: s_and_saveexec_b32 s1, vcc_lo
; GFX1232-TRUE16-NEXT: s_cbranch_execz .LBB15_4
; GFX1232-TRUE16-NEXT: ; %bb.1:
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1232-TRUE16-NEXT: s_and_b32 s4, s10, -4
-; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s11
-; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1232-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1232-TRUE16-NEXT: s_and_b32 s5, s10, 3
-; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s10, s5, 3
-; GFX1232-TRUE16-NEXT: s_and_b32 s5, 0xffff, s1
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s12, s5, s10
-; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s11
+; GFX1232-TRUE16-NEXT: s_and_b32 s8, s6, -4
+; GFX1232-TRUE16-NEXT: s_mov_b32 s9, s7
+; GFX1232-TRUE16-NEXT: s_and_b32 s3, s6, 3
+; GFX1232-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1232-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1232-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1232-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s3, v0
; GFX1232-TRUE16-NEXT: .LBB15_2: ; %atomicrmw.start
; GFX1232-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_or_b32_e32 v0, s12, v1
+; GFX1232-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1232-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v2, v1
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1232-TRUE16-NEXT: s_or_b32 s3, s0, s3
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX1232-TRUE16-NEXT: s_or_b32 s2, s0, s2
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1232-TRUE16-NEXT: s_cbranch_execnz .LBB15_2
; GFX1232-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
-; GFX1232-TRUE16-NEXT: .LBB15_4: ; %Flow
; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s2
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s3, v2
+; GFX1232-TRUE16-NEXT: .LBB15_4: ; %Flow
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1232-TRUE16-NEXT: v_cndmask_b16 v0.l, s1, 0, vcc_lo
-; GFX1232-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1232-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1232-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc_lo
+; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1232-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1232-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
+; GFX1232-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
; GFX1232-TRUE16-NEXT: s_endpgm
;
; GFX1232-FAKE16-LABEL: uniform_or_i16:
@@ -12513,55 +12509,56 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1364-TRUE16-LABEL: uniform_or_i16:
; GFX1364-TRUE16: ; %bb.0:
; GFX1364-TRUE16-NEXT: s_clause 0x1
-; GFX1364-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24 nv
-; GFX1364-TRUE16-NEXT: s_load_b32 s12, s[4:5], 0x34 nv
+; GFX1364-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34 nv
+; GFX1364-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24 nv
; GFX1364-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX1364-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX1364-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v4, s0
; GFX1364-TRUE16-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX1364-TRUE16-NEXT: s_cbranch_execz .LBB15_4
; GFX1364-TRUE16-NEXT: ; %bb.1:
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1364-TRUE16-NEXT: s_and_b64 s[4:5], s[10:11], -4
-; GFX1364-TRUE16-NEXT: s_and_b32 s1, s10, 3
-; GFX1364-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s13, s1, 3
-; GFX1364-TRUE16-NEXT: s_and_b32 s1, 0xffff, s12
-; GFX1364-TRUE16-NEXT: s_mov_b64 s[10:11], 0
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s14, s1, s13
-; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-TRUE16-NEXT: s_and_b64 s[8:9], s[6:7], -4
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; GFX1364-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1364-TRUE16-NEXT: s_and_b32 s1, s6, 3
+; GFX1364-TRUE16-NEXT: s_mov_b64 s[6:7], 0
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s12, s1, 3
+; GFX1364-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v5, s12, v0
+; GFX1364-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX1364-TRUE16-NEXT: .LBB15_2: ; %atomicrmw.start
; GFX1364-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1364-TRUE16-NEXT: v_or_b32_e32 v0, s14, v1
+; GFX1364-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v2, v0
-; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1364-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1364-TRUE16-NEXT: v_cmp_eq_u32_e64 s[0:1], v2, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1364-TRUE16-NEXT: s_or_b64 s[10:11], s[0:1], s[10:11]
+; GFX1364-TRUE16-NEXT: s_or_b64 s[6:7], s[0:1], s[6:7]
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1364-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[10:11]
+; GFX1364-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[6:7]
; GFX1364-TRUE16-NEXT: s_cbranch_execnz .LBB15_2
; GFX1364-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[10:11]
-; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s13, v2
+; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s12, v2
; GFX1364-TRUE16-NEXT: .LBB15_4: ; %Flow
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1364-TRUE16-NEXT: v_cndmask_b16 v0.l, s12, 0, vcc
-; GFX1364-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1364-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1364-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc
+; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1364-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1364-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
+; GFX1364-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
; GFX1364-TRUE16-NEXT: s_endpgm
;
; GFX1364-FAKE16-LABEL: uniform_or_i16:
@@ -12621,53 +12618,53 @@ define amdgpu_kernel void @uniform_or_i16(ptr addrspace(1) %result, ptr addrspac
; GFX1332-TRUE16-LABEL: uniform_or_i16:
; GFX1332-TRUE16: ; %bb.0:
; GFX1332-TRUE16-NEXT: s_clause 0x1
-; GFX1332-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24 nv
-; GFX1332-TRUE16-NEXT: s_load_b32 s1, s[4:5], 0x34 nv
+; GFX1332-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x34 nv
+; GFX1332-TRUE16-NEXT: s_load_b128 s[4:7], s[4:5], 0x24 nv
; GFX1332-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
-; GFX1332-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1332-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1332-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1332-TRUE16-NEXT: s_and_saveexec_b32 s2, vcc_lo
+; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX1332-TRUE16-NEXT: s_and_saveexec_b32 s1, vcc_lo
; GFX1332-TRUE16-NEXT: s_cbranch_execz .LBB15_4
; GFX1332-TRUE16-NEXT: ; %bb.1:
+; GFX1332-TRUE16-NEXT: s_and_b64 s[8:9], s[6:7], -4
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v4
+; GFX1332-TRUE16-NEXT: s_load_b32 s0, s[8:9], 0x0
+; GFX1332-TRUE16-NEXT: s_and_b32 s3, s6, 3
+; GFX1332-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX1332-TRUE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1332-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: s_and_b64 s[4:5], s[10:11], -4
-; GFX1332-TRUE16-NEXT: s_and_b32 s6, s10, 3
-; GFX1332-TRUE16-NEXT: s_load_b32 s0, s[4:5], 0x0
-; GFX1332-TRUE16-NEXT: s_lshl_b32 s10, s6, 3
-; GFX1332-TRUE16-NEXT: s_and_b32 s6, 0xffff, s1
-; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1332-TRUE16-NEXT: s_lshl_b32 s11, s6, s10
-; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s0
+; GFX1332-TRUE16-NEXT: v_dual_lshlrev_b32 v5, s3, v0 :: v_dual_mov_b32 v1, s0
; GFX1332-TRUE16-NEXT: .LBB15_2: ; %atomicrmw.start
; GFX1332-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-TRUE16-NEXT: v_or_b32_e32 v0, s11, v1
+; GFX1332-TRUE16-NEXT: v_or_b32_e32 v0, v1, v5
; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[8:11], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1332-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v2, v1
; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1332-TRUE16-NEXT: s_or_b32 s3, s0, s3
+; GFX1332-TRUE16-NEXT: s_or_b32 s2, s0, s2
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1332-TRUE16-NEXT: s_cbranch_execnz .LBB15_2
; GFX1332-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s3
-; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
-; GFX1332-TRUE16-NEXT: .LBB15_4: ; %Flow
; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s2
-; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s3, v2
+; GFX1332-TRUE16-NEXT: .LBB15_4: ; %Flow
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_cndmask_b16 v0.l, s1, 0, vcc_lo
-; GFX1332-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
-; GFX1332-TRUE16-NEXT: s_mov_b32 s10, -1
+; GFX1332-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0, vcc_lo
+; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1332-TRUE16-NEXT: v_or_b16 v0.l, s0, v0.l
-; GFX1332-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], null
+; GFX1332-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
; GFX1332-TRUE16-NEXT: s_endpgm
;
; GFX1332-FAKE16-LABEL: uniform_or_i16:
@@ -13023,42 +13020,45 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1164-TRUE16-LABEL: uniform_add_i16:
; GFX1164-TRUE16: ; %bb.0:
; GFX1164-TRUE16-NEXT: s_clause 0x1
+; GFX1164-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1164-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1164-TRUE16-NEXT: s_load_b32 s12, s[4:5], 0x34
; GFX1164-TRUE16-NEXT: s_mov_b64 s[6:7], exec
-; GFX1164-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
-; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v4, s7, v0
; GFX1164-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX1164-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1164-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1164-TRUE16-NEXT: s_cbranch_execz .LBB16_4
; GFX1164-TRUE16-NEXT: ; %bb.1:
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1164-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1164-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1164-TRUE16-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1164-TRUE16-NEXT: s_mul_i32 s6, s12, s6
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s13, 0xffff, s2
-; GFX1164-TRUE16-NEXT: s_and_b32 s6, s6, 0xffff
-; GFX1164-TRUE16-NEXT: s_not_b32 s14, s13
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s15, s6, s2
+; GFX1164-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1164-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1164-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1164-TRUE16-NEXT: s_mov_b64 s[10:11], 0
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s12, 0xffff, s2
; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-TRUE16-NEXT: s_not_b32 s13, s12
+; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1164-TRUE16-NEXT: .LBB16_2: ; %atomicrmw.start
; GFX1164-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1164-TRUE16-NEXT: v_add_nc_u32_e32 v0, s15, v1
-; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, s13, v0
+; GFX1164-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1164-TRUE16-NEXT: v_and_b32_e32 v0, s12, v0
; GFX1164-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s14, v0
+; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s13, v0
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v2, v0
@@ -13075,11 +13075,10 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1164-TRUE16-NEXT: .LBB16_4: ; %Flow
; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1164-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1164-TRUE16-NEXT: v_mad_u16 v0.l, s12, v4.l, s2
+; GFX1164-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1164-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1164-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX1164-TRUE16-NEXT: s_endpgm
@@ -13151,60 +13150,60 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1132-TRUE16-LABEL: uniform_add_i16:
; GFX1132-TRUE16: ; %bb.0:
; GFX1132-TRUE16-NEXT: s_clause 0x1
+; GFX1132-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x34
; GFX1132-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1132-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1132-TRUE16-NEXT: s_mov_b32 s6, exec_lo
-; GFX1132-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX1132-TRUE16-NEXT: s_mov_b32 s9, 0
; GFX1132-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v4, s6, 0
-; GFX1132-TRUE16-NEXT: s_mov_b32 s9, exec_lo
+; GFX1132-TRUE16-NEXT: s_mov_b32 s8, exec_lo
; GFX1132-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v5, s7
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1132-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1132-TRUE16-NEXT: s_cbranch_execz .LBB16_4
; GFX1132-TRUE16-NEXT: ; %bb.1:
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1132-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1132-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1132-TRUE16-NEXT: s_bcnt1_i32_b32 s6, s6
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1132-TRUE16-NEXT: s_mul_i32 s6, s8, s6
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s11, 0xffff, s2
-; GFX1132-TRUE16-NEXT: s_and_b32 s6, s6, 0xffff
-; GFX1132-TRUE16-NEXT: s_not_b32 s12, s11
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s13, s6, s2
+; GFX1132-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1132-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1132-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s10, 0xffff, s2
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: s_not_b32 s11, s10
; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_and_b32 v0, 0xffff, v0
+; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1132-TRUE16-NEXT: .LBB16_2: ; %atomicrmw.start
; GFX1132-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_add_nc_u32_e32 v0, s13, v1
-; GFX1132-TRUE16-NEXT: v_and_b32_e32 v0, s11, v0
+; GFX1132-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1132-TRUE16-NEXT: v_and_b32_e32 v0, s10, v0
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s12, v0
+; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
; GFX1132-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1132-TRUE16-NEXT: s_or_b32 s10, vcc_lo, s10
+; GFX1132-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s10
+; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
; GFX1132-TRUE16-NEXT: s_cbranch_execnz .LBB16_2
; GFX1132-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s10
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1132-TRUE16-NEXT: .LBB16_4: ; %Flow
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1132-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1132-TRUE16-NEXT: v_mad_u16 v0.l, s8, v4.l, s2
+; GFX1132-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1132-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1132-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX1132-TRUE16-NEXT: s_endpgm
@@ -13273,45 +13272,45 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1264-TRUE16-LABEL: uniform_add_i16:
; GFX1264-TRUE16: ; %bb.0:
; GFX1264-TRUE16-NEXT: s_clause 0x1
+; GFX1264-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1264-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1264-TRUE16-NEXT: s_load_b32 s12, s[4:5], 0x34
; GFX1264-TRUE16-NEXT: s_mov_b64 s[6:7], exec
-; GFX1264-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v4, s7, v0
; GFX1264-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX1264-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1264-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1264-TRUE16-NEXT: s_cbranch_execz .LBB16_4
; GFX1264-TRUE16-NEXT: ; %bb.1:
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1264-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1264-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1264-TRUE16-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1264-TRUE16-NEXT: s_mul_i32 s6, s12, s6
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s13, 0xffff, s2
-; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1264-TRUE16-NEXT: s_and_b32 s6, s6, 0xffff
-; GFX1264-TRUE16-NEXT: s_not_b32 s14, s13
-; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s15, s6, s2
+; GFX1264-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1264-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1264-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1264-TRUE16-NEXT: s_mov_b64 s[10:11], 0
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s12, 0xffff, s2
; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-TRUE16-NEXT: s_not_b32 s13, s12
+; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1264-TRUE16-NEXT: .LBB16_2: ; %atomicrmw.start
; GFX1264-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1264-TRUE16-NEXT: v_add_nc_u32_e32 v0, s15, v1
-; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, s13, v0
+; GFX1264-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1264-TRUE16-NEXT: v_and_b32_e32 v0, s12, v0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s14, v0
+; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s13, v0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -13326,13 +13325,13 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[10:11]
; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1264-TRUE16-NEXT: .LBB16_4: ; %Flow
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1264-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1264-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1264-TRUE16-NEXT: v_mad_u16 v0.l, s12, v4.l, s2
+; GFX1264-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1264-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1264-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX1264-TRUE16-NEXT: s_endpgm
@@ -13407,64 +13406,61 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1232-TRUE16-LABEL: uniform_add_i16:
; GFX1232-TRUE16: ; %bb.0:
; GFX1232-TRUE16-NEXT: s_clause 0x1
+; GFX1232-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x34
; GFX1232-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1232-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
; GFX1232-TRUE16-NEXT: s_mov_b32 s6, exec_lo
-; GFX1232-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX1232-TRUE16-NEXT: s_mov_b32 s9, 0
; GFX1232-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v4, s6, 0
-; GFX1232-TRUE16-NEXT: s_mov_b32 s9, exec_lo
+; GFX1232-TRUE16-NEXT: s_mov_b32 s8, exec_lo
; GFX1232-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v5, s7
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1232-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1232-TRUE16-NEXT: s_cbranch_execz .LBB16_4
; GFX1232-TRUE16-NEXT: ; %bb.1:
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1232-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX1232-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1232-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1232-TRUE16-NEXT: s_bcnt1_i32_b32 s6, s6
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_mul_i32 s6, s8, s6
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s11, 0xffff, s2
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_and_b32 s6, s6, 0xffff
-; GFX1232-TRUE16-NEXT: s_not_b32 s12, s11
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s13, s6, s2
+; GFX1232-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1232-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1232-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s10, 0xffff, s2
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: s_not_b32 s11, s10
; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_and_b32 v0, 0xffff, v0
+; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s2, v0
; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1232-TRUE16-NEXT: .LBB16_2: ; %atomicrmw.start
; GFX1232-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_add_nc_u32_e32 v0, s13, v1
-; GFX1232-TRUE16-NEXT: v_and_b32_e32 v0, s11, v0
+; GFX1232-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1232-TRUE16-NEXT: v_and_b32_e32 v0, s10, v0
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s12, v0
+; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1232-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1232-TRUE16-NEXT: s_or_b32 s10, vcc_lo, s10
-; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s10
+; GFX1232-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
; GFX1232-TRUE16-NEXT: s_cbranch_execnz .LBB16_2
; GFX1232-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s10
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1232-TRUE16-NEXT: .LBB16_4: ; %Flow
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1232-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1232-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1232-TRUE16-NEXT: v_mad_u16 v0.l, s8, v4.l, s2
+; GFX1232-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1232-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1232-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX1232-TRUE16-NEXT: s_endpgm
@@ -13537,40 +13533,44 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1364-TRUE16-LABEL: uniform_add_i16:
; GFX1364-TRUE16: ; %bb.0:
; GFX1364-TRUE16-NEXT: s_clause 0x1
+; GFX1364-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
; GFX1364-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1364-TRUE16-NEXT: s_load_b32 s10, s[4:5], 0x34 nv
; GFX1364-TRUE16-NEXT: s_mov_b64 s[6:7], exec
-; GFX1364-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
-; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_mbcnt_hi_u32_b32 v4, s7, v0
; GFX1364-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
+; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v5, s8
+; GFX1364-TRUE16-NEXT: s_mov_b64 s[8:9], exec
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1364-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1364-TRUE16-NEXT: s_cbranch_execz .LBB16_4
; GFX1364-TRUE16-NEXT: ; %bb.1:
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
-; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1364-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x0
; GFX1364-TRUE16-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s11, s2, 3
-; GFX1364-TRUE16-NEXT: s_mul_i32 s2, s10, s6
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s12, 0xffff, s11
-; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
-; GFX1364-TRUE16-NEXT: s_not_b32 s13, s12
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s14, s2, s11
+; GFX1364-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x0
+; GFX1364-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s6
+; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s10, s2, 3
; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s11, 0xffff, s10
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: s_not_b32 s12, s11
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v6, s10, v0
; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, s3
; GFX1364-TRUE16-NEXT: s_mov_b64 s[2:3], 0
; GFX1364-TRUE16-NEXT: .LBB16_2: ; %atomicrmw.start
; GFX1364-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1364-TRUE16-NEXT: v_add_nc_u32_e32 v0, s14, v1
-; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, s12, v0
+; GFX1364-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, s11, v0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s13, v0
+; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s12, v0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -13583,14 +13583,13 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1364-TRUE16-NEXT: s_cbranch_execnz .LBB16_2
; GFX1364-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s11, v2
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s10, v2
; GFX1364-TRUE16-NEXT: .LBB16_4: ; %Flow
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1364-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1364-TRUE16-NEXT: v_mad_u16 v0.l, s10, v4.l, s2
+; GFX1364-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1364-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1364-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX1364-TRUE16-NEXT: s_endpgm
@@ -13659,58 +13658,59 @@ define amdgpu_kernel void @uniform_add_i16(ptr addrspace(1) %result, ptr addrspa
; GFX1332-TRUE16-LABEL: uniform_add_i16:
; GFX1332-TRUE16: ; %bb.0:
; GFX1332-TRUE16-NEXT: s_clause 0x1
+; GFX1332-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x34 nv
; GFX1332-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1332-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
; GFX1332-TRUE16-NEXT: s_mov_b32 s6, exec_lo
-; GFX1332-TRUE16-NEXT: s_mov_b32 s10, 0
+; GFX1332-TRUE16-NEXT: s_mov_b32 s9, 0
; GFX1332-TRUE16-NEXT: v_mbcnt_lo_u32_b32 v4, s6, 0
-; GFX1332-TRUE16-NEXT: s_mov_b32 s9, exec_lo
+; GFX1332-TRUE16-NEXT: s_mov_b32 s8, exec_lo
; GFX1332-TRUE16-NEXT: ; implicit-def: $vgpr0_lo16
-; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v5, s7
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1332-TRUE16-NEXT: v_cmpx_eq_u32_e32 0, v4
; GFX1332-TRUE16-NEXT: s_cbranch_execz .LBB16_4
; GFX1332-TRUE16-NEXT: ; %bb.1:
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1332-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
-; GFX1332-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1332-TRUE16-NEXT: s_bcnt1_i32_b32 s3, s6
; GFX1332-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x0
-; GFX1332-TRUE16-NEXT: s_bcnt1_i32_b32 s6, s6
+; GFX1332-TRUE16-NEXT: v_mul_lo_u32 v0, v5, s3
+; GFX1332-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1332-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1332-TRUE16-NEXT: s_mul_i32 s6, s8, s6
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX1332-TRUE16-NEXT: s_lshl_b32 s3, 0xffff, s2
-; GFX1332-TRUE16-NEXT: s_and_b32 s6, s6, 0xffff
-; GFX1332-TRUE16-NEXT: s_not_b32 s11, s3
-; GFX1332-TRUE16-NEXT: s_lshl_b32 s12, s6, s2
-; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1332-TRUE16-NEXT: s_not_b32 s10, s3
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_lshlrev_b32 v6, s2, v0
; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1332-TRUE16-NEXT: .LBB16_2: ; %atomicrmw.start
; GFX1332-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-TRUE16-NEXT: v_add_nc_u32_e32 v0, s12, v1
+; GFX1332-TRUE16-NEXT: v_add_nc_u32_e32 v0, v1, v6
; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, s3, v0
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
+; GFX1332-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1332-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1332-TRUE16-NEXT: s_or_b32 s10, vcc_lo, s10
+; GFX1332-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s10
+; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
; GFX1332-TRUE16-NEXT: s_cbranch_execnz .LBB16_2
; GFX1332-TRUE16-NEXT: ; %bb.3: ; %atomicrmw.end
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s10
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1332-TRUE16-NEXT: .LBB16_4: ; %Flow
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1332-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1332-TRUE16-NEXT: v_mad_u16 v0.l, s8, v4.l, s2
+; GFX1332-TRUE16-NEXT: v_mad_u16 v0.l, v5.l, v4.l, s2
; GFX1332-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1332-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX1332-TRUE16-NEXT: s_endpgm
@@ -14458,19 +14458,19 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1164-TRUE16: ; %bb.0:
; GFX1164-TRUE16-NEXT: s_clause 0x1
; GFX1164-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1164-TRUE16-NEXT: s_load_b32 s10, s[4:5], 0x34
+; GFX1164-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX1164-TRUE16-NEXT: s_mov_b64 s[8:9], 0
-; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1164-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1164-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1164-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1164-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1164-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
-; GFX1164-TRUE16-NEXT: s_not_b32 s11, s6
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s7, 0xffff, s2
; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-TRUE16-NEXT: s_not_b32 s10, s7
+; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
@@ -14478,12 +14478,12 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1164-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1164-TRUE16-NEXT: v_add_f16_e32 v0.l, s10, v0.l
+; GFX1164-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v4.l
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1164-TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
+; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1164-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
@@ -14554,19 +14554,19 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1132-TRUE16: ; %bb.0:
; GFX1132-TRUE16-NEXT: s_clause 0x1
; GFX1132-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1132-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
-; GFX1132-TRUE16-NEXT: s_mov_b32 s9, 0
-; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1132-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1132-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1132-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1132-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
-; GFX1132-TRUE16-NEXT: s_not_b32 s10, s6
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s7, 0xffff, s2
; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1132-TRUE16-NEXT: s_not_b32 s9, s7
+; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
@@ -14574,23 +14574,23 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1132-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1132-TRUE16-NEXT: v_add_f16_e32 v0.l, s8, v0.l
+; GFX1132-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v4.l
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1132-TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s9, v0
; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
; GFX1132-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1132-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
+; GFX1132-TRUE16-NEXT: s_or_b32 s8, vcc_lo, s8
; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
+; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
; GFX1132-TRUE16-NEXT: s_cbranch_execnz .LBB18_1
; GFX1132-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1132-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1132-TRUE16-NEXT: s_mov_b32 s2, -1
@@ -14648,19 +14648,20 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1264-TRUE16: ; %bb.0:
; GFX1264-TRUE16-NEXT: s_clause 0x1
; GFX1264-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1264-TRUE16-NEXT: s_load_b32 s10, s[4:5], 0x34
+; GFX1264-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX1264-TRUE16-NEXT: s_mov_b64 s[8:9], 0
-; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1264-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1264-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1264-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1264-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1264-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
-; GFX1264-TRUE16-NEXT: s_not_b32 s11, s6
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s7, 0xffff, s2
; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1264-TRUE16-NEXT: s_not_b32 s10, s7
+; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
@@ -14668,12 +14669,12 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1264-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1264-TRUE16-NEXT: v_add_f16_e32 v0.l, s10, v0.l
+; GFX1264-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v4.l
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1264-TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s11, v0
+; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -14744,19 +14745,20 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1232-TRUE16: ; %bb.0:
; GFX1232-TRUE16-NEXT: s_clause 0x1
; GFX1232-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1232-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34
-; GFX1232-TRUE16-NEXT: s_mov_b32 s9, 0
-; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1232-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1232-TRUE16-NEXT: s_and_b32 s4, s2, -4
; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX1232-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1232-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
; GFX1232-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1232-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
-; GFX1232-TRUE16-NEXT: s_not_b32 s10, s6
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s7, 0xffff, s2
; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_not_b32 s9, s7
+; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, s5
; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
@@ -14764,23 +14766,23 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1232-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1232-TRUE16-NEXT: v_add_f16_e32 v0.l, s8, v0.l
+; GFX1232-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v4.l
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1232-TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s9, v0
; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX1232-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1232-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
+; GFX1232-TRUE16-NEXT: s_or_b32 s8, vcc_lo, s8
; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
+; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
; GFX1232-TRUE16-NEXT: s_cbranch_execnz .LBB18_1
; GFX1232-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1232-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1232-TRUE16-NEXT: s_mov_b32 s2, -1
@@ -14838,30 +14840,30 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1364-TRUE16: ; %bb.0:
; GFX1364-TRUE16-NEXT: s_clause 0x1
; GFX1364-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1364-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
+; GFX1364-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34 nv
; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 3
; GFX1364-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x0
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s9, s2, 3
-; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1364-TRUE16-NEXT: s_lshl_b32 s2, 0xffff, s9
-; GFX1364-TRUE16-NEXT: s_not_b32 s10, s2
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s8, s2, 3
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s2, 0xffff, s8
+; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-TRUE16-NEXT: s_not_b32 s9, s2
; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, s3
; GFX1364-TRUE16-NEXT: s_mov_b64 s[2:3], 0
; GFX1364-TRUE16-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX1364-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s9, v1
-; GFX1364-TRUE16-NEXT: v_add_f16_e32 v0.l, s8, v0.l
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s8, v1
+; GFX1364-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v4.l
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1364-TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
-; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s9, v0
+; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s8, v0
; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s9, v0
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v2, v0
; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -14874,7 +14876,7 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1364-TRUE16-NEXT: s_cbranch_execnz .LBB18_1
; GFX1364-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s9, v2
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s8, v2
; GFX1364-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1364-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX1364-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
@@ -14930,25 +14932,25 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1332-TRUE16: ; %bb.0:
; GFX1332-TRUE16-NEXT: s_clause 0x1
; GFX1332-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1332-TRUE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
-; GFX1332-TRUE16-NEXT: s_mov_b32 s9, 0
-; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1332-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34 nv
+; GFX1332-TRUE16-NEXT: s_mov_b32 s8, 0
; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1332-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
; GFX1332-TRUE16-NEXT: s_and_b32 s2, s2, 3
-; GFX1332-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x0
+; GFX1332-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x0
; GFX1332-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v4, s6
; GFX1332-TRUE16-NEXT: s_lshl_b32 s3, 0xffff, s2
+; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX1332-TRUE16-NEXT: s_not_b32 s3, s3
; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s6
-; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX1332-TRUE16-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX1332-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1332-TRUE16-NEXT: v_add_f16_e32 v0.l, s8, v0.l
+; GFX1332-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v4.l
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1332-TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX1332-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
@@ -14959,12 +14961,12 @@ define amdgpu_kernel void @uniform_fadd_f16(ptr addrspace(1) %result, ptr addrsp
; GFX1332-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, v2
-; GFX1332-TRUE16-NEXT: s_or_b32 s9, vcc_lo, s9
+; GFX1332-TRUE16-NEXT: s_or_b32 s8, vcc_lo, s8
; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
+; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
; GFX1332-TRUE16-NEXT: s_cbranch_execnz .LBB18_1
; GFX1332-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
; GFX1332-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX1332-TRUE16-NEXT: s_mov_b32 s2, -1
@@ -15263,323 +15265,650 @@ define amdgpu_kernel void @uniform_fadd_bf16(ptr addrspace(1) %result, ptr addrs
; GFX1032-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX1032-NEXT: s_endpgm
;
-; GFX1164-LABEL: uniform_fadd_bf16:
-; GFX1164: ; %bb.0:
-; GFX1164-NEXT: s_clause 0x1
-; GFX1164-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1164-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX1164-NEXT: s_mov_b64 s[8:9], 0
-; GFX1164-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1164-NEXT: s_and_b32 s4, s2, -4
-; GFX1164-NEXT: s_mov_b32 s5, s3
-; GFX1164-NEXT: s_and_b32 s2, s2, 3
-; GFX1164-NEXT: s_load_b32 s5, s[4:5], 0x0
-; GFX1164-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1164-NEXT: s_lshl_b32 s11, s6, 16
-; GFX1164-NEXT: s_lshl_b32 s7, 0xffff, s2
-; GFX1164-NEXT: s_mov_b32 s6, -1
-; GFX1164-NEXT: s_not_b32 s10, s7
-; GFX1164-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1164-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1164-NEXT: v_mov_b32_e32 v1, s5
-; GFX1164-NEXT: s_mov_b32 s5, s3
-; GFX1164-NEXT: .p2align 6
-; GFX1164-NEXT: .LBB19_1: ; %atomicrmw.start
-; GFX1164-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1164-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1164-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1164-NEXT: v_add_f32_e32 v0, s11, v0
-; GFX1164-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX1164-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX1164-NEXT: v_or_b32_e32 v3, 0x400000, v0
-; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1164-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
-; GFX1164-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
-; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1164-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX1164-NEXT: v_lshlrev_b32_e32 v0, s2, v0
-; GFX1164-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1164-NEXT: v_and_or_b32 v0, v1, s10, v0
-; GFX1164-NEXT: v_mov_b32_e32 v3, v1
-; GFX1164-NEXT: v_mov_b32_e32 v2, v0
-; GFX1164-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
-; GFX1164-NEXT: s_waitcnt vmcnt(0)
-; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
-; GFX1164-NEXT: v_mov_b32_e32 v1, v2
-; GFX1164-NEXT: s_waitcnt_depctr depctr_va_vcc(0)
-; GFX1164-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
-; GFX1164-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1164-NEXT: s_and_not1_b64 exec, exec, s[8:9]
-; GFX1164-NEXT: s_cbranch_execnz .LBB19_1
-; GFX1164-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1164-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1164-NEXT: v_lshrrev_b32_e32 v0, s2, v2
-; GFX1164-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1164-NEXT: s_mov_b32 s2, -1
-; GFX1164-NEXT: buffer_store_b16 v0, off, s[0:3], 0
-; GFX1164-NEXT: s_endpgm
+; GFX1164-TRUE16-LABEL: uniform_fadd_bf16:
+; GFX1164-TRUE16: ; %bb.0:
+; GFX1164-TRUE16-NEXT: s_clause 0x1
+; GFX1164-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1164-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1164-TRUE16-NEXT: s_mov_b64 s[8:9], 0
+; GFX1164-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-TRUE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX1164-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1164-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX1164-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1164-TRUE16-NEXT: s_not_b32 s10, s6
+; GFX1164-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1164-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1164-TRUE16-NEXT: .p2align 6
+; GFX1164-TRUE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1164-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
+; GFX1164-TRUE16-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX1164-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1164-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1164-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1164-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1164-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v3, v1
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v2, v0
+; GFX1164-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1164-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX1164-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
+; GFX1164-TRUE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1164-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vcc(0)
+; GFX1164-TRUE16-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
+; GFX1164-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1164-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[8:9]
+; GFX1164-TRUE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1164-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1164-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
+; GFX1164-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1164-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1164-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX1164-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX1164-TRUE16-NEXT: s_endpgm
;
-; GFX1132-LABEL: uniform_fadd_bf16:
-; GFX1132: ; %bb.0:
-; GFX1132-NEXT: s_clause 0x1
-; GFX1132-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1132-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX1132-NEXT: s_mov_b32 s8, 0
-; GFX1132-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-NEXT: s_and_b32 s4, s2, -4
-; GFX1132-NEXT: s_mov_b32 s5, s3
-; GFX1132-NEXT: s_and_b32 s2, s2, 3
-; GFX1132-NEXT: s_load_b32 s5, s[4:5], 0x0
-; GFX1132-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1132-NEXT: s_lshl_b32 s10, s6, 16
-; GFX1132-NEXT: s_lshl_b32 s7, 0xffff, s2
-; GFX1132-NEXT: s_mov_b32 s6, -1
-; GFX1132-NEXT: s_not_b32 s9, s7
-; GFX1132-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1132-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1132-NEXT: v_mov_b32_e32 v1, s5
-; GFX1132-NEXT: s_mov_b32 s5, s3
-; GFX1132-NEXT: .p2align 6
-; GFX1132-NEXT: .LBB19_1: ; %atomicrmw.start
-; GFX1132-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1132-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-NEXT: v_add_f32_e32 v0, s10, v0
-; GFX1132-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX1132-NEXT: v_or_b32_e32 v3, 0x400000, v0
-; GFX1132-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
-; GFX1132-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
-; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX1132-NEXT: v_lshlrev_b32_e32 v0, s2, v0
-; GFX1132-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1132-NEXT: v_and_or_b32 v0, v1, s9, v0
-; GFX1132-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1132-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
-; GFX1132-NEXT: s_waitcnt vmcnt(0)
-; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
-; GFX1132-NEXT: v_mov_b32_e32 v1, v2
-; GFX1132-NEXT: s_or_b32 s8, vcc_lo, s8
-; GFX1132-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1132-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
-; GFX1132-NEXT: s_cbranch_execnz .LBB19_1
-; GFX1132-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s8
-; GFX1132-NEXT: v_lshrrev_b32_e32 v0, s2, v2
-; GFX1132-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1132-NEXT: s_mov_b32 s2, -1
-; GFX1132-NEXT: buffer_store_b16 v0, off, s[0:3], 0
-; GFX1132-NEXT: s_endpgm
+; GFX1164-FAKE16-LABEL: uniform_fadd_bf16:
+; GFX1164-FAKE16: ; %bb.0:
+; GFX1164-FAKE16-NEXT: s_clause 0x1
+; GFX1164-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1164-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1164-FAKE16-NEXT: s_mov_b64 s[8:9], 0
+; GFX1164-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-FAKE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1164-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1164-FAKE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1164-FAKE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1164-FAKE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1164-FAKE16-NEXT: s_lshl_b32 s11, s6, 16
+; GFX1164-FAKE16-NEXT: s_lshl_b32 s7, 0xffff, s2
+; GFX1164-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX1164-FAKE16-NEXT: s_not_b32 s10, s7
+; GFX1164-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1164-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1164-FAKE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1164-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1164-FAKE16-NEXT: .p2align 6
+; GFX1164-FAKE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1164-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1164-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1164-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1164-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-FAKE16-NEXT: v_add_f32_e32 v0, s11, v0
+; GFX1164-FAKE16-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX1164-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1164-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1164-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1164-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
+; GFX1164-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1164-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1164-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1164-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1164-FAKE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1164-FAKE16-NEXT: v_mov_b32_e32 v3, v1
+; GFX1164-FAKE16-NEXT: v_mov_b32_e32 v2, v0
+; GFX1164-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1164-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX1164-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
+; GFX1164-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1164-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vcc(0)
+; GFX1164-FAKE16-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
+; GFX1164-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1164-FAKE16-NEXT: s_and_not1_b64 exec, exec, s[8:9]
+; GFX1164-FAKE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1164-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1164-FAKE16-NEXT: s_or_b64 exec, exec, s[8:9]
+; GFX1164-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1164-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1164-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX1164-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX1164-FAKE16-NEXT: s_endpgm
;
-; GFX1264-LABEL: uniform_fadd_bf16:
-; GFX1264: ; %bb.0:
-; GFX1264-NEXT: s_clause 0x1
-; GFX1264-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1264-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX1264-NEXT: s_mov_b64 s[8:9], 0
-; GFX1264-NEXT: s_wait_kmcnt 0x0
-; GFX1264-NEXT: s_and_b32 s4, s2, -4
-; GFX1264-NEXT: s_mov_b32 s5, s3
-; GFX1264-NEXT: s_and_b32 s2, s2, 3
-; GFX1264-NEXT: s_load_b32 s5, s[4:5], 0x0
-; GFX1264-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1264-NEXT: s_lshl_b32 s11, s6, 16
-; GFX1264-NEXT: s_lshl_b32 s7, 0xffff, s2
-; GFX1264-NEXT: s_mov_b32 s6, -1
-; GFX1264-NEXT: s_not_b32 s10, s7
-; GFX1264-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1264-NEXT: s_wait_kmcnt 0x0
-; GFX1264-NEXT: v_mov_b32_e32 v1, s5
-; GFX1264-NEXT: s_mov_b32 s5, s3
-; GFX1264-NEXT: .LBB19_1: ; %atomicrmw.start
-; GFX1264-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1264-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1264-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1264-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX1264-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1264-NEXT: v_add_f32_e32 v0, s11, v0
-; GFX1264-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX1264-NEXT: v_or_b32_e32 v3, 0x400000, v0
-; GFX1264-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX1264-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1264-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
-; GFX1264-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1264-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
-; GFX1264-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1264-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX1264-NEXT: v_lshlrev_b32_e32 v0, s2, v0
-; GFX1264-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1264-NEXT: v_and_or_b32 v0, v1, s10, v0
-; GFX1264-NEXT: v_mov_b32_e32 v3, v1
-; GFX1264-NEXT: v_mov_b32_e32 v2, v0
-; GFX1264-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1264-NEXT: s_wait_loadcnt 0x0
-; GFX1264-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
-; GFX1264-NEXT: v_mov_b32_e32 v1, v2
-; GFX1264-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
-; GFX1264-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1264-NEXT: s_and_not1_b64 exec, exec, s[8:9]
-; GFX1264-NEXT: s_cbranch_execnz .LBB19_1
-; GFX1264-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1264-NEXT: s_or_b64 exec, exec, s[8:9]
-; GFX1264-NEXT: v_lshrrev_b32_e32 v0, s2, v2
-; GFX1264-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1264-NEXT: s_mov_b32 s2, -1
-; GFX1264-NEXT: buffer_store_b16 v0, off, s[0:3], null
-; GFX1264-NEXT: s_endpgm
+; GFX1132-TRUE16-LABEL: uniform_fadd_bf16:
+; GFX1132-TRUE16: ; %bb.0:
+; GFX1132-TRUE16-NEXT: s_clause 0x1
+; GFX1132-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1132-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1132-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX1132-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1132-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1132-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1132-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
+; GFX1132-TRUE16-NEXT: s_not_b32 s9, s6
+; GFX1132-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1132-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_lshlrev_b32 v4, 16, v0
+; GFX1132-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1132-TRUE16-NEXT: .p2align 6
+; GFX1132-TRUE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1132-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
+; GFX1132-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1132-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1132-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1132-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1132-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-TRUE16-NEXT: v_and_or_b32 v0, v1, s9, v0
+; GFX1132-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX1132-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1132-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX1132-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
+; GFX1132-TRUE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1132-TRUE16-NEXT: s_or_b32 s8, vcc_lo, s8
+; GFX1132-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1132-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
+; GFX1132-TRUE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1132-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1132-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
+; GFX1132-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1132-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1132-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX1132-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX1132-TRUE16-NEXT: s_endpgm
+;
+; GFX1132-FAKE16-LABEL: uniform_fadd_bf16:
+; GFX1132-FAKE16: ; %bb.0:
+; GFX1132-FAKE16-NEXT: s_clause 0x1
+; GFX1132-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1132-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1132-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX1132-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-FAKE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1132-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1132-FAKE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1132-FAKE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1132-FAKE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1132-FAKE16-NEXT: s_lshl_b32 s10, s6, 16
+; GFX1132-FAKE16-NEXT: s_lshl_b32 s7, 0xffff, s2
+; GFX1132-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX1132-FAKE16-NEXT: s_not_b32 s9, s7
+; GFX1132-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1132-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1132-FAKE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1132-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1132-FAKE16-NEXT: .p2align 6
+; GFX1132-FAKE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1132-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1132-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1132-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1132-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-FAKE16-NEXT: v_add_f32_e32 v0, s10, v0
+; GFX1132-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1132-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1132-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX1132-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1132-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
+; GFX1132-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1132-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1132-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1132-FAKE16-NEXT: v_and_or_b32 v0, v1, s9, v0
+; GFX1132-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX1132-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], 0 glc
+; GFX1132-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX1132-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
+; GFX1132-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1132-FAKE16-NEXT: s_or_b32 s8, vcc_lo, s8
+; GFX1132-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1132-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
+; GFX1132-FAKE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1132-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1132-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
+; GFX1132-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1132-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1132-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX1132-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX1132-FAKE16-NEXT: s_endpgm
+;
+; GFX1264-TRUE16-LABEL: uniform_fadd_bf16:
+; GFX1264-TRUE16: ; %bb.0:
+; GFX1264-TRUE16-NEXT: s_clause 0x1
+; GFX1264-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1264-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1264-TRUE16-NEXT: s_mov_b64 s[8:9], 0
+; GFX1264-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-TRUE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX1264-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1264-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
+; GFX1264-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1264-TRUE16-NEXT: s_not_b32 s10, s6
+; GFX1264-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1264-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1264-TRUE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1264-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
+; GFX1264-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1264-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1264-TRUE16-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1264-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1264-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1264-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1264-TRUE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v3, v1
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v2, v0
+; GFX1264-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1264-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1264-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
+; GFX1264-TRUE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1264-TRUE16-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
+; GFX1264-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1264-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[8:9]
+; GFX1264-TRUE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1264-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1264-TRUE16-NEXT: s_or_b64 exec, exec, s[8:9]
+; GFX1264-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1264-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1264-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX1264-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1264-TRUE16-NEXT: s_endpgm
+;
+; GFX1264-FAKE16-LABEL: uniform_fadd_bf16:
+; GFX1264-FAKE16: ; %bb.0:
+; GFX1264-FAKE16-NEXT: s_clause 0x1
+; GFX1264-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1264-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1264-FAKE16-NEXT: s_mov_b64 s[8:9], 0
+; GFX1264-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-FAKE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1264-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1264-FAKE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1264-FAKE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1264-FAKE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1264-FAKE16-NEXT: s_lshl_b32 s11, s6, 16
+; GFX1264-FAKE16-NEXT: s_lshl_b32 s7, 0xffff, s2
+; GFX1264-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX1264-FAKE16-NEXT: s_not_b32 s10, s7
+; GFX1264-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1264-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1264-FAKE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1264-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1264-FAKE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1264-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1264-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1264-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1264-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-FAKE16-NEXT: v_add_f32_e32 v0, s11, v0
+; GFX1264-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1264-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1264-FAKE16-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX1264-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1264-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1264-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1264-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
+; GFX1264-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1264-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1264-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1264-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1264-FAKE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1264-FAKE16-NEXT: v_mov_b32_e32 v3, v1
+; GFX1264-FAKE16-NEXT: v_mov_b32_e32 v2, v0
+; GFX1264-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1264-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1264-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
+; GFX1264-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1264-FAKE16-NEXT: s_or_b64 s[8:9], vcc, s[8:9]
+; GFX1264-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1264-FAKE16-NEXT: s_and_not1_b64 exec, exec, s[8:9]
+; GFX1264-FAKE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1264-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1264-FAKE16-NEXT: s_or_b64 exec, exec, s[8:9]
+; GFX1264-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1264-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1264-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX1264-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1264-FAKE16-NEXT: s_endpgm
+;
+; GFX1232-TRUE16-LABEL: uniform_fadd_bf16:
+; GFX1232-TRUE16: ; %bb.0:
+; GFX1232-TRUE16-NEXT: s_clause 0x1
+; GFX1232-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1232-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1232-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX1232-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1232-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1232-TRUE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1232-TRUE16-NEXT: s_lshl_b32 s6, 0xffff, s2
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_not_b32 s9, s6
+; GFX1232-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1232-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_lshlrev_b32 v4, 16, v0
+; GFX1232-TRUE16-NEXT: s_mov_b32 s5, s3
+; GFX1232-TRUE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1232-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
+; GFX1232-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1232-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1232-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1232-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1232-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1232-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-TRUE16-NEXT: v_and_or_b32 v0, v1, s9, v0
+; GFX1232-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX1232-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1232-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1232-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
+; GFX1232-TRUE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1232-TRUE16-NEXT: s_or_b32 s8, vcc_lo, s8
+; GFX1232-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
+; GFX1232-TRUE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1232-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1232-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
+; GFX1232-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1232-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1232-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX1232-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1232-TRUE16-NEXT: s_endpgm
+;
+; GFX1232-FAKE16-LABEL: uniform_fadd_bf16:
+; GFX1232-FAKE16: ; %bb.0:
+; GFX1232-FAKE16-NEXT: s_clause 0x1
+; GFX1232-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1232-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX1232-FAKE16-NEXT: s_mov_b32 s8, 0
+; GFX1232-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-FAKE16-NEXT: s_and_b32 s4, s2, -4
+; GFX1232-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1232-FAKE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1232-FAKE16-NEXT: s_load_b32 s5, s[4:5], 0x0
+; GFX1232-FAKE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1232-FAKE16-NEXT: s_lshl_b32 s10, s6, 16
+; GFX1232-FAKE16-NEXT: s_lshl_b32 s7, 0xffff, s2
+; GFX1232-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX1232-FAKE16-NEXT: s_not_b32 s9, s7
+; GFX1232-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1232-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1232-FAKE16-NEXT: v_mov_b32_e32 v1, s5
+; GFX1232-FAKE16-NEXT: s_mov_b32 s5, s3
+; GFX1232-FAKE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1232-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1232-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1232-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX1232-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-FAKE16-NEXT: v_add_f32_e32 v0, s10, v0
+; GFX1232-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX1232-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX1232-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX1232-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1232-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
+; GFX1232-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1232-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
+; GFX1232-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX1232-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1232-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1232-FAKE16-NEXT: v_and_or_b32 v0, v1, s9, v0
+; GFX1232-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX1232-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1232-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1232-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
+; GFX1232-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1232-FAKE16-NEXT: s_or_b32 s8, vcc_lo, s8
+; GFX1232-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1232-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
+; GFX1232-FAKE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1232-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1232-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
+; GFX1232-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1232-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1232-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX1232-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1232-FAKE16-NEXT: s_endpgm
;
-; GFX1232-LABEL: uniform_fadd_bf16:
-; GFX1232: ; %bb.0:
-; GFX1232-NEXT: s_clause 0x1
-; GFX1232-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1232-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX1232-NEXT: s_mov_b32 s8, 0
-; GFX1232-NEXT: s_wait_kmcnt 0x0
-; GFX1232-NEXT: s_and_b32 s4, s2, -4
-; GFX1232-NEXT: s_mov_b32 s5, s3
-; GFX1232-NEXT: s_and_b32 s2, s2, 3
-; GFX1232-NEXT: s_load_b32 s5, s[4:5], 0x0
-; GFX1232-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1232-NEXT: s_lshl_b32 s10, s6, 16
-; GFX1232-NEXT: s_lshl_b32 s7, 0xffff, s2
-; GFX1232-NEXT: s_mov_b32 s6, -1
-; GFX1232-NEXT: s_not_b32 s9, s7
-; GFX1232-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1232-NEXT: s_wait_kmcnt 0x0
-; GFX1232-NEXT: v_mov_b32_e32 v1, s5
-; GFX1232-NEXT: s_mov_b32 s5, s3
-; GFX1232-NEXT: .LBB19_1: ; %atomicrmw.start
-; GFX1232-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1232-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1232-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX1232-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-NEXT: v_add_f32_e32 v0, s10, v0
-; GFX1232-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX1232-NEXT: v_or_b32_e32 v3, 0x400000, v0
-; GFX1232-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX1232-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1232-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
-; GFX1232-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1232-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
-; GFX1232-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX1232-NEXT: v_lshlrev_b32_e32 v0, s2, v0
-; GFX1232-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1232-NEXT: v_and_or_b32 v0, v1, s9, v0
-; GFX1232-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1232-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1232-NEXT: s_wait_loadcnt 0x0
-; GFX1232-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
-; GFX1232-NEXT: v_mov_b32_e32 v1, v2
-; GFX1232-NEXT: s_or_b32 s8, vcc_lo, s8
-; GFX1232-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1232-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
-; GFX1232-NEXT: s_cbranch_execnz .LBB19_1
-; GFX1232-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1232-NEXT: s_or_b32 exec_lo, exec_lo, s8
-; GFX1232-NEXT: v_lshrrev_b32_e32 v0, s2, v2
-; GFX1232-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1232-NEXT: s_mov_b32 s2, -1
-; GFX1232-NEXT: buffer_store_b16 v0, off, s[0:3], null
-; GFX1232-NEXT: s_endpgm
+; GFX1364-TRUE16-LABEL: uniform_fadd_bf16:
+; GFX1364-TRUE16: ; %bb.0:
+; GFX1364-TRUE16-NEXT: s_clause 0x1
+; GFX1364-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1364-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34 nv
+; GFX1364-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
+; GFX1364-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1364-TRUE16-NEXT: s_load_b32 s3, s[4:5], 0x0
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s8, s2, 3
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1364-TRUE16-NEXT: s_lshl_b32 s2, 0xffff, s8
+; GFX1364-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-TRUE16-NEXT: s_not_b32 s9, s2
+; GFX1364-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, s3
+; GFX1364-TRUE16-NEXT: s_mov_b64 s[2:3], 0
+; GFX1364-TRUE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1364-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s8, v1
+; GFX1364-TRUE16-NEXT: v_pk_add_bf16 v0, v0, v4
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1364-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1364-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s8, v0
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1364-TRUE16-NEXT: v_and_or_b32 v0, v1, s9, v0
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v3, v1
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v2, v0
+; GFX1364-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1364-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1364-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
+; GFX1364-TRUE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1364-TRUE16-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
+; GFX1364-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1364-TRUE16-NEXT: s_and_not1_b64 exec, exec, s[2:3]
+; GFX1364-TRUE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1364-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1364-TRUE16-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX1364-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s8, v2
+; GFX1364-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1364-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX1364-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1364-TRUE16-NEXT: s_endpgm
;
-; GFX1364-LABEL: uniform_fadd_bf16:
-; GFX1364: ; %bb.0:
-; GFX1364-NEXT: s_clause 0x1
-; GFX1364-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1364-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
-; GFX1364-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1364-NEXT: s_mov_b32 s6, -1
-; GFX1364-NEXT: s_wait_kmcnt 0x0
-; GFX1364-NEXT: s_and_b64 s[4:5], s[2:3], -4
-; GFX1364-NEXT: s_and_b32 s2, s2, 3
-; GFX1364-NEXT: s_load_b32 s3, s[4:5], 0x0
-; GFX1364-NEXT: s_lshl_b32 s9, s2, 3
-; GFX1364-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1364-NEXT: s_lshl_b32 s2, 0xffff, s9
-; GFX1364-NEXT: s_not_b32 s10, s2
-; GFX1364-NEXT: s_wait_kmcnt 0x0
-; GFX1364-NEXT: v_mov_b32_e32 v1, s3
-; GFX1364-NEXT: s_mov_b64 s[2:3], 0
-; GFX1364-NEXT: .LBB19_1: ; %atomicrmw.start
-; GFX1364-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1364-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1364-NEXT: v_lshrrev_b32_e32 v0, s9, v1
-; GFX1364-NEXT: v_pk_add_bf16 v0, v0, s8
-; GFX1364-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1364-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX1364-NEXT: v_lshlrev_b32_e32 v0, s9, v0
-; GFX1364-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1364-NEXT: v_and_or_b32 v0, v1, s10, v0
-; GFX1364-NEXT: v_mov_b32_e32 v3, v1
-; GFX1364-NEXT: v_mov_b32_e32 v2, v0
-; GFX1364-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1364-NEXT: s_wait_loadcnt 0x0
-; GFX1364-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
-; GFX1364-NEXT: v_mov_b32_e32 v1, v2
-; GFX1364-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
-; GFX1364-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1364-NEXT: s_and_not1_b64 exec, exec, s[2:3]
-; GFX1364-NEXT: s_cbranch_execnz .LBB19_1
-; GFX1364-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1364-NEXT: s_or_b64 exec, exec, s[2:3]
-; GFX1364-NEXT: v_lshrrev_b32_e32 v0, s9, v2
-; GFX1364-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1364-NEXT: s_mov_b32 s2, -1
-; GFX1364-NEXT: buffer_store_b16 v0, off, s[0:3], null
-; GFX1364-NEXT: s_endpgm
+; GFX1364-FAKE16-LABEL: uniform_fadd_bf16:
+; GFX1364-FAKE16: ; %bb.0:
+; GFX1364-FAKE16-NEXT: s_clause 0x1
+; GFX1364-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1364-FAKE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
+; GFX1364-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1364-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX1364-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-FAKE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
+; GFX1364-FAKE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1364-FAKE16-NEXT: s_load_b32 s3, s[4:5], 0x0
+; GFX1364-FAKE16-NEXT: s_lshl_b32 s9, s2, 3
+; GFX1364-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1364-FAKE16-NEXT: s_lshl_b32 s2, 0xffff, s9
+; GFX1364-FAKE16-NEXT: s_not_b32 s10, s2
+; GFX1364-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1364-FAKE16-NEXT: v_mov_b32_e32 v1, s3
+; GFX1364-FAKE16-NEXT: s_mov_b64 s[2:3], 0
+; GFX1364-FAKE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1364-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1364-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1364-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s9, v1
+; GFX1364-FAKE16-NEXT: v_pk_add_bf16 v0, v0, s8
+; GFX1364-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1364-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1364-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s9, v0
+; GFX1364-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1364-FAKE16-NEXT: v_and_or_b32 v0, v1, s10, v0
+; GFX1364-FAKE16-NEXT: v_mov_b32_e32 v3, v1
+; GFX1364-FAKE16-NEXT: v_mov_b32_e32 v2, v0
+; GFX1364-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1364-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1364-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc, v2, v1
+; GFX1364-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1364-FAKE16-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
+; GFX1364-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1364-FAKE16-NEXT: s_and_not1_b64 exec, exec, s[2:3]
+; GFX1364-FAKE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1364-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1364-FAKE16-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX1364-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s9, v2
+; GFX1364-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1364-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX1364-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1364-FAKE16-NEXT: s_endpgm
;
-; GFX1332-LABEL: uniform_fadd_bf16:
-; GFX1332: ; %bb.0:
-; GFX1332-NEXT: s_clause 0x1
-; GFX1332-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1332-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
-; GFX1332-NEXT: s_mov_b32 s9, 0
-; GFX1332-NEXT: s_mov_b32 s7, 0x31016000
-; GFX1332-NEXT: s_wait_kmcnt 0x0
-; GFX1332-NEXT: s_and_b64 s[4:5], s[2:3], -4
-; GFX1332-NEXT: s_and_b32 s2, s2, 3
-; GFX1332-NEXT: s_load_b32 s6, s[4:5], 0x0
-; GFX1332-NEXT: s_lshl_b32 s2, s2, 3
-; GFX1332-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1332-NEXT: s_lshl_b32 s3, 0xffff, s2
-; GFX1332-NEXT: s_not_b32 s3, s3
-; GFX1332-NEXT: s_wait_kmcnt 0x0
-; GFX1332-NEXT: v_mov_b32_e32 v1, s6
-; GFX1332-NEXT: s_mov_b32 s6, -1
-; GFX1332-NEXT: .LBB19_1: ; %atomicrmw.start
-; GFX1332-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1332-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-NEXT: v_lshrrev_b32_e32 v0, s2, v1
-; GFX1332-NEXT: v_pk_add_bf16 v0, v0, s8
-; GFX1332-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX1332-NEXT: v_lshlrev_b32_e32 v0, s2, v0
-; GFX1332-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1332-NEXT: v_and_or_b32 v0, v1, s3, v0
-; GFX1332-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX1332-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1332-NEXT: s_wait_loadcnt 0x0
-; GFX1332-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
-; GFX1332-NEXT: v_mov_b32_e32 v1, v2
-; GFX1332-NEXT: s_or_b32 s9, vcc_lo, s9
-; GFX1332-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1332-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
-; GFX1332-NEXT: s_cbranch_execnz .LBB19_1
-; GFX1332-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX1332-NEXT: s_or_b32 exec_lo, exec_lo, s9
-; GFX1332-NEXT: v_lshrrev_b32_e32 v0, s2, v2
-; GFX1332-NEXT: s_mov_b32 s3, 0x31016000
-; GFX1332-NEXT: s_mov_b32 s2, -1
-; GFX1332-NEXT: buffer_store_b16 v0, off, s[0:3], null
-; GFX1332-NEXT: s_endpgm
+; GFX1332-TRUE16-LABEL: uniform_fadd_bf16:
+; GFX1332-TRUE16: ; %bb.0:
+; GFX1332-TRUE16-NEXT: s_clause 0x1
+; GFX1332-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1332-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34 nv
+; GFX1332-TRUE16-NEXT: s_mov_b32 s8, 0
+; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
+; GFX1332-TRUE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1332-TRUE16-NEXT: s_load_b32 s7, s[4:5], 0x0
+; GFX1332-TRUE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v4, s6
+; GFX1332-TRUE16-NEXT: s_lshl_b32 s3, 0xffff, s2
+; GFX1332-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX1332-TRUE16-NEXT: s_not_b32 s3, s3
+; GFX1332-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX1332-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1332-TRUE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1332-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1332-TRUE16-NEXT: v_pk_add_bf16 v0, v0, v4
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1332-TRUE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1332-TRUE16-NEXT: v_and_or_b32 v0, v1, s3, v0
+; GFX1332-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX1332-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1332-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1332-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
+; GFX1332-TRUE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1332-TRUE16-NEXT: s_or_b32 s8, vcc_lo, s8
+; GFX1332-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1332-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s8
+; GFX1332-TRUE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1332-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1332-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s8
+; GFX1332-TRUE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1332-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1332-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX1332-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1332-TRUE16-NEXT: s_endpgm
+;
+; GFX1332-FAKE16-LABEL: uniform_fadd_bf16:
+; GFX1332-FAKE16: ; %bb.0:
+; GFX1332-FAKE16-NEXT: s_clause 0x1
+; GFX1332-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1332-FAKE16-NEXT: s_load_b32 s8, s[4:5], 0x34 nv
+; GFX1332-FAKE16-NEXT: s_mov_b32 s9, 0
+; GFX1332-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX1332-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-FAKE16-NEXT: s_and_b64 s[4:5], s[2:3], -4
+; GFX1332-FAKE16-NEXT: s_and_b32 s2, s2, 3
+; GFX1332-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x0
+; GFX1332-FAKE16-NEXT: s_lshl_b32 s2, s2, 3
+; GFX1332-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1332-FAKE16-NEXT: s_lshl_b32 s3, 0xffff, s2
+; GFX1332-FAKE16-NEXT: s_not_b32 s3, s3
+; GFX1332-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1332-FAKE16-NEXT: v_mov_b32_e32 v1, s6
+; GFX1332-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX1332-FAKE16-NEXT: .LBB19_1: ; %atomicrmw.start
+; GFX1332-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX1332-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1332-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v1
+; GFX1332-FAKE16-NEXT: v_pk_add_bf16 v0, v0, s8
+; GFX1332-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1332-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1332-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s2, v0
+; GFX1332-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1332-FAKE16-NEXT: v_and_or_b32 v0, v1, s3, v0
+; GFX1332-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX1332-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], off, s[4:7], null th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1332-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1332-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
+; GFX1332-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX1332-FAKE16-NEXT: s_or_b32 s9, vcc_lo, s9
+; GFX1332-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1332-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s9
+; GFX1332-FAKE16-NEXT: s_cbranch_execnz .LBB19_1
+; GFX1332-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
+; GFX1332-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s9
+; GFX1332-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s2, v2
+; GFX1332-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX1332-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX1332-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], null
+; GFX1332-FAKE16-NEXT: s_endpgm
%rmw = atomicrmw fadd ptr addrspace(1) %uniform.ptr, bfloat %val monotonic, align 2
store bfloat %rmw, ptr addrspace(1) %result
ret void
diff --git a/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll b/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
index d1a7aa6d8d29d7..f00bca5bd1d8c5 100644
--- a/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
@@ -1793,7 +1793,6 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_16(ptr addrsp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_cvt_u32_u16_e32 v1, v1.l
; GFX12-GISEL-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -1882,70 +1881,70 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_16(ptr addrsp
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-SDAG-NEXT: s_mov_b32 s2, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s3
-; GFX11-SDAG-NEXT: s_mov_b32 s3, 0
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, s3
; GFX11-SDAG-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, v1
-; GFX11-SDAG-NEXT: v_sub_nc_u16 v1.l, v2.l, s2 clamp
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.h, v3.l, v0.l clamp
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_cvt_u32_u16_e32 v1, v1.l
-; GFX11-SDAG-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
-; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 glc
+; GFX11-SDAG-NEXT: v_cvt_u32_u16_e32 v2, v0.h
+; GFX11-SDAG-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:2048 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
-; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
-; GFX11-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
+; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX11-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB10_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
+; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-SDAG-NEXT: global_store_b16 v0, v2, s[0:1]
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
+; GFX12-SDAG-NEXT: s_mov_b32 s2, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s3
; GFX12-SDAG-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, v1
-; GFX12-SDAG-NEXT: v_sub_nc_u16 v1.l, v2.l, s2 clamp
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-SDAG-NEXT: v_sub_nc_u16 v0.h, v3.l, v0.l clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v1, v1.l
-; GFX12-SDAG-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v2, v0.h
+; GFX12-SDAG-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
+; GFX12-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB10_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
+; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX12-SDAG-NEXT: global_store_b16 v0, v2, s[0:1]
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i16, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
@@ -2053,7 +2052,6 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_16(ptr
; GFX12-GISEL-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -2128,28 +2126,29 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_16(ptr
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, s2
+; GFX11-SDAG-NEXT: s_mov_b32 s2, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s3
-; GFX11-SDAG-NEXT: s_mov_b32 s3, 0
; GFX11-SDAG-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.l, v1.l, s2 clamp
+; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.l, v1.l, v2.l clamp
; GFX11-SDAG-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
-; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 glc
+; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] offset:2048 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, v0
-; GFX11-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
+; GFX11-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB11_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_endpgm
@@ -2157,29 +2156,29 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_16(ptr
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s2
+; GFX12-SDAG-NEXT: s_mov_b32 s2, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
; GFX12-SDAG-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_sub_nc_u16 v0.l, v1.l, s2 clamp
+; GFX12-SDAG-NEXT: v_sub_nc_u16 v0.l, v1.l, v2.l clamp
; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
+; GFX12-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB11_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_endpgm
@@ -3305,7 +3304,6 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_8(ptr addrspa
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0xff, v1
; GFX12-GISEL-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -3394,29 +3392,31 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_8(ptr addrspa
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-SDAG-NEXT: s_load_b32 s3, s[4:5], 0x8
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: s_load_b32 s2, s[0:1], 0x400
-; GFX11-SDAG-NEXT: s_and_b32 s3, s3, 0xff
+; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x400
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX11-SDAG-NEXT: s_mov_b32 s2, 0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v0
+; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, s3
; GFX11-SDAG-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, v1
-; GFX11-SDAG-NEXT: v_and_b16 v1.l, 0xff, v2.l
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-SDAG-NEXT: v_and_b16 v0.h, 0xff, v3.l
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_sub_nc_u16 v1.l, v1.l, s3 clamp
-; GFX11-SDAG-NEXT: v_cvt_u32_u16_e32 v1, v1.l
+; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.h, v0.h, v0.l clamp
+; GFX11-SDAG-NEXT: v_cvt_u32_u16_e32 v2, v0.h
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
-; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 glc
+; GFX11-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
+; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:1024 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
-; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX11-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
@@ -3426,45 +3426,45 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_8(ptr addrspa
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: global_store_b8 v0, v1, s[0:1]
+; GFX11-SDAG-NEXT: global_store_b8 v0, v2, s[0:1]
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x400
-; GFX12-SDAG-NEXT: s_and_b32 s2, s2, 0xff
+; GFX12-SDAG-NEXT: s_mov_b32 s2, 0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s3
; GFX12-SDAG-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, v1
-; GFX12-SDAG-NEXT: v_and_b16 v1.l, 0xff, v2.l
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-SDAG-NEXT: v_and_b16 v0.h, 0xff, v3.l
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_sub_nc_u16 v1.l, v1.l, s2 clamp
-; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v1, v1.l
+; GFX12-SDAG-NEXT: v_sub_nc_u16 v0.h, v0.h, v0.l clamp
+; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v2, v0.h
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
+; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
+; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
+; GFX12-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB16_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
-; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
+; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: global_store_b8 v0, v1, s[0:1]
+; GFX12-SDAG-NEXT: global_store_b8 v0, v2, s[0:1]
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i8, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
@@ -3590,7 +3590,6 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_8(ptr a
; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -3665,23 +3664,24 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_8(ptr a
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-SDAG-NEXT: s_load_b32 s3, s[4:5], 0x8
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: s_load_b32 s2, s[0:1], 0x400
-; GFX11-SDAG-NEXT: s_and_b32 s3, s3, 0xff
+; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x400
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX11-SDAG-NEXT: s_mov_b32 s2, 0
+; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_and_b32 v2, 0xff, v0
; GFX11-SDAG-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b16 v0.l, 0xff, v1.l
-; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.l, v0.l, s3 clamp
+; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.l, v0.l, v2.l clamp
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX11-SDAG-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
-; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 glc
+; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] offset:1024 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
@@ -3697,31 +3697,31 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_8(ptr a
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x400
-; GFX12-SDAG-NEXT: s_and_b32 s2, s2, 0xff
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX12-SDAG-NEXT: s_mov_b32 s2, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_and_b32 v2, 0xff, v0
; GFX12-SDAG-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b16 v0.l, 0xff, v1.l
-; GFX12-SDAG-NEXT: v_sub_nc_u16 v0.l, v0.l, s2 clamp
+; GFX12-SDAG-NEXT: v_sub_nc_u16 v0.l, v0.l, v2.l clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX12-SDAG-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
+; GFX12-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
+; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB17_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll b/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
index 43100e18394266..590103f694e67b 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
@@ -112,14 +112,23 @@ define amdgpu_ps float @v_test_cvt_v2f32_v2bf16_s(<2 x float> inreg %src) {
; GFX-950-NEXT: v_cvt_pk_bf16_f32 v0, s0, v0
; GFX-950-NEXT: ; return to shader part epilog
;
-; GFX1250-LABEL: v_test_cvt_v2f32_v2bf16_s:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: v_cvt_pk_bf16_f32 v0, s0, s1
-; GFX1250-NEXT: ; return to shader part epilog
+; GFX1250-FAKE16-LABEL: v_test_cvt_v2f32_v2bf16_s:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: v_cvt_pk_bf16_f32 v0, s0, s1
+; GFX1250-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX1250-REAL16-LABEL: v_test_cvt_v2f32_v2bf16_s:
+; GFX1250-REAL16: ; %bb.0:
+; GFX1250-REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-REAL16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-REAL16-NEXT: v_nop
+; GFX1250-REAL16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, s0, s0
+; GFX1250-REAL16-NEXT: ; return to shader part epilog
%res = fptrunc <2 x float> %src to <2 x bfloat>
%cast = bitcast <2 x bfloat> %res to float
ret float %cast
@@ -675,6 +684,3 @@ entry:
declare float @llvm.fabs.f32(float)
declare double @llvm.fabs.f64(double)
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX1250-FAKE16: {{.*}}
-; GFX1250-REAL16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/bf16-math.ll b/llvm/test/CodeGen/AMDGPU/bf16-math.ll
index f0b3e305e76209..4d551620447ced 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16-math.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16-math.ll
@@ -490,7 +490,7 @@ define amdgpu_ps bfloat @test_clamp_bf16_s(bfloat inreg %src) {
; TRUE16-NEXT: s_mov_b64 s[64:65], 0
; TRUE16-NEXT: v_nop
; TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; TRUE16-NEXT: v_mov_b32_e32 v0, s0
; TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; TRUE16-NEXT: v_pk_max_num_bf16 v0, v0, v0 op_sel_hi:[0,0] clamp
; TRUE16-NEXT: ; return to shader part epilog
@@ -548,7 +548,7 @@ define amdgpu_ps float @test_clamp_bf16_hi16_s(<2 x bfloat> inreg %src) {
; TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
; TRUE16-NEXT: s_lshr_b32 s0, s0, 16
; TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; TRUE16-NEXT: v_mov_b32_e32 v0, s0
; TRUE16-NEXT: v_pk_max_num_bf16 v0, v0, v0 op_sel_hi:[0,0] clamp
; TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
diff --git a/llvm/test/CodeGen/AMDGPU/bf16.ll b/llvm/test/CodeGen/AMDGPU/bf16.ll
index d3e89cd1e469ba..6857ee1d7cef4d 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16.ll
@@ -2721,35 +2721,20 @@ define amdgpu_gfx void @test_inreg_arg_store(bfloat inreg %in, ptr addrspace(1)
; GFX10-NEXT: global_store_short v[0:1], v2, off
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11TRUE16-LABEL: test_inreg_arg_store:
-; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v2.l, s4
-; GFX11TRUE16-NEXT: global_store_b16 v[0:1], v2, off
-; GFX11TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11FAKE16-LABEL: test_inreg_arg_store:
-; GFX11FAKE16: ; %bb.0:
-; GFX11FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11FAKE16-NEXT: v_mov_b32_e32 v2, s4
-; GFX11FAKE16-NEXT: global_store_b16 v[0:1], v2, off
-; GFX11FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1250TRUE16-LABEL: test_inreg_arg_store:
-; GFX1250TRUE16: ; %bb.0:
-; GFX1250TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v2.l, s4
-; GFX1250TRUE16-NEXT: global_store_b16 v[0:1], v2, off
-; GFX1250TRUE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX11-LABEL: test_inreg_arg_store:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v2, s4
+; GFX11-NEXT: global_store_b16 v[0:1], v2, off
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1250FAKE16-LABEL: test_inreg_arg_store:
-; GFX1250FAKE16: ; %bb.0:
-; GFX1250FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250FAKE16-NEXT: v_mov_b32_e32 v2, s4
-; GFX1250FAKE16-NEXT: global_store_b16 v[0:1], v2, off
-; GFX1250FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: test_inreg_arg_store:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_mov_b32_e32 v2, s4
+; GFX1250-NEXT: global_store_b16 v[0:1], v2, off
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
store bfloat %in, ptr addrspace(1) %out
ret void
}
@@ -40894,7 +40879,7 @@ define amdgpu_ps i32 @s_select_bf16(bfloat inreg %a, bfloat inreg %b, i32 %c) #0
; GFX11TRUE16-LABEL: s_select_bf16:
; GFX11TRUE16: ; %bb.0:
; GFX11TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_cndmask_b16 v0.l, s1, v0.l, vcc_lo
; GFX11TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
@@ -40920,7 +40905,7 @@ define amdgpu_ps i32 @s_select_bf16(bfloat inreg %a, bfloat inreg %b, i32 %c) #0
; GFX1250TRUE16-NEXT: v_nop
; GFX1250TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
; GFX1250TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1250TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.l, s1, v0.l, vcc_lo
; GFX1250TRUE16-NEXT: v_cvt_u32_u16_e32 v0, v0.l
@@ -41133,14 +41118,13 @@ define amdgpu_ps i32 @s_vselect_v2bf16(<2 x bfloat> inreg %a, <2 x bfloat> inreg
; GFX11TRUE16-NEXT: s_lshr_b32 s3, s0, 16
; GFX11TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX11TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v1
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s3
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s0
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v1, s0
; GFX11TRUE16-NEXT: s_lshr_b32 s0, s1, 16
-; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
-; GFX11TRUE16-NEXT: v_cndmask_b16 v1.h, s0, v0.l, s2
+; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX11TRUE16-NEXT: v_cndmask_b16 v0.h, s0, v0.l, s2
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11TRUE16-NEXT: v_cndmask_b16 v1.l, s1, v0.h, vcc_lo
-; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX11TRUE16-NEXT: v_cndmask_b16 v0.l, s1, v1.l, vcc_lo
+; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX11TRUE16-NEXT: ; return to shader part epilog
;
; GFX11FAKE16-LABEL: s_vselect_v2bf16:
@@ -41168,14 +41152,13 @@ define amdgpu_ps i32 @s_vselect_v2bf16(<2 x bfloat> inreg %a, <2 x bfloat> inreg
; GFX1250TRUE16-NEXT: s_lshr_b32 s3, s0, 16
; GFX1250TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX1250TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v1
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v0.l, s3
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v0.h, s0
+; GFX1250TRUE16-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v1, s0
; GFX1250TRUE16-NEXT: s_lshr_b32 s0, s1, 16
-; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
-; GFX1250TRUE16-NEXT: v_cndmask_b16 v1.h, s0, v0.l, s2
+; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.h, s0, v0.l, s2
; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250TRUE16-NEXT: v_cndmask_b16 v1.l, s1, v0.h, vcc_lo
-; GFX1250TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.l, s1, v1.l, vcc_lo
+; GFX1250TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX1250TRUE16-NEXT: ; return to shader part epilog
;
; GFX1250FAKE16-LABEL: s_vselect_v2bf16:
@@ -42280,19 +42263,18 @@ define amdgpu_ps <2 x i32> @s_vselect_v4bf16(<4 x bfloat> inreg %a, <4 x bfloat>
; GFX11TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v1
; GFX11TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v2
; GFX11TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v3
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s7
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s9
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.h, s1
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s7 :: v_dual_mov_b32 v1, s9
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
; GFX11TRUE16-NEXT: s_lshr_b32 s8, s3, 16
; GFX11TRUE16-NEXT: s_lshr_b32 s0, s2, 16
-; GFX11TRUE16-NEXT: v_cndmask_b16 v2.h, s8, v0.l, s6
-; GFX11TRUE16-NEXT: v_cndmask_b16 v0.h, s0, v0.h, s4
-; GFX11TRUE16-NEXT: v_cndmask_b16 v0.l, s2, v1.l, vcc_lo
-; GFX11TRUE16-NEXT: v_cndmask_b16 v2.l, s3, v1.h, s5
-; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX11TRUE16-NEXT: v_readfirstlane_b32 s1, v2
+; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
+; GFX11TRUE16-NEXT: v_cndmask_b16 v0.h, s8, v0.l, s6
+; GFX11TRUE16-NEXT: v_cndmask_b16 v1.h, s0, v1.l, s4
+; GFX11TRUE16-NEXT: v_cndmask_b16 v1.l, s2, v2.l, vcc_lo
+; GFX11TRUE16-NEXT: v_cndmask_b16 v0.l, s3, v3.l, s5
+; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11TRUE16-NEXT: v_readfirstlane_b32 s1, v0
; GFX11TRUE16-NEXT: ; return to shader part epilog
;
; GFX11FAKE16-LABEL: s_vselect_v4bf16:
@@ -42335,19 +42317,18 @@ define amdgpu_ps <2 x i32> @s_vselect_v4bf16(<4 x bfloat> inreg %a, <4 x bfloat>
; GFX1250TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v1
; GFX1250TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v2
; GFX1250TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v3
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v0.l, s7
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v0.h, s9
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
-; GFX1250TRUE16-NEXT: v_mov_b16_e32 v1.h, s1
+; GFX1250TRUE16-NEXT: v_dual_mov_b32 v0, s7 :: v_dual_mov_b32 v1, s9
+; GFX1250TRUE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
; GFX1250TRUE16-NEXT: s_lshr_b32 s8, s3, 16
; GFX1250TRUE16-NEXT: s_lshr_b32 s0, s2, 16
-; GFX1250TRUE16-NEXT: v_cndmask_b16 v2.h, s8, v0.l, s6
-; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.h, s0, v0.h, s4
-; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.l, s2, v1.l, vcc_lo
-; GFX1250TRUE16-NEXT: v_cndmask_b16 v2.l, s3, v1.h, s5
-; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250TRUE16-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1250TRUE16-NEXT: v_readfirstlane_b32 s1, v2
+; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
+; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.h, s8, v0.l, s6
+; GFX1250TRUE16-NEXT: v_cndmask_b16 v1.h, s0, v1.l, s4
+; GFX1250TRUE16-NEXT: v_cndmask_b16 v1.l, s2, v2.l, vcc_lo
+; GFX1250TRUE16-NEXT: v_cndmask_b16 v0.l, s3, v3.l, s5
+; GFX1250TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250TRUE16-NEXT: v_readfirstlane_b32 s1, v0
; GFX1250TRUE16-NEXT: ; return to shader part epilog
;
; GFX1250FAKE16-LABEL: s_vselect_v4bf16:
diff --git a/llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll b/llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
index 66ffc925f5fa6f..3bb85bb95c948b 100644
--- a/llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
+++ b/llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
@@ -93,7 +93,11 @@ define amdgpu_ps i16 @bfe_i16_uniform(i16 inreg %a) {
;
; GFX12-TRUE16-LABEL: bfe_i16_uniform:
; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_bfe_u32 s0, s0, 0x40004
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v0, 4, 4
+; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: ; return to shader part epilog
%shr = lshr i16 %a, 4
%and = and i16 %shr, 15
@@ -108,7 +112,11 @@ define amdgpu_ps i8 @bfe_i8_uniform(i8 inreg %a) {
;
; GFX12-TRUE16-LABEL: bfe_i8_uniform:
; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_bfe_u32 s0, s0, 0x40004
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v0, 4, 4
+; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: ; return to shader part epilog
%shr = lshr i8 %a, 4
%and = and i8 %shr, 15
diff --git a/llvm/test/CodeGen/AMDGPU/br_cc.f16.ll b/llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
index 9e23cdc0fbddb3..09701340e4fb00 100644
--- a/llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
@@ -73,19 +73,17 @@ define amdgpu_kernel void @br_cc_f16(
; GFX11-TRUE16-NEXT: s_mov_b32 s5, s3
; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v1, off, s[8:11], 0 glc dlc
+; GFX11-TRUE16-NEXT: buffer_load_d16_hi_b16 v0, off, s[8:11], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0.l, v1.l
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB0_2
-; GFX11-TRUE16-NEXT: ; %bb.1: ; %one
; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
+; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB0_2
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %one
; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
; GFX11-TRUE16-NEXT: .LBB0_2: ; %two
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
-; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
-; GFX11-TRUE16-NEXT: buffer_store_b16 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_d16_hi_b16 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: br_cc_f16:
@@ -179,23 +177,21 @@ define amdgpu_kernel void @br_cc_f16_imm_a(
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x3800
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0x3800
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s4, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v1, off, s[4:7], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
+; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[4:7], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, 0.5, v1.l
+; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, 0.5, v0.l
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB1_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %one
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
-; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
-; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_d16_hi_b16 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
; GFX11-TRUE16-NEXT: .LBB1_2: ; %two
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
-; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
-; GFX11-TRUE16-NEXT: buffer_store_b16 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: br_cc_f16_imm_a:
@@ -284,23 +280,21 @@ define amdgpu_kernel void @br_cc_f16_imm_b(
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x3800
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0x3800
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s4, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s5, s3
-; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v1, off, s[4:7], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
+; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[4:7], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v1.l
+; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v0.l
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB2_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %one
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
-; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
-; GFX11-TRUE16-NEXT: buffer_store_b16 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
; GFX11-TRUE16-NEXT: .LBB2_2: ; %two
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, s6
-; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7
-; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_d16_hi_b16 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: br_cc_f16_imm_b:
diff --git a/llvm/test/CodeGen/AMDGPU/bswap.ll b/llvm/test/CodeGen/AMDGPU/bswap.ll
index b0bb15509e5f39..d092fa592d180d 100644
--- a/llvm/test/CodeGen/AMDGPU/bswap.ll
+++ b/llvm/test/CodeGen/AMDGPU/bswap.ll
@@ -311,18 +311,32 @@ define amdgpu_kernel void @test_bswap_i64(ptr addrspace(1) %out, ptr addrspace(1
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: test_bswap_i64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_load_b64 s[4:5], s[2:3], 0x0
-; GFX11-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-NEXT: s_mov_b32 s2, -1
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_perm_b32 v1, 0, s4, 0x10203
-; GFX11-NEXT: v_perm_b32 v0, 0, s5, 0x10203
-; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
-; GFX11-NEXT: s_endpgm
+; GFX11-REAL16-LABEL: test_bswap_i64:
+; GFX11-REAL16: ; %bb.0:
+; GFX11-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-REAL16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX11-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-REAL16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-REAL16-NEXT: v_perm_b32 v0, 0, s2, 0x10203
+; GFX11-REAL16-NEXT: s_mov_b32 s2, -1
+; GFX11-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v1, v0
+; GFX11-REAL16-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
+; GFX11-REAL16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: test_bswap_i64:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[2:3], 0x0
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, 0, s4, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, 0, s5, 0x10203
+; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
+; GFX11-FAKE16-NEXT: s_endpgm
%val = load i64, ptr addrspace(1) %in, align 8
%bswap = call i64 @llvm.bswap.i64(i64 %val) nounwind readnone
store i64 %bswap, ptr addrspace(1) %out, align 8
@@ -374,20 +388,36 @@ define amdgpu_kernel void @test_bswap_v2i64(ptr addrspace(1) %out, ptr addrspace
; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: test_bswap_v2i64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x0
-; GFX11-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-NEXT: s_mov_b32 s2, -1
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_perm_b32 v3, 0, s6, 0x10203
-; GFX11-NEXT: v_perm_b32 v2, 0, s7, 0x10203
-; GFX11-NEXT: v_perm_b32 v1, 0, s4, 0x10203
-; GFX11-NEXT: v_perm_b32 v0, 0, s5, 0x10203
-; GFX11-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
-; GFX11-NEXT: s_endpgm
+; GFX11-REAL16-LABEL: test_bswap_v2i64:
+; GFX11-REAL16: ; %bb.0:
+; GFX11-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-REAL16-NEXT: s_load_b128 s[4:7], s[2:3], 0x0
+; GFX11-REAL16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-REAL16-NEXT: s_mov_b32 s2, -1
+; GFX11-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-REAL16-NEXT: v_perm_b32 v0, 0, s4, 0x10203
+; GFX11-REAL16-NEXT: v_perm_b32 v2, 0, s6, 0x10203
+; GFX11-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v1, v0
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-REAL16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
+; GFX11-REAL16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: test_bswap_v2i64:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_load_b128 s[4:7], s[2:3], 0x0
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, 0, s6, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, 0, s7, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, 0, s4, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, 0, s5, 0x10203
+; GFX11-FAKE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
+; GFX11-FAKE16-NEXT: s_endpgm
%val = load <2 x i64>, ptr addrspace(1) %in, align 16
%bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %val) nounwind readnone
store <2 x i64> %bswap, ptr addrspace(1) %out, align 16
@@ -457,26 +487,49 @@ define amdgpu_kernel void @test_bswap_v4i64(ptr addrspace(1) %out, ptr addrspace
; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[12:15], 0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: test_bswap_v4i64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
-; GFX11-NEXT: s_mov_b32 s11, 0x31016000
-; GFX11-NEXT: s_mov_b32 s10, -1
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_perm_b32 v7, 0, s6, 0x10203
-; GFX11-NEXT: v_perm_b32 v6, 0, s7, 0x10203
-; GFX11-NEXT: v_perm_b32 v5, 0, s4, 0x10203
-; GFX11-NEXT: v_perm_b32 v4, 0, s5, 0x10203
-; GFX11-NEXT: v_perm_b32 v3, 0, s2, 0x10203
-; GFX11-NEXT: v_perm_b32 v2, 0, s3, 0x10203
-; GFX11-NEXT: v_perm_b32 v1, 0, s0, 0x10203
-; GFX11-NEXT: v_perm_b32 v0, 0, s1, 0x10203
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: buffer_store_b128 v[4:7], off, s[8:11], 0 offset:16
-; GFX11-NEXT: buffer_store_b128 v[0:3], off, s[8:11], 0
-; GFX11-NEXT: s_endpgm
+; GFX11-REAL16-LABEL: test_bswap_v4i64:
+; GFX11-REAL16: ; %bb.0:
+; GFX11-REAL16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX11-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-REAL16-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
+; GFX11-REAL16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX11-REAL16-NEXT: s_mov_b32 s10, -1
+; GFX11-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-REAL16-NEXT: v_perm_b32 v0, 0, s4, 0x10203
+; GFX11-REAL16-NEXT: v_perm_b32 v2, 0, s6, 0x10203
+; GFX11-REAL16-NEXT: v_perm_b32 v4, 0, s0, 0x10203
+; GFX11-REAL16-NEXT: v_perm_b32 v6, 0, s2, 0x10203
+; GFX11-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v1, v0
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v3, v2
+; GFX11-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v5, v4
+; GFX11-REAL16-NEXT: v_mov_b32_e32 v7, v6
+; GFX11-REAL16-NEXT: s_clause 0x1
+; GFX11-REAL16-NEXT: buffer_store_b128 v[0:3], off, s[8:11], 0 offset:16
+; GFX11-REAL16-NEXT: buffer_store_b128 v[4:7], off, s[8:11], 0
+; GFX11-REAL16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: test_bswap_v4i64:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
+; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
+; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, 0, s6, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, 0, s7, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, 0, s4, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, 0, s5, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, 0, s2, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, 0, s3, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, 0, s0, 0x10203
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, 0, s1, 0x10203
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: buffer_store_b128 v[4:7], off, s[8:11], 0 offset:16
+; GFX11-FAKE16-NEXT: buffer_store_b128 v[0:3], off, s[8:11], 0
+; GFX11-FAKE16-NEXT: s_endpgm
%val = load <4 x i64>, ptr addrspace(1) %in, align 32
%bswap = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %val) nounwind readnone
store <4 x i64> %bswap, ptr addrspace(1) %out, align 32
diff --git a/llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll b/llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
index fb1ac275301edc..ffe1e79eb8fccc 100644
--- a/llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
@@ -48,10 +48,12 @@ define void @test_call_external_void_func_bf16_inreg(bfloat inreg %arg) #0 {
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
; GFX11-NEXT: s_getpc_b64 s[2:3]
; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_bf16_inreg at rel32@lo+4
; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_bf16_inreg at rel32@hi+12
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
diff --git a/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll b/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
index 43e3071662ba34..1e1cba5ebd1f9e 100644
--- a/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
@@ -58,34 +58,6 @@ define void @test_call_external_void_func_i8_inreg(i8 inreg %arg) #0 {
; GFX9-NEXT: s_mov_b32 s33, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: test_call_external_void_func_i8_inreg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s1, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s2, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s2
-; GFX11-NEXT: v_writelane_b32 v40, s1, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: s_getpc_b64 s[2:3]
-; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_i8_inreg at rel32@lo+4
-; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_i8_inreg at rel32@hi+12
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
call void @external_void_func_i8_inreg(i8 inreg %arg)
ret void
}
@@ -117,34 +89,6 @@ define void @test_call_external_void_func_i16_inreg(i16 inreg %arg) #0 {
; GFX9-NEXT: s_mov_b32 s33, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: test_call_external_void_func_i16_inreg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s1, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s2, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s2
-; GFX11-NEXT: v_writelane_b32 v40, s1, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: s_getpc_b64 s[2:3]
-; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_i16_inreg at rel32@lo+4
-; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_i16_inreg at rel32@hi+12
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
call void @external_void_func_i16_inreg(i16 inreg %arg)
ret void
}
@@ -530,34 +474,6 @@ define void @test_call_external_void_func_f16_inreg(half inreg %arg) #0 {
; GFX9-NEXT: s_mov_b32 s33, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: test_call_external_void_func_f16_inreg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s1, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s2, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s2
-; GFX11-NEXT: v_writelane_b32 v40, s1, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: s_getpc_b64 s[2:3]
-; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_f16_inreg at rel32@lo+4
-; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_f16_inreg at rel32@hi+12
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
call void @external_void_func_f16_inreg(half inreg %arg)
ret void
}
diff --git a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
index b5e4c0d7fad3b9..ad9f317c8842b4 100644
--- a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
@@ -6466,37 +6466,69 @@ define amdgpu_kernel void @test_call_external_void_func_v16i8() #0 {
; SDAG-NEXT: s_swappc_b64 s[30:31], s[4:5]
; SDAG-NEXT: s_endpgm
;
-; GFX11-LABEL: test_call_external_void_func_v16i8:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
-; GFX11-NEXT: s_mov_b32 s7, 0x31016000
-; GFX11-NEXT: s_mov_b32 s6, -1
-; GFX11-NEXT: s_getpc_b64 s[2:3]
-; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_v16i8 at rel32@lo+4
-; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_v16i8 at rel32@hi+12
-; GFX11-NEXT: s_mov_b32 s32, 0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: buffer_load_b128 v[0:3], off, s[4:7], 0
-; GFX11-NEXT: s_mov_b64 s[6:7], s[0:1]
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v11, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v16
-; GFX11-NEXT: v_mov_b32_e32 v8, v2
-; GFX11-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v3, v18
-; GFX11-NEXT: v_mov_b32_e32 v2, v17
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: test_call_external_void_func_v16i8:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
+; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
+; GFX11-TRUE16-NEXT: s_getpc_b64 s[2:3]
+; GFX11-TRUE16-NEXT: s_add_u32 s2, s2, external_void_func_v16i8 at rel32@lo+4
+; GFX11-TRUE16-NEXT: s_addc_u32 s3, s3, external_void_func_v16i8 at rel32@hi+12
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, 0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: buffer_load_b128 v[16:19], off, s[4:7], 0
+; GFX11-TRUE16-NEXT: s_mov_b64 s[6:7], s[0:1]
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v19
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v19.l
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[2:3]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_v16i8:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
+; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX11-FAKE16-NEXT: s_getpc_b64 s[2:3]
+; GFX11-FAKE16-NEXT: s_add_u32 s2, s2, external_void_func_v16i8 at rel32@lo+4
+; GFX11-FAKE16-NEXT: s_addc_u32 s3, s3, external_void_func_v16i8 at rel32@hi+12
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, 0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: buffer_load_b128 v[0:3], off, s[4:7], 0
+; GFX11-FAKE16-NEXT: s_mov_b64 s[6:7], s[0:1]
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v3, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, v17
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[2:3]
+; GFX11-FAKE16-NEXT: s_endpgm
;
; HSA-LABEL: test_call_external_void_func_v16i8:
; HSA: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/calling-conventions.ll b/llvm/test/CodeGen/AMDGPU/calling-conventions.ll
index 8a886acdbc82a7..77b13e0d8ff6d2 100644
--- a/llvm/test/CodeGen/AMDGPU/calling-conventions.ll
+++ b/llvm/test/CodeGen/AMDGPU/calling-conventions.ll
@@ -131,17 +131,29 @@ define amdgpu_ps half @ps_ret_cc_inreg_f16(half inreg %arg0) {
; GFX11-FAKE16-NEXT: v_add_f16_e64 v0, s0, 1.0
; GFX11-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX1250-LABEL: ps_ret_cc_inreg_f16:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_add_f16 s0, s0, 1.0
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1250-NEXT: v_mov_b32_e32 v0, s0
-; GFX1250-NEXT: ; return to shader part epilog
+; GFX1250-TRUE16-LABEL: ps_ret_cc_inreg_f16:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_add_f16 s0, s0, 1.0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1250-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX1250-FAKE16-LABEL: ps_ret_cc_inreg_f16:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_add_f16 s0, s0, 1.0
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX1250-FAKE16-NEXT: ; return to shader part epilog
%add = fadd half %arg0, 1.0
ret half %add
}
@@ -1453,25 +1465,45 @@ define amdgpu_ps void @ps_mesa_inreg_i16(i16 inreg %arg0) {
; VI-NEXT: flat_store_short v[0:1], v0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: ps_mesa_inreg_i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_add_i32 s0, s0, s0
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: ps_mesa_inreg_i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v0
+; GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-TRUE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: ps_mesa_inreg_i16:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_add_co_i32 s0, s0, s0
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1250-NEXT: v_mov_b32_e32 v0, s0
-; GFX1250-NEXT: global_store_b16 v[0:1], v0, off
-; GFX1250-NEXT: s_endpgm
+; GFX11-FAKE16-LABEL: ps_mesa_inreg_i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-FAKE16-NEXT: s_endpgm
+;
+; GFX1250-TRUE16-LABEL: ps_mesa_inreg_i16:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v0
+; GFX1250-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: ps_mesa_inreg_i16:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_add_co_i32 s0, s0, s0
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX1250-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX1250-FAKE16-NEXT: s_endpgm
%add = add i16 %arg0, %arg0
store i16 %add, ptr addrspace(1) poison
ret void
@@ -4024,65 +4056,139 @@ define amdgpu_cs void @amdgpu_cs_inreg_v8i1(<8 x i1> inreg %arg0) {
; VI-NEXT: flat_store_byte v[0:1], v0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: amdgpu_cs_inreg_v8i1:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s6, s6, 1
-; GFX11-NEXT: s_lshl_b32 s5, s5, 1
-; GFX11-NEXT: s_and_b32 s4, s4, 1
-; GFX11-NEXT: s_and_b32 s2, s2, 1
-; GFX11-NEXT: s_lshl_b32 s1, s1, 1
-; GFX11-NEXT: s_and_b32 s0, s0, 1
-; GFX11-NEXT: s_lshl_b32 s7, s7, 3
-; GFX11-NEXT: s_lshl_b32 s6, s6, 2
-; GFX11-NEXT: s_or_b32 s4, s4, s5
-; GFX11-NEXT: s_lshl_b32 s3, s3, 3
-; GFX11-NEXT: s_lshl_b32 s2, s2, 2
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_or_b32 s5, s7, s6
-; GFX11-NEXT: s_and_b32 s4, s4, 3
-; GFX11-NEXT: s_or_b32 s1, s3, s2
-; GFX11-NEXT: s_and_b32 s0, s0, 3
-; GFX11-NEXT: s_or_b32 s2, s4, s5
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_lshl_b32 s1, s2, 4
-; GFX11-NEXT: s_and_b32 s0, s0, 15
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: global_store_b8 v[0:1], v0, off
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: amdgpu_cs_inreg_v8i1:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s7 :: v_dual_mov_b32 v1, s6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s0 :: v_dual_mov_b32 v7, s3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_lshlrev_b32 v0, 3, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s1 :: v_dual_lshlrev_b32 v2, 1, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s2 :: v_dual_and_b32 v3, 1, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 1, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 1, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 1, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 2, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 3, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 4, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 15, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: global_store_b8 v[0:1], v0, off
+; GFX11-TRUE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: amdgpu_cs_inreg_v8i1:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_and_b32 s6, s6, 1
-; GFX1250-NEXT: s_lshl_b32 s5, s5, 1
-; GFX1250-NEXT: s_and_b32 s4, s4, 1
-; GFX1250-NEXT: s_and_b32 s2, s2, 1
-; GFX1250-NEXT: s_lshl_b32 s1, s1, 1
-; GFX1250-NEXT: s_and_b32 s0, s0, 1
-; GFX1250-NEXT: s_lshl_b32 s7, s7, 3
-; GFX1250-NEXT: s_lshl_b32 s6, s6, 2
-; GFX1250-NEXT: s_or_b32 s4, s4, s5
-; GFX1250-NEXT: s_lshl_b32 s3, s3, 3
-; GFX1250-NEXT: s_lshl_b32 s2, s2, 2
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_or_b32 s5, s7, s6
-; GFX1250-NEXT: s_and_b32 s4, s4, 3
-; GFX1250-NEXT: s_or_b32 s1, s3, s2
-; GFX1250-NEXT: s_and_b32 s0, s0, 3
-; GFX1250-NEXT: s_or_b32 s2, s4, s5
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_lshl_b32 s1, s2, 4
-; GFX1250-NEXT: s_and_b32 s0, s0, 15
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: v_mov_b32_e32 v0, s0
-; GFX1250-NEXT: global_store_b8 v[0:1], v0, off
-; GFX1250-NEXT: s_endpgm
+; GFX11-FAKE16-LABEL: amdgpu_cs_inreg_v8i1:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s6, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s6, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 4
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 15
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: global_store_b8 v[0:1], v0, off
+; GFX11-FAKE16-NEXT: s_endpgm
+;
+; GFX1250-TRUE16-LABEL: amdgpu_cs_inreg_v8i1:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s7 :: v_dual_mov_b32 v1, s6
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v5, s1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v6, s0 :: v_dual_lshlrev_b32 v0, 3, v0
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_bitop2_b32 v1, 1, v1 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v2, 1, v2 :: v_dual_mov_b32 v4, s2
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_lshlrev_b32 v5, 1, v5
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v1, 2, v1 :: v_dual_bitop2_b32 v6, 1, v6 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v4, 1, v4
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v3, 3, v7 :: v_dual_bitop2_b32 v2, v3, v2 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 2, v4 :: v_dual_bitop2_b32 v5, v6, v5 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v1, 3, v2
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v3, 3, v5
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v0, 4, v0 :: v_dual_bitop2_b32 v1, v3, v2 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v1, 15, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX1250-TRUE16-NEXT: global_store_b8 v[0:1], v0, off
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: amdgpu_cs_inreg_v8i1:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_and_b32 s6, s6, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s5, s5, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s4, s4, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s2, s2, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s1, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s7, s7, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s6, s6, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s2, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX1250-FAKE16-NEXT: s_and_b32 s4, s4, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s2, s4, s5
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s2, 4
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 15
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX1250-FAKE16-NEXT: global_store_b8 v[0:1], v0, off
+; GFX1250-FAKE16-NEXT: s_endpgm
store <8 x i1> %arg0, ptr addrspace(1) poison
ret void
}
@@ -4192,113 +4298,242 @@ define amdgpu_cs void @amdgpu_cs_inreg_v16i1(<16 x i1> inreg %arg0) {
; VI-NEXT: flat_store_short v[0:1], v0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: amdgpu_cs_inreg_v16i1:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s10, s10, 1
-; GFX11-NEXT: s_lshl_b32 s9, s9, 1
-; GFX11-NEXT: s_and_b32 s8, s8, 1
-; GFX11-NEXT: s_and_b32 s6, s6, 1
-; GFX11-NEXT: s_lshl_b32 s5, s5, 1
-; GFX11-NEXT: s_and_b32 s4, s4, 1
-; GFX11-NEXT: s_and_b32 s2, s2, 1
-; GFX11-NEXT: s_lshl_b32 s1, s1, 1
-; GFX11-NEXT: s_and_b32 s0, s0, 1
-; GFX11-NEXT: s_and_b32 s14, s14, 1
-; GFX11-NEXT: s_lshl_b32 s13, s13, 1
-; GFX11-NEXT: s_and_b32 s12, s12, 1
-; GFX11-NEXT: s_lshl_b32 s11, s11, 3
-; GFX11-NEXT: s_lshl_b32 s10, s10, 2
-; GFX11-NEXT: s_or_b32 s8, s8, s9
-; GFX11-NEXT: s_lshl_b32 s7, s7, 3
-; GFX11-NEXT: s_lshl_b32 s6, s6, 2
-; GFX11-NEXT: s_or_b32 s4, s4, s5
-; GFX11-NEXT: s_lshl_b32 s3, s3, 3
-; GFX11-NEXT: s_lshl_b32 s2, s2, 2
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_lshl_b32 s15, s15, 3
-; GFX11-NEXT: s_lshl_b32 s14, s14, 2
-; GFX11-NEXT: s_or_b32 s12, s12, s13
-; GFX11-NEXT: s_or_b32 s9, s11, s10
-; GFX11-NEXT: s_and_b32 s8, s8, 3
-; GFX11-NEXT: s_or_b32 s5, s7, s6
-; GFX11-NEXT: s_and_b32 s4, s4, 3
-; GFX11-NEXT: s_or_b32 s1, s3, s2
-; GFX11-NEXT: s_and_b32 s0, s0, 3
-; GFX11-NEXT: s_or_b32 s13, s15, s14
-; GFX11-NEXT: s_and_b32 s12, s12, 3
-; GFX11-NEXT: s_or_b32 s8, s8, s9
-; GFX11-NEXT: s_or_b32 s2, s4, s5
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_or_b32 s10, s12, s13
-; GFX11-NEXT: s_and_b32 s8, s8, 15
-; GFX11-NEXT: s_lshl_b32 s1, s2, 4
-; GFX11-NEXT: s_and_b32 s0, s0, 15
-; GFX11-NEXT: s_lshl_b32 s9, s10, 12
-; GFX11-NEXT: s_lshl_b32 s2, s8, 8
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_or_b32 s1, s9, s2
-; GFX11-NEXT: s_and_b32 s0, s0, 0xff
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: amdgpu_cs_inreg_v16i1:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s14 :: v_dual_mov_b32 v1, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v3, s12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_lshlrev_b32 v2, 1, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s11 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 1, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s6 :: v_dual_lshlrev_b32 v3, 3, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 1, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s0 :: v_dual_and_b32 v6, 1, v7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s7 :: v_dual_lshlrev_b32 v4, 2, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 1, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 3, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_and_b32 v7, 1, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_and_b32 v11, 1, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 1, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 1, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 1, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 2, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 2, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 3, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 3, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 3, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 3, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v8, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 15, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 12, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 4, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 15, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xff, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-TRUE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: amdgpu_cs_inreg_v16i1:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_and_b32 s10, s10, 1
-; GFX1250-NEXT: s_lshl_b32 s9, s9, 1
-; GFX1250-NEXT: s_and_b32 s8, s8, 1
-; GFX1250-NEXT: s_and_b32 s6, s6, 1
-; GFX1250-NEXT: s_lshl_b32 s5, s5, 1
-; GFX1250-NEXT: s_and_b32 s4, s4, 1
-; GFX1250-NEXT: s_and_b32 s2, s2, 1
-; GFX1250-NEXT: s_lshl_b32 s1, s1, 1
-; GFX1250-NEXT: s_and_b32 s0, s0, 1
-; GFX1250-NEXT: s_and_b32 s14, s14, 1
-; GFX1250-NEXT: s_lshl_b32 s13, s13, 1
-; GFX1250-NEXT: s_and_b32 s12, s12, 1
-; GFX1250-NEXT: s_lshl_b32 s11, s11, 3
-; GFX1250-NEXT: s_lshl_b32 s10, s10, 2
-; GFX1250-NEXT: s_or_b32 s8, s8, s9
-; GFX1250-NEXT: s_lshl_b32 s7, s7, 3
-; GFX1250-NEXT: s_lshl_b32 s6, s6, 2
-; GFX1250-NEXT: s_or_b32 s4, s4, s5
-; GFX1250-NEXT: s_lshl_b32 s3, s3, 3
-; GFX1250-NEXT: s_lshl_b32 s2, s2, 2
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_lshl_b32 s15, s15, 3
-; GFX1250-NEXT: s_lshl_b32 s14, s14, 2
-; GFX1250-NEXT: s_or_b32 s12, s12, s13
-; GFX1250-NEXT: s_or_b32 s9, s11, s10
-; GFX1250-NEXT: s_and_b32 s8, s8, 3
-; GFX1250-NEXT: s_or_b32 s5, s7, s6
-; GFX1250-NEXT: s_and_b32 s4, s4, 3
-; GFX1250-NEXT: s_or_b32 s1, s3, s2
-; GFX1250-NEXT: s_and_b32 s0, s0, 3
-; GFX1250-NEXT: s_or_b32 s13, s15, s14
-; GFX1250-NEXT: s_and_b32 s12, s12, 3
-; GFX1250-NEXT: s_or_b32 s8, s8, s9
-; GFX1250-NEXT: s_or_b32 s2, s4, s5
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_or_b32 s10, s12, s13
-; GFX1250-NEXT: s_and_b32 s8, s8, 15
-; GFX1250-NEXT: s_lshl_b32 s1, s2, 4
-; GFX1250-NEXT: s_and_b32 s0, s0, 15
-; GFX1250-NEXT: s_lshl_b32 s9, s10, 12
-; GFX1250-NEXT: s_lshl_b32 s2, s8, 8
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_or_b32 s1, s9, s2
-; GFX1250-NEXT: s_and_b32 s0, s0, 0xff
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: v_mov_b32_e32 v0, s0
-; GFX1250-NEXT: global_store_b16 v[0:1], v0, off
-; GFX1250-NEXT: s_endpgm
+; GFX11-FAKE16-LABEL: amdgpu_cs_inreg_v16i1:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s10, s10, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s6, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s14, s14, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s13, s13, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s12, s12, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s10, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s6, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s14, s14, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s12, s12, s13
+; GFX11-FAKE16-NEXT: s_or_b32 s9, s11, s10
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s13, s15, s14
+; GFX11-FAKE16-NEXT: s_and_b32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s10, s12, s13
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, 15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 4
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s10, 12
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s8, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s9, s2
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-FAKE16-NEXT: s_endpgm
+;
+; GFX1250-TRUE16-LABEL: amdgpu_cs_inreg_v16i1:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s14 :: v_dual_mov_b32 v1, s15
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v6, s9
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_bitop2_b32 v0, 1, v0 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v4, s10
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v1, 3, v1 :: v_dual_mov_b32 v9, s2
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v10, s1 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v2, 1, v2 :: v_dual_bitop2_b32 v3, 1, v3 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, s11 :: v_dual_bitop2_b32 v4, 1, v4 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_bitop2_b32 v0, v1, v0 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v9, 1, v9
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v3, 3, v5 :: v_dual_bitop2_b32 v2, v3, v2 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 2, v4 :: v_dual_lshlrev_b32 v5, 1, v6
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v7, s7 :: v_dual_bitop2_b32 v6, 1, v7 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v8, s6 :: v_dual_bitop2_b32 v3, v3, v4 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_bitop2_b32 v5, v6, v5 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v6, 3, v7 :: v_dual_bitop2_b32 v7, 1, v8 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v8, s4 :: v_dual_lshlrev_b32 v4, 1, v4
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v11, s0 :: v_dual_bitop2_b32 v1, 3, v2 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v9, 2, v9 :: v_dual_bitop2_b32 v8, 1, v8 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v7, 2, v7 :: v_dual_bitop2_b32 v0, v1, v0 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v10, 1, v10 :: v_dual_bitop2_b32 v5, 3, v5 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v11, 1, v11
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v4, v8, v4
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v0, 12, v0 :: v_dual_bitop2_b32 v2, v5, v3 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 3, v12
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v4, 3, v4
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v1, 15, v2
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v1, 8, v1 :: v_dual_bitop2_b32 v3, v4, v6 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v10, v11, v10
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v2, 4, v3 :: v_dual_bitop2_b32 v0, v0, v1 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v8, 3, v10
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v4, v8, v7
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v3, 15, v4
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v1, 0xff, v2
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX1250-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: amdgpu_cs_inreg_v16i1:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_and_b32 s10, s10, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s9, s9, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s8, s8, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s6, s6, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s5, s5, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s4, s4, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s2, s2, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s1, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s14, s14, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s13, s13, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s12, s12, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s11, s11, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s10, s10, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s7, s7, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s6, s6, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s2, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s15, s15, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s14, s14, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s12, s12, s13
+; GFX1250-FAKE16-NEXT: s_or_b32 s9, s11, s10
+; GFX1250-FAKE16-NEXT: s_and_b32 s8, s8, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX1250-FAKE16-NEXT: s_and_b32 s4, s4, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s13, s15, s14
+; GFX1250-FAKE16-NEXT: s_and_b32 s12, s12, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX1250-FAKE16-NEXT: s_or_b32 s2, s4, s5
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_or_b32 s10, s12, s13
+; GFX1250-FAKE16-NEXT: s_and_b32 s8, s8, 15
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s2, 4
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 15
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s9, s10, 12
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s8, 8
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_or_b32 s1, s9, s2
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX1250-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
+; GFX1250-FAKE16-NEXT: s_endpgm
store <16 x i1> %arg0, ptr addrspace(1) poison
ret void
}
@@ -4504,209 +4739,453 @@ define amdgpu_cs void @amdgpu_cs_inreg_v32i1(<32 x i1> inreg %arg0) {
; VI-NEXT: flat_store_dword v[0:1], v0
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: amdgpu_cs_inreg_v32i1:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s10, s10, 1
-; GFX11-NEXT: s_lshl_b32 s9, s9, 1
-; GFX11-NEXT: s_and_b32 s8, s8, 1
-; GFX11-NEXT: s_and_b32 s14, s14, 1
-; GFX11-NEXT: s_lshl_b32 s13, s13, 1
-; GFX11-NEXT: s_and_b32 s12, s12, 1
-; GFX11-NEXT: s_lshl_b32 s11, s11, 3
-; GFX11-NEXT: s_lshl_b32 s10, s10, 2
-; GFX11-NEXT: s_or_b32 s8, s8, s9
-; GFX11-NEXT: s_and_b32 s6, s6, 1
-; GFX11-NEXT: s_lshl_b32 s5, s5, 1
-; GFX11-NEXT: s_and_b32 s4, s4, 1
-; GFX11-NEXT: s_and_b32 s2, s2, 1
-; GFX11-NEXT: s_lshl_b32 s1, s1, 1
-; GFX11-NEXT: s_and_b32 s0, s0, 1
-; GFX11-NEXT: s_lshl_b32 s15, s15, 3
-; GFX11-NEXT: s_lshl_b32 s14, s14, 2
-; GFX11-NEXT: s_or_b32 s12, s12, s13
-; GFX11-NEXT: s_or_b32 s9, s11, s10
-; GFX11-NEXT: s_and_b32 s8, s8, 3
-; GFX11-NEXT: s_lshl_b32 s7, s7, 3
-; GFX11-NEXT: s_lshl_b32 s6, s6, 2
-; GFX11-NEXT: s_or_b32 s4, s4, s5
-; GFX11-NEXT: s_lshl_b32 s3, s3, 3
-; GFX11-NEXT: s_lshl_b32 s2, s2, 2
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_or_b32 s13, s15, s14
-; GFX11-NEXT: s_and_b32 s12, s12, 3
-; GFX11-NEXT: s_or_b32 s8, s8, s9
-; GFX11-NEXT: s_or_b32 s5, s7, s6
-; GFX11-NEXT: s_and_b32 s4, s4, 3
-; GFX11-NEXT: s_or_b32 s1, s3, s2
-; GFX11-NEXT: s_and_b32 s0, s0, 3
-; GFX11-NEXT: s_or_b32 s10, s12, s13
-; GFX11-NEXT: s_and_b32 s8, s8, 15
-; GFX11-NEXT: s_or_b32 s2, s4, s5
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_lshl_b32 s9, s10, 12
-; GFX11-NEXT: s_lshl_b32 s1, s2, 4
-; GFX11-NEXT: s_and_b32 s0, s0, 15
-; GFX11-NEXT: s_lshl_b32 s2, s8, 8
-; GFX11-NEXT: s_and_b32 s3, s30, 1
-; GFX11-NEXT: s_lshl_b32 s4, s29, 1
-; GFX11-NEXT: s_and_b32 s5, s28, 1
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_or_b32 s1, s9, s2
-; GFX11-NEXT: s_lshl_b32 s2, s31, 3
-; GFX11-NEXT: s_lshl_b32 s3, s3, 2
-; GFX11-NEXT: s_or_b32 s4, s5, s4
-; GFX11-NEXT: s_and_b32 s5, s26, 1
-; GFX11-NEXT: s_lshl_b32 s6, s25, 1
-; GFX11-NEXT: s_and_b32 s7, s24, 1
-; GFX11-NEXT: s_or_b32 s2, s2, s3
-; GFX11-NEXT: s_and_b32 s3, s4, 3
-; GFX11-NEXT: s_lshl_b32 s4, s27, 3
-; GFX11-NEXT: s_lshl_b32 s5, s5, 2
-; GFX11-NEXT: s_or_b32 s6, s7, s6
-; GFX11-NEXT: s_or_b32 s4, s4, s5
-; GFX11-NEXT: s_and_b32 s5, s6, 3
-; GFX11-NEXT: s_or_b32 s2, s3, s2
-; GFX11-NEXT: s_or_b32 s3, s5, s4
-; GFX11-NEXT: s_and_b32 s5, s22, 1
-; GFX11-NEXT: s_lshl_b32 s6, s21, 1
-; GFX11-NEXT: s_and_b32 s7, s20, 1
-; GFX11-NEXT: s_lshl_b32 s4, s23, 3
-; GFX11-NEXT: s_lshl_b32 s5, s5, 2
-; GFX11-NEXT: s_or_b32 s6, s7, s6
-; GFX11-NEXT: s_and_b32 s7, s18, 1
-; GFX11-NEXT: s_lshl_b32 s8, s17, 1
-; GFX11-NEXT: s_and_b32 s9, s16, 1
-; GFX11-NEXT: s_or_b32 s4, s4, s5
-; GFX11-NEXT: s_and_b32 s5, s6, 3
-; GFX11-NEXT: s_lshl_b32 s6, s19, 3
-; GFX11-NEXT: s_lshl_b32 s7, s7, 2
-; GFX11-NEXT: s_or_b32 s8, s9, s8
-; GFX11-NEXT: s_or_b32 s6, s6, s7
-; GFX11-NEXT: s_and_b32 s7, s8, 3
-; GFX11-NEXT: s_or_b32 s4, s5, s4
-; GFX11-NEXT: s_or_b32 s5, s7, s6
-; GFX11-NEXT: s_and_b32 s3, s3, 15
-; GFX11-NEXT: s_lshl_b32 s4, s4, 4
-; GFX11-NEXT: s_and_b32 s5, s5, 15
-; GFX11-NEXT: s_lshl_b32 s2, s2, 12
-; GFX11-NEXT: s_lshl_b32 s3, s3, 8
-; GFX11-NEXT: s_or_b32 s4, s5, s4
-; GFX11-NEXT: s_and_b32 s0, s0, 0xff
-; GFX11-NEXT: s_or_b32 s2, s2, s3
-; GFX11-NEXT: s_and_b32 s3, s4, 0xff
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_or_b32 s1, s3, s2
-; GFX11-NEXT: s_and_b32 s0, s0, 0xffff
-; GFX11-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: global_store_b32 v[0:1], v0, off
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: amdgpu_cs_inreg_v32i1:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s14 :: v_dual_mov_b32 v1, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v3, s12
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v8, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 1, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_and_b32 v3, 1, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s9 :: v_dual_and_b32 v9, 1, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 3, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 2, v3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s16 :: v_dual_lshlrev_b32 v4, 1, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 1, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v6, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 1, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 1, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 2, v2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s24 :: v_dual_lshlrev_b32 v8, 1, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s18 :: v_dual_and_b32 v4, 3, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 2, v7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s25 :: v_dual_and_b32 v1, 15, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 12, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s31
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s30 :: v_dual_mov_b32 v8, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s27 :: v_dual_mov_b32 v12, s22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s28 :: v_dual_and_b32 v4, 3, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 1, v8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_and_b32 v13, 1, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s29 :: v_dual_and_b32 v4, 1, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 1, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 2, v8
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s19
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 1, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 1, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 1, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 2, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 3, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 2, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 3, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 1, v10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_and_b32 v10, 1, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 3, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v10, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 3, v11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_and_b32 v11, 1, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_and_b32 v9, 3, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 2, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 1, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 4, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 1, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 15, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 3, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 15, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 3, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v12, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 3, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 12, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 8, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xff, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 4, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 15, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: global_store_b32 v[0:1], v0, off
+; GFX11-TRUE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: amdgpu_cs_inreg_v32i1:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_and_b32 s10, s10, 1
-; GFX1250-NEXT: s_lshl_b32 s9, s9, 1
-; GFX1250-NEXT: s_and_b32 s8, s8, 1
-; GFX1250-NEXT: s_and_b32 s14, s14, 1
-; GFX1250-NEXT: s_lshl_b32 s13, s13, 1
-; GFX1250-NEXT: s_and_b32 s12, s12, 1
-; GFX1250-NEXT: s_lshl_b32 s11, s11, 3
-; GFX1250-NEXT: s_lshl_b32 s10, s10, 2
-; GFX1250-NEXT: s_or_b32 s8, s8, s9
-; GFX1250-NEXT: s_and_b32 s6, s6, 1
-; GFX1250-NEXT: s_lshl_b32 s5, s5, 1
-; GFX1250-NEXT: s_and_b32 s4, s4, 1
-; GFX1250-NEXT: s_and_b32 s2, s2, 1
-; GFX1250-NEXT: s_lshl_b32 s1, s1, 1
-; GFX1250-NEXT: s_and_b32 s0, s0, 1
-; GFX1250-NEXT: s_lshl_b32 s15, s15, 3
-; GFX1250-NEXT: s_lshl_b32 s14, s14, 2
-; GFX1250-NEXT: s_or_b32 s12, s12, s13
-; GFX1250-NEXT: s_or_b32 s9, s11, s10
-; GFX1250-NEXT: s_and_b32 s8, s8, 3
-; GFX1250-NEXT: s_lshl_b32 s7, s7, 3
-; GFX1250-NEXT: s_lshl_b32 s6, s6, 2
-; GFX1250-NEXT: s_or_b32 s4, s4, s5
-; GFX1250-NEXT: s_lshl_b32 s3, s3, 3
-; GFX1250-NEXT: s_lshl_b32 s2, s2, 2
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_or_b32 s13, s15, s14
-; GFX1250-NEXT: s_and_b32 s12, s12, 3
-; GFX1250-NEXT: s_or_b32 s8, s8, s9
-; GFX1250-NEXT: s_or_b32 s5, s7, s6
-; GFX1250-NEXT: s_and_b32 s4, s4, 3
-; GFX1250-NEXT: s_or_b32 s1, s3, s2
-; GFX1250-NEXT: s_and_b32 s0, s0, 3
-; GFX1250-NEXT: s_or_b32 s10, s12, s13
-; GFX1250-NEXT: s_and_b32 s8, s8, 15
-; GFX1250-NEXT: s_or_b32 s2, s4, s5
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_lshl_b32 s9, s10, 12
-; GFX1250-NEXT: s_lshl_b32 s1, s2, 4
-; GFX1250-NEXT: s_and_b32 s0, s0, 15
-; GFX1250-NEXT: s_lshl_b32 s2, s8, 8
-; GFX1250-NEXT: s_and_b32 s3, s30, 1
-; GFX1250-NEXT: s_lshl_b32 s4, s29, 1
-; GFX1250-NEXT: s_and_b32 s5, s28, 1
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_or_b32 s1, s9, s2
-; GFX1250-NEXT: s_lshl_b32 s2, s31, 3
-; GFX1250-NEXT: s_lshl_b32 s3, s3, 2
-; GFX1250-NEXT: s_or_b32 s4, s5, s4
-; GFX1250-NEXT: s_and_b32 s5, s26, 1
-; GFX1250-NEXT: s_lshl_b32 s6, s25, 1
-; GFX1250-NEXT: s_and_b32 s7, s24, 1
-; GFX1250-NEXT: s_or_b32 s2, s2, s3
-; GFX1250-NEXT: s_and_b32 s3, s4, 3
-; GFX1250-NEXT: s_lshl_b32 s4, s27, 3
-; GFX1250-NEXT: s_lshl_b32 s5, s5, 2
-; GFX1250-NEXT: s_or_b32 s6, s7, s6
-; GFX1250-NEXT: s_or_b32 s4, s4, s5
-; GFX1250-NEXT: s_and_b32 s5, s6, 3
-; GFX1250-NEXT: s_or_b32 s2, s3, s2
-; GFX1250-NEXT: s_or_b32 s3, s5, s4
-; GFX1250-NEXT: s_and_b32 s5, s22, 1
-; GFX1250-NEXT: s_lshl_b32 s6, s21, 1
-; GFX1250-NEXT: s_and_b32 s7, s20, 1
-; GFX1250-NEXT: s_lshl_b32 s4, s23, 3
-; GFX1250-NEXT: s_lshl_b32 s5, s5, 2
-; GFX1250-NEXT: s_or_b32 s6, s7, s6
-; GFX1250-NEXT: s_and_b32 s7, s18, 1
-; GFX1250-NEXT: s_lshl_b32 s8, s17, 1
-; GFX1250-NEXT: s_and_b32 s9, s16, 1
-; GFX1250-NEXT: s_or_b32 s4, s4, s5
-; GFX1250-NEXT: s_and_b32 s5, s6, 3
-; GFX1250-NEXT: s_lshl_b32 s6, s19, 3
-; GFX1250-NEXT: s_lshl_b32 s7, s7, 2
-; GFX1250-NEXT: s_or_b32 s8, s9, s8
-; GFX1250-NEXT: s_or_b32 s6, s6, s7
-; GFX1250-NEXT: s_and_b32 s7, s8, 3
-; GFX1250-NEXT: s_or_b32 s4, s5, s4
-; GFX1250-NEXT: s_or_b32 s5, s7, s6
-; GFX1250-NEXT: s_and_b32 s3, s3, 15
-; GFX1250-NEXT: s_lshl_b32 s4, s4, 4
-; GFX1250-NEXT: s_and_b32 s5, s5, 15
-; GFX1250-NEXT: s_lshl_b32 s2, s2, 12
-; GFX1250-NEXT: s_lshl_b32 s3, s3, 8
-; GFX1250-NEXT: s_or_b32 s4, s5, s4
-; GFX1250-NEXT: s_and_b32 s0, s0, 0xff
-; GFX1250-NEXT: s_or_b32 s2, s2, s3
-; GFX1250-NEXT: s_and_b32 s3, s4, 0xff
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: s_or_b32 s1, s3, s2
-; GFX1250-NEXT: s_and_b32 s0, s0, 0xffff
-; GFX1250-NEXT: s_lshl_b32 s1, s1, 16
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1250-NEXT: s_or_b32 s0, s0, s1
-; GFX1250-NEXT: v_mov_b32_e32 v0, s0
-; GFX1250-NEXT: global_store_b32 v[0:1], v0, off
-; GFX1250-NEXT: s_endpgm
+; GFX11-FAKE16-LABEL: amdgpu_cs_inreg_v32i1:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s10, s10, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s14, s14, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s13, s13, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s12, s12, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s11, s11, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s10, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s6, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s15, s15, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s14, s14, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s12, s12, s13
+; GFX11-FAKE16-NEXT: s_or_b32 s9, s11, s10
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s6, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s13, s15, s14
+; GFX11-FAKE16-NEXT: s_and_b32 s12, s12, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s10, s12, s13
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s8, 15
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s10, 12
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 4
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s8, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s30, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s29, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s28, 1
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s9, s2
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s31, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s26, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s25, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s7, s24, 1
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s4, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s27, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s6, s7, s6
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s6, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s2
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s5, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s22, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s21, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s7, s20, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s23, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s6, s7, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s7, s18, 1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s8, s17, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s9, s16, 1
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s6, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s19, 3
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 2
+; GFX11-FAKE16-NEXT: s_or_b32 s8, s9, s8
+; GFX11-FAKE16-NEXT: s_or_b32 s6, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s7, s8, 3
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, 15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 4
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s5, 15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 12
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s4, 0xff
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: global_store_b32 v[0:1], v0, off
+; GFX11-FAKE16-NEXT: s_endpgm
+;
+; GFX1250-TRUE16-LABEL: amdgpu_cs_inreg_v32i1:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s14 :: v_dual_mov_b32 v1, s15
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v14, s17
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v15, s16 :: v_dual_bitop2_b32 v0, 1, v0 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_lshlrev_b32 v1, 3, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v4, s10 :: v_dual_bitop2_b32 v3, 1, v3 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v0, 2, v0 :: v_dual_lshlrev_b32 v2, 1, v2
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s4
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_bitop2_b32 v0, v1, v0 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_bitop2_b32 v1, v3, v2 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v4, s9 :: v_dual_bitop2_b32 v3, 1, v4 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v5, 1, v5
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v2, 3, v2 :: v_dual_bitop2_b32 v1, 3, v1 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v3, 2, v3 :: v_dual_lshlrev_b32 v4, 1, v4
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v6, 1, v6
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v8, s1 :: v_dual_bitop2_b32 v0, v1, v0 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_bitop2_b32 v1, v2, v3 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v4, s7 :: v_dual_bitop2_b32 v3, v5, v4 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, s5 :: v_dual_bitop2_b32 v7, 1, v7 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 3, v4 :: v_dual_bitop2_b32 v3, 3, v3 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v5, 1, v5 :: v_dual_mov_b32 v9, s0
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v2, 2, v2 :: v_dual_lshlrev_b32 v0, 12, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_bitop2_b32 v5, v6, v5 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v8, 1, v8 :: v_dual_bitop2_b32 v9, 1, v9 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v2, v4, v2
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v5, 3, v6 :: v_dual_bitop2_b32 v4, 3, v5 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v6, 2, v7 :: v_dual_bitop2_b32 v7, v9, v8 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v1, 15, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v8, s26 :: v_dual_bitop2_b32 v2, v4, v2 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, s30 :: v_dual_bitop2_b32 v3, v5, v6 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v6, s31 :: v_dual_bitop2_b32 v4, 3, v7 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v7, s28 :: v_dual_lshlrev_b32 v2, 4, v2
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v9, s27 :: v_dual_bitop2_b32 v8, 1, v8 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v10, s25 :: v_dual_bitop2_b32 v3, v4, v3 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v6, 3, v6 :: v_dual_bitop2_b32 v4, 1, v5 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, s29 :: v_dual_bitop2_b32 v7, 1, v7 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v8, 2, v8 :: v_dual_mov_b32 v12, s22
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 2, v4 :: v_dual_lshlrev_b32 v5, 1, v5
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v11, s24 :: v_dual_bitop2_b32 v3, 15, v3 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v13, s18 :: v_dual_mov_b32 v16, s19
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v5, v7, v5
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v7, 3, v9 :: v_dual_lshlrev_b32 v9, 1, v10
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v11, s23 :: v_dual_bitop2_b32 v10, 1, v11 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v14, 1, v14 :: v_dual_bitop2_b32 v13, 1, v13 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v8, s21 :: v_dual_bitop2_b32 v7, v7, v8 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v10, 3, v11 :: v_dual_bitop2_b32 v9, v10, v9 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v12, s20 :: v_dual_bitop2_b32 v11, 1, v12 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v8, 1, v8 :: v_dual_bitop2_b32 v15, 1, v15 bitop3:0x40
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v9, 3, v9
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v4, v6, v4
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v11, 2, v11 :: v_dual_bitop2_b32 v12, 1, v12 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v5, 3, v5
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v1, 8, v1 :: v_dual_bitop2_b32 v6, v9, v7 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v8, v12, v8
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v12, 3, v16 :: v_dual_lshlrev_b32 v13, 2, v13
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v14, v15, v14
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v10, v10, v11
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v4, v5, v4
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v5, 15, v6
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v8, 3, v8
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v11, v12, v13
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v12, 3, v14
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v3, 12, v4 :: v_dual_bitop2_b32 v2, v3, v2 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 8, v5 :: v_dual_bitop2_b32 v7, v8, v10 bitop3:0x54
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v8, v12, v11
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v1, 0xff, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v6, 4, v7 :: v_dual_bitop2_b32 v2, v3, v4 bitop3:0x54
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v7, 15, v8
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v5, v7, v6
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v3, 0xff, v5
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v1, v3, v2
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX1250-TRUE16-NEXT: global_store_b32 v[0:1], v0, off
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: amdgpu_cs_inreg_v32i1:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_and_b32 s10, s10, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s9, s9, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s8, s8, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s14, s14, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s13, s13, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s12, s12, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s11, s11, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s10, s10, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX1250-FAKE16-NEXT: s_and_b32 s6, s6, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s5, s5, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s4, s4, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s2, s2, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s1, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s15, s15, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s14, s14, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s12, s12, s13
+; GFX1250-FAKE16-NEXT: s_or_b32 s9, s11, s10
+; GFX1250-FAKE16-NEXT: s_and_b32 s8, s8, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s7, s7, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s6, s6, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s3, s3, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s2, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_or_b32 s13, s15, s14
+; GFX1250-FAKE16-NEXT: s_and_b32 s12, s12, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s8, s8, s9
+; GFX1250-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX1250-FAKE16-NEXT: s_and_b32 s4, s4, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s10, s12, s13
+; GFX1250-FAKE16-NEXT: s_and_b32 s8, s8, 15
+; GFX1250-FAKE16-NEXT: s_or_b32 s2, s4, s5
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s9, s10, 12
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s2, 4
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 15
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s8, 8
+; GFX1250-FAKE16-NEXT: s_and_b32 s3, s30, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s4, s29, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s5, s28, 1
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_or_b32 s1, s9, s2
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s31, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s3, s3, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s5, s4
+; GFX1250-FAKE16-NEXT: s_and_b32 s5, s26, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s6, s25, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s7, s24, 1
+; GFX1250-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX1250-FAKE16-NEXT: s_and_b32 s3, s4, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s4, s27, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s5, s5, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s6, s7, s6
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX1250-FAKE16-NEXT: s_and_b32 s5, s6, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s2, s3, s2
+; GFX1250-FAKE16-NEXT: s_or_b32 s3, s5, s4
+; GFX1250-FAKE16-NEXT: s_and_b32 s5, s22, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s6, s21, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s7, s20, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s4, s23, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s5, s5, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s6, s7, s6
+; GFX1250-FAKE16-NEXT: s_and_b32 s7, s18, 1
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s8, s17, 1
+; GFX1250-FAKE16-NEXT: s_and_b32 s9, s16, 1
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX1250-FAKE16-NEXT: s_and_b32 s5, s6, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s6, s19, 3
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s7, s7, 2
+; GFX1250-FAKE16-NEXT: s_or_b32 s8, s9, s8
+; GFX1250-FAKE16-NEXT: s_or_b32 s6, s6, s7
+; GFX1250-FAKE16-NEXT: s_and_b32 s7, s8, 3
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s5, s4
+; GFX1250-FAKE16-NEXT: s_or_b32 s5, s7, s6
+; GFX1250-FAKE16-NEXT: s_and_b32 s3, s3, 15
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s4, s4, 4
+; GFX1250-FAKE16-NEXT: s_and_b32 s5, s5, 15
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s2, s2, 12
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s3, s3, 8
+; GFX1250-FAKE16-NEXT: s_or_b32 s4, s5, s4
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX1250-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX1250-FAKE16-NEXT: s_and_b32 s3, s4, 0xff
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: s_or_b32 s1, s3, s2
+; GFX1250-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX1250-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX1250-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX1250-FAKE16-NEXT: global_store_b32 v[0:1], v0, off
+; GFX1250-FAKE16-NEXT: s_endpgm
store <32 x i1> %arg0, ptr addrspace(1) poison
ret void
}
diff --git a/llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll b/llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
index e95de144525cc7..d4d7b1c4d56575 100644
--- a/llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
@@ -219,34 +219,19 @@ define amdgpu_kernel void @extract_vector_elt_v3f16(ptr addrspace(1) %out, <3 x
; VI-NEXT: buffer_store_short v0, off, s[4:7], 0 offset:2
; VI-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: extract_vector_elt_v3f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0
-; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: buffer_store_b16 v1, off, s[4:7], 0
-; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 offset:2
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: extract_vector_elt_v3f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
-; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0
-; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0
-; GFX11-FAKE16-NEXT: buffer_store_b16 v1, off, s[4:7], 0 offset:2
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: extract_vector_elt_v3f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-NEXT: s_mov_b32 s7, 0x31016000
+; GFX11-NEXT: s_mov_b32 s6, -1
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: s_mov_b32 s4, s0
+; GFX11-NEXT: s_mov_b32 s5, s1
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: buffer_store_b16 v0, off, s[4:7], 0
+; GFX11-NEXT: buffer_store_b16 v1, off, s[4:7], 0 offset:2
+; GFX11-NEXT: s_endpgm
%p0 = extractelement <3 x half> %foo, i32 0
%p1 = extractelement <3 x half> %foo, i32 2
%out1 = getelementptr half, ptr addrspace(1) %out, i32 1
@@ -287,35 +272,20 @@ define amdgpu_kernel void @dynamic_extract_vector_elt_v3f16(ptr addrspace(1) %ou
; VI-NEXT: buffer_store_short v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: dynamic_extract_vector_elt_v3f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s6, 4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[2:3], s4
-; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: dynamic_extract_vector_elt_v3f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s6, 4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[2:3], s4
-; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
-; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: dynamic_extract_vector_elt_v3f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_lshl_b32 s4, s6, 4
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], s4
+; GFX11-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-NEXT: s_mov_b32 s2, -1
+; GFX11-NEXT: buffer_store_b16 v0, off, s[0:3], 0
+; GFX11-NEXT: s_endpgm
%p0 = extractelement <3 x half> %foo, i32 %idx
%out1 = getelementptr half, ptr addrspace(1) %out, i32 1
store half %p0, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/fabs.bf16.ll b/llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
index be4d3e4c0fcdb5..2e68a5326fad74 100644
--- a/llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
@@ -51,30 +51,17 @@ define amdgpu_kernel void @s_fabs_free_bf16(ptr addrspace(1) %out, i16 %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fabs_free_bf16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fabs_free_bf16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fabs_free_bf16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_and_b32 s2, s2, 0x7fff
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%bc= bitcast i16 %in to bfloat
%fabs = call bfloat @llvm.fabs.bf16(bfloat %bc)
store bfloat %fabs, ptr addrspace(1) %out
@@ -123,30 +110,17 @@ define amdgpu_kernel void @s_fabs_bf16(ptr addrspace(1) %out, bfloat %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fabs_bf16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fabs_bf16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fabs_bf16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_and_b32 s2, s2, 0x7fff
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%fabs = call bfloat @llvm.fabs.bf16(bfloat %in)
store bfloat %fabs, ptr addrspace(1) %out
ret void
@@ -269,23 +243,41 @@ define amdgpu_kernel void @s_fabs_v4bf16(ptr addrspace(1) %out, <4 x bfloat> %in
; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-LABEL: s_fabs_v4bf16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s4, s3, 0x7fff
-; GFX11-NEXT: s_lshr_b32 s3, s3, 16
-; GFX11-NEXT: s_lshr_b32 s5, s2, 16
-; GFX11-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-NEXT: s_and_b32 s5, s5, 0x7fff
-; GFX11-NEXT: s_and_b32 s3, s3, 0x7fff
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s5
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s4, s3
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX11-NEXT: v_mov_b32_e32 v0, s2
-; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: s_fabs_v4bf16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s5, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e64 v0, 0x7fff, s2
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s3, s4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: s_fabs_v4bf16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s3, 0x7fff
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s5, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, 0x7fff
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s4, s3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX11-FAKE16-NEXT: s_endpgm
%fabs = call <4 x bfloat> @llvm.fabs.v4bf16(<4 x bfloat> %in)
store <4 x bfloat> %fabs, ptr addrspace(1) %out
ret void
@@ -616,37 +608,37 @@ define amdgpu_kernel void @v_fabs_fold_self_v2bf16(ptr addrspace(1) %out, ptr ad
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: global_load_b32 v2, v0, s[2:3]
+; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[2:3]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0x7fff, v2.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0x7fff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0x7fff, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_mul_f32 v1, v1, v2 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v3
+; GFX11-TRUE16-NEXT: v_dual_mul_f32 v0, v2, v0 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v1, v1, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
-; GFX11-TRUE16-NEXT: global_store_b32 v2, v1, s[0:1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
+; GFX11-TRUE16-NEXT: global_store_b32 v2, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: v_fabs_fold_self_v2bf16:
@@ -804,38 +796,39 @@ define amdgpu_kernel void @v_fabs_fold_v2bf16(ptr addrspace(1) %out, ptr addrspa
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]
+; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[2:3]
; GFX11-TRUE16-NEXT: s_and_b32 s2, s4, 0xffff0000
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0x7fff, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0x7fff, v1.l
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v0, s2, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v1, s2, v1
; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s4, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v1, s2, v1
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v0, s2, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_cndmask_b32 v1, v3, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
-; GFX11-TRUE16-NEXT: global_store_b32 v2, v1, s[0:1]
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
+; GFX11-TRUE16-NEXT: global_store_b32 v2, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: v_fabs_fold_v2bf16:
diff --git a/llvm/test/CodeGen/AMDGPU/fabs.f16.ll b/llvm/test/CodeGen/AMDGPU/fabs.f16.ll
index 2cb7c5d8690822..026168b78e8a0e 100644
--- a/llvm/test/CodeGen/AMDGPU/fabs.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fabs.f16.ll
@@ -51,30 +51,17 @@ define amdgpu_kernel void @s_fabs_free_f16(ptr addrspace(1) %out, i16 %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fabs_free_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fabs_free_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fabs_free_f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_and_b32 s2, s2, 0x7fff
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%bc= bitcast i16 %in to half
%fabs = call half @llvm.fabs.f16(half %bc)
store half %fabs, ptr addrspace(1) %out
@@ -123,30 +110,17 @@ define amdgpu_kernel void @s_fabs_f16(ptr addrspace(1) %out, half %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fabs_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fabs_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fabs_f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_and_b32 s2, s2, 0x7fff
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%fabs = call half @llvm.fabs.f16(half %in)
store half %fabs, ptr addrspace(1) %out
ret void
diff --git a/llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll b/llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
index 04632801c6ed14..05a6c4cbec8288 100644
--- a/llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
@@ -95,7 +95,7 @@ define bfloat @v_copysign_bf16_s_bf16(bfloat %mag, bfloat inreg %sign) {
; GFX11TRUE16-LABEL: v_copysign_bf16_s_bf16:
; GFX11TRUE16: ; %bb.0:
; GFX11TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
; GFX11TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -151,7 +151,7 @@ define bfloat @v_copysign_s_bf16_bf16(bfloat inreg %mag, bfloat %sign) {
; GFX11TRUE16-LABEL: v_copysign_s_bf16_bf16:
; GFX11TRUE16: ; %bb.0:
; GFX11TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v1, s0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
; GFX11TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -363,10 +363,9 @@ define amdgpu_ps i32 @s_copysign_bf16_bf16(bfloat inreg %mag, bfloat inreg %sign
;
; GFX11TRUE16-LABEL: s_copysign_bf16_bf16:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s1
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
+; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
; GFX11TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -435,7 +434,7 @@ define amdgpu_ps i32 @s_copysign_bf16_f32(bfloat inreg %mag, float inreg %sign.f
;
; GFX11TRUE16-LABEL: s_copysign_bf16_f32:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11TRUE16-NEXT: v_lshrrev_b32_e64 v1, 16, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
@@ -508,7 +507,7 @@ define amdgpu_ps i32 @s_copysign_bf16_f64(bfloat inreg %mag, double inreg %sign.
;
; GFX11TRUE16-LABEL: s_copysign_bf16_f64:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11TRUE16-NEXT: v_lshrrev_b32_e64 v1, 16, s2
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
@@ -579,10 +578,9 @@ define amdgpu_ps i32 @s_copysign_bf16_f16(bfloat inreg %mag, half inreg %sign.f1
;
; GFX11TRUE16-LABEL: s_copysign_bf16_f16:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s1
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
+; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
; GFX11TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -715,6 +713,7 @@ define amdgpu_ps i32 @s_copysign_f32_bf16(float inreg %mag, bfloat inreg %sign.b
;
; GFX11TRUE16-LABEL: s_copysign_f32_bf16:
; GFX11TRUE16: ; %bb.0:
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s1
; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s0, v0
@@ -827,10 +826,9 @@ define amdgpu_ps i32 @s_copysign_f16_bf16(half inreg %mag, bfloat inreg %sign.bf
;
; GFX11TRUE16-LABEL: s_copysign_f16_bf16:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s1
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
+; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
; GFX11TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -963,6 +961,7 @@ define amdgpu_ps <2 x i32> @s_copysign_f64_bf16(double inreg %mag, bfloat inreg
;
; GFX11TRUE16-LABEL: s_copysign_f64_bf16:
; GFX11TRUE16: ; %bb.0:
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s2
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s1, v0
@@ -2851,6 +2850,7 @@ define amdgpu_ps i32 @s_copysign_out_f32_mag_f32_sign_bf16(float inreg %mag, bfl
;
; GFX11TRUE16-LABEL: s_copysign_out_f32_mag_f32_sign_bf16:
; GFX11TRUE16: ; %bb.0:
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s1
; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s0, v0
@@ -2918,6 +2918,7 @@ define amdgpu_ps <2 x i32> @s_copysign_out_f64_mag_f64_sign_bf16(double inreg %m
;
; GFX11TRUE16-LABEL: s_copysign_out_f64_mag_f64_sign_bf16:
; GFX11TRUE16: ; %bb.0:
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s2
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s1, v0
@@ -2981,7 +2982,7 @@ define amdgpu_ps i16 @s_copysign_out_bf16_mag_bf16_sign_f32(bfloat inreg %mag, f
;
; GFX11TRUE16-LABEL: s_copysign_out_bf16_mag_bf16_sign_f32:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11TRUE16-NEXT: v_lshrrev_b32_e64 v1, 16, s1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
@@ -3045,7 +3046,7 @@ define amdgpu_ps i16 @s_copysign_out_bf16_mag_bf16_sign_f64(bfloat inreg %mag, d
;
; GFX11TRUE16-LABEL: s_copysign_out_bf16_mag_bf16_sign_f64:
; GFX11TRUE16: ; %bb.0:
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11TRUE16-NEXT: v_lshrrev_b32_e64 v1, 16, s2
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
@@ -3140,14 +3141,13 @@ define amdgpu_ps i16 @s_copysign_out_bf16_mag_f32_sign_bf16(float inreg %mag, bf
; GFX11TRUE16-NEXT: s_add_i32 s2, s2, s0
; GFX11TRUE16-NEXT: s_bitset1_b32 s0, 22
; GFX11TRUE16-NEXT: s_addk_i32 s2, 0x7fff
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.l, s1
; GFX11TRUE16-NEXT: s_and_b32 s3, s3, exec_lo
; GFX11TRUE16-NEXT: s_cselect_b32 s0, s0, s2
; GFX11TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11TRUE16-NEXT: s_lshr_b32 s0, s0, 16
-; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
+; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX11TRUE16-NEXT: ; return to shader part epilog
;
@@ -4158,13 +4158,15 @@ define amdgpu_ps <2 x i32> @s_copysign_out_v2f32_mag_v2f32_sign_v2bf16(<2 x floa
; GFX11TRUE16-LABEL: s_copysign_out_v2f32_mag_v2f32_sign_v2bf16:
; GFX11TRUE16: ; %bb.0:
; GFX11TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s2
; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.h, s3
-; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s0, v0
-; GFX11TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v1
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s1, v1
; GFX11TRUE16-NEXT: ; return to shader part epilog
;
@@ -4257,13 +4259,15 @@ define amdgpu_ps <4 x i32> @s_copysign_out_v2f64_mag_v2f64_sign_v2bf16(<2 x doub
; GFX11TRUE16-LABEL: s_copysign_out_v2f64_mag_v2f64_sign_v2bf16:
; GFX11TRUE16: ; %bb.0:
; GFX11TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11TRUE16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
; GFX11TRUE16-NEXT: v_mov_b16_e32 v0.h, s4
; GFX11TRUE16-NEXT: v_mov_b16_e32 v1.h, s5
-; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s1, v0
-; GFX11TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s3, v1
; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s3, v1
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s1, v0
+; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11TRUE16-NEXT: v_readfirstlane_b32 s3, v1
; GFX11TRUE16-NEXT: ; return to shader part epilog
;
@@ -7329,10 +7333,18 @@ define amdgpu_ps i32 @s_copysign_bf16_0_bf16(bfloat inreg %sign) {
; GFX10-NEXT: s_and_b32 s0, s0, 0x8000
; GFX10-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_copysign_bf16_0_bf16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11TRUE16-LABEL: s_copysign_bf16_0_bf16:
+; GFX11TRUE16: ; %bb.0:
+; GFX11TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11FAKE16-LABEL: s_copysign_bf16_0_bf16:
+; GFX11FAKE16: ; %bb.0:
+; GFX11FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11FAKE16-NEXT: ; return to shader part epilog
%op = call bfloat @llvm.copysign.bf16(bfloat 0.0, bfloat %sign)
%cast = bitcast bfloat %op to i16
%zext = zext i16 %cast to i32
@@ -7683,7 +7695,7 @@ define bfloat @v_copysign_bf16_0_f64(double %sign) {
; GFX11TRUE16-LABEL: v_copysign_bf16_0_f64:
; GFX11TRUE16: ; %bb.0:
; GFX11TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11TRUE16-NEXT: v_and_b16 v0.l, 0x8000, v1.h
+; GFX11TRUE16-NEXT: v_and_b16 v0.l, 0x8000, v1.l
; GFX11TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11FAKE16-LABEL: v_copysign_bf16_0_f64:
diff --git a/llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll b/llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
index 9db4987fc82108..b6d9f3becb4a03 100644
--- a/llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
@@ -41,10 +41,9 @@ define amdgpu_ps i16 @s_copysign_f16(half inreg %mag, half inreg %sign) {
;
; GFX11-TRUE16-LABEL: s_copysign_f16:
; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
+; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-TRUE16-NEXT: ; return to shader part epilog
;
@@ -76,10 +75,18 @@ define amdgpu_ps i16 @s_test_copysign_f16_0(half inreg %mag) {
; GFX9-NEXT: s_and_b32 s0, s0, 0x7fff
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_0:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x7fff
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_0:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_0:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half %mag, half 0.0)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -101,10 +108,18 @@ define amdgpu_ps i16 @s_test_copysign_f16_1(half inreg %mag) {
; GFX9-NEXT: s_and_b32 s0, s0, 0x7fff
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_1:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x7fff
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_1:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_1:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half %mag, half 1.0)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -126,10 +141,18 @@ define amdgpu_ps i16 @s_test_copysign_f16_10.0(half inreg %mag) {
; GFX9-NEXT: s_and_b32 s0, s0, 0x7fff
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_10.0:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x7fff
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_10.0:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_10.0:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half %mag, half 10.0)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -151,10 +174,18 @@ define amdgpu_ps i16 @s_test_copysign_f16_neg1(half inreg %mag) {
; GFX9-NEXT: s_bitset1_b32 s0, 15
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_neg1:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_bitset1_b32 s0, 15
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_neg1:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s0, 15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_neg1:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s0, 15
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half %mag, half -1.0)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -176,10 +207,18 @@ define amdgpu_ps i16 @s_test_copysign_f16_neg10(half inreg %mag) {
; GFX9-NEXT: s_bitset1_b32 s0, 15
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_neg10:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_bitset1_b32 s0, 15
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_neg10:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s0, 15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_neg10:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s0, 15
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half %mag, half -10.0)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -201,10 +240,18 @@ define amdgpu_ps i16 @s_test_copysign_f16_0_mag(half inreg %sign) {
; GFX9-NEXT: s_and_b32 s0, s0, 0x8000
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_0_mag:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_0_mag:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_0_mag:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half 0.0, half %sign)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -230,12 +277,22 @@ define amdgpu_ps i16 @s_test_copysign_f16_1_mag(half inreg %sign) {
; GFX9-NEXT: s_or_b32 s0, s0, 0x3c00
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_1_mag:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, 0x3c00
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_1_mag:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x3c00, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_1_mag:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, 0x3c00
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half 1.0, half %sign)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -266,14 +323,23 @@ define i16 @s_test_copysign_f16_10_mag(half inreg %sign) {
; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: s_test_copysign_f16_10_mag:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, 0x4900
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_10_mag:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x4900, v0
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_10_mag:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, 0x4900
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%result = call half @llvm.copysign.f16(half 10.0, half %sign)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -298,12 +364,22 @@ define amdgpu_ps i16 @s_test_copysign_f16_neg1_mag(half inreg %sign) {
; GFX9-NEXT: s_or_b32 s0, s0, 0x3c00
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_neg1_mag:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, 0x3c00
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_neg1_mag:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x3c00, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_neg1_mag:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, 0x3c00
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half -1.0, half %sign)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -328,12 +404,22 @@ define amdgpu_ps i16 @s_test_copysign_f16_neg10_mag(half inreg %sign) {
; GFX9-NEXT: s_or_b32 s0, s0, 0x4900
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_test_copysign_f16_neg10_mag:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, 0x4900
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_test_copysign_f16_neg10_mag:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x4900, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_test_copysign_f16_neg10_mag:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, 0x4900
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%result = call half @llvm.copysign.f16(half -10.0, half %sign)
%cast = bitcast half %result to i16
ret i16 %cast
@@ -1220,7 +1306,7 @@ define amdgpu_ps i16 @s_copysign_out_f16_mag_f64_sign_f16(double inreg %mag, hal
; GFX11-TRUE16-LABEL: s_copysign_out_f16_mag_f64_sign_f16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_and_b32 s3, s1, 0x1ff
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_or_b32 s0, s3, s0
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, 1, 0
; GFX11-TRUE16-NEXT: s_bfe_u32 s3, s1, 0xb0014
@@ -1262,8 +1348,8 @@ define amdgpu_ps i16 @s_copysign_out_f16_mag_f64_sign_f16(double inreg %mag, hal
; GFX11-TRUE16-NEXT: s_cmpk_eq_i32 s3, 0x40f
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, s0, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-TRUE16-NEXT: ; return to shader part epilog
@@ -2475,6 +2561,7 @@ define amdgpu_ps i32 @s_copysign_out_f32_mag_f32_sign_f16(float inreg %mag, half
;
; GFX11-TRUE16-LABEL: s_copysign_out_f32_mag_f32_sign_f16:
; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s0, v0
@@ -2524,6 +2611,7 @@ define amdgpu_ps <2 x i32> @s_copysign_out_f64_mag_f64_sign_f16(double inreg %ma
;
; GFX11-TRUE16-LABEL: s_copysign_out_f64_mag_f64_sign_f16:
; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, s2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s1, v0
@@ -2572,7 +2660,7 @@ define amdgpu_ps i16 @s_copysign_out_f16_mag_f16_sign_f32(half inreg %mag, float
;
; GFX11-TRUE16-LABEL: s_copysign_out_f16_mag_f16_sign_f32:
; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e64 v1, 16, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
@@ -2621,7 +2709,7 @@ define amdgpu_ps i16 @s_copysign_out_f16_mag_f16_sign_f64(half inreg %mag, doubl
;
; GFX11-TRUE16-LABEL: s_copysign_out_f16_mag_f16_sign_f64:
; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e64 v1, 16, s2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
@@ -2671,10 +2759,10 @@ define amdgpu_ps i16 @s_copysign_out_f16_mag_f32_sign_f16(float inreg %mag, half
;
; GFX11-TRUE16-LABEL: s_copysign_out_f16_mag_f32_sign_f16:
; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s1
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v1.l, s0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v0, v1
+; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fff, v1, v0
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-TRUE16-NEXT: ; return to shader part epilog
;
@@ -3596,13 +3684,15 @@ define amdgpu_ps <2 x i32> @s_copysign_out_v2f32_mag_v2f32_sign_v2f16(<2 x float
; GFX11-TRUE16-LABEL: s_copysign_out_v2f32_mag_v2f32_sign_v2f16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, s2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, s3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s0, v0
-; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v1
; GFX11-TRUE16-NEXT: ; return to shader part epilog
;
@@ -3670,13 +3760,15 @@ define amdgpu_ps <4 x i32> @s_copysign_out_v2f64_mag_v2f64_sign_v2f16(<2 x doubl
; GFX11-TRUE16-LABEL: s_copysign_out_v2f64_mag_v2f64_sign_v2f16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s4, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, s4
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, s5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0x7fffffff, s1, v0
-; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s3, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0x7fffffff, s3, v1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v1
; GFX11-TRUE16-NEXT: ; return to shader part epilog
;
@@ -6639,10 +6731,18 @@ define amdgpu_ps i32 @s_copysign_f16_0_f16(half inreg %sign) {
; GFX9-NEXT: s_and_b32 s0, s0, 0x8000
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_copysign_f16_0_f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_copysign_f16_0_f16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_copysign_f16_0_f16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%op = call half @llvm.copysign.f16(half 0.0, half %sign)
%cast = bitcast half %op to i16
%zext = zext i16 %cast to i32
@@ -7017,7 +7117,7 @@ define half @v_copysign_f16_0_f64(double %sign) {
; GFX11-TRUE16-LABEL: v_copysign_f16_0_f64:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0x8000, v1.h
+; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0x8000, v1.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_copysign_f16_0_f64:
diff --git a/llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll b/llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
index e3eb35ad15effb..15b4717ec152bb 100644
--- a/llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
@@ -999,8 +999,8 @@ define amdgpu_kernel void @s_test_copysign_f32_fpext_f16(ptr addrspace(1) %out,
; GFX11-LABEL: s_test_copysign_f32_fpext_f16:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-NEXT: v_mov_b32_e32 v1, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s3
; GFX11-NEXT: v_mov_b16_e32 v0.h, s3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_bfi_b32 v0, 0x7fffffff, s2, v0
@@ -1094,8 +1094,8 @@ define amdgpu_kernel void @s_test_copysign_f32_fpext_bf16(ptr addrspace(1) %out,
; GFX11-LABEL: s_test_copysign_f32_fpext_bf16:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-NEXT: v_mov_b32_e32 v1, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s3
; GFX11-NEXT: v_mov_b16_e32 v0.h, s3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_bfi_b32 v0, 0x7fffffff, s2, v0
diff --git a/llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll b/llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
index 819d4e289b4a94..ae9f7fb24bc61c 100644
--- a/llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
@@ -374,6 +374,7 @@ define amdgpu_kernel void @s_test_copysign_f64_f16(ptr addrspace(1) %out, [8 x i
; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24
; GFX11-NEXT: v_mov_b32_e32 v2, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s6
; GFX11-NEXT: v_mov_b16_e32 v0.h, s6
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v0
diff --git a/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll b/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
index 24caf99bd41110..ea528b694966f9 100644
--- a/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
@@ -29,11 +29,11 @@ define amdgpu_kernel void @f_copy_sign (ptr addrspace(1) %a, ptr addrspace(1) %b
; GFX11-REAL16-NEXT: [[V_LSHLREV_B32_e64_:%[0-9]+]]:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 killed [[S_MOV_B32_1]], killed [[V_AND_B32_e64_]], implicit $exec
; GFX11-REAL16-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 killed [[REG_SEQUENCE]], [[V_LSHLREV_B32_e64_]], 0, 0, implicit $exec :: (load (s16) from %ir.in.gep1, addrspace 1)
; GFX11-REAL16-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_1:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 killed [[REG_SEQUENCE1]], [[V_LSHLREV_B32_e64_]], 0, 0, implicit $exec :: (load (s16) from %ir.in.gep2, addrspace 1)
- ; GFX11-REAL16-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
- ; GFX11-REAL16-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
+ ; GFX11-REAL16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GFX11-REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GFX11-REAL16-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_1]], %subreg.lo16, [[DEF]], %subreg.hi16
- ; GFX11-REAL16-NEXT: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
- ; GFX11-REAL16-NEXT: [[DEF3:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
+ ; GFX11-REAL16-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GFX11-REAL16-NEXT: [[DEF3:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GFX11-REAL16-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, [[DEF2]], %subreg.hi16
; GFX11-REAL16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 32767
; GFX11-REAL16-NEXT: [[V_BFI_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFI_B32_e64 killed [[S_MOV_B32_2]], killed [[REG_SEQUENCE4]], killed [[REG_SEQUENCE3]], implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir
index 236b85ad3f2ba5..2c5312f1571440 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir
+++ b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir
@@ -8,7 +8,9 @@ body: |
; GCN-LABEL: name: v_s_exp_f16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_EXP_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_EXP_F16_t16_e64 1, [[V_CVT_F32_U32_e64_]].lo16, 1, 1, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_EXP_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_CVT_F32_U32_e64 %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:sreg_32 = COPY %1:vgpr_32
@@ -22,7 +24,9 @@ body: |
; GCN-LABEL: name: v_s_log_f16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_LOG_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_LOG_F16_t16_e64 1, [[V_CVT_F32_U32_e64_]].lo16, 1, 1, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_LOG_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_CVT_F32_U32_e64 %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:sreg_32 = COPY %1:vgpr_32
@@ -36,7 +40,9 @@ body: |
; GCN-LABEL: name: v_s_rcp_f16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_RCP_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_RCP_F16_t16_e64 1, [[V_CVT_F32_U32_e64_]].lo16, 1, 1, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_RCP_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_CVT_F32_U32_e64 %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:sreg_32 = COPY %1:vgpr_32
@@ -50,7 +56,9 @@ body: |
; GCN-LABEL: name: v_s_rsq_f16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_RSQ_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_RSQ_F16_t16_e64 1, [[V_CVT_F32_U32_e64_]].lo16, 1, 1, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_RSQ_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_CVT_F32_U32_e64 %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:sreg_32 = COPY %1:vgpr_32
@@ -64,7 +72,9 @@ body: |
; GCN-LABEL: name: v_s_sqrt_f16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_SQRT_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_SQRT_F16_t16_e64 1, [[V_CVT_F32_U32_e64_]].lo16, 1, 1, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_SQRT_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_CVT_F32_U32_e64 %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:sreg_32 = COPY %1:vgpr_32
diff --git a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
index 6c96be0860b432..703fc602b58c2b 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
+++ b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
@@ -9,9 +9,8 @@ body: |
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[DEF]], 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_U16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
- ; GCN-NEXT: [[V_CMP_LT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LT_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_CVT_F16_U16_t16_e64_]]
+ ; GCN-NEXT: [[V_CMP_LT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LT_F16_t16_e64 0, killed [[COPY]].lo16, 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, killed [[V_CMP_LT_F16_t16_e64_]], implicit $exec
%0:vgpr_16 = IMPLICIT_DEF
%1:sreg_32 = IMPLICIT_DEF
@@ -29,10 +28,9 @@ body: |
; GCN-LABEL: name: cvt_hi_f32_f16
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[DEF]], 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_U16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]]
- ; GCN-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_F16_t16_e64 0, [[COPY]].hi16, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_CVT_F16_U16_t16_e64_]]
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]]
+ ; GCN-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_F16_t16_e64 0, [[COPY1]].hi16, 0, 0, 0, implicit $mode, implicit $exec
%0:vgpr_16 = IMPLICIT_DEF
%1:vgpr_16 = V_CVT_F16_U16_t16_e64 0, %0:vgpr_16, 0, 0, 0, implicit $mode, implicit $exec
%2:sreg_32 = COPY %1:vgpr_16
@@ -46,9 +44,8 @@ body: |
; GCN-LABEL: name: s_or_b32
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[DEF]], 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_U16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_CVT_F16_U16_t16_e64_]]
+ ; GCN-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY]], implicit $exec
; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_1:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[V_OR_B32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec
%0:vgpr_16 = IMPLICIT_DEF
%1:vgpr_16 = V_CVT_F16_U16_t16_e64 0, %0:vgpr_16, 0, 0, 0, implicit $mode, implicit $exec
@@ -63,8 +60,8 @@ body: |
bb.0:
; GCN-LABEL: name: salu16_usedby_salu32
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[DEF]], implicit $exec
%0:vgpr_32 = IMPLICIT_DEF
@@ -79,8 +76,8 @@ body: |
bb.0:
; GCN-LABEL: name: salu16_usedby_valu32
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[DEF]], implicit-def $scc, implicit $exec
%0:vgpr_32 = IMPLICIT_DEF
@@ -95,11 +92,11 @@ body: |
bb.0:
; GCN-LABEL: name: salu16_src0_usedby_valu32
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
- ; GCN-NEXT: V_CMP_LT_F32_e32 [[REG_SEQUENCE]], [[DEF1]], implicit-def $vcc_lo, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
+ ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
+ ; GCN-NEXT: V_CMP_LT_F32_e32 [[REG_SEQUENCE]], [[DEF2]], implicit-def $vcc_lo, implicit $mode, implicit $exec
%0:vgpr_32 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_32
%2:sreg_32 = S_TRUNC_F16 %1:sreg_32, implicit $mode
@@ -114,7 +111,9 @@ body: |
; GCN-LABEL: name: salu32_usedby_salu16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[DEF]], [[DEF]], implicit $exec
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[V_XOR_B32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_32
%2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc
@@ -141,9 +140,10 @@ body: |
bb.0:
; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_salu16
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[COPY]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_16 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_16
%2:sreg_32 = S_TRUNC_F16 %1:sreg_32, implicit $mode
@@ -155,9 +155,8 @@ body: |
bb.0:
; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_salu32
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
+ ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY]], implicit $exec
%0:vgpr_16 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_16
%2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc
@@ -181,9 +180,8 @@ body: |
bb.0:
; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_valu32
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
+ ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY]], implicit $exec
%0:vgpr_16 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_16
%2:vgpr_32 = V_XOR_B32_e64 %1:sreg_32, %1:sreg_32, implicit $exec
@@ -262,11 +260,11 @@ body: |
bb.0:
; GCN-LABEL: name: S_FMAC_F16
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF2]], %subreg.hi16
- ; GCN-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_FMAC_F16_t16_e64 0, [[REG_SEQUENCE1]].lo16, 0, [[REG_SEQUENCE1]].lo16, 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_FMAC_F16_t16_e64 0, [[COPY1]].lo16, 0, [[COPY1]].lo16, 0, [[COPY]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FMAC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
%0:vgpr_16 = IMPLICIT_DEF
%1:sgpr_lo16 = COPY %0:vgpr_16
%2:sreg_32 = COPY %0:vgpr_16
@@ -280,17 +278,14 @@ body: |
bb.0:
; GCN-LABEL: name: legalize_with_multi_user
; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[V_ADD_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ADD_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 1, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[V_ADD_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ADD_F16_t16_e64 0, [[COPY]].lo16, 0, 1, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ADD_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF3:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ADD_F16_t16_e64_]], %subreg.lo16, [[DEF3]], %subreg.hi16
- ; GCN-NEXT: [[V_PK_FMA_F16_:%[0-9]+]]:vgpr_32 = V_PK_FMA_F16 11, [[S_MOV_B32_]], 0, [[REG_SEQUENCE1]], 8, [[DEF2]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[DEF4:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ADD_F16_t16_e64_]], %subreg.lo16, [[DEF4]], %subreg.hi16
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE2]], [[S_MOV_B32_]], implicit $exec
+ ; GCN-NEXT: [[V_PK_FMA_F16_:%[0-9]+]]:vgpr_32 = V_PK_FMA_F16 11, [[S_MOV_B32_]], 0, [[REG_SEQUENCE]], 8, [[DEF2]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[S_MOV_B32_]], implicit $exec
%0:vgpr_16 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_16
%2:sreg_32 = S_ADD_F16 %1:sreg_32, 1, implicit $mode
@@ -430,8 +425,10 @@ body: |
bb.0:
; GCN-LABEL: name: s_pack_ll_b32_b16_use_SALU16
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
+ ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GCN-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_FMAC_F16_t16_e64 0, [[DEF]].lo16, 0, [[DEF]].lo16, 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FMAC_F16_t16_e64_]], %subreg.lo16, [[DEF]].lo16, %subreg.hi16
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FMAC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
+ ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[REG_SEQUENCE]].lo16, %subreg.lo16, [[DEF]].lo16, %subreg.hi16
%0:vgpr_32 = IMPLICIT_DEF
%1:sreg_32 = COPY %0:vgpr_32
%2:sreg_32 = S_FMAC_F16 %1:sreg_32, %1:sreg_32, %1:sreg_32, implicit $mode
diff --git a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
index 195b0e4acd6ec3..bb6d8f31d1b6dc 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
+++ b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
@@ -11,7 +11,9 @@ body: |
; REAL16-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
; REAL16-NEXT: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
; REAL16-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; REAL16-NEXT: [[DEF3:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; REAL16-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_FMAC_F16_t16_e64 0, killed [[DEF1]], 0, [[DEF2]], 0, [[V_CVT_F32_U32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FMAC_F16_t16_e64_]], %subreg.lo16, [[DEF3]], %subreg.hi16
;
; FAKE16-LABEL: name: fmac_f16
; FAKE16: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
@@ -34,7 +36,9 @@ body: |
; REAL16-LABEL: name: ceil_f16
; REAL16: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; REAL16-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; REAL16-NEXT: [[V_CEIL_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CEIL_F16_t16_e64 0, [[V_CVT_F32_U32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CEIL_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
;
; FAKE16-LABEL: name: ceil_f16
; FAKE16: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
@@ -53,7 +57,9 @@ body: |
; REAL16-LABEL: name: floor_f16
; REAL16: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; REAL16-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[DEF]], 0, 0, implicit $mode, implicit $exec
+ ; REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; REAL16-NEXT: [[V_FLOOR_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_FLOOR_F16_t16_e64 0, [[V_CVT_F32_U32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FLOOR_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
;
; FAKE16-LABEL: name: floor_f16
; FAKE16: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
index 109127df9a5332..30e151343cac7f 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
@@ -25,11 +25,10 @@ define i32 @test_cvt_pk_fp8_f32(float %x, float %y) {
; CHECK-NEXT: [[S_MUL_I32_:%[0-9]+]]:sreg_32 = S_MUL_I32 killed [[S_AND_B32_]], [[S_MOV_B32_1]]
; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 killed [[S_MUL_I32_]], [[S_MOV_B32_1]], implicit-def dead $scc
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[S_ADD_I32_]]
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY3]].lo16
- ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY4]]
- ; CHECK-NEXT: [[V_CVT_PK_FP8_F32_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_PK_FP8_F32_t16_e64 0, [[COPY1]], 0, [[COPY]], [[COPY5]], 0, implicit $mode, implicit $exec
- ; CHECK-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY3]].hi16
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[V_CVT_PK_FP8_F32_t16_e64_]], %subreg.lo16, killed [[COPY6]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[COPY3]].lo16
+ ; CHECK-NEXT: [[V_CVT_PK_FP8_F32_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_PK_FP8_F32_t16_e64 0, [[COPY1]], 0, [[COPY]], [[COPY4]], 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY3]].hi16
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[V_CVT_PK_FP8_F32_t16_e64_]], %subreg.lo16, killed [[COPY5]], %subreg.hi16
; CHECK-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 killed [[REG_SEQUENCE]], killed [[S_MOV_B32_2]], implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
@@ -83,11 +82,10 @@ define i32 @test_cvt_pk_fp8_f32_e5m3(float %x, float %y) {
; CHECK-NEXT: [[S_MUL_I32_:%[0-9]+]]:sreg_32 = S_MUL_I32 killed [[S_AND_B32_]], [[S_MOV_B32_1]]
; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 killed [[S_MUL_I32_]], [[S_MOV_B32_1]], implicit-def dead $scc
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[S_ADD_I32_]]
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY3]].lo16
- ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY4]]
- ; CHECK-NEXT: [[V_CVT_PK_FP8_F32_gfx1250_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_PK_FP8_F32_gfx1250_t16_e64 0, [[COPY1]], 0, [[COPY]], -1, [[COPY5]], 0, implicit $mode, implicit $exec
- ; CHECK-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY3]].hi16
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[V_CVT_PK_FP8_F32_gfx1250_t16_e64_]], %subreg.lo16, killed [[COPY6]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[COPY3]].lo16
+ ; CHECK-NEXT: [[V_CVT_PK_FP8_F32_gfx1250_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_PK_FP8_F32_gfx1250_t16_e64 0, [[COPY1]], 0, [[COPY]], -1, [[COPY4]], 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY3]].hi16
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[V_CVT_PK_FP8_F32_gfx1250_t16_e64_]], %subreg.lo16, killed [[COPY5]], %subreg.hi16
; CHECK-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 killed [[REG_SEQUENCE]], killed [[S_MOV_B32_2]], implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/flat_atomics.ll b/llvm/test/CodeGen/AMDGPU/flat_atomics.ll
index 232a170b7b2b3a..6932e65c0f8230 100644
--- a/llvm/test/CodeGen/AMDGPU/flat_atomics.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat_atomics.ll
@@ -8193,12 +8193,12 @@ define amdgpu_kernel void @atomic_store_i8_offset(i8 %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_i8_offset:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b8 v[1:2], v0 offset:16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b8 v[0:1], v2 offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_i8_offset:
@@ -8254,12 +8254,12 @@ define amdgpu_kernel void @atomic_store_i8(i8 %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_i8:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b8 v[1:2], v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b8 v[0:1], v2
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_i8:
@@ -8329,9 +8329,10 @@ define amdgpu_kernel void @atomic_store_i8_addr64_offset(i8 %in, ptr %out, i64 %
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, s2
; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: flat_store_b8 v[1:2], v0 offset:16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b8 v[0:1], v2 offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_i8_addr64_offset:
@@ -8655,12 +8656,12 @@ define amdgpu_kernel void @atomic_store_i16_offset(i16 %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_i16_offset:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0 offset:16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2 offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_i16_offset:
@@ -8716,12 +8717,12 @@ define amdgpu_kernel void @atomic_store_i16(i16 %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_i16:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_i16:
@@ -8793,12 +8794,12 @@ define amdgpu_kernel void @atomic_store_i16_addr64_offset(i16 %in, ptr %out, i64
; GFX11-TRUE16-NEXT: s_load_b32 s4, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_lshl_b64 s[2:3], s[2:3], 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_u32 s0, s0, s2
; GFX11-TRUE16-NEXT: s_addc_u32 s1, s1, s3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s1
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0 offset:16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2 offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_i16_addr64_offset:
@@ -8863,12 +8864,12 @@ define amdgpu_kernel void @atomic_store_f16_offset(half %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_f16_offset:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0 offset:16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2 offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_f16_offset:
@@ -8924,12 +8925,12 @@ define amdgpu_kernel void @atomic_store_f16(half %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_f16:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_f16:
@@ -8984,12 +8985,12 @@ define amdgpu_kernel void @atomic_store_bf16_offset(bfloat %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_bf16_offset:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_bf16_offset:
@@ -9044,12 +9045,12 @@ define amdgpu_kernel void @atomic_store_bf16(bfloat %in, ptr %out) {
; GFX11-TRUE16-LABEL: atomic_store_bf16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: flat_store_b16 v[1:2], v0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: flat_store_b16 v[0:1], v2
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: atomic_store_bf16:
diff --git a/llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll b/llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
index 40c256b106a2a2..b64fb5022cdb83 100644
--- a/llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
+++ b/llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
@@ -1268,27 +1268,27 @@ define <8 x i1> @vector_f32_ole() {
; SDAG-GFX1150-LABEL: vector_f32_ole:
; SDAG-GFX1150: ; %bb.0: ; %entry
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v4, 16 :: v_dual_mov_b32 v5, 0
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0
; SDAG-GFX1150-NEXT: s_clause 0x1
-; SDAG-GFX1150-NEXT: global_load_b128 v[0:3], v[0:1], off
-; SDAG-GFX1150-NEXT: global_load_b128 v[4:7], v[4:5], off
+; SDAG-GFX1150-NEXT: global_load_b128 v[4:7], v[0:1], off
+; SDAG-GFX1150-NEXT: global_load_b128 v[0:3], v[2:3], off
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(1)
-; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v3
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0)
-; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v4
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v2
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v6
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v5
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v4
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0)
+; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v3
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v1
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v0
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v6
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v2
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v7
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_setpc_b64 s[30:31]
@@ -1341,34 +1341,34 @@ define <8 x i1> @vector_f32_ole() {
; SDAG-GFX1200-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX1200-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX1200-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v4, 16 :: v_dual_mov_b32 v5, 0
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0
; SDAG-GFX1200-NEXT: s_clause 0x1
-; SDAG-GFX1200-NEXT: global_load_b128 v[0:3], v[0:1], off
-; SDAG-GFX1200-NEXT: global_load_b128 v[4:7], v[4:5], off
+; SDAG-GFX1200-NEXT: global_load_b128 v[4:7], v[0:1], off
+; SDAG-GFX1200-NEXT: global_load_b128 v[0:3], v[2:3], off
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x1
-; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v3
+; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v6
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x0
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v5
+; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v4
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v2
-; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v5
+; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x0
+; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v3
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v1
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v0
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v6
+; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v2
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_ge_f32_e32 vcc_lo, 0, v7
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc_lo
@@ -1434,12 +1434,12 @@ define <4 x i1> @vector_f32_ogt() {
; SDAG-GFX1150-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
; SDAG-GFX1150-NEXT: global_load_b128 v[0:3], v[0:1], off
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0)
-; SDAG-GFX1150-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v1
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v0
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v2
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v0
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v1
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v3
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_setpc_b64 s[30:31]
@@ -1477,15 +1477,15 @@ define <4 x i1> @vector_f32_ogt() {
; SDAG-GFX1200-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
; SDAG-GFX1200-NEXT: global_load_b128 v[0:3], v[0:1], off
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x0
-; SDAG-GFX1200-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v1
+; SDAG-GFX1200-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v2
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v0
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v2
+; SDAG-GFX1200-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v1
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0, v3
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
@@ -1528,97 +1528,94 @@ define <32 x i1> @vector_f32_ueq() {
; SDAG-GFX1150-LABEL: vector_f32_ueq:
; SDAG-GFX1150: ; %bb.0: ; %entry
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v0, 48 :: v_dual_mov_b32 v1, 0
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v4, 64 :: v_dual_mov_b32 v5, 0
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v8, 32 :: v_dual_mov_b32 v9, 0
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v0, 0x70 :: v_dual_mov_b32 v1, 0
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v2, 0x60 :: v_dual_mov_b32 v3, 0
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v4, 0x50 :: v_dual_mov_b32 v5, 0
; SDAG-GFX1150-NEXT: s_clause 0x1
-; SDAG-GFX1150-NEXT: global_load_b128 v[0:3], v[0:1], off
+; SDAG-GFX1150-NEXT: global_load_b128 v[28:31], v[0:1], off
+; SDAG-GFX1150-NEXT: global_load_b128 v[0:3], v[2:3], off
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v8, 64 :: v_dual_mov_b32 v9, 0
; SDAG-GFX1150-NEXT: global_load_b128 v[4:7], v[4:5], off
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v12, 0x50 :: v_dual_mov_b32 v13, 0
-; SDAG-GFX1150-NEXT: s_clause 0x1
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v12, 48 :: v_dual_mov_b32 v13, 0
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v16, 32 :: v_dual_mov_b32 v17, 0
; SDAG-GFX1150-NEXT: global_load_b128 v[8:11], v[8:9], off
-; SDAG-GFX1150-NEXT: global_load_b128 v[20:23], v[12:13], off
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v12, 16 :: v_dual_mov_b32 v13, 0
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v14, 0x60 :: v_dual_mov_b32 v15, 0
-; SDAG-GFX1150-NEXT: s_clause 0x1
-; SDAG-GFX1150-NEXT: global_load_b128 v[27:30], v[12:13], off
-; SDAG-GFX1150-NEXT: global_load_b128 v[31:34], v[14:15], off
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, 0
-; SDAG-GFX1150-NEXT: v_dual_mov_b32 v14, 0x70 :: v_dual_mov_b32 v15, 0
-; SDAG-GFX1150-NEXT: s_clause 0x1
-; SDAG-GFX1150-NEXT: global_load_b128 v[35:38], v[12:13], off
-; SDAG-GFX1150-NEXT: global_load_b128 v[48:51], v[14:15], off
+; SDAG-GFX1150-NEXT: global_load_b128 v[12:15], v[12:13], off
+; SDAG-GFX1150-NEXT: global_load_b128 v[32:35], v[16:17], off
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v16, 16 :: v_dual_mov_b32 v17, 0
+; SDAG-GFX1150-NEXT: global_load_b128 v[36:39], v[16:17], off
+; SDAG-GFX1150-NEXT: v_dual_mov_b32 v16, 0 :: v_dual_mov_b32 v17, 0
+; SDAG-GFX1150-NEXT: global_load_b128 v[48:51], v[16:17], off
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(7)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v3
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v30
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v30, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v29
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v29, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v28
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v28, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(6)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v4
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v3
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v27, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v2
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v5
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v26, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v1
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v6
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v25, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v0
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v7
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v24, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(5)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v11
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(4)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v20
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v7
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v23, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v6
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v22, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v5
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v21, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v4
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v20, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(4)
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v11
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v10
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v21
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v21, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v9
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v22
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v22, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v8
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v23
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v23, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(3)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v30
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v15
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v14
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v13
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v12
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(2)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v31
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v24, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v29
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v32
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v25, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v28
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v33
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v26, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v27
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v35
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v34
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v27, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v33
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v32
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(1)
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v39
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v38
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0)
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v48
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v28, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v37
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v49
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v29, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v36
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0)
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v51
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v49
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v35
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v48
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v50
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v30, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v51
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v31
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v31, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_setpc_b64 s[30:31]
;
@@ -1773,128 +1770,125 @@ define <32 x i1> @vector_f32_ueq() {
; SDAG-GFX1200-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX1200-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX1200-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v0, 48 :: v_dual_mov_b32 v1, 0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v4, 64 :: v_dual_mov_b32 v5, 0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v8, 32 :: v_dual_mov_b32 v9, 0
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v0, 0x70 :: v_dual_mov_b32 v1, 0
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v2, 0x60 :: v_dual_mov_b32 v3, 0
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v4, 0x50 :: v_dual_mov_b32 v5, 0
; SDAG-GFX1200-NEXT: s_clause 0x1
-; SDAG-GFX1200-NEXT: global_load_b128 v[0:3], v[0:1], off
+; SDAG-GFX1200-NEXT: global_load_b128 v[28:31], v[0:1], off
+; SDAG-GFX1200-NEXT: global_load_b128 v[0:3], v[2:3], off
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v8, 64 :: v_dual_mov_b32 v9, 0
; SDAG-GFX1200-NEXT: global_load_b128 v[4:7], v[4:5], off
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v12, 0x50 :: v_dual_mov_b32 v13, 0
-; SDAG-GFX1200-NEXT: s_clause 0x1
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v12, 48 :: v_dual_mov_b32 v13, 0
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v16, 32 :: v_dual_mov_b32 v17, 0
; SDAG-GFX1200-NEXT: global_load_b128 v[8:11], v[8:9], off
-; SDAG-GFX1200-NEXT: global_load_b128 v[20:23], v[12:13], off
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v12, 16 :: v_dual_mov_b32 v13, 0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v14, 0x60 :: v_dual_mov_b32 v15, 0
-; SDAG-GFX1200-NEXT: s_clause 0x1
-; SDAG-GFX1200-NEXT: global_load_b128 v[27:30], v[12:13], off
-; SDAG-GFX1200-NEXT: global_load_b128 v[31:34], v[14:15], off
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, 0
-; SDAG-GFX1200-NEXT: v_dual_mov_b32 v14, 0x70 :: v_dual_mov_b32 v15, 0
-; SDAG-GFX1200-NEXT: s_clause 0x1
-; SDAG-GFX1200-NEXT: global_load_b128 v[35:38], v[12:13], off
-; SDAG-GFX1200-NEXT: global_load_b128 v[48:51], v[14:15], off
+; SDAG-GFX1200-NEXT: global_load_b128 v[12:15], v[12:13], off
+; SDAG-GFX1200-NEXT: global_load_b128 v[32:35], v[16:17], off
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v16, 16 :: v_dual_mov_b32 v17, 0
+; SDAG-GFX1200-NEXT: global_load_b128 v[36:39], v[16:17], off
+; SDAG-GFX1200-NEXT: v_dual_mov_b32 v16, 0 :: v_dual_mov_b32 v17, 0
+; SDAG-GFX1200-NEXT: global_load_b128 v[48:51], v[16:17], off
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x7
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v3
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v30
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v30, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v29
+; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v29, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v28
+; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v28, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x6
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v4
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v3
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v27, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v2
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v5
-; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v26, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v1
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v6
-; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v25, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v0
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v24, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x5
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v7
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x5
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v11
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v23, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v6
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x4
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v20
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v22, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v5
+; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v21, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v4
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v20, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v10
+; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x4
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v11
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v21
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v10
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v21, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v9
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v22
-; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v22, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v8
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v23
-; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v23, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x3
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v30
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v15
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x2
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v31
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v14
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v24, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v29
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v13
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v32
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v12
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v25, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v28
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x2
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v35
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v33
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v34
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v26, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v27
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v33
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v34
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v32
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v27, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x1
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v38
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v39
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x0
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v48
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v38
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v28, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v37
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v49
-; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v29, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v36
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x0
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v51
+; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v49
+; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v35
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v48
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v50
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v30, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v51
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v31
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v31, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: s_setpc_b64 s[30:31]
@@ -2071,12 +2065,12 @@ define <4 x i1> @vector_f32_ugt() {
; SDAG-GFX1150-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
; SDAG-GFX1150-NEXT: global_load_b128 v[0:3], v[0:1], off
; SDAG-GFX1150-NEXT: s_waitcnt vmcnt(0)
-; SDAG-GFX1150-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v1
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
-; SDAG-GFX1150-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v0
-; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v2
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v0
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; SDAG-GFX1150-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v1
+; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v3
; SDAG-GFX1150-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; SDAG-GFX1150-NEXT: s_setpc_b64 s[30:31]
@@ -2114,15 +2108,15 @@ define <4 x i1> @vector_f32_ugt() {
; SDAG-GFX1200-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
; SDAG-GFX1200-NEXT: global_load_b128 v[0:3], v[0:1], off
; SDAG-GFX1200-NEXT: s_wait_loadcnt 0x0
-; SDAG-GFX1200-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v1
+; SDAG-GFX1200-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v2
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v0
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; SDAG-GFX1200-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v2
+; SDAG-GFX1200-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v1
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
; SDAG-GFX1200-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v3
; SDAG-GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; SDAG-GFX1200-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
diff --git a/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll b/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
index d4288ae2362e70..8338806de8009a 100644
--- a/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
+++ b/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
@@ -518,11 +518,11 @@ define <3 x i8> @to_fp8_v3f16(<3 x half> %x) {
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v2.h, v1
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v2.l, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v2.h, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
; GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
@@ -780,11 +780,11 @@ define <3 x i8> @to_bf8_v3f16(<3 x half> %x) {
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v2.h, v1
; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v2.l, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
+; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v2.h, v1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
; GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll b/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
index 3aec6c15ee0c8c..9f8bbef48d20fa 100644
--- a/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
+++ b/llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
@@ -610,13 +610,13 @@ define <5 x i8> @to_fp8_v5f16(<5 x half> %x) {
; GFX1200-NEXT: s_wait_kmcnt 0x0
; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v3.l, v2.l
; GFX1200-NEXT: v_frexp_mant_f16_e32 v3.h, v2.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v2
; GFX1200-NEXT: v_lshrrev_b16 v4.l, 8, v2.l
; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v4.h, v1.l
; GFX1200-NEXT: v_sub_nc_u16 v5.l, 2, v3.l
; GFX1200-NEXT: v_and_b16 v5.h, 0x3ff, v3.h
; GFX1200-NEXT: v_and_b16 v6.l, v3.h, 63
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v14.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v13.l
; GFX1200-NEXT: v_lshrrev_b16 v3.h, 6, v3.h
; GFX1200-NEXT: v_min_u16 v5.l, v5.l, 15
; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v5.h
@@ -624,392 +624,383 @@ define <5 x i8> @to_fp8_v5f16(<5 x half> %x) {
; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v6.l
; GFX1200-NEXT: v_sub_nc_u16 v9.h, 2, v7.l
; GFX1200-NEXT: v_sub_nc_u16 v8.h, v5.l, 1 clamp
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v14.l
-; GFX1200-NEXT: v_and_b16 v10.h, v5.h, 1
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v13.l
+; GFX1200-NEXT: v_and_b16 v11.l, v5.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; GFX1200-NEXT: v_min_u16 v9.h, v9.h, 15
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
+; GFX1200-NEXT: v_lshrrev_b16 v10.h, v5.l, v8.l
; GFX1200-NEXT: v_lshlrev_b16 v9.l, v8.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v11.h, v5.l, v8.l
-; GFX1200-NEXT: v_and_b16 v6.l, 0x3ff, v6.h
-; GFX1200-NEXT: v_or_b16 v10.h, v11.l, v10.h
-; GFX1200-NEXT: v_sub_nc_u16 v11.l, v9.h, 1 clamp
-; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
-; GFX1200-NEXT: v_and_b16 v10.l, v6.h, 63
; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.l
-; GFX1200-NEXT: v_and_b16 v3.h, v3.h, v10.h
-; GFX1200-NEXT: v_lshlrev_b16 v10.h, v11.l, 1
+; GFX1200-NEXT: v_min_u16 v5.l, v9.h, 15
+; GFX1200-NEXT: v_or_b16 v11.l, v12.l, v11.l
+; GFX1200-NEXT: v_and_b16 v10.l, v6.h, 63
+; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
+; GFX1200-NEXT: v_and_b16 v6.l, 0x3ff, v6.h
+; GFX1200-NEXT: v_sub_nc_u16 v11.h, v5.l, 1 clamp
+; GFX1200-NEXT: v_and_b16 v3.h, v3.h, v11.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.l
; GFX1200-NEXT: v_and_b16 v9.l, v8.l, v9.l
-; GFX1200-NEXT: v_or_b16 v5.l, 0x400, v6.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v6.l
+; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v11.l, v11.h, 1
; GFX1200-NEXT: v_add_nc_u16 v3.h, v5.h, v3.h
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v10.h, -1
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, v8.h, v8.l
; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_and_b16 v9.l, v11.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, v8.h, v8.l
+; GFX1200-NEXT: v_and_b16 v9.l, v10.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v6.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.l, v5.l, v9.h
; GFX1200-NEXT: v_lshrrev_b16 v6.h, 6, v6.h
-; GFX1200-NEXT: v_and_b16 v5.h, v5.l, v5.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s0
; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v10.l
-; GFX1200-NEXT: v_and_b16 v10.l, v6.l, 1
; GFX1200-NEXT: v_and_b16 v4.l, 0x80, v4.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.h
-; GFX1200-NEXT: v_or_b16 v8.h, v12.l, v9.l
+; GFX1200-NEXT: v_sub_nc_u16 v7.h, 2, v4.h
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, s0
; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v3.h
-; GFX1200-NEXT: v_lshrrev_b16 v9.l, v9.h, v5.l
-; GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, s1
-; GFX1200-NEXT: v_and_b16 v8.l, v8.l, v8.h
-; GFX1200-NEXT: v_or_b16 v8.h, v13.l, v10.l
+; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v9.l
+; GFX1200-NEXT: v_add_nc_u16 v9.l, v11.l, -1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s0
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, v11.l, v5.l
-; GFX1200-NEXT: v_sub_nc_u16 v7.h, 2, v4.h
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v14.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s0
+; GFX1200-NEXT: v_and_b16 v5.l, v5.h, v8.h
+; GFX1200-NEXT: v_and_b16 v5.h, v9.h, v9.l
+; GFX1200-NEXT: v_and_b16 v8.h, v6.l, 1
+; GFX1200-NEXT: v_mov_b16_e32 v9.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.h, 0, v8.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v12.l
-; GFX1200-NEXT: v_and_b16 v8.l, v9.l, 1
-; GFX1200-NEXT: v_mov_b16_e32 v12.l, v15.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v11.h, v5.h
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, v6.h
+; GFX1200-NEXT: v_cndmask_b16 v5.l, 0, v5.l, vcc_lo
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.h
+; GFX1200-NEXT: v_or_b16 v5.h, v10.l, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v9.l
+; GFX1200-NEXT: v_and_b16 v8.h, v8.l, 1
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v10.h, v5.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
+; GFX1200-NEXT: v_and_b16 v5.h, v6.h, v5.h
; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, 6
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s0
-; GFX1200-NEXT: v_or_b16 v8.l, v12.l, v8.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.h
-; GFX1200-NEXT: v_lshlrev_b16 v8.h, 3, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v11.h, v9.h
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.l
+; GFX1200-NEXT: v_mov_b16_e32 v9.l, v12.l
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v6.l, v5.h
; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.l
-; GFX1200-NEXT: v_and_b16 v5.l, v5.l, v8.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 8, vcc_lo
-; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, vcc_lo
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v6.l
-; GFX1200-NEXT: v_or_b16 v8.l, v4.l, v8.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.l, 0, v5.l, s1
-; GFX1200-NEXT: v_or_b16 v6.h, v4.l, v6.h
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, 8, vcc_lo
+; GFX1200-NEXT: v_or_b16 v8.h, v9.l, v8.h
+; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, vcc_lo
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.h
+; GFX1200-NEXT: v_or_b16 v6.l, v4.l, v6.l
+; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.h
+; GFX1200-NEXT: v_or_b16 v8.h, v4.l, v9.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_or_b16 v3.l, v8.l, v3.h
-; GFX1200-NEXT: v_add_nc_u16 v5.l, v9.l, v5.l
-; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v5.h
-; GFX1200-NEXT: v_min_u16 v5.h, v7.h, 15
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v10.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v1.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v5.l, v6.l, v5.l
+; GFX1200-NEXT: v_min_u16 v6.l, v7.h, 15
+; GFX1200-NEXT: v_or_b16 v3.h, v8.h, v3.h
+; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v6.h, s1
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v2.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, v9.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v6.l, 1 clamp
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v5.l, s0
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.l, v1.l
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v8.l, v3.l
; GFX1200-NEXT: v_lshrrev_b32_e32 v9, 31, v2
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v3.h, s0
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v7.l, v8.l
-; GFX1200-NEXT: v_sub_nc_u16 v7.l, v5.h, 1 clamp
-; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v6.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v4.l, s1
+; GFX1200-NEXT: v_and_b16 v4.l, 0x3ff, v5.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v3.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, 6
+; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
; GFX1200-NEXT: v_lshlrev_b16 v8.h, 7, v9.l
+; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v4.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, 8, s0
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v3.h, 6
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v7.l, 1
-; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v7.h
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v4.l, s1
-; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, s0
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v3.h
-; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v2.l, v2.l
+; GFX1200-NEXT: v_lshlrev_b16 v2.l, 3, v7.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s0
+; GFX1200-NEXT: v_and_b16 v7.h, v8.l, v7.h
; GFX1200-NEXT: v_or_b16 v2.h, v8.h, v2.h
-; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, vcc_lo
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v2.l, v2.l
-; GFX1200-NEXT: v_or_b16 v9.l, v8.h, v9.l
-; GFX1200-NEXT: v_and_b16 v4.l, v9.h, v8.l
-; GFX1200-NEXT: v_or_b16 v2.l, v2.h, v5.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, v5.h, v9.h
-; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; GFX1200-NEXT: v_or_b16 v2.h, v9.l, v6.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.l
+; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, vcc_lo
+; GFX1200-NEXT: v_or_b16 v2.l, v8.h, v2.l
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v6.l, v8.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.h
+; GFX1200-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX1200-NEXT: v_and_b16 v3.l, v5.l, 63
+; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v5.h
+; GFX1200-NEXT: v_and_b16 v5.h, v9.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, 0x7f, v3.l, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v14.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.l, v12.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v4.l, 7, v4.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 6, v5.l
+; GFX1200-NEXT: v_or_b16 v3.l, v10.l, v5.h
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, v6.h, v8.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v2.h, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.h
-; GFX1200-NEXT: v_and_b16 v3.h, v5.l, 1
-; GFX1200-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_mov_b16_e32 v4.l, v10.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s0
+; GFX1200-NEXT: v_and_b16 v2.h, v4.l, 1
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v6.l
+; GFX1200-NEXT: v_and_b16 v3.l, v5.h, v3.l
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v13.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v5.h, v12.l
+; GFX1200-NEXT: v_or_b16 v2.h, v7.l, v2.h
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.h, v2.l, s0
-; GFX1200-NEXT: v_and_b16 v2.h, v6.h, 63
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, 6, v6.h
-; GFX1200-NEXT: v_or_b16 v3.h, v4.l, v3.h
-; GFX1200-NEXT: v_lshrrev_b16 v4.l, v7.l, v9.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v2.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 7, v7.h
+; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v3.l, s0
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v8.h, vcc_lo
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v14.l, v14.l
-; GFX1200-NEXT: v_and_b16 v2.h, v4.l, v3.h
-; GFX1200-NEXT: v_sub_nc_u16 v3.h, 2, v6.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
-; GFX1200-NEXT: v_and_b16 v4.l, v7.l, 1
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v12.l
-; GFX1200-NEXT: v_min_u16 v3.h, v3.h, 15
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, v2.h, s0
+; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v13.l, v13.l
+; GFX1200-NEXT: v_and_b16 v2.h, v5.l, v2.h
+; GFX1200-NEXT: v_sub_nc_u16 v5.l, 2, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v9.l, v3.l
+; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v6.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v2.l, 0x7f, v2.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v9.l, v5.h, 63
-; GFX1200-NEXT: v_sub_nc_u16 v7.h, v3.h, 1 clamp
-; GFX1200-NEXT: v_or_b16 v4.l, v8.l, v4.l
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v5.l, v2.h
-; GFX1200-NEXT: v_and_b16 v5.l, 0x3ff, v5.h
-; GFX1200-NEXT: v_lshrrev_b16 v8.h, 8, v1.l
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v7.h, 1
-; GFX1200-NEXT: v_and_b16 v4.l, v6.h, v4.l
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v4.l, v2.h
+; GFX1200-NEXT: v_min_u16 v4.l, v5.l, 15
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, 0x7f, v3.h, s1
; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v2.h
-; GFX1200-NEXT: v_or_b16 v6.h, 0x400, v5.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 7, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v7.l, v4.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v4.l, 1 clamp
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, vcc_lo
+; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s0
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, v6.h, 1
; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s0
-; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, s0
-; GFX1200-NEXT: v_lshrrev_b16 v9.h, v3.h, v6.h
-; GFX1200-NEXT: v_and_b16 v8.l, v6.h, v8.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.l
-; GFX1200-NEXT: v_and_b16 v8.h, 0x80, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, v7.h, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 6, v5.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v8.l
+; GFX1200-NEXT: v_or_b16 v7.l, v5.l, v7.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, v8.l
+; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v7.h
+; GFX1200-NEXT: v_add_nc_u16 v8.h, v8.h, -1
+; GFX1200-NEXT: v_or_b16 v3.l, v7.l, v3.l
+; GFX1200-NEXT: v_and_b16 v7.l, v6.l, 63
+; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v4.l, v8.l
+; GFX1200-NEXT: v_and_b16 v8.h, v8.l, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, 6
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_and_b16 v9.h, v9.l, 1
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v8.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 3, v4.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_and_b16 v10.h, v5.l, 1
-; GFX1200-NEXT: v_or_b16 v7.l, v8.h, v7.l
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, vcc_lo
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v10.l
-; GFX1200-NEXT: v_and_b16 v9.l, v9.h, 1
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v8.h
+; GFX1200-NEXT: v_and_b16 v8.h, v7.h, 1
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v8.l, v0.l
+; GFX1200-NEXT: v_or_b16 v7.l, v5.l, v7.l
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v1.l, v1.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v8.h
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v4.h
; GFX1200-NEXT: v_or_b16 v2.h, v7.l, v2.h
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v11.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, v8.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.h
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v0.l
-; GFX1200-NEXT: v_or_b16 v8.l, v10.l, v9.l
-; GFX1200-NEXT: v_mov_b16_e32 v11.l, v13.l
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, 6
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.l
-; GFX1200-NEXT: v_or_b16 v7.h, v11.l, v10.h
+; GFX1200-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX1200-NEXT: v_or_b16 v9.h, v11.l, v9.h
+; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v8.h
; GFX1200-NEXT: v_lshrrev_b32_e32 v11, 16, v0
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v3.l, vcc_lo
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v1.l
+; GFX1200-NEXT: v_and_b16 v4.h, v6.h, v9.h
+; GFX1200-NEXT: v_add_nc_u16 v4.l, v7.h, v6.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, 2, v8.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v0.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v5.l, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, v6.h, s0
-; GFX1200-NEXT: v_and_b16 v3.h, v5.h, v7.h
-; GFX1200-NEXT: v_lshlrev_b16 v5.h, 3, v4.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v4.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v4.h, v0.l
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v9.h, v6.h
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v5.l, v3.h
-; GFX1200-NEXT: v_or_b16 v5.l, v8.h, v5.h
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v7.l
-; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v4.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v6.h
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v3.h
-; GFX1200-NEXT: v_or_b16 v4.l, v5.l, v4.l
-; GFX1200-NEXT: v_min_u16 v5.l, v5.h, 15
+; GFX1200-NEXT: v_cndmask_b16 v4.h, 0, v4.h, s0
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v4.l
+; GFX1200-NEXT: v_min_u16 v3.l, v6.h, 15
+; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v9.l, v4.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, v6.h, 0, s1
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v4.l, v2.h, s0
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, v5.l, 1 clamp
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v1.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s0
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v3.l, 1 clamp
; GFX1200-NEXT: v_lshrrev_b32_e32 v9, 31, v1
-; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v7.h
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, 8, s1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v8.h, s0
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, v8.l
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v5.h, 1
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 7, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, v5.h, v9.h
-; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v1.l, v1.l
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, 6
-; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
-; GFX1200-NEXT: v_or_b16 v1.h, v9.l, v1.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0x7f, v2.h, s0
-; GFX1200-NEXT: v_lshlrev_b16 v10.l, 3, v6.l
-; GFX1200-NEXT: v_and_b16 v4.l, v9.h, v8.l
-; GFX1200-NEXT: v_or_b16 v1.h, v1.h, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, v5.l, v9.h
-; GFX1200-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX1200-NEXT: v_or_b16 v6.h, v9.l, v10.l
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v4.l
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v11.l
-; GFX1200-NEXT: v_and_b16 v4.l, v8.l, 1
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v3.h
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v9.h, v11.l
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.h
+; GFX1200-NEXT: v_mov_b16_e32 v5.l, v7.l
+; GFX1200-NEXT: v_and_b16 v7.l, 0x3ff, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, 7, v9.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v6.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v11.l
-; GFX1200-NEXT: v_mov_b16_e32 v6.l, v10.l
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, vcc_lo
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v5.h, v5.l
+; GFX1200-NEXT: v_or_b16 v5.l, 0x400, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v7.h, -1
+; GFX1200-NEXT: v_cndmask_b16 v7.h, 0, 8, vcc_lo
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v1.h, 6
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v3.l, v5.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_and_b16 v1.l, v5.l, v5.h
+; GFX1200-NEXT: v_or_b16 v5.h, v8.h, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, v6.h, v5.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v1.h
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v4.l, 0, s0
+; GFX1200-NEXT: v_or_b16 v4.h, v5.h, v4.h
+; GFX1200-NEXT: v_or_b16 v4.l, v8.h, v7.h
+; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v9.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v3.h, v1.h, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v12.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v3.h, v6.l, v4.l
-; GFX1200-NEXT: v_sub_nc_u16 v4.l, 2, v6.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; GFX1200-NEXT: v_and_b16 v7.h, v9.l, 1
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v1.h
+; GFX1200-NEXT: v_or_b16 v1.l, v4.l, v1.l
+; GFX1200-NEXT: v_or_b16 v4.l, v3.h, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v2.l, 0x7f, v2.h, s1
+; GFX1200-NEXT: v_min_u16 v2.h, v5.h, 15
+; GFX1200-NEXT: v_or_b16 v1.h, v10.l, v7.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.h, v9.l, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.l, v11.l
-; GFX1200-NEXT: v_and_b16 v3.h, v5.h, v3.h
-; GFX1200-NEXT: v_min_u16 v1.h, v4.l, 15
-; GFX1200-NEXT: v_and_b16 v4.l, v4.h, 63
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v7.h
-; GFX1200-NEXT: v_and_b16 v9.l, v5.l, 63
-; GFX1200-NEXT: v_lshrrev_b16 v4.h, 6, v4.h
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, v1.h, 1 clamp
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v4.l
-; GFX1200-NEXT: v_and_b16 v4.l, 0x3ff, v5.l
-; GFX1200-NEXT: v_and_b16 v8.h, v6.l, 1
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 6, v5.l
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, v5.h, 1
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v4.h, vcc_lo
+; GFX1200-NEXT: v_and_b16 v3.h, v6.l, 63
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v3.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v3.l, v11.l
+; GFX1200-NEXT: v_sub_nc_u16 v4.h, v2.h, 1 clamp
+; GFX1200-NEXT: v_and_b16 v1.h, v5.l, v1.h
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 7, v7.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.h
+; GFX1200-NEXT: v_and_b16 v3.h, 0x3ff, v3.l
+; GFX1200-NEXT: v_lshlrev_b16 v5.h, v4.h, 1
+; GFX1200-NEXT: v_and_b16 v7.l, v3.l, 63
+; GFX1200-NEXT: v_and_b16 v6.h, v5.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.l
-; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v4.l
-; GFX1200-NEXT: v_lshrrev_b16 v4.l, 7, v4.l
-; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
-; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v8.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
+; GFX1200-NEXT: v_or_b16 v7.h, 0x400, v3.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, -1
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v3.h, 7, v3.h
+; GFX1200-NEXT: v_or_b16 v6.h, v10.l, v6.h
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_and_b16 v5.h, v7.h, v5.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s1
-; GFX1200-NEXT: v_lshrrev_b16 v10.h, v1.h, v9.h
-; GFX1200-NEXT: v_and_b16 v9.l, v4.l, 1
-; GFX1200-NEXT: v_and_b16 v7.h, v9.h, v7.h
-; GFX1200-NEXT: v_and_b16 v4.h, v4.h, v8.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_and_b16 v7.l, v3.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v10.h, v2.h, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v3.l, 6, v3.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
; GFX1200-NEXT: v_mov_b16_e32 v10.l, v13.l
-; GFX1200-NEXT: v_and_b16 v8.h, v10.h, 1
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, 0, v3.h, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v7.h
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v6.l, v4.h
-; GFX1200-NEXT: v_or_b16 v7.h, v10.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, v5.h, v9.h
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v8.l, v3.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s1
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.h
-; GFX1200-NEXT: v_and_b16 v5.l, v5.l, v7.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v1.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 7, v3.h
-; GFX1200-NEXT: v_mov_b16_e32 v9.l, v13.l
-; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v12.l, v12.l
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, v5.l
+; GFX1200-NEXT: v_and_b16 v5.h, v6.l, v6.h
+; GFX1200-NEXT: v_and_b16 v6.h, v10.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, vcc_lo
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s3
-; GFX1200-NEXT: v_or_b16 v6.l, v9.l, v8.h
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 7, v4.l
-; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7f, v1.l, s1
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_and_b16 v5.l, v5.h, v6.l
-; GFX1200-NEXT: v_mov_b16_e32 v6.l, v8.l
+; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v1.h, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s4
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, s4
-; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v5.l, s2
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v0.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v7.l, v6.l
-; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, 8, s3
-; GFX1200-NEXT: v_add_nc_u16 v1.h, v10.h, v1.h
-; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v6.h, v8.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, 6
-; GFX1200-NEXT: v_lshrrev_b32_e32 v8, 31, v0
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_or_b16 v6.l, v10.l, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v5.l, v5.h
+; GFX1200-NEXT: v_lshrrev_b16 v4.h, v4.h, v7.h
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v9.l, v1.h
+; GFX1200-NEXT: v_mov_b16_e32 v7.l, v13.l
+; GFX1200-NEXT: v_and_b16 v3.l, v3.l, v6.l
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v2.h
; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 7, v1.h
-; GFX1200-NEXT: v_or_b16 v0.h, v5.l, v6.l
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.h, 6
-; GFX1200-NEXT: v_lshlrev_b16 v6.h, 3, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, 7, v8.l
+; GFX1200-NEXT: v_or_b16 v5.h, v7.l, v6.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.h, v3.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, s2
; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, 0, s2
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, 3, v6.l
-; GFX1200-NEXT: v_or_b16 v6.h, v5.l, v6.h
-; GFX1200-NEXT: v_or_b16 v0.h, v0.h, v3.h
-; GFX1200-NEXT: v_or_b16 v7.l, v7.h, v7.l
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v5.h
-; GFX1200-NEXT: v_or_b16 v8.l, v7.h, v8.l
-; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v4.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s2, 1, v6.l
-; GFX1200-NEXT: v_or_b16 v1.h, v7.l, v1.h
-; GFX1200-NEXT: v_or_b16 v2.h, v2.h, v1.l
-; GFX1200-NEXT: v_or_b16 v4.l, v8.l, v4.l
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v3.h, v0.h, vcc_lo
+; GFX1200-NEXT: v_and_b16 v3.h, v4.h, v5.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 7, v3.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v8.l, v6.l
+; GFX1200-NEXT: v_cndmask_b16 v5.h, 0, 8, s2
+; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, v3.h, s1
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s3
+; GFX1200-NEXT: v_lshrrev_b16 v3.h, 8, v0.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, 6
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v8.h, s0
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v10.h, v2.h
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v9.h, v7.l
+; GFX1200-NEXT: v_and_b16 v3.h, 0x80, v3.h
+; GFX1200-NEXT: v_lshrrev_b32_e32 v7, 31, v0
+; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v12.l, v12.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v2.h
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s3
+; GFX1200-NEXT: v_or_b16 v0.h, v3.h, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v6.l, 6
+; GFX1200-NEXT: v_lshlrev_b16 v6.l, 3, v4.h
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 8, s1
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 7, v7.l
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s1
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v5.h
+; GFX1200-NEXT: v_or_b16 v6.l, v3.h, v6.l
+; GFX1200-NEXT: v_or_b16 v0.h, v0.h, v1.h
+; GFX1200-NEXT: v_or_b16 v6.h, v7.l, v6.h
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v4.h
+; GFX1200-NEXT: v_or_b16 v7.h, v7.l, v7.h
+; GFX1200-NEXT: v_or_b16 v1.h, v6.l, v5.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7f, v1.l, s0
+; GFX1200-NEXT: v_or_b16 v2.h, v6.h, v2.h
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v5.h
+; GFX1200-NEXT: v_or_b16 v3.l, v7.h, v3.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v1.h, v0.h, vcc_lo
; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v0.l
+; GFX1200-NEXT: v_and_b16 v2.l, 0xff, v2.l
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v4.l, v1.h, s2
-; GFX1200-NEXT: v_or_b16 v4.l, v3.l, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v3.l, v2.h, s1
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v11.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v5.l, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, vcc_lo
+; GFX1200-NEXT: v_cvt_u32_u16_e32 v3, v4.l
+; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v1.l
; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v0.l
-; GFX1200-NEXT: v_mov_b16_e32 v3.l, v2.h
-; GFX1200-NEXT: v_cndmask_b16 v0.l, v1.h, v7.h, s0
-; GFX1200-NEXT: v_cvt_u32_u16_e32 v1, v4.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.l, v1.h, v7.l, s1
; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v11.l, v11.l
+; GFX1200-NEXT: v_or_b32_e32 v6, 0x7f7f0000, v3
+; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v0.h, 0x7f, v0.h, vcc_lo
-; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v3
-; GFX1200-NEXT: v_or_b32_e32 v6, 0x7f7f0000, v1
+; GFX1200-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b16 v0.l, 0x7f, v0.l, s0
+; GFX1200-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
; GFX1200-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v0.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v2.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; GFX1200-NEXT: v_mov_b16_e32 v2.l, v2.h
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v0.l
; GFX1200-NEXT: v_mov_b16_e32 v3.l, v5.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v1.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX1200-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-TRUE16-LABEL: to_fp8_v5f16:
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v3.h, v1
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v3.l, v1
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v5.h, s0
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v5.l, v2
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v3.l, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 16, v1 :: v_dual_lshrrev_b32 v1, 8, v3
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v0.l, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
+; GFX1250-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.l
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1250-TRUE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[4:5]
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v3.l, v6.l
; GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
@@ -1391,13 +1382,13 @@ define <6 x i8> @to_fp8_v6f16(<6 x half> %x) {
; GFX1200-NEXT: s_wait_kmcnt 0x0
; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v3.l, v2.l
; GFX1200-NEXT: v_frexp_mant_f16_e32 v3.h, v2.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v2
; GFX1200-NEXT: v_lshrrev_b16 v4.l, 8, v2.l
; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v4.h, v1.l
; GFX1200-NEXT: v_sub_nc_u16 v5.l, 2, v3.l
; GFX1200-NEXT: v_and_b16 v5.h, 0x3ff, v3.h
; GFX1200-NEXT: v_and_b16 v6.l, v3.h, 63
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v14.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v13.l
; GFX1200-NEXT: v_lshrrev_b16 v3.h, 6, v3.h
; GFX1200-NEXT: v_min_u16 v5.l, v5.l, 15
; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v5.h
@@ -1405,392 +1396,383 @@ define <6 x i8> @to_fp8_v6f16(<6 x half> %x) {
; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v6.l
; GFX1200-NEXT: v_sub_nc_u16 v9.h, 2, v7.l
; GFX1200-NEXT: v_sub_nc_u16 v8.h, v5.l, 1 clamp
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v14.l
-; GFX1200-NEXT: v_and_b16 v10.h, v5.h, 1
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v13.l
+; GFX1200-NEXT: v_and_b16 v11.l, v5.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; GFX1200-NEXT: v_min_u16 v9.h, v9.h, 15
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
+; GFX1200-NEXT: v_lshrrev_b16 v10.h, v5.l, v8.l
; GFX1200-NEXT: v_lshlrev_b16 v9.l, v8.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v11.h, v5.l, v8.l
-; GFX1200-NEXT: v_and_b16 v6.l, 0x3ff, v6.h
-; GFX1200-NEXT: v_or_b16 v10.h, v11.l, v10.h
-; GFX1200-NEXT: v_sub_nc_u16 v11.l, v9.h, 1 clamp
-; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
-; GFX1200-NEXT: v_and_b16 v10.l, v6.h, 63
; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.l
-; GFX1200-NEXT: v_and_b16 v3.h, v3.h, v10.h
-; GFX1200-NEXT: v_lshlrev_b16 v10.h, v11.l, 1
+; GFX1200-NEXT: v_min_u16 v5.l, v9.h, 15
+; GFX1200-NEXT: v_or_b16 v11.l, v12.l, v11.l
+; GFX1200-NEXT: v_and_b16 v10.l, v6.h, 63
+; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
+; GFX1200-NEXT: v_and_b16 v6.l, 0x3ff, v6.h
+; GFX1200-NEXT: v_sub_nc_u16 v11.h, v5.l, 1 clamp
+; GFX1200-NEXT: v_and_b16 v3.h, v3.h, v11.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.l
; GFX1200-NEXT: v_and_b16 v9.l, v8.l, v9.l
-; GFX1200-NEXT: v_or_b16 v5.l, 0x400, v6.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v6.l
+; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v11.l, v11.h, 1
; GFX1200-NEXT: v_add_nc_u16 v3.h, v5.h, v3.h
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v10.h, -1
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, v8.h, v8.l
; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_and_b16 v9.l, v11.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, v8.h, v8.l
+; GFX1200-NEXT: v_and_b16 v9.l, v10.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v6.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.l, v5.l, v9.h
; GFX1200-NEXT: v_lshrrev_b16 v6.h, 6, v6.h
-; GFX1200-NEXT: v_and_b16 v5.h, v5.l, v5.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s0
; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v10.l
-; GFX1200-NEXT: v_and_b16 v10.l, v6.l, 1
; GFX1200-NEXT: v_and_b16 v4.l, 0x80, v4.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.h
-; GFX1200-NEXT: v_or_b16 v8.h, v12.l, v9.l
+; GFX1200-NEXT: v_sub_nc_u16 v7.h, 2, v4.h
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, s0
; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v3.h
-; GFX1200-NEXT: v_lshrrev_b16 v9.l, v9.h, v5.l
-; GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, s1
-; GFX1200-NEXT: v_and_b16 v8.l, v8.l, v8.h
-; GFX1200-NEXT: v_or_b16 v8.h, v13.l, v10.l
+; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v9.l
+; GFX1200-NEXT: v_add_nc_u16 v9.l, v11.l, -1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s0
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, v11.l, v5.l
-; GFX1200-NEXT: v_sub_nc_u16 v7.h, 2, v4.h
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v14.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s0
+; GFX1200-NEXT: v_and_b16 v5.l, v5.h, v8.h
+; GFX1200-NEXT: v_and_b16 v5.h, v9.h, v9.l
+; GFX1200-NEXT: v_and_b16 v8.h, v6.l, 1
+; GFX1200-NEXT: v_mov_b16_e32 v9.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.h, 0, v8.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v12.l
-; GFX1200-NEXT: v_and_b16 v8.l, v9.l, 1
-; GFX1200-NEXT: v_mov_b16_e32 v12.l, v15.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v11.h, v5.h
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, v6.h
+; GFX1200-NEXT: v_cndmask_b16 v5.l, 0, v5.l, vcc_lo
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.h
+; GFX1200-NEXT: v_or_b16 v5.h, v10.l, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v9.l
+; GFX1200-NEXT: v_and_b16 v8.h, v8.l, 1
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v10.h, v5.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
+; GFX1200-NEXT: v_and_b16 v5.h, v6.h, v5.h
; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, 6
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s0
-; GFX1200-NEXT: v_or_b16 v8.l, v12.l, v8.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.h
-; GFX1200-NEXT: v_lshlrev_b16 v8.h, 3, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v11.h, v9.h
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.l
+; GFX1200-NEXT: v_mov_b16_e32 v9.l, v12.l
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v6.l, v5.h
; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.l
-; GFX1200-NEXT: v_and_b16 v5.l, v5.l, v8.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 8, vcc_lo
-; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, vcc_lo
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v6.l
-; GFX1200-NEXT: v_or_b16 v8.l, v4.l, v8.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.l, 0, v5.l, s1
-; GFX1200-NEXT: v_or_b16 v6.h, v4.l, v6.h
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, 8, vcc_lo
+; GFX1200-NEXT: v_or_b16 v8.h, v9.l, v8.h
+; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, vcc_lo
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.h
+; GFX1200-NEXT: v_or_b16 v6.l, v4.l, v6.l
+; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.h
+; GFX1200-NEXT: v_or_b16 v8.h, v4.l, v9.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_or_b16 v3.l, v8.l, v3.h
-; GFX1200-NEXT: v_add_nc_u16 v5.l, v9.l, v5.l
-; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v5.h
-; GFX1200-NEXT: v_min_u16 v5.h, v7.h, 15
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v10.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v1.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v5.l, v6.l, v5.l
+; GFX1200-NEXT: v_min_u16 v6.l, v7.h, 15
+; GFX1200-NEXT: v_or_b16 v3.h, v8.h, v3.h
+; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v6.h, s1
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v2.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, v9.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v6.l, 1 clamp
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v5.l, s0
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.l, v1.l
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v8.l, v3.l
; GFX1200-NEXT: v_lshrrev_b32_e32 v9, 31, v2
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v3.h, s0
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v7.l, v8.l
-; GFX1200-NEXT: v_sub_nc_u16 v7.l, v5.h, 1 clamp
-; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v6.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v4.l, s1
+; GFX1200-NEXT: v_and_b16 v4.l, 0x3ff, v5.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v3.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, 6
+; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
; GFX1200-NEXT: v_lshlrev_b16 v8.h, 7, v9.l
+; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v4.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, 8, s0
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v3.h, 6
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v7.l, 1
-; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v7.h
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v4.l, s1
-; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, s0
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v3.h
-; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v2.l, v2.l
+; GFX1200-NEXT: v_lshlrev_b16 v2.l, 3, v7.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s0
+; GFX1200-NEXT: v_and_b16 v7.h, v8.l, v7.h
; GFX1200-NEXT: v_or_b16 v2.h, v8.h, v2.h
-; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, vcc_lo
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v2.l, v2.l
-; GFX1200-NEXT: v_or_b16 v9.l, v8.h, v9.l
-; GFX1200-NEXT: v_and_b16 v4.l, v9.h, v8.l
-; GFX1200-NEXT: v_or_b16 v2.l, v2.h, v5.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, v5.h, v9.h
-; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; GFX1200-NEXT: v_or_b16 v2.h, v9.l, v6.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.l
+; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, vcc_lo
+; GFX1200-NEXT: v_or_b16 v2.l, v8.h, v2.l
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v6.l, v8.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.h
+; GFX1200-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX1200-NEXT: v_and_b16 v3.l, v5.l, 63
+; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v5.h
+; GFX1200-NEXT: v_and_b16 v5.h, v9.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, 0x7f, v3.l, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v14.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.l, v12.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v4.l, 7, v4.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 6, v5.l
+; GFX1200-NEXT: v_or_b16 v3.l, v10.l, v5.h
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, v6.h, v8.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v2.h, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.h
-; GFX1200-NEXT: v_and_b16 v3.h, v5.l, 1
-; GFX1200-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_mov_b16_e32 v4.l, v10.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s0
+; GFX1200-NEXT: v_and_b16 v2.h, v4.l, 1
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v6.l
+; GFX1200-NEXT: v_and_b16 v3.l, v5.h, v3.l
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v13.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v5.h, v12.l
+; GFX1200-NEXT: v_or_b16 v2.h, v7.l, v2.h
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.h, v2.l, s0
-; GFX1200-NEXT: v_and_b16 v2.h, v6.h, 63
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, 6, v6.h
-; GFX1200-NEXT: v_or_b16 v3.h, v4.l, v3.h
-; GFX1200-NEXT: v_lshrrev_b16 v4.l, v7.l, v9.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v2.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 7, v7.h
+; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v3.l, s0
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v8.h, vcc_lo
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v14.l, v14.l
-; GFX1200-NEXT: v_and_b16 v2.h, v4.l, v3.h
-; GFX1200-NEXT: v_sub_nc_u16 v3.h, 2, v6.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
-; GFX1200-NEXT: v_and_b16 v4.l, v7.l, 1
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v12.l
-; GFX1200-NEXT: v_min_u16 v3.h, v3.h, 15
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, v2.h, s0
+; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v13.l, v13.l
+; GFX1200-NEXT: v_and_b16 v2.h, v5.l, v2.h
+; GFX1200-NEXT: v_sub_nc_u16 v5.l, 2, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v9.l, v3.l
+; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v6.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v2.l, 0x7f, v2.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v9.l, v5.h, 63
-; GFX1200-NEXT: v_sub_nc_u16 v7.h, v3.h, 1 clamp
-; GFX1200-NEXT: v_or_b16 v4.l, v8.l, v4.l
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v5.l, v2.h
-; GFX1200-NEXT: v_and_b16 v5.l, 0x3ff, v5.h
-; GFX1200-NEXT: v_lshrrev_b16 v8.h, 8, v1.l
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v7.h, 1
-; GFX1200-NEXT: v_and_b16 v4.l, v6.h, v4.l
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v4.l, v2.h
+; GFX1200-NEXT: v_min_u16 v4.l, v5.l, 15
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, 0x7f, v3.h, s1
; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v2.h
-; GFX1200-NEXT: v_or_b16 v6.h, 0x400, v5.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 7, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v7.l, v4.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s0
-; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, s0
-; GFX1200-NEXT: v_lshrrev_b16 v9.h, v3.h, v6.h
-; GFX1200-NEXT: v_and_b16 v8.l, v6.h, v8.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.l
-; GFX1200-NEXT: v_and_b16 v8.h, 0x80, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, v7.h, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 6, v5.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v8.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v4.l, 1 clamp
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_and_b16 v10.h, v5.l, 1
-; GFX1200-NEXT: v_or_b16 v7.l, v8.h, v7.l
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, vcc_lo
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v10.l
-; GFX1200-NEXT: v_and_b16 v9.l, v9.h, 1
-; GFX1200-NEXT: v_or_b16 v2.h, v7.l, v2.h
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v11.l
+; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, vcc_lo
+; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s0
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, v6.h, 1
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s0
+; GFX1200-NEXT: v_or_b16 v7.l, v5.l, v7.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.l
; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, v8.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.h
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v0.l
-; GFX1200-NEXT: v_or_b16 v8.l, v10.l, v9.l
-; GFX1200-NEXT: v_mov_b16_e32 v11.l, v13.l
+; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v7.h
+; GFX1200-NEXT: v_add_nc_u16 v8.h, v8.h, -1
+; GFX1200-NEXT: v_or_b16 v3.l, v7.l, v3.l
+; GFX1200-NEXT: v_and_b16 v7.l, v6.l, 63
+; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v4.l, v8.l
+; GFX1200-NEXT: v_and_b16 v8.h, v8.l, v8.h
; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, 6
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.l
-; GFX1200-NEXT: v_or_b16 v7.h, v11.l, v10.h
-; GFX1200-NEXT: v_lshrrev_b32_e32 v11, 16, v0
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, v6.h, s0
-; GFX1200-NEXT: v_and_b16 v3.h, v5.h, v7.h
-; GFX1200-NEXT: v_lshlrev_b16 v5.h, 3, v4.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v4.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v4.h, v0.l
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v9.h, v6.h
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v5.l, v3.h
-; GFX1200-NEXT: v_or_b16 v5.l, v8.h, v5.h
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v7.l
-; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v4.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v6.h
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v3.h
-; GFX1200-NEXT: v_or_b16 v4.l, v5.l, v4.l
-; GFX1200-NEXT: v_min_u16 v5.l, v5.h, 15
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, v6.h, 0, s1
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v4.l, v2.h, s0
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, v5.l, 1 clamp
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v1.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v9, 31, v1
-; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v7.h
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, 8, s1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v8.h, s0
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, v8.l
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v5.h, 1
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 7, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, v5.h, v9.h
-; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v1.l, v1.l
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, 6
-; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
-; GFX1200-NEXT: v_or_b16 v1.h, v9.l, v1.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0x7f, v2.h, s0
-; GFX1200-NEXT: v_lshlrev_b16 v10.l, 3, v6.l
-; GFX1200-NEXT: v_and_b16 v4.l, v9.h, v8.l
-; GFX1200-NEXT: v_or_b16 v1.h, v1.h, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, v5.l, v9.h
-; GFX1200-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX1200-NEXT: v_or_b16 v6.h, v9.l, v10.l
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v4.l
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v11.l
-; GFX1200-NEXT: v_and_b16 v4.l, v8.l, 1
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v3.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_and_b16 v9.h, v9.l, 1
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v8.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 3, v4.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v6.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v11.l
-; GFX1200-NEXT: v_mov_b16_e32 v6.l, v10.l
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v3.h, v1.h, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v12.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v3.h, v6.l, v4.l
-; GFX1200-NEXT: v_sub_nc_u16 v4.l, 2, v6.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v8.h
+; GFX1200-NEXT: v_and_b16 v8.h, v7.h, 1
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v8.l, v0.l
+; GFX1200-NEXT: v_or_b16 v7.l, v5.l, v7.l
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v1.l, v1.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.h, v9.l, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.l, v11.l
-; GFX1200-NEXT: v_and_b16 v3.h, v5.h, v3.h
-; GFX1200-NEXT: v_min_u16 v1.h, v4.l, 15
-; GFX1200-NEXT: v_and_b16 v4.l, v4.h, 63
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v7.h
-; GFX1200-NEXT: v_and_b16 v9.l, v5.l, 63
-; GFX1200-NEXT: v_lshrrev_b16 v4.h, 6, v4.h
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, v1.h, 1 clamp
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v4.l
-; GFX1200-NEXT: v_and_b16 v4.l, 0x3ff, v5.l
-; GFX1200-NEXT: v_and_b16 v8.h, v6.l, 1
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 6, v5.l
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, v5.h, 1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.l
-; GFX1200-NEXT: v_or_b16 v9.h, 0x400, v4.l
-; GFX1200-NEXT: v_lshrrev_b16 v4.l, 7, v4.l
-; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v8.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s1
-; GFX1200-NEXT: v_lshrrev_b16 v10.h, v1.h, v9.h
-; GFX1200-NEXT: v_and_b16 v9.l, v4.l, 1
-; GFX1200-NEXT: v_and_b16 v7.h, v9.h, v7.h
-; GFX1200-NEXT: v_and_b16 v4.h, v4.h, v8.h
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v13.l
-; GFX1200-NEXT: v_and_b16 v8.h, v10.h, 1
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v4.h
+; GFX1200-NEXT: v_or_b16 v2.h, v7.l, v2.h
+; GFX1200-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX1200-NEXT: v_or_b16 v9.h, v11.l, v9.h
+; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v8.h
+; GFX1200-NEXT: v_lshrrev_b32_e32 v11, 16, v0
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, 0, v3.h, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v7.h
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v6.l, v4.h
-; GFX1200-NEXT: v_or_b16 v7.h, v10.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, v5.h, v9.h
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v8.l, v3.h
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v3.l, vcc_lo
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v1.l
+; GFX1200-NEXT: v_and_b16 v4.h, v6.h, v9.h
+; GFX1200-NEXT: v_add_nc_u16 v4.l, v7.h, v6.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, 2, v8.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v0.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v5.l, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s1
+; GFX1200-NEXT: v_cndmask_b16 v4.h, 0, v4.h, s0
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v4.l
+; GFX1200-NEXT: v_min_u16 v3.l, v6.h, 15
+; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v9.l, v4.h
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s0
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v3.l, 1 clamp
+; GFX1200-NEXT: v_lshrrev_b32_e32 v9, 31, v1
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v9.h, v11.l
; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.h
-; GFX1200-NEXT: v_and_b16 v5.l, v5.l, v7.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v1.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 7, v3.h
-; GFX1200-NEXT: v_mov_b16_e32 v9.l, v13.l
-; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v12.l, v12.l
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, v5.l
+; GFX1200-NEXT: v_mov_b16_e32 v5.l, v7.l
+; GFX1200-NEXT: v_and_b16 v7.l, 0x3ff, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, 7, v9.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, vcc_lo
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s3
-; GFX1200-NEXT: v_or_b16 v6.l, v9.l, v8.h
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 7, v4.l
-; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7f, v1.l, s1
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v5.h, v5.l
+; GFX1200-NEXT: v_or_b16 v5.l, 0x400, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v7.h, -1
+; GFX1200-NEXT: v_cndmask_b16 v7.h, 0, 8, vcc_lo
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v1.h, 6
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v3.l, v5.l
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_and_b16 v5.l, v5.h, v6.l
-; GFX1200-NEXT: v_mov_b16_e32 v6.l, v8.l
+; GFX1200-NEXT: v_and_b16 v1.l, v5.l, v5.h
+; GFX1200-NEXT: v_or_b16 v5.h, v8.h, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, v6.h, v5.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v1.h
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v4.l, 0, s0
+; GFX1200-NEXT: v_or_b16 v4.h, v5.h, v4.h
+; GFX1200-NEXT: v_or_b16 v4.l, v8.h, v7.h
+; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v9.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; GFX1200-NEXT: v_and_b16 v7.h, v9.l, 1
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v1.h
+; GFX1200-NEXT: v_or_b16 v1.l, v4.l, v1.l
+; GFX1200-NEXT: v_or_b16 v4.l, v3.h, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v2.l, 0x7f, v2.h, s1
+; GFX1200-NEXT: v_min_u16 v2.h, v5.h, 15
+; GFX1200-NEXT: v_or_b16 v1.h, v10.l, v7.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v4.h, vcc_lo
+; GFX1200-NEXT: v_and_b16 v3.h, v6.l, 63
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v3.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v3.l, v11.l
+; GFX1200-NEXT: v_sub_nc_u16 v4.h, v2.h, 1 clamp
+; GFX1200-NEXT: v_and_b16 v1.h, v5.l, v1.h
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 7, v7.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.h
+; GFX1200-NEXT: v_and_b16 v3.h, 0x3ff, v3.l
+; GFX1200-NEXT: v_lshlrev_b16 v5.h, v4.h, 1
+; GFX1200-NEXT: v_and_b16 v7.l, v3.l, 63
+; GFX1200-NEXT: v_and_b16 v6.h, v5.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s4
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, s4
-; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v5.l, s2
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v0.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v7.l, v6.l
-; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, 8, s3
-; GFX1200-NEXT: v_add_nc_u16 v1.h, v10.h, v1.h
-; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v6.h, v8.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, 6
-; GFX1200-NEXT: v_lshrrev_b32_e32 v8, 31, v0
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
+; GFX1200-NEXT: v_or_b16 v7.h, 0x400, v3.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, -1
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v3.h, 7, v3.h
+; GFX1200-NEXT: v_or_b16 v6.h, v10.l, v6.h
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_and_b16 v5.h, v7.h, v5.h
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_and_b16 v7.l, v3.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v10.h, v2.h, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v3.l, 6, v3.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v13.l
+; GFX1200-NEXT: v_and_b16 v5.h, v6.l, v6.h
+; GFX1200-NEXT: v_and_b16 v6.h, v10.h, 1
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v1.h, vcc_lo
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_or_b16 v6.l, v10.l, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v5.l, v5.h
+; GFX1200-NEXT: v_lshrrev_b16 v4.h, v4.h, v7.h
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v9.l, v1.h
+; GFX1200-NEXT: v_mov_b16_e32 v7.l, v13.l
+; GFX1200-NEXT: v_and_b16 v3.l, v3.l, v6.l
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v2.h
; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 7, v1.h
-; GFX1200-NEXT: v_or_b16 v0.h, v5.l, v6.l
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.h, 6
-; GFX1200-NEXT: v_lshlrev_b16 v6.h, 3, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, 7, v8.l
+; GFX1200-NEXT: v_or_b16 v5.h, v7.l, v6.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.h, v3.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, s2
; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, 0, s2
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, 3, v6.l
-; GFX1200-NEXT: v_or_b16 v6.h, v5.l, v6.h
-; GFX1200-NEXT: v_or_b16 v0.h, v0.h, v3.h
-; GFX1200-NEXT: v_or_b16 v7.l, v7.h, v7.l
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v5.h
-; GFX1200-NEXT: v_or_b16 v8.l, v7.h, v8.l
-; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v4.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s2, 1, v6.l
-; GFX1200-NEXT: v_or_b16 v1.h, v7.l, v1.h
-; GFX1200-NEXT: v_or_b16 v2.h, v2.h, v1.l
-; GFX1200-NEXT: v_or_b16 v4.l, v8.l, v4.l
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v3.h, v0.h, vcc_lo
+; GFX1200-NEXT: v_and_b16 v3.h, v4.h, v5.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 7, v3.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v8.l, v6.l
+; GFX1200-NEXT: v_cndmask_b16 v5.h, 0, 8, s2
+; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, v3.h, s1
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s3
+; GFX1200-NEXT: v_lshrrev_b16 v3.h, 8, v0.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, 6
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v8.h, s0
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v10.h, v2.h
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v9.h, v7.l
+; GFX1200-NEXT: v_and_b16 v3.h, 0x80, v3.h
+; GFX1200-NEXT: v_lshrrev_b32_e32 v7, 31, v0
+; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v12.l, v12.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v2.h
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s3
+; GFX1200-NEXT: v_or_b16 v0.h, v3.h, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v6.l, 6
+; GFX1200-NEXT: v_lshlrev_b16 v6.l, 3, v4.h
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 8, s1
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 7, v7.l
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s1
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v5.h
+; GFX1200-NEXT: v_or_b16 v6.l, v3.h, v6.l
+; GFX1200-NEXT: v_or_b16 v0.h, v0.h, v1.h
+; GFX1200-NEXT: v_or_b16 v6.h, v7.l, v6.h
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v4.h
+; GFX1200-NEXT: v_or_b16 v7.h, v7.l, v7.h
+; GFX1200-NEXT: v_or_b16 v1.h, v6.l, v5.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7f, v1.l, s0
+; GFX1200-NEXT: v_or_b16 v2.h, v6.h, v2.h
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v5.h
+; GFX1200-NEXT: v_or_b16 v3.l, v7.h, v3.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v1.h, v0.h, vcc_lo
; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v0.l
+; GFX1200-NEXT: v_and_b16 v2.l, 0xff, v2.l
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v4.l, v1.h, s2
-; GFX1200-NEXT: v_or_b16 v4.l, v3.l, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v3.l, v2.h, s1
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v11.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v5.l, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, vcc_lo
+; GFX1200-NEXT: v_cvt_u32_u16_e32 v3, v4.l
+; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v1.l
; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v0.l
-; GFX1200-NEXT: v_mov_b16_e32 v3.l, v2.h
-; GFX1200-NEXT: v_cndmask_b16 v0.l, v1.h, v7.h, s0
-; GFX1200-NEXT: v_cvt_u32_u16_e32 v1, v4.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.l, v1.h, v7.l, s1
; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v11.l, v11.l
+; GFX1200-NEXT: v_or_b32_e32 v6, 0x7f7f0000, v3
+; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v0.h, 0x7f, v0.h, vcc_lo
-; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v3
-; GFX1200-NEXT: v_or_b32_e32 v6, 0x7f7f0000, v1
+; GFX1200-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b16 v0.l, 0x7f, v0.l, s0
-; GFX1200-NEXT: v_and_b16 v0.h, 0xff, v0.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1200-NEXT: v_lshrrev_b64 v[7:8], 24, v[5:6]
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v0.l
+; GFX1200-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX1200-NEXT: v_lshrrev_b32_e32 v5, 8, v6
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v2.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; GFX1200-NEXT: v_mov_b16_e32 v2.l, v2.h
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v0.l
; GFX1200-NEXT: v_mov_b16_e32 v3.l, v7.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v1.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX1200-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-TRUE16-LABEL: to_fp8_v6f16:
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v3.h, v1
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v3.l, v1
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v7.h, s0
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v7.l, v2
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v3.l, v0
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v0.l, v0
; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
+; GFX1250-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v7
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.l
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.l
-; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v6, 16, v1 :: v_dual_lshrrev_b32 v1, 8, v3
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX1250-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[6:7]
; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
@@ -2283,513 +2265,491 @@ define <7 x i8> @to_fp8_v7f16(<7 x half> %x) {
; GFX1200-NEXT: s_wait_kmcnt 0x0
; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v4.l, v3.l
; GFX1200-NEXT: v_frexp_mant_f16_e32 v4.h, v3.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v3
-; GFX1200-NEXT: v_lshrrev_b32_e32 v14, 31, v3
+; GFX1200-NEXT: v_lshrrev_b32_e32 v14, 16, v3
; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v3.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v2.l
; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v4.l
-; GFX1200-NEXT: v_and_b16 v6.l, v4.h, 63
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.h, v13.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v7.l, v13.l
-; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
-; GFX1200-NEXT: v_min_u16 v3.h, v5.h, 15
-; GFX1200-NEXT: v_and_b16 v5.h, 0x3ff, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v6.l
-; GFX1200-NEXT: v_sub_nc_u16 v9.l, 2, v7.h
+; GFX1200-NEXT: v_and_b16 v7.l, 0x3ff, v4.h
+; GFX1200-NEXT: v_and_b16 v7.h, v4.h, 63
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v9.l, v14.l
; GFX1200-NEXT: v_lshrrev_b16 v4.h, 6, v4.h
-; GFX1200-NEXT: v_sub_nc_u16 v6.h, v3.h, 1 clamp
-; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v5.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v5.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s1
-; GFX1200-NEXT: v_min_u16 v9.l, v9.l, 15
-; GFX1200-NEXT: v_lshlrev_b16 v8.h, v6.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v10.h, v3.h, v8.l
-; GFX1200-NEXT: v_and_b16 v10.l, v5.h, 1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v3.h
-; GFX1200-NEXT: v_sub_nc_u16 v3.h, v9.l, 1 clamp
-; GFX1200-NEXT: v_add_nc_u16 v8.h, v8.h, -1
-; GFX1200-NEXT: v_and_b16 v6.l, 0x3ff, v7.l
-; GFX1200-NEXT: v_or_b16 v10.l, v11.l, v10.l
-; GFX1200-NEXT: v_and_b16 v9.h, v7.l, 63
-; GFX1200-NEXT: v_lshlrev_b16 v11.l, v3.h, 1
-; GFX1200-NEXT: v_and_b16 v8.h, v8.l, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 6, v7.l
-; GFX1200-NEXT: v_and_b16 v4.h, v4.h, v10.l
-; GFX1200-NEXT: v_and_b16 v10.l, v10.h, 1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s3, 0, v9.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v8.h
-; GFX1200-NEXT: v_or_b16 v8.h, 0x400, v6.l
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v5.h, v4.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v6.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, v6.h, v8.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s2
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v11.l, -1
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 7, v4.h
-; GFX1200-NEXT: v_lshrrev_b16 v3.h, v3.h, v8.h
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v3.l
-; GFX1200-NEXT: v_or_b16 v8.l, v12.l, v10.l
-; GFX1200-NEXT: v_and_b16 v6.h, v8.h, v6.h
+; GFX1200-NEXT: v_min_u16 v5.h, v5.h, 15
+; GFX1200-NEXT: v_or_b16 v10.l, 0x400, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, 7, v7.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v7.h
+; GFX1200-NEXT: v_sub_nc_u16 v11.l, 2, v9.l
+; GFX1200-NEXT: v_sub_nc_u16 v8.h, v5.h, 1 clamp
+; GFX1200-NEXT: v_lshrrev_b16 v12.h, v5.h, v10.l
+; GFX1200-NEXT: v_and_b16 v12.l, v7.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s2
-; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s3
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s3, 0, v9.l
-; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v8.l
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, v9.l, v8.h
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v11.l
-; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v3.l, v3.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v3.l, v2.l
-; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v6.l, s1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v6.h
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, v10.l
-; GFX1200-NEXT: v_and_b16 v6.h, v5.h, 1
-; GFX1200-NEXT: v_and_b16 v9.l, v8.l, 1
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v10.h, v6.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_min_u16 v11.l, v11.l, 15
+; GFX1200-NEXT: v_lshlrev_b16 v10.h, v8.h, 1
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v8.l, v14.l
+; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
+; GFX1200-NEXT: v_or_b16 v12.l, v13.l, v12.l
+; GFX1200-NEXT: v_sub_nc_u16 v9.h, 2, v6.h
+; GFX1200-NEXT: v_add_nc_u16 v10.h, v10.h, -1
+; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v8.l
+; GFX1200-NEXT: v_and_b16 v11.h, v8.l, 63
+; GFX1200-NEXT: v_and_b16 v4.h, v4.h, v12.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.l, 6, v8.l
+; GFX1200-NEXT: v_and_b16 v10.h, v10.l, v10.h
+; GFX1200-NEXT: v_min_u16 v9.h, v9.h, 15
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v11.h
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v7.l, v4.h
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, v8.h, v10.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v10.h
+; GFX1200-NEXT: v_and_b16 v10.h, v12.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s1
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, 6
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, s2
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v6.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v11.l
-; GFX1200-NEXT: v_mov_b16_e32 v11.l, v12.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v16, 0, 1, s2
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v4.h
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v2.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s0
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
+; GFX1200-NEXT: v_sub_nc_u16 v5.h, v11.l, 1 clamp
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v9.h, 0, 8, s1
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v9.l
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v4.l
-; GFX1200-NEXT: v_or_b16 v6.h, v11.l, v6.h
-; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s1
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v4.l
-; GFX1200-NEXT: v_and_b16 v3.h, v3.h, v8.h
-; GFX1200-NEXT: v_or_b16 v8.h, v5.l, v9.l
-; GFX1200-NEXT: v_or_b16 v9.l, v5.l, v9.h
-; GFX1200-NEXT: v_and_b16 v6.h, v7.l, v6.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, s1
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, s1
+; GFX1200-NEXT: v_mov_b16_e32 v12.l, v13.l
+; GFX1200-NEXT: v_or_b16 v13.l, 0x400, v7.h
+; GFX1200-NEXT: v_lshlrev_b16 v13.h, v5.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v7.h
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v3.l
+; GFX1200-NEXT: v_or_b16 v8.h, v12.l, v10.h
+; GFX1200-NEXT: v_mov_b16_e32 v12.l, v15.l
+; GFX1200-NEXT: v_add_nc_u16 v10.l, v13.h, -1
+; GFX1200-NEXT: v_and_b16 v10.h, v7.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, v5.h, v13.l
+; GFX1200-NEXT: v_and_b16 v7.l, v7.l, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, v12.l
+; GFX1200-NEXT: v_and_b16 v10.l, v13.l, v10.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.h, v11.l, v13.l
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, 0, v3.h, s3
-; GFX1200-NEXT: v_or_b16 v4.l, v8.h, v4.h
+; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, v7.l, s0
+; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, 6
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_or_b16 v4.h, v9.l, v6.l
-; GFX1200-NEXT: v_sub_nc_u16 v6.l, 2, v3.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, v6.h
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v8.l, v3.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v2.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v10.l
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v16.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v11.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v12.h, v7.l
+; GFX1200-NEXT: v_and_b16 v11.l, v8.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s2
+; GFX1200-NEXT: v_lshlrev_b16 v11.h, 3, v4.l
+; GFX1200-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 7, v7.l
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v4.l
+; GFX1200-NEXT: v_or_b16 v11.l, v12.l, v11.l
+; GFX1200-NEXT: v_or_b16 v11.h, v5.l, v11.h
+; GFX1200-NEXT: v_and_b16 v8.l, v8.l, v10.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v10.h, 0, 8, s2
+; GFX1200-NEXT: v_cndmask_b16 v7.l, v7.l, 0, s2
+; GFX1200-NEXT: v_and_b16 v5.h, v5.h, v11.l
+; GFX1200-NEXT: v_or_b16 v4.l, v11.h, v4.h
+; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v2
+; GFX1200-NEXT: v_or_b16 v10.h, v5.l, v10.h
+; GFX1200-NEXT: v_cmp_o_f16_e64 s2, v1.l, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v5.h, 0, v5.h, s0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_or_b16 v4.h, v10.h, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.h, v8.l
+; GFX1200-NEXT: v_sub_nc_u16 v8.l, v9.h, 1 clamp
+; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v6.l
; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, v4.h, s1
-; GFX1200-NEXT: v_min_u16 v4.h, v6.l, 15
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v5.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 7, v3.h
-; GFX1200-NEXT: v_and_b16 v9.h, v6.h, 63
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v8.h, v5.h
+; GFX1200-NEXT: v_lshlrev_b16 v5.h, v8.l, 1
+; GFX1200-NEXT: v_or_b16 v8.h, 0x400, v7.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, v5.l, vcc_lo
-; GFX1200-NEXT: v_sub_nc_u16 v6.l, v4.h, 1 clamp
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s1
-; GFX1200-NEXT: v_lshlrev_b16 v5.l, 7, v14.l
-; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v6.h
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s2
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, v6.l, 1
-; GFX1200-NEXT: v_mov_b16_e32 v7.l, v8.l
-; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 8, s2
-; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, s1
-; GFX1200-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
-; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.h, v7.l
-; GFX1200-NEXT: v_or_b16 v7.h, v5.l, v8.l
-; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, 6, v6.h
-; GFX1200-NEXT: v_cndmask_b16 v4.l, 0x7f, v4.l, s0
-; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, 6
-; GFX1200-NEXT: v_or_b16 v3.h, v7.h, v3.h
-; GFX1200-NEXT: v_and_b16 v7.h, v8.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v10.l, v4.h, v8.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, v6.l, v8.l
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v7.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v8.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v4.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, -1
+; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v7.h
+; GFX1200-NEXT: v_mov_b16_e32 v5.l, v10.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v10, 31, v3
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v4.h, 0, s1
+; GFX1200-NEXT: v_and_b16 v4.h, v8.h, v5.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v4.l, 0x7f, v4.l, vcc_lo
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v9.l, v5.l
+; GFX1200-NEXT: v_cndmask_b16 v5.l, 0, 8, s1
+; GFX1200-NEXT: v_lshlrev_b16 v5.h, 7, v10.l
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v9.h, v8.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v4.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, 6
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v14.l, v14.l
+; GFX1200-NEXT: v_or_b16 v4.h, v5.h, v5.l
+; GFX1200-NEXT: v_and_b16 v10.l, v9.l, 1
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
+; GFX1200-NEXT: v_lshlrev_b16 v5.l, 3, v3.l
; GFX1200-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX1200-NEXT: v_or_b16 v8.h, v5.l, v9.l
-; GFX1200-NEXT: v_and_b16 v9.l, v10.l, 1
+; GFX1200-NEXT: v_or_b16 v3.h, v4.h, v3.h
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v7.l, 0, s0
+; GFX1200-NEXT: v_and_b16 v7.l, v6.l, 63
+; GFX1200-NEXT: v_or_b16 v5.l, v5.h, v5.l
+; GFX1200-NEXT: v_or_b16 v10.l, v11.l, v10.l
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, v8.l, v8.h
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v8.l, v12.l
+; GFX1200-NEXT: v_or_b16 v4.h, v5.l, v4.h
+; GFX1200-NEXT: v_and_b16 v5.l, v7.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
+; GFX1200-NEXT: v_and_b16 v7.l, v7.l, v10.l
; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v9.h
-; GFX1200-NEXT: v_and_b16 v9.h, v7.h, 1
-; GFX1200-NEXT: v_or_b16 v5.h, v8.h, v5.h
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v7.l
-; GFX1200-NEXT: v_or_b16 v7.l, v11.l, v9.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v9.l, v14.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_or_b16 v8.h, v12.l, v9.h
+; GFX1200-NEXT: v_sub_nc_u16 v3.l, 2, v8.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v4.h, v3.h, s0
+; GFX1200-NEXT: v_or_b16 v5.l, v11.l, v5.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.h, 8, v2.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v5.h, v3.h, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v13.l
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v9.l
-; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v7.l
-; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v9.h, 8, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, v7.l, vcc_lo
+; GFX1200-NEXT: v_min_u16 v3.l, v3.l, 15
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v14.l
+; GFX1200-NEXT: v_and_b16 v4.h, v6.l, v5.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v12.l
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v9.l, v7.l
+; GFX1200-NEXT: v_sub_nc_u16 v7.l, v3.l, 1 clamp
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v5.l, vcc_lo
-; GFX1200-NEXT: v_min_u16 v4.h, v5.h, 15
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.h, 0, v6.l, s0
-; GFX1200-NEXT: v_add_nc_u16 v5.l, v7.h, v6.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v14.l
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v13.l, v13.l
-; GFX1200-NEXT: v_sub_nc_u16 v6.h, v4.h, 1 clamp
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v10.l, v5.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v5.l
-; GFX1200-NEXT: v_and_b16 v7.l, 0x3ff, v6.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v5.h, vcc_lo
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v7.h, v4.h
+; GFX1200-NEXT: v_and_b16 v5.h, 0x3ff, v6.l
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, v7.l, 1
+; GFX1200-NEXT: v_and_b16 v8.h, 0x80, v8.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v4.h
+; GFX1200-NEXT: v_or_b16 v9.l, 0x400, v5.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, 0x7f, v3.h, vcc_lo
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s0
-; GFX1200-NEXT: v_or_b16 v8.h, 0x400, v7.l
-; GFX1200-NEXT: v_and_b16 v10.l, v6.l, 63
+; GFX1200-NEXT: v_cndmask_b16 v9.h, 0, 8, vcc_lo
; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, vcc_lo
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v8.l
-; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 8, vcc_lo
-; GFX1200-NEXT: v_lshrrev_b16 v10.h, v4.h, v8.h
-; GFX1200-NEXT: v_and_b16 v7.h, v8.h, v7.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 7, v7.l
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, 6
-; GFX1200-NEXT: v_and_b16 v9.h, 0x80, v9.h
-; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, s0
+; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, 0, vcc_lo
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v5.h
+; GFX1200-NEXT: v_or_b16 v9.h, v8.h, v9.h
+; GFX1200-NEXT: v_and_b16 v7.h, v9.l, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, v7.l, v9.l
+; GFX1200-NEXT: v_add_nc_u16 v6.h, v6.h, v10.l
+; GFX1200-NEXT: v_lshrrev_b16 v10.l, v3.l, v9.l
+; GFX1200-NEXT: v_or_b16 v5.l, v9.h, v5.l
; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.h
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v3.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v8.h
-; GFX1200-NEXT: v_or_b16 v8.l, v9.h, v8.l
+; GFX1200-NEXT: v_and_b16 v7.h, v6.l, 63
+; GFX1200-NEXT: v_add_nc_u16 v6.h, v6.h, 6
+; GFX1200-NEXT: v_and_b16 v9.h, v10.l, 1
+; GFX1200-NEXT: v_and_b16 v9.l, v5.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v10.l
-; GFX1200-NEXT: v_and_b16 v10.l, v10.h, 1
-; GFX1200-NEXT: v_and_b16 v11.h, v7.l, 1
-; GFX1200-NEXT: v_or_b16 v7.h, v9.h, v7.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v6.h
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, s0
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_or_b16 v9.h, v11.l, v9.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc_lo
-; GFX1200-NEXT: v_or_b16 v10.l, v11.l, v10.l
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v4.h
-; GFX1200-NEXT: v_or_b16 v5.l, v7.h, v5.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.h, v1.l
-; GFX1200-NEXT: v_or_b16 v11.l, v12.l, v11.h
-; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v10.l
-; GFX1200-NEXT: v_or_b16 v5.h, v8.l, v5.h
-; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v1
-; GFX1200-NEXT: v_sub_nc_u16 v3.l, 2, v7.h
-; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v11.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v7.h, v8.h, v7.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, 0x7f, v3.h, s1
+; GFX1200-NEXT: v_and_b16 v7.l, v7.l, v9.h
+; GFX1200-NEXT: v_mov_b16_e32 v11.l, v13.l
+; GFX1200-NEXT: v_or_b16 v4.h, v7.h, v4.h
+; GFX1200-NEXT: v_lshrrev_b32_e32 v14, 16, v0
; GFX1200-NEXT: v_lshlrev_b16 v3.h, 8, v3.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, v5.h, s0
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v2.l
-; GFX1200-NEXT: v_min_u16 v3.l, v3.l, 15
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v7.l, v6.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v6.h, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, v7.l, vcc_lo
+; GFX1200-NEXT: v_or_b16 v3.l, v11.l, v9.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v9.l, v1.l
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v6.h
+; GFX1200-NEXT: v_lshrrev_b32_e32 v11, 31, v2
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-NEXT: v_and_b16 v3.l, v6.l, v3.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, 2, v9.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, v5.l, vcc_lo
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v10.l, v7.l
+; GFX1200-NEXT: v_lshlrev_b16 v9.h, 7, v11.l
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v5.h, v3.l
+; GFX1200-NEXT: v_min_u16 v5.l, v6.h, 15
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v1.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v6.l
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v2.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v3.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v5.l, 1 clamp
+; GFX1200-NEXT: v_and_b16 v2.h, 0x3ff, v5.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.l, v5.l, v9.h, s0
-; GFX1200-NEXT: v_sub_nc_u16 v6.h, v3.l, 1 clamp
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.h
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v10.h, v6.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v1.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v10, 31, v2
+; GFX1200-NEXT: v_cndmask_b16 v7.h, 0, 8, s0
+; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s0
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s1
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, v6.h, 1
+; GFX1200-NEXT: v_or_b16 v10.h, 0x400, v2.h
+; GFX1200-NEXT: v_or_b16 v7.h, v9.h, v7.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
-; GFX1200-NEXT: v_lshlrev_b16 v8.h, v6.h, 1
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v10.l, 7, v10.l
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, vcc_lo
-; GFX1200-NEXT: v_mov_b16_e32 v7.l, v8.l
-; GFX1200-NEXT: v_and_b16 v8.l, 0x3ff, v6.l
-; GFX1200-NEXT: v_add_nc_u16 v8.h, v8.h, -1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, s1
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v9.l, v7.l
-; GFX1200-NEXT: v_or_b16 v9.l, 0x400, v8.l
-; GFX1200-NEXT: v_cndmask_b16 v7.l, 0, 8, s1
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, 7, v8.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v2.h, 6
-; GFX1200-NEXT: v_and_b16 v8.h, v9.l, v8.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_or_b16 v7.l, v10.l, v7.l
-; GFX1200-NEXT: v_lshrrev_b16 v10.h, v3.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v9.l
-; GFX1200-NEXT: v_lshlrev_b16 v9.h, 3, v2.h
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v8.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v2.h
-; GFX1200-NEXT: v_and_b16 v2.h, v6.l, 63
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
-; GFX1200-NEXT: v_or_b16 v8.h, v10.l, v9.h
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, v8.h, vcc_lo
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, v10.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, -1
+; GFX1200-NEXT: v_and_b16 v8.h, v5.h, 63
+; GFX1200-NEXT: v_or_b16 v6.l, v7.h, v6.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.h, v5.l, v10.h
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, 6
+; GFX1200-NEXT: v_and_b16 v7.l, v10.h, v7.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s1
+; GFX1200-NEXT: v_lshrrev_b16 v2.h, 7, v2.h
+; GFX1200-NEXT: v_and_b16 v10.l, v7.h, 1
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v10.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 3, v8.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, 6, v5.h
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v2.l, v2.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v2.l, v2.l
-; GFX1200-NEXT: v_or_b16 v2.l, v7.l, v5.h
-; GFX1200-NEXT: v_and_b16 v5.h, v10.h, 1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v2.h
-; GFX1200-NEXT: v_mov_b16_e32 v7.l, v11.l
-; GFX1200-NEXT: v_or_b16 v4.h, v8.h, v4.h
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v5.l, 0x7f, v5.l, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v14.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v8.h
+; GFX1200-NEXT: v_or_b16 v7.l, v9.h, v7.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s1
-; GFX1200-NEXT: v_or_b16 v5.h, v7.l, v5.h
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v13.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v3.l
-; GFX1200-NEXT: v_and_b16 v3.l, v8.l, 1
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v4.h, v2.l, s0
-; GFX1200-NEXT: v_and_b16 v2.h, v6.h, v5.h
-; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v7.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v4.h, v13.l
-; GFX1200-NEXT: v_or_b16 v3.l, v9.l, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v4.h, 0x7f, v4.h, s1
+; GFX1200-NEXT: v_or_b16 v8.h, v11.l, v10.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v10.l, vcc_lo
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, v2.h, s1
-; GFX1200-NEXT: v_min_u16 v5.h, v5.h, 15
-; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v4.h
-; GFX1200-NEXT: v_and_b16 v3.l, v6.l, v3.l
-; GFX1200-NEXT: v_and_b16 v10.l, v4.h, 63
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v10.h, v2.h
-; GFX1200-NEXT: v_sub_nc_u16 v6.h, v5.h, 1 clamp
-; GFX1200-NEXT: v_or_b16 v6.l, 0x400, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v8.l, v3.l
-; GFX1200-NEXT: v_lshrrev_b16 v8.h, 7, v8.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v3.l, v7.l, v3.l
+; GFX1200-NEXT: v_and_b16 v7.l, v2.h, 1
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v8.l
+; GFX1200-NEXT: v_and_b16 v6.h, v6.h, v8.h
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v13.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v1
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v6.l, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v2.l, 0, v6.h, s0
+; GFX1200-NEXT: v_or_b16 v5.l, v10.l, v7.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v13.l
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v12.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v13.l
+; GFX1200-NEXT: v_add_nc_u16 v2.l, v7.h, v2.l
+; GFX1200-NEXT: v_and_b16 v5.l, v5.h, v5.l
+; GFX1200-NEXT: v_sub_nc_u16 v5.h, 2, v6.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v9.h, vcc_lo
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v2.l
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v2.h, v5.l
+; GFX1200-NEXT: v_min_u16 v5.l, v5.h, 15
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, 8, v1.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v7.h, 0, 8, vcc_lo
; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v2.h
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, v6.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v10.h, v5.h, v6.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v3.l
-; GFX1200-NEXT: v_lshrrev_b16 v9.h, 8, v1.l
+; GFX1200-NEXT: v_sub_nc_u16 v7.l, v5.l, 1 clamp
+; GFX1200-NEXT: v_and_b16 v5.h, 0x80, v5.h
+; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, 0, vcc_lo
+; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v12.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s0
+; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v9.h, v7.l, 1
+; GFX1200-NEXT: v_or_b16 v7.h, v5.h, v7.h
; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s0
-; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
-; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 8, s0
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; GFX1200-NEXT: v_and_b16 v11.h, v8.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v4.h, 6, v4.h
-; GFX1200-NEXT: v_and_b16 v9.l, v6.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, v6.h, v6.l
-; GFX1200-NEXT: v_and_b16 v9.h, 0x80, v9.h
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, vcc_lo
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_mov_b16_e32 v9.l, v11.l
-; GFX1200-NEXT: v_or_b16 v8.l, v9.h, v8.l
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v9.l, v8.l
+; GFX1200-NEXT: v_or_b16 v9.l, 0x400, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v9.h, v9.h, -1
+; GFX1200-NEXT: v_or_b16 v2.l, v7.h, v2.l
+; GFX1200-NEXT: v_and_b16 v7.h, v6.l, 63
+; GFX1200-NEXT: v_lshrrev_b16 v8.h, 7, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, 6
+; GFX1200-NEXT: v_and_b16 v9.h, v9.l, v9.h
+; GFX1200-NEXT: v_lshrrev_b16 v10.l, v5.l, v9.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v7.h
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 6, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, v7.l, v9.l
+; GFX1200-NEXT: v_and_b16 v10.h, v10.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v10.l
-; GFX1200-NEXT: v_and_b16 v10.l, v10.h, 1
-; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, v9.l
-; GFX1200-NEXT: v_or_b16 v2.h, v8.l, v2.h
-; GFX1200-NEXT: v_mov_b16_e32 v11.l, v12.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s1
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.h
+; GFX1200-NEXT: v_and_b16 v9.h, v8.h, 1
+; GFX1200-NEXT: v_or_b16 v7.h, v5.h, v7.h
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v9.l, v0.l
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v8.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
-; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, 6
-; GFX1200-NEXT: v_or_b16 v9.l, v11.l, v10.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_mov_b16_e32 v12.l, v15.l
-; GFX1200-NEXT: v_lshlrev_b16 v5.h, 3, v7.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v9.l
-; GFX1200-NEXT: v_or_b16 v6.h, v12.l, v11.h
-; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v0
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_or_b16 v5.h, v9.h, v5.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v6.l, s0
-; GFX1200-NEXT: v_and_b16 v4.h, v4.h, v6.h
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v0.l
-; GFX1200-NEXT: v_or_b16 v3.l, v5.h, v3.l
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v7.h
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v10.h, v6.l
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v8.h, v4.h
-; GFX1200-NEXT: v_sub_nc_u16 v8.l, 2, v6.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v7.h, v0.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v3.l, v2.h, s0
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v6.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v4.h
-; GFX1200-NEXT: v_min_u16 v5.h, v8.l, 15
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s1
+; GFX1200-NEXT: v_or_b16 v9.h, v11.l, v9.h
+; GFX1200-NEXT: v_or_b16 v2.h, v7.h, v2.h
+; GFX1200-NEXT: v_sub_nc_u16 v7.h, 2, v9.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.l
+; GFX1200-NEXT: v_or_b16 v10.h, v12.l, v10.h
+; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v9.h
+; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.h, v2.l, s0
+; GFX1200-NEXT: v_min_u16 v2.h, v7.h, 15
; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v1.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s1
+; GFX1200-NEXT: v_and_b16 v7.l, v7.l, v10.h
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v8.h, v6.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
-; GFX1200-NEXT: v_sub_nc_u16 v8.h, v5.h, 1 clamp
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, vcc_lo
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v9.h, s0
-; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v1.l, v1.l
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v10.l
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, v8.h, 1
+; GFX1200-NEXT: v_cndmask_b16 v3.l, 0x7f, v3.l, vcc_lo
+; GFX1200-NEXT: v_sub_nc_u16 v7.h, v2.h, 1 clamp
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v5.h, s0
+; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v7.l, s1
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v5.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v7.l, v0.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v2.h
+; GFX1200-NEXT: v_cndmask_b16 v2.l, 0x7f, v2.l, s2
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v10.l, v6.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s1
+; GFX1200-NEXT: v_and_b16 v5.h, 0x3ff, v7.l
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, v7.h, 1
; GFX1200-NEXT: v_lshrrev_b32_e32 v10, 31, v1
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, 8, s1
-; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v14.l, v14.l
-; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, v8.l
-; GFX1200-NEXT: v_and_b16 v8.l, 0x3ff, v7.h
-; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
-; GFX1200-NEXT: v_lshlrev_b16 v10.l, 7, v10.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 7, v6.l
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v6.h, v8.l
+; GFX1200-NEXT: v_or_b16 v6.h, 0x400, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.h, -1
+; GFX1200-NEXT: v_lshlrev_b16 v9.h, 7, v10.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v8.h, 0, 8, s0
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v1.h, 6
+; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s0
+; GFX1200-NEXT: v_and_b16 v1.l, v6.h, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v10.l, v2.h, v6.h
+; GFX1200-NEXT: v_or_b16 v8.l, v9.h, v8.h
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, 3, v1.h
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v10.h, v14.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v5.l, 0, s1
+; GFX1200-NEXT: v_or_b16 v6.l, v8.l, v6.l
+; GFX1200-NEXT: v_or_b16 v5.l, v9.h, v8.h
+; GFX1200-NEXT: v_and_b16 v8.h, v10.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0x7f, v2.h, s0
-; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, 6
-; GFX1200-NEXT: v_or_b16 v10.h, 0x400, v8.l
-; GFX1200-NEXT: v_lshrrev_b16 v8.l, 7, v8.l
-; GFX1200-NEXT: v_or_b16 v1.h, v10.l, v1.h
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v12.l
-; GFX1200-NEXT: v_lshlrev_b16 v11.l, 3, v7.l
-; GFX1200-NEXT: v_and_b16 v3.l, v10.h, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v9.l, v5.h, v10.h
-; GFX1200-NEXT: v_or_b16 v1.h, v1.h, v6.l
-; GFX1200-NEXT: v_and_b16 v9.h, v8.l, 1
-; GFX1200-NEXT: v_or_b16 v6.l, v10.l, v11.l
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v3.l
-; GFX1200-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v3.l, v6.l, v4.h
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v7.l
-; GFX1200-NEXT: v_and_b16 v4.h, v9.l, 1
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v7.l, v12.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_mov_b16_e32 v6.l, v11.l
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v3.l, v1.h, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v13.l
-; GFX1200-NEXT: v_or_b16 v3.l, v6.l, v4.h
-; GFX1200-NEXT: v_sub_nc_u16 v4.h, 2, v7.l
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, v8.h, v10.h
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.h, v10.l, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v12.l
-; GFX1200-NEXT: v_min_u16 v1.h, v4.h, 15
-; GFX1200-NEXT: v_and_b16 v3.l, v6.l, v3.l
-; GFX1200-NEXT: v_and_b16 v4.h, v7.h, 63
-; GFX1200-NEXT: v_lshrrev_b16 v7.h, 6, v7.h
-; GFX1200-NEXT: v_and_b16 v10.l, v5.h, 63
-; GFX1200-NEXT: v_sub_nc_u16 v6.l, v1.h, 1 clamp
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v3.l, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v4.h
-; GFX1200-NEXT: v_and_b16 v4.h, 0x3ff, v5.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 6, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v8.h, v6.l, 1
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v9.l, v3.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s0
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v1.h
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v7.h, v6.h
+; GFX1200-NEXT: v_or_b16 v1.l, v5.l, v1.l
+; GFX1200-NEXT: v_sub_nc_u16 v5.l, 2, v10.h
+; GFX1200-NEXT: v_or_b16 v1.h, v11.l, v8.h
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v2.h, v14.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v5.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s2
-; GFX1200-NEXT: v_or_b16 v10.h, 0x400, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v10.l
-; GFX1200-NEXT: v_add_nc_u16 v8.h, v8.h, -1
-; GFX1200-NEXT: v_lshrrev_b16 v4.h, 7, v4.h
-; GFX1200-NEXT: v_or_b16 v9.h, v11.l, v9.h
-; GFX1200-NEXT: v_lshrrev_b16 v11.h, v1.h, v10.h
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v6.l, s0
+; GFX1200-NEXT: v_min_u16 v5.l, v5.l, 15
+; GFX1200-NEXT: v_and_b16 v6.l, v7.l, 63
+; GFX1200-NEXT: v_and_b16 v1.h, v6.h, v1.h
+; GFX1200-NEXT: v_and_b16 v8.h, v2.h, 63
+; GFX1200-NEXT: v_and_b16 v8.l, v5.h, 1
+; GFX1200-NEXT: v_sub_nc_u16 v6.h, v5.l, 1 clamp
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v6.l
+; GFX1200-NEXT: v_and_b16 v6.l, 0x3ff, v2.h
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, 6, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v2.h, 6, v2.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, s2
-; GFX1200-NEXT: v_and_b16 v8.h, v10.h, v8.h
-; GFX1200-NEXT: v_and_b16 v10.l, v4.h, 1
-; GFX1200-NEXT: v_and_b16 v7.h, v7.h, v9.h
-; GFX1200-NEXT: v_and_b16 v9.h, v11.h, 1
-; GFX1200-NEXT: v_mov_b16_e32 v11.l, v14.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, v6.l, v10.h
-; GFX1200-NEXT: v_add_nc_u16 v7.h, v8.l, v7.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s3, 0, v1.h
-; GFX1200-NEXT: v_or_b16 v8.h, v11.l, v10.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s0
+; GFX1200-NEXT: v_or_b16 v11.h, 0x400, v6.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v8.h
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v6.l
+; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
+; GFX1200-NEXT: v_or_b16 v8.l, v11.l, v8.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v1.h, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, s2
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 7, v3.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v7.h
-; GFX1200-NEXT: v_cmp_o_f16_e64 s2, v13.l, v13.l
-; GFX1200-NEXT: v_and_b16 v5.h, v5.h, v8.h
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v14.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v12, 0, 1, s0
+; GFX1200-NEXT: v_and_b16 v8.h, v6.l, 1
+; GFX1200-NEXT: v_and_b16 v7.h, v11.h, v7.h
+; GFX1200-NEXT: v_and_b16 v7.l, v7.l, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v11.h
+; GFX1200-NEXT: v_mov_b16_e32 v11.l, v12.l
+; GFX1200-NEXT: v_lshrrev_b16 v12.l, v5.l, v11.h
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v7.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, v7.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.l
+; GFX1200-NEXT: v_or_b16 v7.h, v11.l, v8.h
+; GFX1200-NEXT: v_and_b16 v8.l, v12.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s4
+; GFX1200-NEXT: v_cndmask_b32_e64 v15, 0, 1, s0
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 7, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v10.l, v1.h
+; GFX1200-NEXT: v_and_b16 v2.h, v2.h, v7.h
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v13.l
+; GFX1200-NEXT: v_mov_b16_e32 v11.l, v15.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v7.h, v7.h, 0, vcc_lo
-; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7f, v1.l, s2
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, v5.h
-; GFX1200-NEXT: v_or_b16 v8.l, v10.l, v9.h
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s5, 7, v4.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_and_b16 v5.h, v6.l, v8.l
-; GFX1200-NEXT: v_mov_b16_e32 v6.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v9, 31, v0
-; GFX1200-NEXT: v_or_b16 v2.h, v2.h, v1.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s5
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v5.h, s3
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 8, v0.l
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.h, v6.l
-; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 8, s4
-; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, v8.l
-; GFX1200-NEXT: v_add_nc_u16 v1.h, v11.h, v1.h
-; GFX1200-NEXT: v_and_b16 v5.h, 0x80, v5.h
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, 6
-; GFX1200-NEXT: v_lshlrev_b16 v8.h, 7, v9.l
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, s5
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 7, v1.h
-; GFX1200-NEXT: v_or_b16 v0.h, v5.h, v6.h
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v7.l, 6
-; GFX1200-NEXT: v_lshlrev_b16 v7.l, 3, v6.l
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v6.l
+; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, vcc_lo
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 7, v1.h
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v6.l, v2.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 8, s3
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, 0, s3
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v6.h
-; GFX1200-NEXT: v_or_b16 v7.l, v5.h, v7.l
-; GFX1200-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX1200-NEXT: v_or_b16 v8.l, v8.h, v8.l
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s3, 1, v6.h
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v9.h, s0
+; GFX1200-NEXT: v_or_b16 v7.l, v11.l, v8.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, 0, s2
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 7, v2.h
+; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v13.l, v13.l
+; GFX1200-NEXT: v_and_b16 v6.l, v6.h, v7.l
+; GFX1200-NEXT: v_mov_b16_e32 v5.l, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.h, 8, v0.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s3
+; GFX1200-NEXT: v_cndmask_b16 v7.h, 0, 8, s2
+; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v6.l, s1
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v9.l, v5.l
+; GFX1200-NEXT: v_and_b16 v6.h, 0x80, v6.h
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v10.h, v7.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v10, 31, v0
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v12.l, v6.l
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v5.l, 6
+; GFX1200-NEXT: v_or_b16 v0.h, v6.h, v7.h
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, 6
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, 7, v10.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 7, v6.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 3, v5.l
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s3
+; GFX1200-NEXT: v_lshlrev_b16 v9.l, 3, v7.l
+; GFX1200-NEXT: v_or_b16 v0.h, v0.h, v1.h
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 8, s1
+; GFX1200-NEXT: v_or_b16 v7.h, v6.h, v7.h
+; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s1
; GFX1200-NEXT: v_or_b16 v9.l, v8.h, v9.l
-; GFX1200-NEXT: v_or_b16 v3.l, v7.l, v7.h
-; GFX1200-NEXT: v_and_b16 v1.l, 0xff, v5.l
-; GFX1200-NEXT: v_or_b16 v1.h, v8.l, v1.h
-; GFX1200-NEXT: v_mov_b16_e32 v5.l, v2.h
-; GFX1200-NEXT: v_or_b16 v4.h, v9.l, v4.h
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v5.l
+; GFX1200-NEXT: v_or_b16 v8.l, v8.h, v8.l
+; GFX1200-NEXT: v_or_b16 v1.h, v7.h, v5.h
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v7.l
+; GFX1200-NEXT: v_or_b16 v2.h, v9.l, v2.h
+; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7f, v1.l, s0
+; GFX1200-NEXT: v_or_b16 v5.l, v8.l, v6.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v3.l, v0.h, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v1.h, v0.h, vcc_lo
; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v0.l
-; GFX1200-NEXT: v_or_b16 v6.h, v4.l, v3.h
+; GFX1200-NEXT: v_and_b16 v2.l, 0xff, v2.l
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v4.h, v1.h, s3
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v2.h, v5.l, s1
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v14.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v5.h, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v6.h, vcc_lo
; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v0.l
-; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX1200-NEXT: v_cndmask_b16 v0.l, v1.h, v8.h, s0
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0x7f, v2.l, s1
-; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v12.l, v12.l
+; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v14.l, v14.l
+; GFX1200-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.l, v1.h, v8.h, s1
+; GFX1200-NEXT: v_and_b16 v1.h, 0xff, v4.h
+; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v1.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-NEXT: v_cndmask_b16 v0.h, 0x7f, v0.h, vcc_lo
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_lshlrev_b16 v1.h, 8, v1.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_or_b16 v6.h, v4.l, v3.h
; GFX1200-NEXT: v_cndmask_b16 v0.l, 0x7f, v0.l, s0
+; GFX1200-NEXT: v_or_b16 v6.l, v1.h, v2.h
+; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX1200-NEXT: v_and_b16 v0.h, 0xff, v0.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_or_b16 v6.l, v1.l, v1.h
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v0.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1200-NEXT: v_mov_b16_e32 v1.h, v2.l
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v0.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX1200-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
-; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v2.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v2
; GFX1200-NEXT: v_lshrrev_b32_e32 v5, 8, v6
-; GFX1200-NEXT: v_mov_b16_e32 v2.l, v2.h
; GFX1200-NEXT: v_mov_b16_e32 v4.l, v6.l
+; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v1.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX1200-NEXT: v_mov_b16_e32 v6.l, v6.h
; GFX1200-NEXT: s_setpc_b64 s[30:31]
;
@@ -2797,21 +2757,20 @@ define <7 x i8> @to_fp8_v7f16(<7 x half> %x) {
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v4.h, v1
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v4.l, v1
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v7.h, v3
; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v7.l, v2
-; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v4.l, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v5, 8, v7 :: v_dual_lshlrev_b32 v6, 16, v1
-; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v4
+; GFX1250-TRUE16-NEXT: v_cvt_pk_fp8_f16_e64 v0.l, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v4
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v7
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.l
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.l
; GFX1250-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[6:7]
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v6.l, v7.h
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.l
; GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
@@ -3251,447 +3210,440 @@ define <5 x i8> @to_bf8_v5f16(<5 x half> %x) {
; GFX1200-NEXT: s_wait_samplecnt 0x0
; GFX1200-NEXT: s_wait_bvhcnt 0x0
; GFX1200-NEXT: s_wait_kmcnt 0x0
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v3.l, v2.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v3.h, v2.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v3.h, v2.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v3.l, v2.l
; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v2
+; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 31, v2
; GFX1200-NEXT: v_lshrrev_b16 v4.l, 8, v2.l
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v2.l
-; GFX1200-NEXT: v_sub_nc_u16 v4.h, -5, v3.l
-; GFX1200-NEXT: v_and_b16 v5.l, 0x3ff, v3.h
-; GFX1200-NEXT: v_and_b16 v5.h, 0x7f, v3.h
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v12.l
-; GFX1200-NEXT: v_lshrrev_b16 v3.h, 7, v3.h
+; GFX1200-NEXT: v_sub_nc_u16 v4.h, -5, v3.h
+; GFX1200-NEXT: v_and_b16 v2.h, 0x3ff, v3.l
+; GFX1200-NEXT: v_and_b16 v5.l, 0x7f, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v3.l, 7, v3.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v12.l
; GFX1200-NEXT: v_min_u16 v4.h, v4.h, 15
-; GFX1200-NEXT: v_or_b16 v7.l, 0x400, v5.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v5.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.h
-; GFX1200-NEXT: v_sub_nc_u16 v9.l, -5, v6.h
-; GFX1200-NEXT: v_sub_nc_u16 v7.h, v4.h, 1 clamp
-; GFX1200-NEXT: v_lshrrev_b16 v10.l, v4.h, v7.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.l, v12.l
+; GFX1200-NEXT: v_or_b16 v7.h, 0x400, v2.h
+; GFX1200-NEXT: v_lshrrev_b16 v2.h, 8, v2.h
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v5.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.h, v12.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.l, v4.h, 1 clamp
+; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v5.h
+; GFX1200-NEXT: v_and_b16 v9.l, v2.h, 1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.h
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v7.h, 1
-; GFX1200-NEXT: v_and_b16 v4.h, v5.l, 1
-; GFX1200-NEXT: v_min_u16 v9.l, v9.l, 15
-; GFX1200-NEXT: v_and_b16 v9.h, 0x7f, v6.l
-; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v6.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s1
+; GFX1200-NEXT: v_sub_nc_u16 v9.h, -5, v6.h
+; GFX1200-NEXT: v_lshlrev_b16 v8.l, v6.l, 1
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v4.h
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, v6.l, v7.h
+; GFX1200-NEXT: v_or_b16 v9.l, v10.l, v9.l
+; GFX1200-NEXT: v_lshrrev_b16 v10.l, v4.h, v7.h
; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
-; GFX1200-NEXT: v_or_b16 v4.h, v11.l, v4.h
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, 7, v6.l
+; GFX1200-NEXT: v_or_b16 v4.h, 0x400, v8.h
+; GFX1200-NEXT: v_and_b16 v10.h, 0x7f, v5.h
+; GFX1200-NEXT: v_and_b16 v3.l, v3.l, v9.l
+; GFX1200-NEXT: v_and_b16 v9.l, v10.l, 1
+; GFX1200-NEXT: v_and_b16 v8.l, v7.h, v8.l
; GFX1200-NEXT: v_and_b16 v4.l, 0x80, v4.l
-; GFX1200-NEXT: v_or_b16 v10.h, 0x400, v8.h
-; GFX1200-NEXT: v_and_b16 v8.l, v7.l, v8.l
-; GFX1200-NEXT: v_and_b16 v3.h, v3.h, v4.h
-; GFX1200-NEXT: v_and_b16 v4.h, v10.l, 1
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, v7.h, v7.l
-; GFX1200-NEXT: v_sub_nc_u16 v7.h, v9.l, 1 clamp
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v8.l
-; GFX1200-NEXT: v_add_nc_u16 v3.h, v5.l, v3.h
-; GFX1200-NEXT: v_lshrrev_b16 v8.h, 8, v8.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, v9.l, v10.h
-; GFX1200-NEXT: v_or_b16 v5.h, 0x7c, v4.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s3, 0, v10.h
+; GFX1200-NEXT: v_add_nc_u16 v2.h, v2.h, v3.l
+; GFX1200-NEXT: v_lshrrev_b16 v3.l, 8, v8.h
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v8.l
+; GFX1200-NEXT: v_min_u16 v8.l, v9.h, 15
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 3, v3.h
-; GFX1200-NEXT: v_and_b16 v9.h, v5.l, 1
+; GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, s3
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v5.h
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v2.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s2
+; GFX1200-NEXT: v_sub_nc_u16 v7.h, v8.l, 1 clamp
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 3, v2.h
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s3, 0, v8.l
; GFX1200-NEXT: v_cmp_class_f16_e64 s6, v2.l, 0x204
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v11.l
+; GFX1200-NEXT: v_or_b16 v8.h, v11.l, v9.l
+; GFX1200-NEXT: v_lshrrev_b16 v9.l, v8.l, v4.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v13, 0, 1, s1
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.l
; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s2
-; GFX1200-NEXT: v_and_b16 v9.l, v8.h, 1
-; GFX1200-NEXT: v_or_b16 v4.h, v8.l, v4.h
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, v7.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v7.h, v7.h, v10.h
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v11.l
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s2
-; GFX1200-NEXT: v_and_b16 v4.h, v7.l, v4.h
-; GFX1200-NEXT: v_add_nc_u16 v7.l, v8.l, -1
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v13.l
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, 14
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 3, v3.h
-; GFX1200-NEXT: v_cndmask_b16 v4.h, 0, v4.h, s0
-; GFX1200-NEXT: v_and_b16 v7.l, v10.h, v7.l
-; GFX1200-NEXT: v_or_b16 v8.l, v8.l, v9.l
-; GFX1200-NEXT: v_cmp_eq_u16_e64 s3, 30, v3.l
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s5, 30, v3.l
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v10.l, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v7.l
-; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v8.l
-; GFX1200-NEXT: v_lshlrev_b16 v8.l, 2, v3.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v4.h
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v8.h, v6.l
-; GFX1200-NEXT: v_or_b16 v8.l, v4.l, v8.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_mov_b16_e32 v7.l, v10.l
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s2
+; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v2.l, v2.l
+; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v8.h
+; GFX1200-NEXT: v_lshlrev_b16 v8.h, v7.h, 1
+; GFX1200-NEXT: v_add_nc_u16 v3.h, v3.h, v11.l
+; GFX1200-NEXT: v_mov_b16_e32 v11.l, v14.l
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v2.l, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v6.l, s1
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.h, -1
+; GFX1200-NEXT: v_and_b16 v8.h, v3.l, 1
+; GFX1200-NEXT: v_add_nc_u16 v3.h, v3.h, 14
+; GFX1200-NEXT: v_and_b16 v9.h, v9.l, 1
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v10.l, v6.l
+; GFX1200-NEXT: v_and_b16 v8.l, v4.h, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v4.h, v7.h, v4.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 2, v3.h
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s2, 1, v3.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 3, v6.l
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s4, 0, v8.l
+; GFX1200-NEXT: v_or_b16 v8.l, v11.l, v8.h
+; GFX1200-NEXT: v_or_b16 v7.h, v4.l, v7.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s5, 30, v3.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v8.h, 0, 4, s0
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, s0
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 3, v6.l
-; GFX1200-NEXT: v_or_b16 v3.h, v8.l, v3.h
-; GFX1200-NEXT: v_or_b16 v7.l, v7.l, v9.h
+; GFX1200-NEXT: v_cndmask_b16 v8.h, 0, 4, s1
+; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s1
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s4
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 3, v2.h
+; GFX1200-NEXT: v_or_b16 v2.h, v7.h, v2.h
; GFX1200-NEXT: v_or_b16 v8.h, v4.l, v8.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s0, 1, v3.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.l, v6.l, 0, s4
-; GFX1200-NEXT: v_and_b16 v7.l, v7.h, v7.l
-; GFX1200-NEXT: v_or_b16 v4.h, v8.h, v4.h
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s4
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v7.l, s1
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v4.h, s0
+; GFX1200-NEXT: v_and_b16 v5.h, v5.h, v8.l
+; GFX1200-NEXT: v_cmp_eq_u16_e64 s4, 30, v3.h
+; GFX1200-NEXT: v_sub_nc_u16 v7.l, -5, v2.l
+; GFX1200-NEXT: v_or_b16 v5.l, 0x7c, v4.l
+; GFX1200-NEXT: v_or_b16 v6.l, v8.h, v6.l
+; GFX1200-NEXT: v_or_b16 v9.h, v10.l, v9.h
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v5.h
+; GFX1200-NEXT: s_and_b32 s1, s4, s1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_mov_b16_e32 v7.l, v8.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v8, 31, v2
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v4.h, v1.l
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v5.l, v3.l
-; GFX1200-NEXT: s_and_b32 s0, s3, s2
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v6.h, v7.l
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v6.l, s2
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: s_or_b32 s0, s5, s0
-; GFX1200-NEXT: v_sub_nc_u16 v5.l, -5, v4.h
+; GFX1200-NEXT: s_or_b32 s1, s5, s1
+; GFX1200-NEXT: v_and_b16 v3.h, v4.h, v9.h
+; GFX1200-NEXT: v_min_u16 v4.h, v7.l, 15
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v5.h, s0
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v5.l, s1
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 3, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, 0, v3.h, s3
+; GFX1200-NEXT: v_sub_nc_u16 v5.h, v4.h, 1 clamp
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v4.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v4.l, vcc_lo
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v7, 0, 1, s1
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v4.l, v1.l
+; GFX1200-NEXT: v_add_nc_u16 v3.h, v9.l, v3.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.h, 7, v13.l
+; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v5.l, s6
+; GFX1200-NEXT: v_mov_b16_e32 v6.l, v7.l
+; GFX1200-NEXT: v_and_b16 v5.l, 0x3ff, v4.l
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, v5.h, 1
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v3.h
+; GFX1200-NEXT: v_and_b16 v8.h, 0x7f, v4.l
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.h, v6.l
+; GFX1200-NEXT: v_or_b16 v8.l, 0x400, v5.l
+; GFX1200-NEXT: v_add_nc_u16 v7.l, v7.l, -1
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 4, vcc_lo
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, vcc_lo
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v5.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v8.h
+; GFX1200-NEXT: v_and_b16 v7.l, v8.l, v7.l
+; GFX1200-NEXT: v_or_b16 v6.h, v7.h, v6.h
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, 14
+; GFX1200-NEXT: v_lshrrev_b16 v4.l, 7, v4.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.l
+; GFX1200-NEXT: v_and_b16 v7.l, v5.l, 1
+; GFX1200-NEXT: v_or_b16 v3.h, v6.h, v3.h
+; GFX1200-NEXT: v_lshlrev_b16 v9.l, 2, v6.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.h, v4.h, v8.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s1
+; GFX1200-NEXT: v_or_b16 v6.h, v10.l, v7.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v9.l, v7.h, v9.l
+; GFX1200-NEXT: v_and_b16 v9.h, v8.h, 1
+; GFX1200-NEXT: v_cndmask_b16 v2.h, 0x7e, v2.h, s0
+; GFX1200-NEXT: v_and_b16 v4.l, v4.l, v6.h
; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v3.l
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v2.h, 14
-; GFX1200-NEXT: v_min_u16 v5.l, v5.l, 15
+; GFX1200-NEXT: v_cmp_eq_u16_e64 s1, 30, v6.l
+; GFX1200-NEXT: v_or_b16 v7.l, v9.l, v3.l
+; GFX1200-NEXT: v_or_b16 v9.l, v11.l, v9.h
+; GFX1200-NEXT: v_add_nc_u16 v4.l, v5.l, v4.l
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, v5.h, v8.l
+; GFX1200-NEXT: s_and_b32 s1, s1, s0
+; GFX1200-NEXT: v_lshrrev_b32_e32 v13, 16, v1
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v6.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v4.l
+; GFX1200-NEXT: v_and_b16 v3.l, v5.h, v9.l
+; GFX1200-NEXT: v_or_b16 v4.h, 0x7c, v7.h
+; GFX1200-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v4.l, vcc_lo
-; GFX1200-NEXT: v_lshlrev_b16 v4.l, 7, v8.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v7.l, v3.h, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 4, s0
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v2.l, v2.l
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 2, v2.h
-; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v5.h, s6
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s0
-; GFX1200-NEXT: v_or_b16 v5.h, v4.l, v6.h
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v6.h, v1.l
-; GFX1200-NEXT: v_or_b16 v2.l, v4.l, v2.l
-; GFX1200-NEXT: v_sub_nc_u16 v7.l, v5.l, 1 clamp
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.h, 0x7e, v3.h, vcc_lo
-; GFX1200-NEXT: v_or_b16 v3.l, v5.h, v3.l
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v2.h
-; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v6.l
-; GFX1200-NEXT: v_and_b16 v5.h, 0x3ff, v6.h
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, v7.l, 1
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v6.l
-; GFX1200-NEXT: v_cmp_eq_u16_e64 s1, 30, v2.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 30, v2.h
-; GFX1200-NEXT: v_or_b16 v2.h, 0x400, v5.h
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v7.h, -1
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v3.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v3.l, 0x7f, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 8, v5.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.h, v5.l, v2.h
-; GFX1200-NEXT: v_and_b16 v6.l, v2.h, v6.l
-; GFX1200-NEXT: s_and_b32 s0, s1, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v3.l
-; GFX1200-NEXT: v_or_b16 v3.l, 0x7c, v4.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v5, 0, 1, s0
+; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v3.l, s2
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v5.h, v13.l
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 30, v6.l
+; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, s0
+; GFX1200-NEXT: v_add_nc_u16 v2.l, v2.l, v5.l
+; GFX1200-NEXT: v_add_nc_u16 v3.l, v8.h, v3.l
+; GFX1200-NEXT: v_sub_nc_u16 v6.l, -5, v5.h
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: s_or_b32 s0, s2, s0
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, 7, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v2.h, v7.l, v2.h
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v6.l
-; GFX1200-NEXT: v_and_b16 v6.l, v5.h, 1
-; GFX1200-NEXT: v_and_b16 v8.h, v7.h, 1
+; GFX1200-NEXT: s_or_b32 s1, vcc_lo, s1
+; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v1.l
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v3.l, s0
-; GFX1200-NEXT: v_cmp_class_f16_e64 s0, v12.l, 0x204
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v12.l
-; GFX1200-NEXT: v_or_b16 v6.l, v8.l, v6.l
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 8, v1.l
-; GFX1200-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX1200-NEXT: v_or_b16 v8.l, v9.l, v8.h
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v4.h, s1
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v3.l
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v12.l
+; GFX1200-NEXT: v_add_nc_u16 v2.l, v2.l, 14
+; GFX1200-NEXT: v_min_u16 v6.l, v6.l, 15
+; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v5.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v4.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v4.l, v6.h, v6.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v6.l, v13.l
-; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v5.l
-; GFX1200-NEXT: v_and_b16 v2.h, v2.h, v8.l
+; GFX1200-NEXT: v_cndmask_b16 v6.h, 0, 4, vcc_lo
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v7.h, s1
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 2, v2.l
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v7.h, v13.l
+; GFX1200-NEXT: v_sub_nc_u16 v8.l, v6.l, 1 clamp
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, vcc_lo
+; GFX1200-NEXT: v_or_b16 v6.h, v5.l, v6.h
+; GFX1200-NEXT: v_or_b16 v7.l, v5.l, v7.l
+; GFX1200-NEXT: v_cmp_class_f16_e64 s0, v12.l, 0x204
+; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v7.h
+; GFX1200-NEXT: v_lshlrev_b16 v9.l, v8.l, 1
+; GFX1200-NEXT: v_or_b16 v3.l, v6.h, v3.l
+; GFX1200-NEXT: v_or_b16 v6.h, v7.l, v4.l
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v2.l
+; GFX1200-NEXT: v_or_b16 v7.l, 0x400, v8.h
+; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, v3.l, s0
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v5.h, v4.l
-; GFX1200-NEXT: v_sub_nc_u16 v3.l, -5, v6.l
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, v4.h, s0
+; GFX1200-NEXT: v_and_b16 v4.h, 0x7f, v7.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v6.h, v3.l, vcc_lo
+; GFX1200-NEXT: v_lshrrev_b16 v8.h, 8, v8.h
+; GFX1200-NEXT: v_and_b16 v6.h, v7.l, v9.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v7.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v4.h
+; GFX1200-NEXT: v_lshrrev_b16 v4.h, v6.l, v7.l
+; GFX1200-NEXT: v_cmp_eq_u16_e64 s1, 30, v2.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 30, v2.l
; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v12.l, v12.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, 0, v2.h, vcc_lo
-; GFX1200-NEXT: v_and_b16 v7.l, 0x80, v7.l
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v4.l
-; GFX1200-NEXT: v_min_u16 v3.l, v3.l, 15
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.l, 0x7e, v2.l, s0
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v7.h, v2.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v6.h
+; GFX1200-NEXT: v_and_b16 v6.h, v8.h, 1
; GFX1200-NEXT: v_lshrrev_b32_e32 v12, 16, v0
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v13.l
-; GFX1200-NEXT: v_sub_nc_u16 v6.h, v3.l, 1 clamp
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v2.h
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, vcc_lo
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, v5.l
-; GFX1200-NEXT: v_and_b16 v5.l, 0x3ff, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v7.h, v6.h, 1
-; GFX1200-NEXT: v_and_b16 v9.l, 0x7f, v5.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 4, s0
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v4.h, 14
-; GFX1200-NEXT: v_or_b16 v8.h, 0x400, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v7.h, v7.h, -1
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s0
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, 8, v5.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_lshlrev_b16 v9.h, 2, v4.h
-; GFX1200-NEXT: v_and_b16 v7.h, v8.h, v7.h
-; GFX1200-NEXT: v_or_b16 v8.l, v7.l, v8.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v5.h
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s0
-; GFX1200-NEXT: v_or_b16 v9.h, v7.l, v9.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v7.h
-; GFX1200-NEXT: v_and_b16 v7.h, v5.l, 1
-; GFX1200-NEXT: v_lshrrev_b16 v9.l, v3.l, v8.h
-; GFX1200-NEXT: v_or_b16 v2.h, v8.l, v2.h
-; GFX1200-NEXT: v_or_b16 v8.l, v9.h, v4.l
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v4.h
-; GFX1200-NEXT: v_or_b16 v7.h, v10.l, v7.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s0
-; GFX1200-NEXT: v_and_b16 v10.h, v9.l, 1
-; GFX1200-NEXT: v_lshrrev_b16 v6.h, v6.h, v8.h
+; GFX1200-NEXT: v_cndmask_b16 v3.h, 0x7e, v3.h, s0
+; GFX1200-NEXT: v_cmp_class_f16_e64 s0, v1.l, 0x204
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v8.l, v2.h, vcc_lo
-; GFX1200-NEXT: v_and_b16 v5.h, v5.h, v7.h
+; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc_lo
; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v4.l
-; GFX1200-NEXT: v_or_b16 v9.h, v11.l, v10.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v3.l
-; GFX1200-NEXT: v_cmp_eq_u16_e64 s1, 30, v4.h
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v5.l, v5.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 30, v4.h
-; GFX1200-NEXT: v_and_b16 v5.l, v6.h, v9.h
-; GFX1200-NEXT: v_or_b16 v4.h, 0x7c, v7.l
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v5.h, v0.l
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s3, 3, v4.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v7.h, v0.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, v5.l, s0
-; GFX1200-NEXT: s_and_b32 s0, s1, vcc_lo
-; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v1.l
-; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s3
+; GFX1200-NEXT: v_and_b16 v4.l, v4.h, 1
+; GFX1200-NEXT: v_or_b16 v6.h, v9.l, v6.h
+; GFX1200-NEXT: v_lshlrev_b16 v3.h, 8, v3.h
+; GFX1200-NEXT: v_cmp_class_f16_e64 s5, v13.l, 0x204
+; GFX1200-NEXT: s_and_b32 s1, s1, vcc_lo
+; GFX1200-NEXT: v_or_b16 v2.l, v10.l, v4.l
+; GFX1200-NEXT: v_lshrrev_b16 v4.l, v8.l, v7.l
+; GFX1200-NEXT: v_and_b16 v6.h, v7.h, v6.h
+; GFX1200-NEXT: v_or_b16 v7.l, 0x7c, v5.l
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: s_or_b32 s0, s2, s0
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v9.l, v3.l
+; GFX1200-NEXT: s_or_b32 s1, s2, s1
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v6.l
+; GFX1200-NEXT: v_and_b16 v2.l, v4.l, v2.l
+; GFX1200-NEXT: v_add_nc_u16 v4.l, v8.h, v6.h
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v4.h, s0
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v4.l, 0, s3
-; GFX1200-NEXT: v_mov_b16_e32 v5.l, v8.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v8, 31, v1
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v7.l, s1
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v1.l
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v2.h, v7.l, vcc_lo
-; GFX1200-NEXT: v_and_b16 v8.h, 0x3ff, v7.h
-; GFX1200-NEXT: v_add_nc_u16 v5.l, v6.l, v5.l
-; GFX1200-NEXT: v_sub_nc_u16 v6.l, -5, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v6.h, 7, v8.l
+; GFX1200-NEXT: v_cndmask_b16 v2.l, 0, v2.l, vcc_lo
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v4.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, 0, s0
-; GFX1200-NEXT: v_cmp_class_f16_e64 s2, v1.l, 0x204
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v5.l, 14
-; GFX1200-NEXT: v_min_u16 v6.l, v6.l, 15
-; GFX1200-NEXT: v_cndmask_b16 v5.l, 0, 4, s0
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v4.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v5.l, s1
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v5.l, v0.l
+; GFX1200-NEXT: v_add_nc_u16 v2.l, v4.h, v2.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v1.l, v1.l
+; GFX1200-NEXT: v_cndmask_b16 v3.l, v3.l, v7.l, s0
+; GFX1200-NEXT: v_sub_nc_u16 v4.h, -5, v5.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v7, 31, v1
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v5.h, v6.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v2.l
+; GFX1200-NEXT: v_cndmask_b16 v8.h, v4.l, 0, vcc_lo
+; GFX1200-NEXT: v_min_u16 v4.h, v4.h, 15
+; GFX1200-NEXT: v_lshlrev_b16 v6.h, 7, v7.l
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v5.h, 14
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v5.h, v0.l
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, v4.h, s2
-; GFX1200-NEXT: v_lshlrev_b16 v7.l, 2, v2.h
-; GFX1200-NEXT: v_sub_nc_u16 v8.l, v6.l, 1 clamp
-; GFX1200-NEXT: v_or_b16 v5.l, v6.h, v5.l
-; GFX1200-NEXT: v_cmp_eq_u16_e64 s1, 30, v2.h
-; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v2.h
+; GFX1200-NEXT: v_cndmask_b16 v1.l, 0, 4, s0
+; GFX1200-NEXT: v_sub_nc_u16 v6.l, v4.h, 1 clamp
+; GFX1200-NEXT: v_or_b16 v4.l, v2.h, v3.h
+; GFX1200-NEXT: v_lshlrev_b16 v7.l, 2, v1.h
+; GFX1200-NEXT: v_and_b16 v7.h, 0x3ff, v5.h
+; GFX1200-NEXT: v_cndmask_b16 v2.h, 0x7e, v3.l, s1
+; GFX1200-NEXT: v_lshlrev_b16 v8.l, v6.l, 1
+; GFX1200-NEXT: v_cndmask_b16 v2.l, v2.l, 0, s0
+; GFX1200-NEXT: v_or_b16 v1.l, v6.h, v1.l
+; GFX1200-NEXT: v_or_b16 v9.l, 0x400, v7.h
; GFX1200-NEXT: v_or_b16 v7.l, v6.h, v7.l
-; GFX1200-NEXT: v_lshlrev_b16 v9.l, v8.l, 1
-; GFX1200-NEXT: v_or_b16 v3.l, v5.l, v3.l
-; GFX1200-NEXT: s_and_b32 s1, s1, s0
-; GFX1200-NEXT: v_cmp_class_f16_e64 s3, v13.l, 0x204
-; GFX1200-NEXT: v_or_b16 v5.l, v7.l, v4.l
-; GFX1200-NEXT: v_or_b16 v7.l, 0x400, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v9.l, v9.l, -1
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
-; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v3.l, v5.l, v3.l, vcc_lo
-; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 30, v2.h
-; GFX1200-NEXT: v_and_b16 v4.l, v7.l, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v2.h, v6.l, v7.l
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v4.l
-; GFX1200-NEXT: v_or_b16 v4.l, 0x7c, v6.h
-; GFX1200-NEXT: v_and_b16 v4.h, v2.h, 1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s0
+; GFX1200-NEXT: v_add_nc_u16 v8.l, v8.l, -1
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v8.h
+; GFX1200-NEXT: v_or_b16 v1.l, v1.l, v2.l
+; GFX1200-NEXT: v_cmp_eq_u16_e64 s0, 30, v1.h
+; GFX1200-NEXT: v_or_b16 v2.l, v7.l, v8.h
+; GFX1200-NEXT: v_and_b16 v3.l, v9.l, v8.l
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v1.h
+; GFX1200-NEXT: v_lshrrev_b16 v3.h, v4.h, v9.l
+; GFX1200-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 30, v1.h
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v3.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v2.l, v1.l, s1
+; GFX1200-NEXT: v_and_b16 v1.h, v3.h, 1
+; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v2.l, v12.l
+; GFX1200-NEXT: v_and_b16 v7.l, 0x7f, v5.h
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, s2
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: s_or_b32 s0, vcc_lo, s1
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v1.l
+; GFX1200-NEXT: s_or_b32 s0, vcc_lo, s0
+; GFX1200-NEXT: v_lshrrev_b16 v5.h, 7, v5.h
+; GFX1200-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v7.l
+; GFX1200-NEXT: v_mov_b16_e32 v3.l, v8.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc_lo
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1200-NEXT: v_or_b16 v1.h, v3.l, v1.h
+; GFX1200-NEXT: v_lshrrev_b16 v3.l, v6.l, v9.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 8, v7.h
+; GFX1200-NEXT: v_sub_nc_u16 v7.h, -5, v2.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v4.h
+; GFX1200-NEXT: v_mov_b16_e32 v7.l, v8.l
+; GFX1200-NEXT: v_and_b16 v1.h, v3.l, v1.h
+; GFX1200-NEXT: v_and_b16 v4.h, v6.l, 1
+; GFX1200-NEXT: v_min_u16 v3.l, v7.h, 15
+; GFX1200-NEXT: v_frexp_mant_f16_e32 v8.l, v12.l
+; GFX1200-NEXT: v_or_b16 v7.h, 0x7c, v6.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v1.h, 0, v1.h, vcc_lo
+; GFX1200-NEXT: v_or_b16 v4.h, v7.l, v4.h
+; GFX1200-NEXT: v_sub_nc_u16 v8.h, v3.l, 1 clamp
+; GFX1200-NEXT: v_and_b16 v7.l, 0x3ff, v8.l
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.l, v3.l, v4.l, s0
-; GFX1200-NEXT: v_frexp_exp_i16_f16_e32 v3.l, v12.l
-; GFX1200-NEXT: v_mov_b16_e32 v5.l, v9.l
-; GFX1200-NEXT: v_and_b16 v9.l, 0x7f, v7.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.h, 7, v7.h
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v13.l
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v7.h, s0
+; GFX1200-NEXT: v_add_nc_u16 v1.h, v3.h, v1.h
+; GFX1200-NEXT: v_and_b16 v3.h, v5.h, v4.h
+; GFX1200-NEXT: v_lshlrev_b16 v9.l, v8.h, 1
+; GFX1200-NEXT: v_or_b16 v4.h, 0x400, v7.l
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v13.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v1.h
+; GFX1200-NEXT: v_add_nc_u16 v3.h, v6.l, v3.h
+; GFX1200-NEXT: v_add_nc_u16 v5.h, v9.l, -1
+; GFX1200-NEXT: v_and_b16 v9.l, 0x7f, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v6.l, 8, v7.l
+; GFX1200-NEXT: v_lshrrev_b16 v8.l, 7, v8.l
+; GFX1200-NEXT: v_lshrrev_b16 v7.l, v3.l, v4.h
+; GFX1200-NEXT: v_and_b16 v5.h, v4.h, v5.h
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v9.l
+; GFX1200-NEXT: v_and_b16 v9.l, v6.l, 1
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.h, 0x7e, v1.h, vcc_lo
-; GFX1200-NEXT: v_or_b16 v4.h, v5.l, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v9.l
-; GFX1200-NEXT: v_lshrrev_b16 v5.l, v8.l, v7.l
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 8, v8.h
-; GFX1200-NEXT: v_sub_nc_u16 v8.l, -5, v3.l
-; GFX1200-NEXT: v_frexp_mant_f16_e32 v8.h, v12.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s0
-; GFX1200-NEXT: v_and_b16 v4.h, v5.l, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v6.l
-; GFX1200-NEXT: v_min_u16 v5.l, v8.l, 15
-; GFX1200-NEXT: v_and_b16 v6.l, v7.l, 1
-; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v6.h, s1
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v4.h, 0, v4.h, s0
-; GFX1200-NEXT: v_sub_nc_u16 v9.l, v5.l, 1 clamp
-; GFX1200-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX1200-NEXT: v_or_b16 v6.l, v8.l, v6.l
-; GFX1200-NEXT: v_and_b16 v8.l, 0x3ff, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v2.h, v2.h, v4.h
-; GFX1200-NEXT: v_lshlrev_b16 v9.h, v9.l, 1
-; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s3
-; GFX1200-NEXT: v_and_b16 v4.h, v7.h, v6.l
-; GFX1200-NEXT: v_and_b16 v7.h, 0x7f, v8.h
-; GFX1200-NEXT: v_or_b16 v6.l, 0x400, v8.l
-; GFX1200-NEXT: v_add_nc_u16 v6.h, v9.h, -1
-; GFX1200-NEXT: v_lshrrev_b16 v8.h, 7, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v4.h, v7.l, v4.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.l, 8, v8.l
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s1, 0, v7.h
-; GFX1200-NEXT: v_and_b16 v6.h, v6.l, v6.h
-; GFX1200-NEXT: v_lshrrev_b16 v7.h, v5.l, v6.l
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v2.h
-; GFX1200-NEXT: v_and_b16 v8.l, v7.l, 1
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v6.h, vcc_lo
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, 0, s0
+; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v5.h
; GFX1200-NEXT: v_cndmask_b32_e64 v10, 0, 1, s1
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 3, v4.h
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s2, 0, v6.h
-; GFX1200-NEXT: v_and_b16 v6.h, v7.h, 1
-; GFX1200-NEXT: v_lshrrev_b16 v6.l, v9.l, v6.l
-; GFX1200-NEXT: v_or_b16 v8.l, v10.l, v8.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 3, v3.h
+; GFX1200-NEXT: v_and_b16 v5.h, v7.l, 1
+; GFX1200-NEXT: v_lshrrev_b16 v4.h, v8.h, v4.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s1
; GFX1200-NEXT: v_cndmask_b32_e64 v14, 0, 1, s2
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, 0, s0
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, s1
-; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v0.l
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v5.h, v11.l
-; GFX1200-NEXT: v_and_b16 v5.h, v8.h, v8.l
-; GFX1200-NEXT: v_mov_b16_e32 v10.l, v14.l
+; GFX1200-NEXT: v_or_b16 v9.l, v10.l, v9.l
+; GFX1200-NEXT: v_cndmask_b32_e64 v11, 0, 1, s1
; GFX1200-NEXT: v_lshrrev_b16 v8.h, 8, v0.l
+; GFX1200-NEXT: v_cmp_ne_u16_e32 vcc_lo, 0, v3.l
+; GFX1200-NEXT: v_mov_b16_e32 v10.l, v14.l
+; GFX1200-NEXT: v_and_b16 v6.h, v8.l, v9.l
; GFX1200-NEXT: v_cndmask_b16 v8.l, 0, 4, s0
-; GFX1200-NEXT: v_cmp_ne_u16_e64 s0, 0, v5.l
-; GFX1200-NEXT: v_add_nc_u16 v5.h, v7.l, v5.h
-; GFX1200-NEXT: v_or_b16 v6.h, v10.l, v6.h
-; GFX1200-NEXT: v_and_b16 v5.l, 0x80, v8.h
-; GFX1200-NEXT: v_add_nc_u16 v4.l, v4.l, 14
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 3, v4.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 3, v5.h
-; GFX1200-NEXT: v_and_b16 v6.l, v6.l, v6.h
-; GFX1200-NEXT: v_or_b16 v7.l, v5.l, v8.l
-; GFX1200-NEXT: v_lshlrev_b16 v6.h, 2, v4.l
-; GFX1200-NEXT: v_cmp_eq_u16_e64 s5, 30, v4.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s2
-; GFX1200-NEXT: v_cndmask_b16 v6.l, 0, v6.l, s0
-; GFX1200-NEXT: v_or_b16 v2.h, v7.l, v2.h
-; GFX1200-NEXT: v_or_b16 v6.h, v5.l, v6.h
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s3, 1, v4.l
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v5.l, v11.l
+; GFX1200-NEXT: v_and_b16 v3.l, 0x80, v8.h
+; GFX1200-NEXT: v_or_b16 v5.h, v10.l, v5.h
+; GFX1200-NEXT: v_add_nc_u16 v6.l, v6.l, v6.h
+; GFX1200-NEXT: v_cndmask_b16 v3.h, v3.h, 0, s1
+; GFX1200-NEXT: v_add_nc_u16 v5.l, v5.l, 14
+; GFX1200-NEXT: v_or_b16 v6.h, v3.l, v8.l
+; GFX1200-NEXT: v_and_b16 v4.h, v4.h, v5.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v6.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 3, v3.h
+; GFX1200-NEXT: v_lshlrev_b16 v5.h, 2, v5.l
+; GFX1200-NEXT: v_or_b16 v1.h, v6.h, v1.h
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v4.h, 0, v4.h, vcc_lo
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b32_e64 v9, 0, 1, s0
+; GFX1200-NEXT: v_cmp_eq_u16_e64 s3, 30, v5.l
+; GFX1200-NEXT: v_or_b16 v5.h, v3.l, v5.h
+; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v5.l
+; GFX1200-NEXT: v_add_nc_u16 v4.h, v7.l, v4.h
; GFX1200-NEXT: v_mov_b16_e32 v8.l, v9.l
-; GFX1200-NEXT: v_add_nc_u16 v6.l, v7.h, v6.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v7, 31, v0
-; GFX1200-NEXT: v_or_b16 v6.h, v6.h, v4.h
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s6, 30, v4.l
-; GFX1200-NEXT: v_add_nc_u16 v3.l, v3.l, v8.l
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s1, 3, v6.l
-; GFX1200-NEXT: v_lshlrev_b16 v4.h, 7, v7.l
-; GFX1200-NEXT: v_cndmask_b16 v5.h, v5.h, 0, s2
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v6.h, v2.h, s3
-; GFX1200-NEXT: v_add_nc_u16 v0.h, v3.l, 14
-; GFX1200-NEXT: v_cndmask_b16 v3.l, 0, 4, s1
-; GFX1200-NEXT: v_cndmask_b16 v4.l, v6.l, 0, s1
-; GFX1200-NEXT: s_and_b32 s1, s5, s4
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 3, v5.h
-; GFX1200-NEXT: v_lshlrev_b16 v7.l, 2, v0.h
-; GFX1200-NEXT: v_or_b16 v3.l, v4.h, v3.l
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 30, v5.l
+; GFX1200-NEXT: v_or_b16 v5.h, v5.h, v3.h
+; GFX1200-NEXT: v_cndmask_b16 v5.l, v6.l, 0, s0
+; GFX1200-NEXT: v_cmp_lt_i16_e32 vcc_lo, 3, v4.h
+; GFX1200-NEXT: v_add_nc_u16 v2.l, v2.l, v8.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v8, 31, v0
+; GFX1200-NEXT: s_and_b32 s0, s3, s2
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v5.h, v1.h, s1
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v4.h, v4.h, 0, vcc_lo
+; GFX1200-NEXT: v_add_nc_u16 v0.h, v2.l, 14
+; GFX1200-NEXT: v_cndmask_b16 v2.l, 0, 4, vcc_lo
+; GFX1200-NEXT: v_lshlrev_b16 v3.h, 7, v8.l
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: s_or_b32 s5, s6, s1
-; GFX1200-NEXT: v_cmp_gt_i16_e64 s1, 1, v0.h
-; GFX1200-NEXT: v_cmp_eq_u16_e64 s3, 30, v0.h
-; GFX1200-NEXT: v_or_b16 v6.l, v4.h, v7.l
-; GFX1200-NEXT: v_or_b16 v3.l, v3.l, v4.l
-; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v13.l, v13.l
-; GFX1200-NEXT: v_cmp_lt_i16_e64 s4, 30, v0.h
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1200-NEXT: v_or_b16 v4.l, v6.l, v5.h
-; GFX1200-NEXT: v_or_b16 v5.h, 0x7c, v5.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7e, v1.l, s0
-; GFX1200-NEXT: v_cmp_class_f16_e64 s0, v0.l, 0x204
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v4.l, v3.l, s1
-; GFX1200-NEXT: s_and_b32 s1, s3, s2
-; GFX1200-NEXT: v_or_b16 v3.l, 0x7c, v4.h
+; GFX1200-NEXT: s_or_b32 s3, s4, s0
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s0, 3, v5.l
+; GFX1200-NEXT: v_lshlrev_b16 v6.h, 2, v0.h
+; GFX1200-NEXT: v_cmp_gt_i16_e32 vcc_lo, 1, v0.h
+; GFX1200-NEXT: v_or_b16 v2.l, v3.h, v2.l
+; GFX1200-NEXT: v_cmp_eq_u16_e64 s1, 30, v0.h
+; GFX1200-NEXT: v_cmp_lt_i16_e64 s2, 30, v0.h
+; GFX1200-NEXT: v_or_b16 v6.l, v3.h, v6.h
+; GFX1200-NEXT: v_cndmask_b16 v1.l, v1.l, v7.h, s5
+; GFX1200-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX1200-NEXT: s_and_b32 s0, s1, s0
+; GFX1200-NEXT: v_cmp_o_f16_e64 s1, v13.l, v13.l
+; GFX1200-NEXT: v_or_b16 v4.h, v6.l, v5.l
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v5.h, s5
-; GFX1200-NEXT: s_or_b32 s2, s4, s1
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s1, 0, v0.l
-; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
+; GFX1200-NEXT: s_or_b32 s0, s2, s0
+; GFX1200-NEXT: v_or_b16 v5.l, 0x7c, v3.l
+; GFX1200-NEXT: v_cmp_class_f16_e64 s2, v0.l, 0x204
+; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7e, v1.l, s1
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v4.h, v2.l, vcc_lo
+; GFX1200-NEXT: v_or_b16 v2.l, 0x7c, v3.h
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, v5.l, s3
+; GFX1200-NEXT: v_cmp_eq_f16_e32 vcc_lo, 0, v0.l
; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v3.l, s2
-; GFX1200-NEXT: v_cmp_eq_f16_e64 s2, 0, v12.l
-; GFX1200-NEXT: v_or_b16 v4.l, v3.h, v2.l
-; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v2.h, v2.h, v5.l, s1
-; GFX1200-NEXT: v_cmp_class_f16_e64 s1, v12.l, 0x204
-; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v4.h, s2
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1200-NEXT: v_cndmask_b16 v4.h, v2.h, v5.h, s0
-; GFX1200-NEXT: v_or_b16 v2.h, v1.h, v1.l
-; GFX1200-NEXT: v_cvt_u32_u16_e32 v1, v4.l
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v2.l, s0
+; GFX1200-NEXT: v_cmp_eq_f16_e64 s0, 0, v12.l
+; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, v3.l, vcc_lo
+; GFX1200-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v0.l
+; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX1200-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s0
+; GFX1200-NEXT: v_cmp_class_f16_e64 s0, v12.l, 0x204
+; GFX1200-NEXT: v_cvt_u32_u16_e32 v3, v4.l
+; GFX1200-NEXT: v_cndmask_b16 v1.h, v1.h, v5.l, s2
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.l, v0.h, v3.l, s1
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1200-NEXT: v_cndmask_b16 v0.l, v0.h, v2.l, s0
+; GFX1200-NEXT: v_lshlrev_b16 v0.h, 8, v1.l
; GFX1200-NEXT: v_cmp_o_f16_e64 s0, v12.l, v12.l
+; GFX1200-NEXT: v_or_b32_e32 v6, 0x7e7e0000, v3
; GFX1200-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-NEXT: v_cndmask_b16 v0.h, 0x7e, v4.h, vcc_lo
-; GFX1200-NEXT: v_mov_b16_e32 v3.l, v2.h
-; GFX1200-NEXT: v_or_b32_e32 v6, 0x7e7e0000, v1
+; GFX1200-NEXT: v_cndmask_b16 v1.l, 0x7e, v1.h, vcc_lo
+; GFX1200-NEXT: v_or_b16 v2.l, v2.h, v0.h
; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX1200-NEXT: v_cndmask_b16 v0.l, 0x7e, v0.l, s0
-; GFX1200-NEXT: v_and_b16 v0.h, 0xff, v0.h
-; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v3
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-NEXT: v_lshlrev_b16 v2.l, 8, v0.l
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-NEXT: v_and_b16 v0.h, 0xff, v1.l
+; GFX1200-NEXT: v_lshlrev_b32_e32 v5, 16, v2
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-NEXT: v_lshlrev_b16 v1.l, 8, v0.l
+; GFX1200-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX1200-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v2.l
-; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; GFX1200-NEXT: v_mov_b16_e32 v2.l, v2.h
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-NEXT: v_or_b16 v0.l, v0.h, v1.l
+; GFX1200-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX1200-NEXT: v_mov_b16_e32 v3.l, v5.l
; GFX1200-NEXT: s_setpc_b64 s[30:31]
;
@@ -3699,19 +3651,18 @@ define <5 x i8> @to_bf8_v5f16(<5 x half> %x) {
; GFX1250-TRUE16: ; %bb.0:
; GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v3.h, v1
+; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v3.l, v1
; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v5.h, s0
; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v5.l, v2
-; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v3.l, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_dual_lshlrev_b32 v4, 16, v1 :: v_dual_lshrrev_b32 v1, 8, v3
+; GFX1250-TRUE16-NEXT: v_cvt_pk_bf8_f16_e64 v0.l, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
+; GFX1250-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.l
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1250-TRUE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[4:5]
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v3.l, v6.l
; GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll b/llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll
index 74253f9cba46b9..bf3713bca304e2 100644
--- a/llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll
@@ -34,8 +34,8 @@ define amdgpu_kernel void @fma_mix_f16 (ptr addrspace(1) %a, ptr addrspace(1) %b
; GFX11-REAL16-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 killed [[REG_SEQUENCE2]], [[V_LSHLREV_B32_e64_]], 0, 0, implicit $exec :: (load (s16) from %ir.in.gep3, addrspace 1)
; GFX11-REAL16-NEXT: [[V_MOV_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, 14336, 0, implicit $exec
; GFX11-REAL16-NEXT: [[V_ADD_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_ADD_F16_t16_e64 0, killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], 0, killed [[V_MOV_B16_t16_e64_]], 0, 0, 0, implicit $mode, implicit $exec
- ; GFX11-REAL16-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
- ; GFX11-REAL16-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
+ ; GFX11-REAL16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GFX11-REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GFX11-REAL16-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[V_ADD_F16_t16_e64_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
; GFX11-REAL16-NEXT: [[V_FMA_MIX_F16_t16_:%[0-9]+]]:vgpr_16 = nofpexcept V_FMA_MIX_F16_t16 0, killed [[GLOBAL_LOAD_DWORD_SADDR]], 0, killed [[GLOBAL_LOAD_DWORD_SADDR1]], 8, killed [[REG_SEQUENCE4]], 0, 0, 0, implicit $mode, implicit $exec
; GFX11-REAL16-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 killed [[V_MOV_B32_e32_]], killed [[V_FMA_MIX_F16_t16_]], killed [[REG_SEQUENCE3]], 0, 0, implicit $exec :: (store (s16) into %ir.4, addrspace 1)
diff --git a/llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll b/llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
index b92acb67b0bcef..594e0916b70493 100644
--- a/llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
@@ -36,8 +36,8 @@ define amdgpu_kernel void @fma_v2f16_divergent(
; GFX11-NEXT: S_CMP_LG_U32 killed [[S_LOAD_DWORD_IMM]], killed [[S_MOV_B32_2]], implicit-def $scc
; GFX11-NEXT: [[COPY10:%[0-9]+]]:sreg_32_xm0_xexec = COPY $scc
; GFX11-NEXT: [[V_CNDMASK_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CNDMASK_B16_t16_e64 0, killed [[V_XOR_B16_t16_e64_]], 0, killed [[V_AND_B16_t16_e64_]], killed [[COPY10]], 0, implicit $exec
- ; GFX11-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
- ; GFX11-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
+ ; GFX11-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GFX11-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; GFX11-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[V_CNDMASK_B16_t16_e64_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
; GFX11-NEXT: [[S_LOAD_DWORD_IMM1:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM killed [[REG_SEQUENCE2]], 0, 0 :: ("amdgpu-noclobber" load (s32) from %ir.4, addrspace 1)
; GFX11-NEXT: [[S_LOAD_DWORD_IMM2:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM killed [[REG_SEQUENCE3]], 0, 0 :: ("amdgpu-noclobber" load (s32) from %ir.5, addrspace 1)
@@ -89,7 +89,10 @@ define amdgpu_kernel void @fma_v2f16_uniform(
; GFX11-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[S_LOAD_DWORDX8_IMM]].sub6
; GFX11-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sreg_64 = REG_SEQUENCE killed [[COPY8]], %subreg.sub0, killed [[COPY7]], %subreg.sub1
; GFX11-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 killed [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: ("amdgpu-noclobber" load (s16) from %ir.3, addrspace 1)
- ; GFX11-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]]
+ ; GFX11-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GFX11-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; GFX11-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; GFX11-NEXT: [[COPY9:%[0-9]+]]:sgpr_32 = COPY killed [[REG_SEQUENCE4]]
; GFX11-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 killed [[COPY9]]
; GFX11-NEXT: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM killed [[REG_SEQUENCE2]], 0, 0 :: ("amdgpu-noclobber" load (s32) from %ir.4, addrspace 1)
; GFX11-NEXT: [[S_LOAD_DWORD_IMM1:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM killed [[REG_SEQUENCE3]], 0, 0 :: ("amdgpu-noclobber" load (s32) from %ir.5, addrspace 1)
diff --git a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
index cb64b3de060ff9..98a6c22301193b 100644
--- a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
@@ -1918,48 +1918,38 @@ define bfloat @v_max3_bf16_maximumnum_maximumnum__v_v_v_0(bfloat %a, bfloat %b,
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v4
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v0.l
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v3
; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
+; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v2, v2
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v3
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:
@@ -2021,55 +2011,45 @@ define bfloat @v_max3_bf16_maximumnum_maximumnum__v_v_v_0(bfloat %a, bfloat %b,
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v4
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v3
; GFX12-SDAG-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v2, v2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v3
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX12-SDAG-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:
@@ -2483,17 +2463,11 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v3.l, s1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v8.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v7
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v6, v8
@@ -2503,11 +2477,8 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v3.l
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v4.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
@@ -2520,11 +2491,8 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v4
@@ -2534,17 +2502,11 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, s1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s2
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v6
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v7
@@ -2553,11 +2515,8 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.l
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -2669,17 +2628,11 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v3.l, s1
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v8.l, v1.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v1
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v7
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v6, v8
@@ -2690,12 +2643,9 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v3.l
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v4.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
@@ -2709,11 +2659,8 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v4
@@ -2725,17 +2672,11 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, s1
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s2
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v6
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v7
@@ -2745,12 +2686,9 @@ define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.l
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
diff --git a/llvm/test/CodeGen/AMDGPU/fmaximum.ll b/llvm/test/CodeGen/AMDGPU/fmaximum.ll
index 213d6ffeb9f00e..c618573b74734a 100644
--- a/llvm/test/CodeGen/AMDGPU/fmaximum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmaximum.ll
@@ -485,12 +485,26 @@ define amdgpu_ps half @test_fmaximum_f16_ss(half inreg %a, half inreg %b) {
; GFX1170-GISEL-FAKE16-NEXT: v_maximum_f16 v0, s0, s1
; GFX1170-GISEL-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: test_fmaximum_f16_ss:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_maximum_f16 s0, s0, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: test_fmaximum_f16_ss:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_maximum_f16 s0, s0, s1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: test_fmaximum_f16_ss:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_maximum_f16 s0, s0, s1
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: test_fmaximum_f16_ss:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_maximum_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%val = call half @llvm.maximum.f16(half %a, half %b)
ret half %val
}
diff --git a/llvm/test/CodeGen/AMDGPU/fmaximum3.ll b/llvm/test/CodeGen/AMDGPU/fmaximum3.ll
index db4d0fa13c62b0..5e7bd87ecfafb1 100644
--- a/llvm/test/CodeGen/AMDGPU/fmaximum3.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmaximum3.ll
@@ -1557,7 +1557,7 @@ define half @v_fmaximum3_f16_commute(half %a, half %b, half %c) {
define amdgpu_ps i32 @s_fmaximum3_f16(half inreg %a, half inreg %b, half inreg %c) {
; GFX12-TRUE16-LABEL: s_fmaximum3_f16:
; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_maximum3_f16 v0.l, s0, s1, v0.l
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
@@ -1579,7 +1579,7 @@ define amdgpu_ps i32 @s_fmaximum3_f16(half inreg %a, half inreg %b, half inreg %
;
; GFX1170-TRUE16-LABEL: s_fmaximum3_f16:
; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX1170-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX1170-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-TRUE16-NEXT: v_maximum3_f16 v0.l, s0, s1, v0.l
; GFX1170-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
diff --git a/llvm/test/CodeGen/AMDGPU/fmaxnum.ll b/llvm/test/CodeGen/AMDGPU/fmaxnum.ll
index 58b3ae94b54344..3ac0e3864e89a7 100644
--- a/llvm/test/CodeGen/AMDGPU/fmaxnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmaxnum.ll
@@ -1920,12 +1920,12 @@ define amdgpu_kernel void @test_fmax_f16_v_ieee_on(ptr addrspace(1) %out, half %
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s2, s2
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s3, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX12-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2039,12 +2039,12 @@ define amdgpu_kernel void @test_fmax_f16_s_ieee_on(ptr addrspace(1) %out, half i
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s2, s2
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s3, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX12-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2086,12 +2086,19 @@ define amdgpu_ps half @test_fmax_f16_s_ieee_off(half inreg %a, half inreg %b) #0
; GFX9-NEXT: v_max_f16_e32 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: test_fmax_f16_s_ieee_off:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_max_num_f16 s0, s0, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-LABEL: test_fmax_f16_s_ieee_off:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: test_fmax_f16_s_ieee_off:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%val = call half @llvm.maxnum.f16(half %a, half %b)
ret half %val
}
diff --git a/llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll b/llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
index 7638f32cc61ac3..0b1b5a63595472 100644
--- a/llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
@@ -73,14 +73,11 @@ define bfloat @v_test_fmed3_r_i_i_bf16_minimumnum_maximumnum(bfloat %a) #1 {
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_o_f32_e32 vcc_lo, v1, v1
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, 2.0, v1
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 4.0, v1
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x4080, v0.l, vcc_lo
@@ -205,23 +202,17 @@ define <2 x bfloat> @v_test_fmed3_r_i_i_v2bf16_minimumnum_maximumnum(<2 x bfloat
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x4000, v3.l, vcc_lo
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x4000, v0.l, s0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, 2.0, v2
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, 2.0, v3
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x4000, v1.l, vcc_lo
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x4000, v0.l, s0
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 4.0, v2
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 4.0, v3
diff --git a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
index da7f46a2a06137..08b7279c6221b4 100644
--- a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
@@ -1920,48 +1920,38 @@ define bfloat @v_min3_bf16_minimumnum_minimumnum__v_v_v_0(bfloat %a, bfloat %b,
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v4
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v0.l
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v3
; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
+; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v2, v2
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
+; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v3
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:
@@ -2023,55 +2013,45 @@ define bfloat @v_min3_bf16_minimumnum_minimumnum__v_v_v_0(bfloat %a, bfloat %b,
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v4
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v3
; GFX12-SDAG-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v2, v2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v3
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX12-SDAG-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s0
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:
@@ -2488,17 +2468,11 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v3.l, s1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v8.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v7
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v6, v8
@@ -2508,11 +2482,8 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v3.l
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v4.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
@@ -2525,11 +2496,8 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v4
@@ -2539,17 +2507,11 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, s1
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s2
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v6
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v7
@@ -2558,11 +2520,8 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.l
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.l
-; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -2674,17 +2633,11 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v3.l, s1
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v8.l, v1.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v0
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v1
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v7
; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v6, v8
@@ -2695,12 +2648,9 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v3.l
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v4.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
@@ -2714,11 +2664,8 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v0
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v4
@@ -2730,17 +2677,11 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, s1
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s2
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v6
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v7
@@ -2750,12 +2691,9 @@ define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.l
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.l
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
diff --git a/llvm/test/CodeGen/AMDGPU/fminimum.ll b/llvm/test/CodeGen/AMDGPU/fminimum.ll
index 094dd76e0f945b..b63bc005395a89 100644
--- a/llvm/test/CodeGen/AMDGPU/fminimum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fminimum.ll
@@ -485,12 +485,26 @@ define amdgpu_ps half @test_fminimum_f16_ss(half inreg %a, half inreg %b) {
; GFX1170-GISEL-FAKE16-NEXT: v_minimum_f16 v0, s0, s1
; GFX1170-GISEL-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: test_fminimum_f16_ss:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_minimum_f16 s0, s0, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: test_fminimum_f16_ss:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_minimum_f16 s0, s0, s1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: test_fminimum_f16_ss:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_minimum_f16 s0, s0, s1
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: test_fminimum_f16_ss:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_minimum_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%val = call half @llvm.minimum.f16(half %a, half %b)
ret half %val
}
diff --git a/llvm/test/CodeGen/AMDGPU/fminimum3.ll b/llvm/test/CodeGen/AMDGPU/fminimum3.ll
index 8c4d6f42ff8502..b2d788280db87a 100644
--- a/llvm/test/CodeGen/AMDGPU/fminimum3.ll
+++ b/llvm/test/CodeGen/AMDGPU/fminimum3.ll
@@ -1557,7 +1557,7 @@ define half @v_fminimum3_f16_commute(half %a, half %b, half %c) {
define amdgpu_ps i32 @s_fminimum3_f16(half inreg %a, half inreg %b, half inreg %c) {
; GFX12-TRUE16-LABEL: s_fminimum3_f16:
; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, s0, s1, v0.l
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
@@ -1579,7 +1579,7 @@ define amdgpu_ps i32 @s_fminimum3_f16(half inreg %a, half inreg %b, half inreg %
;
; GFX1170-TRUE16-LABEL: s_fminimum3_f16:
; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX1170-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX1170-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-TRUE16-NEXT: v_minimum3_f16 v0.l, s0, s1, v0.l
; GFX1170-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
diff --git a/llvm/test/CodeGen/AMDGPU/fminnum.ll b/llvm/test/CodeGen/AMDGPU/fminnum.ll
index da95199b070eed..dfb675dc270756 100644
--- a/llvm/test/CodeGen/AMDGPU/fminnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fminnum.ll
@@ -1833,12 +1833,12 @@ define amdgpu_kernel void @test_fmin_f16_v_ieee_on(ptr addrspace(1) %out, half %
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s2, s2
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s3, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
+; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -1952,12 +1952,12 @@ define amdgpu_kernel void @test_fmin_f16_s_ieee_on(ptr addrspace(1) %out, half i
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s2, s2
+; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s3, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
+; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -1999,12 +1999,19 @@ define amdgpu_ps half @test_fmin_f16_s_ieee_off(half inreg %a, half inreg %b) #0
; GFX9-NEXT: v_min_f16_e32 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: test_fmin_f16_s_ieee_off:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_min_num_f16 s0, s0, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-LABEL: test_fmin_f16_s_ieee_off:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: test_fmin_f16_s_ieee_off:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%val = call half @llvm.minnum.f16(half %a, half %b)
ret half %val
}
diff --git a/llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll b/llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
index 3d7a5833123d92..9aeb1d7aa12074 100644
--- a/llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
@@ -632,14 +632,16 @@ define amdgpu_kernel void @multiple_use_fadd_fmac_f16(ptr addrspace(1) %out, i16
; GFX11-DENORM-TRUE16-NEXT: s_clause 0x1
; GFX11-DENORM-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-DENORM-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-DENORM-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX11-DENORM-TRUE16-NEXT: v_mov_b32_e32 v2, 0
; GFX11-DENORM-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-DENORM-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
; GFX11-DENORM-TRUE16-NEXT: v_add_f16_e64 v0.l, s2, s2
-; GFX11-DENORM-TRUE16-NEXT: v_fma_f16 v0.h, s2, 2.0, s3
-; GFX11-DENORM-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1] dlc
+; GFX11-DENORM-TRUE16-NEXT: v_mov_b32_e32 v1, s3
+; GFX11-DENORM-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DENORM-TRUE16-NEXT: v_fmac_f16_e64 v1.l, s2, 2.0
+; GFX11-DENORM-TRUE16-NEXT: global_store_b16 v2, v0, s[0:1] dlc
; GFX11-DENORM-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-DENORM-TRUE16-NEXT: global_store_d16_hi_b16 v1, v0, s[0:1] offset:2 dlc
+; GFX11-DENORM-TRUE16-NEXT: global_store_b16 v2, v1, s[0:1] offset:2 dlc
; GFX11-DENORM-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-DENORM-TRUE16-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll b/llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
index 9b6fd0bcf703b5..8592271f84c16c 100644
--- a/llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
@@ -235,30 +235,17 @@ define amdgpu_kernel void @fneg_fabs_free_bf16(ptr addrspace(1) %out, i16 %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: fneg_fabs_free_bf16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: fneg_fabs_free_bf16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: fneg_fabs_free_bf16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_bitset1_b32 s2, 15
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%bc = bitcast i16 %in to bfloat
%fabs = call bfloat @llvm.fabs.bf16(bfloat %bc)
%fsub = fsub bfloat -0.0, %fabs
@@ -308,30 +295,17 @@ define amdgpu_kernel void @fneg_fabs_bf16(ptr addrspace(1) %out, bfloat %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: fneg_fabs_bf16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: fneg_fabs_bf16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: fneg_fabs_bf16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_bitset1_b32 s2, 15
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%fabs = call bfloat @llvm.fabs.bf16(bfloat %in)
%fsub = fsub bfloat -0.0, %fabs
store bfloat %fsub, ptr addrspace(1) %out, align 2
@@ -370,12 +344,12 @@ define amdgpu_kernel void @v_fneg_fabs_bf16(ptr addrspace(1) %out, ptr addrspace
; GFX11-TRUE16-LABEL: v_fneg_fabs_bf16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]
+; GFX11-TRUE16-NEXT: global_load_d16_b16 v1, v0, s[2:3]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x8000, v0
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x8000, v1
+; GFX11-TRUE16-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: v_fneg_fabs_bf16:
@@ -676,23 +650,40 @@ define amdgpu_kernel void @fneg_fabs_v4bf16(ptr addrspace(1) %out, <4 x bfloat>
; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-LABEL: fneg_fabs_v4bf16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-NEXT: s_lshr_b32 s5, s3, 16
-; GFX11-NEXT: s_bitset1_b32 s3, 15
-; GFX11-NEXT: s_bitset1_b32 s2, 15
-; GFX11-NEXT: s_bitset1_b32 s4, 15
-; GFX11-NEXT: s_bitset1_b32 s5, 15
-; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s4
-; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s5
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX11-NEXT: v_mov_b32_e32 v0, s2
-; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: fneg_fabs_v4bf16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s3, 15
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s5, 15
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s4, 15
+; GFX11-TRUE16-NEXT: v_or_b32_e64 v0, 0x8000, s2
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s3, s5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, s4
+; GFX11-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: fneg_fabs_v4bf16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s3, 15
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s4, 15
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s5, 15
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX11-FAKE16-NEXT: s_endpgm
%fabs = call <4 x bfloat> @llvm.fabs.v4bf16(<4 x bfloat> %in)
%fsub = fsub <4 x bfloat> <bfloat -0.0, bfloat -0.0, bfloat -0.0, bfloat -0.0>, %fabs
store <4 x bfloat> %fsub, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll b/llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
index 42fbba16582608..2ce448ad493190 100644
--- a/llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
@@ -210,30 +210,17 @@ define amdgpu_kernel void @fneg_fabs_free_f16(ptr addrspace(1) %out, i16 %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: fneg_fabs_free_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: fneg_fabs_free_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: fneg_fabs_free_f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_bitset1_b32 s2, 15
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%bc = bitcast i16 %in to half
%fabs = call half @llvm.fabs.f16(half %bc)
%fsub = fsub half -0.0, %fabs
@@ -283,30 +270,17 @@ define amdgpu_kernel void @fneg_fabs_f16(ptr addrspace(1) %out, half %in) {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: fneg_fabs_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: fneg_fabs_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: fneg_fabs_f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_bitset1_b32 s2, 15
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%fabs = call half @llvm.fabs.f16(half %in)
%fsub = fsub half -0.0, %fabs
store half %fsub, ptr addrspace(1) %out, align 2
@@ -345,12 +319,12 @@ define amdgpu_kernel void @v_fneg_fabs_f16(ptr addrspace(1) %out, ptr addrspace(
; GFX11-TRUE16-LABEL: v_fneg_fabs_f16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]
+; GFX11-TRUE16-NEXT: global_load_d16_b16 v1, v0, s[2:3]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x8000, v0
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x8000, v1
+; GFX11-TRUE16-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: v_fneg_fabs_f16:
diff --git a/llvm/test/CodeGen/AMDGPU/fneg.bf16.ll b/llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
index 07d243c393d31c..a9d25cc011da72 100644
--- a/llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
@@ -47,30 +47,17 @@ define amdgpu_kernel void @s_fneg_bf16(ptr addrspace(1) %out, bfloat %in) #0 {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fneg_bf16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fneg_bf16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fneg_bf16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_xor_b32 s2, s2, 0x8000
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%fneg = fsub bfloat -0.0, %in
store bfloat %fneg, ptr addrspace(1) %out
ret void
@@ -200,30 +187,17 @@ define amdgpu_kernel void @s_fneg_free_bf16(ptr addrspace(1) %out, i16 %in) #0 {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fneg_free_bf16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fneg_free_bf16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fneg_free_bf16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_xor_b32 s2, s2, 0x8000
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%bc = bitcast i16 %in to bfloat
%fsub = fsub bfloat -0.0, %bc
store bfloat %fsub, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/fneg.f16.ll b/llvm/test/CodeGen/AMDGPU/fneg.f16.ll
index ada89538e39c4d..91686181fef643 100644
--- a/llvm/test/CodeGen/AMDGPU/fneg.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fneg.f16.ll
@@ -48,30 +48,17 @@ define amdgpu_kernel void @s_fneg_f16(ptr addrspace(1) %out, half %in) #0 {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fneg_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fneg_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fneg_f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_xor_b32 s2, s2, 0x8000
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%fneg = fsub half -0.0, %in
store half %fneg, ptr addrspace(1) %out
ret void
@@ -201,30 +188,17 @@ define amdgpu_kernel void @s_fneg_free_f16(ptr addrspace(1) %out, i16 %in) #0 {
; GFX9-NEXT: global_store_short v0, v1, s[0:1]
; GFX9-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: s_fneg_free_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: s_fneg_free_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8
-; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_xor_b32 s2, s2, 0x8000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
-; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: s_fneg_free_f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_xor_b32 s2, s2, 0x8000
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
+; GFX11-NEXT: s_endpgm
%bc = bitcast i16 %in to half
%fsub = fsub half -0.0, %bc
store half %fsub, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/fpext.f16.ll b/llvm/test/CodeGen/AMDGPU/fpext.f16.ll
index d29a425e2a1c6c..9e3ecb66d4ac86 100644
--- a/llvm/test/CodeGen/AMDGPU/fpext.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fpext.f16.ll
@@ -725,11 +725,9 @@ define amdgpu_kernel void @fneg_multi_use_fpext_f16_to_f32(
; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_xor_b32_e32 v1, 0x8000, v0
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, -v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[4:7], 0 dlc
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, -v0.l
+; GFX11-TRUE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
@@ -928,11 +926,9 @@ define amdgpu_kernel void @fabs_multi_use_fpext_f16_to_f32(
; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v0
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, |v0.l|
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[4:7], 0 dlc
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, |v0.l|
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
+; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
@@ -1131,11 +1127,9 @@ define amdgpu_kernel void @fabs_fneg_multi_use_fpext_f16_to_f32(
; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x8000, v0
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, -|v0.l|
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[4:7], 0 dlc
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, -|v0.l|
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll b/llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
index 66b2ba892182a2..eeaf84d142b068 100644
--- a/llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
@@ -561,21 +561,53 @@ define i16 @test_s_signed_i16_f32(float inreg %f) nounwind {
; GFX11-NEXT: v_cvt_pk_i16_f32 v0, s0, s0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: test_s_signed_i16_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_cvt_i32_f32 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_min_i32 s0, s0, 0x7fff
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_max_i32 s0, s0, 0xffff8000
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_signed_i16_f32:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_min_i32 s0, s0, 0x7fff
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_max_i32 s0, s0, 0xffff8000
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_signed_i16_f32:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_min_i32 s0, s0, 0x7fff
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_max_i32 s0, s0, 0xffff8000
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GI-LABEL: test_s_signed_i16_f32:
+; GFX12-GI: ; %bb.0:
+; GFX12-GI-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GI-NEXT: s_wait_expcnt 0x0
+; GFX12-GI-NEXT: s_wait_samplecnt 0x0
+; GFX12-GI-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GI-NEXT: s_wait_kmcnt 0x0
+; GFX12-GI-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: s_min_i32 s0, s0, 0x7fff
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: s_max_i32 s0, s0, 0xffff8000
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GI-NEXT: s_setpc_b64 s[30:31]
%x = call i16 @llvm.fptosi.sat.i16.f32(float %f)
ret i16 %x
}
diff --git a/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll b/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
index d86969155ad957..bdf3fd9367967f 100644
--- a/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
@@ -3375,19 +3375,19 @@ define <4 x i1> @test_s_signed_v4f16_v4i1(<4 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_signed_v4f16_v4i1:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s1
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s0
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s3
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s2
+; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX11-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v4, v0, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v5, v2, 0, 16
+; GFX11-TRUE16-NEXT: v_bfe_i32 v4, v2, 0, 16
; GFX11-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
-; GFX11-TRUE16-NEXT: v_med3_i32 v0, v1, -1, 0
-; GFX11-TRUE16-NEXT: v_med3_i32 v2, v4, -1, 0
-; GFX11-TRUE16-NEXT: v_med3_i32 v1, v5, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v0, v0, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v2, v1, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v1, v4, -1, 0
; GFX11-TRUE16-NEXT: v_med3_i32 v3, v3, -1, 0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -3422,20 +3422,20 @@ define <4 x i1> @test_s_signed_v4f16_v4i1(<4 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s1
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s0
-; GFX12-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s0
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s1
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s3
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s2
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX12-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v4, v0, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v5, v2, 0, 16
+; GFX12-TRUE16-NEXT: v_bfe_i32 v4, v2, 0, 16
; GFX12-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
-; GFX12-TRUE16-NEXT: v_med3_i32 v0, v1, -1, 0
-; GFX12-TRUE16-NEXT: v_med3_i32 v2, v4, -1, 0
-; GFX12-TRUE16-NEXT: v_med3_i32 v1, v5, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v0, v0, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v2, v1, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v1, v4, -1, 0
; GFX12-TRUE16-NEXT: v_med3_i32 v3, v3, -1, 0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -3611,18 +3611,18 @@ define <4 x i8> @test_s_signed_v4f16_v4i8(<4 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_signed_v4f16_v4i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s1
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s2
+; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX11-TRUE16-NEXT: s_movk_i32 s1, 0xff80
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s0
-; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX11-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
; GFX11-TRUE16-NEXT: v_med3_i32 v0, v0, s1, 0x7f
+; GFX11-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
; GFX11-TRUE16-NEXT: v_med3_i32 v1, v1, s1, 0x7f
; GFX11-TRUE16-NEXT: v_med3_i32 v4, v2, s1, 0x7f
; GFX11-TRUE16-NEXT: v_perm_b32 v2, v1, v0, 0x6050400
@@ -3679,20 +3679,20 @@ define <4 x i8> @test_s_signed_v4f16_v4i8(<4 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s3
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s2
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX12-TRUE16-NEXT: s_movk_i32 s1, 0xff80
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s0
-; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
; GFX12-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
; GFX12-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_med3_i32 v0, v0, s1, 0x7f
+; GFX12-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
; GFX12-TRUE16-NEXT: v_med3_i32 v1, v1, s1, 0x7f
; GFX12-TRUE16-NEXT: v_med3_i32 v4, v2, s1, 0x7f
; GFX12-TRUE16-NEXT: v_perm_b32 v2, v1, v0, 0x6050400
@@ -3846,12 +3846,12 @@ define <4 x i16> @test_s_signed_v4f16_v4i16(<4 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_signed_v4f16_v4i16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s2
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s3
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s2
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s1
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_signed_v4f16_v4i16:
@@ -3881,13 +3881,13 @@ define <4 x i16> @test_s_signed_v4f16_v4i16(<4 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s2
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s3
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s1
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_signed_v4f16_v4i16:
@@ -4482,47 +4482,46 @@ define <8 x i8> @test_signed_v8f16_v8i8(<8 x half> %f) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0xff80
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, v5.l
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, v1.l
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, v6.l
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, v2.l
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, v0.l
-; GFX11-TRUE16-NEXT: v_med3_i16 v3.l, v3.l, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_med3_i16 v1.h, v1.h, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, v3.l
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, v1.l
+; GFX11-TRUE16-NEXT: v_med3_i16 v1.h, v3.h, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_med3_i16 v1.l, v3.l, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, v6.l
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_med3_i16 v2.h, v2.h, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_med3_i16 v2.l, v2.l, v4.l, 0x7f
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
-; GFX11-TRUE16-NEXT: v_med3_i16 v0.l, v1.l, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_med3_i16 v0.h, v2.h, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v1.h
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
+; GFX11-TRUE16-NEXT: v_med3_i16 v0.h, v3.h, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v2.h
+; GFX11-TRUE16-NEXT: v_med3_i16 v3.l, v3.l, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v0.h
-; GFX11-TRUE16-NEXT: v_med3_i16 v3.l, v3.h, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v1.l, v1.h
-; GFX11-TRUE16-NEXT: v_med3_i16 v1.h, v2.h, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v0.l, v0.h
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_med3_i16 v0.l, v2.l, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v1.h
-; GFX11-TRUE16-NEXT: v_med3_i16 v1.l, v1.l, v4.l, 0x7f
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.h
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v1.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v0.h
+; GFX11-TRUE16-NEXT: v_med3_i16 v0.l, v0.l, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_med3_i16 v1.l, v3.h, v4.l, 0x7f
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v0.h, v1.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v6
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -4589,47 +4588,46 @@ define <8 x i8> @test_signed_v8f16_v8i8(<8 x half> %f) {
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0xff80
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, v5.l
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, v1.l
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, v6.l
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, v2.l
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, v0.l
-; GFX12-TRUE16-NEXT: v_med3_i16 v3.l, v3.l, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_med3_i16 v1.h, v1.h, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, v3.l
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, v5.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, v1.l
+; GFX12-TRUE16-NEXT: v_med3_i16 v1.h, v3.h, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_med3_i16 v1.l, v3.l, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, v6.l
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, v5.l
+; GFX12-TRUE16-NEXT: v_med3_i16 v2.h, v2.h, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_med3_i16 v2.l, v2.l, v4.l, 0x7f
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
-; GFX12-TRUE16-NEXT: v_med3_i16 v0.l, v1.l, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_med3_i16 v0.h, v2.h, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v1.h
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, v7.l
-; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX12-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
+; GFX12-TRUE16-NEXT: v_med3_i16 v0.h, v3.h, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v2.h
+; GFX12-TRUE16-NEXT: v_med3_i16 v3.l, v3.l, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
+; GFX12-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v0.h
-; GFX12-TRUE16-NEXT: v_med3_i16 v3.l, v3.h, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_or_b16 v6.h, v1.l, v1.h
-; GFX12-TRUE16-NEXT: v_med3_i16 v1.h, v2.h, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, v5.l
-; GFX12-TRUE16-NEXT: v_or_b16 v2.h, v0.l, v0.h
-; GFX12-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v3.l
-; GFX12-TRUE16-NEXT: v_med3_i16 v0.l, v2.l, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v1.h
-; GFX12-TRUE16-NEXT: v_med3_i16 v1.l, v1.l, v4.l, 0x7f
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.h
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.h
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, v0.l
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
+; GFX12-TRUE16-NEXT: v_or_b16 v6.h, v1.l, v2.h
+; GFX12-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v0.h
+; GFX12-TRUE16-NEXT: v_med3_i16 v0.l, v0.l, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_med3_i16 v1.l, v3.h, v4.l, 0x7f
+; GFX12-TRUE16-NEXT: v_or_b16 v6.l, v1.h, v3.l
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v6.h
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
; GFX12-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX12-TRUE16-NEXT: v_or_b16 v6.l, v0.h, v1.h
-; GFX12-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; GFX12-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v6
+; GFX12-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -5549,34 +5547,34 @@ define <8 x i1> @test_s_signed_v8f16_v8i1(<8 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_signed_v8f16_v8i1:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s3
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s2
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s1
-; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s5
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v5.l, s1
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v4.l, s3
; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 16
-; GFX11-TRUE16-NEXT: v_med3_i32 v6, v0, -1, 0
+; GFX11-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v6.l, s2
+; GFX11-TRUE16-NEXT: v_med3_i32 v7, v0, -1, 0
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_med3_i32 v4, v1, -1, 0
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s2, 16
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s3
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v7.l, s0
+; GFX11-TRUE16-NEXT: v_med3_i32 v3, v2, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v5, v1, -1, 0
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s4
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s1
; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v5, v5, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v8, v1, 0, 16
-; GFX11-TRUE16-NEXT: v_bfe_i32 v9, v7, 0, 16
-; GFX11-TRUE16-NEXT: v_med3_i32 v2, v2, -1, 0
+; GFX11-TRUE16-NEXT: v_bfe_i32 v4, v4, 0, 16
+; GFX11-TRUE16-NEXT: v_bfe_i32 v8, v6, 0, 16
+; GFX11-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
+; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 16
; GFX11-TRUE16-NEXT: v_med3_i32 v0, v0, -1, 0
-; GFX11-TRUE16-NEXT: v_med3_i32 v1, v3, -1, 0
-; GFX11-TRUE16-NEXT: v_med3_i32 v7, v8, -1, 0
-; GFX11-TRUE16-NEXT: v_med3_i32 v3, v5, -1, 0
-; GFX11-TRUE16-NEXT: v_med3_i32 v5, v9, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v6, v4, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v4, v8, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v1, v1, -1, 0
+; GFX11-TRUE16-NEXT: v_med3_i32 v2, v2, -1, 0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_signed_v8f16_v8i1:
@@ -5626,37 +5624,37 @@ define <8 x i1> @test_s_signed_v8f16_v8i1(<8 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s3
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s2
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s1
-; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s1, 16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v5.l, s1
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s4
+; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s5
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s4
+; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v4.l, s3
; GFX12-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 16
-; GFX12-TRUE16-NEXT: v_med3_i32 v6, v0, -1, 0
+; GFX12-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v6.l, s2
+; GFX12-TRUE16-NEXT: v_med3_i32 v7, v0, -1, 0
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
-; GFX12-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
-; GFX12-TRUE16-NEXT: v_med3_i32 v4, v1, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v3, v2, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v5, v1, -1, 0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s0
-; GFX12-TRUE16-NEXT: s_lshr_b32 s0, s2, 16
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s3
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v7.l, s0
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s4
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s1
; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v3, v3, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v5, v5, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v8, v1, 0, 16
-; GFX12-TRUE16-NEXT: v_bfe_i32 v9, v7, 0, 16
-; GFX12-TRUE16-NEXT: v_med3_i32 v2, v2, -1, 0
+; GFX12-TRUE16-NEXT: v_bfe_i32 v4, v4, 0, 16
+; GFX12-TRUE16-NEXT: v_bfe_i32 v8, v6, 0, 16
+; GFX12-TRUE16-NEXT: v_bfe_i32 v1, v1, 0, 16
+; GFX12-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 16
; GFX12-TRUE16-NEXT: v_med3_i32 v0, v0, -1, 0
-; GFX12-TRUE16-NEXT: v_med3_i32 v1, v3, -1, 0
-; GFX12-TRUE16-NEXT: v_med3_i32 v7, v8, -1, 0
-; GFX12-TRUE16-NEXT: v_med3_i32 v3, v5, -1, 0
-; GFX12-TRUE16-NEXT: v_med3_i32 v5, v9, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v6, v4, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v4, v8, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v1, v1, -1, 0
+; GFX12-TRUE16-NEXT: v_med3_i32 v2, v2, -1, 0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_signed_v8f16_v8i1:
@@ -5988,29 +5986,29 @@ define <8 x i8> @test_s_signed_v8f16_v8i8(<8 x half> inreg %f) {
; GFX11-TRUE16-NEXT: v_med3_i32 v0, v0, s2, 0x7f
; GFX11-TRUE16-NEXT: v_med3_i32 v1, v1, s2, 0x7f
; GFX11-TRUE16-NEXT: v_med3_i32 v3, v3, s2, 0x7f
-; GFX11-TRUE16-NEXT: v_med3_i32 v4, v4, s2, 0x7f
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v6.l, s0
-; GFX11-TRUE16-NEXT: v_med3_i32 v9, v2, s2, 0x7f
+; GFX11-TRUE16-NEXT: v_med3_i32 v6, v4, s2, 0x7f
; GFX11-TRUE16-NEXT: v_med3_i32 v5, v5, s2, 0x7f
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v1, v0, 0x6050400
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v4, v3, 0x6050400
-; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v6, 0, 16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; GFX11-TRUE16-NEXT: v_med3_i32 v9, v2, s2, 0x7f
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v1, v0, 0x6050400
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v8.l, s0
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v6, v3, 0x6050400
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v5, v7, 0x6050400
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
-; GFX11-TRUE16-NEXT: v_med3_i32 v0, v0, s2, 0x7f
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v8, 0, 16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xff00, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_med3_i32 v0, v0, s2, 0x7f
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v3, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v5, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v3, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[4:5]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_signed_v8f16_v8i8:
@@ -6104,29 +6102,29 @@ define <8 x i8> @test_s_signed_v8f16_v8i8(<8 x half> inreg %f) {
; GFX12-TRUE16-NEXT: v_med3_i32 v0, v0, s2, 0x7f
; GFX12-TRUE16-NEXT: v_med3_i32 v1, v1, s2, 0x7f
; GFX12-TRUE16-NEXT: v_med3_i32 v3, v3, s2, 0x7f
-; GFX12-TRUE16-NEXT: v_med3_i32 v4, v4, s2, 0x7f
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v6.l, s0
-; GFX12-TRUE16-NEXT: v_med3_i32 v9, v2, s2, 0x7f
+; GFX12-TRUE16-NEXT: v_med3_i32 v6, v4, s2, 0x7f
; GFX12-TRUE16-NEXT: v_med3_i32 v5, v5, s2, 0x7f
-; GFX12-TRUE16-NEXT: v_perm_b32 v8, v1, v0, 0x6050400
-; GFX12-TRUE16-NEXT: v_perm_b32 v2, v4, v3, 0x6050400
-; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v6, 0, 16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; GFX12-TRUE16-NEXT: v_med3_i32 v9, v2, s2, 0x7f
+; GFX12-TRUE16-NEXT: v_perm_b32 v4, v1, v0, 0x6050400
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v8.l, s0
+; GFX12-TRUE16-NEXT: v_perm_b32 v2, v6, v3, 0x6050400
; GFX12-TRUE16-NEXT: v_perm_b32 v6, v5, v7, 0x6050400
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
-; GFX12-TRUE16-NEXT: v_med3_i32 v0, v0, s2, 0x7f
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v9
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v8, 0, 16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xff00, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX12-TRUE16-NEXT: v_med3_i32 v0, v0, s2, 0x7f
+; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, v3, v11
+; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, v5, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
-; GFX12-TRUE16-NEXT: v_or_b32_e32 v9, v5, v4
-; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, v3, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[4:5]
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v8
+; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[7:8]
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v11
; GFX12-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v8
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.l
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_signed_v8f16_v8i8:
@@ -6371,18 +6369,18 @@ define <8 x i16> @test_s_signed_v8f16_v8i16(<8 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_signed_v8f16_v8i16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, s4
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, s5
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s4
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s5
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
-; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s2
; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s4
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s1
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, s2
+; GFX11-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, s3
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_signed_v8f16_v8i16:
@@ -6424,20 +6422,19 @@ define <8 x i16> @test_s_signed_v8f16_v8i16(<8 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, s4
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, s5
-; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s4
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s5
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
-; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s2
; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.l, s3
+; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.l, s2
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.l, s1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.l, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v0.h, s4
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v1.h, s1
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v2.h, s2
+; GFX12-TRUE16-NEXT: v_cvt_i16_f16_e32 v3.h, s3
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_signed_v8f16_v8i16:
@@ -6856,23 +6853,52 @@ define <4 x i16> @test_s_signed_v4f32_v4i16(<4 x float> inreg %f) {
; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_s_signed_v4f32_v4i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_cvt_pk_i16_f32 v0, s0, s1
-; GFX11-NEXT: v_cvt_pk_i16_f32 v1, s2, s3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-LABEL: test_s_signed_v4f32_v4i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_cvt_pk_i16_f32 v0, s0, s1
+; GFX11-FAKE16-NEXT: v_cvt_pk_i16_f32 v1, s2, s3
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: test_s_signed_v4f32_v4i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_cvt_pk_i16_f32 v0, s0, s1
-; GFX12-NEXT: v_cvt_pk_i16_f32 v1, s2, s3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_s_signed_v4f32_v4i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_cvt_pk_i16_f32 v0, s0, s0
+; GFX11-TRUE16-NEXT: v_cvt_pk_i16_f32 v1, s2, s2
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: test_s_signed_v4f32_v4i16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_cvt_pk_i16_f32 v0, s0, s1
+; GFX12-FAKE16-NEXT: v_cvt_pk_i16_f32 v1, s2, s3
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_signed_v4f32_v4i16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_cvt_pk_i16_f32 v0, s0, s0
+; GFX12-TRUE16-NEXT: v_cvt_pk_i16_f32 v1, s2, s2
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GI-LABEL: test_s_signed_v4f32_v4i16:
+; GFX12-GI: ; %bb.0:
+; GFX12-GI-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GI-NEXT: s_wait_expcnt 0x0
+; GFX12-GI-NEXT: s_wait_samplecnt 0x0
+; GFX12-GI-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GI-NEXT: s_wait_kmcnt 0x0
+; GFX12-GI-NEXT: v_cvt_pk_i16_f32 v0, s0, s1
+; GFX12-GI-NEXT: v_cvt_pk_i16_f32 v1, s2, s3
+; GFX12-GI-NEXT: s_setpc_b64 s[30:31]
%x = call <4 x i16> @llvm.fptosi.sat.v4f32.v4i16(<4 x float> %f)
ret <4 x i16> %x
}
diff --git a/llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll b/llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
index 8b6df1ca1e69c9..5d35d59a1a3154 100644
--- a/llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
@@ -369,19 +369,47 @@ define i8 @test_s_unsigned_i8_f32(float inreg %f) nounwind {
; GFX11-NEXT: v_min_u32_e32 v0, 0xff, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: test_s_unsigned_i8_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_cvt_u32_f32 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_min_u32 s0, s0, 0xff
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_unsigned_i8_f32:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_min_u32 s0, s0, 0xff
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_unsigned_i8_f32:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_min_u32 s0, s0, 0xff
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GI-LABEL: test_s_unsigned_i8_f32:
+; GFX12-GI: ; %bb.0:
+; GFX12-GI-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GI-NEXT: s_wait_expcnt 0x0
+; GFX12-GI-NEXT: s_wait_samplecnt 0x0
+; GFX12-GI-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GI-NEXT: s_wait_kmcnt 0x0
+; GFX12-GI-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: s_min_u32 s0, s0, 0xff
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GI-NEXT: s_setpc_b64 s[30:31]
%x = call i8 @llvm.fptoui.sat.i8.f32(float %f)
ret i8 %x
}
@@ -407,19 +435,47 @@ define i16 @test_s_unsigned_i16_f32(float inreg %f) nounwind {
; GFX11-NEXT: v_cvt_pk_u16_f32 v0, s0, s0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: test_s_unsigned_i16_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_cvt_u32_f32 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_min_u32 s0, s0, 0xffff
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_unsigned_i16_f32:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_min_u32 s0, s0, 0xffff
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_unsigned_i16_f32:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_min_u32 s0, s0, 0xffff
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GI-LABEL: test_s_unsigned_i16_f32:
+; GFX12-GI: ; %bb.0:
+; GFX12-GI-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GI-NEXT: s_wait_expcnt 0x0
+; GFX12-GI-NEXT: s_wait_samplecnt 0x0
+; GFX12-GI-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GI-NEXT: s_wait_kmcnt 0x0
+; GFX12-GI-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: s_min_u32 s0, s0, 0xffff
+; GFX12-GI-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GI-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GI-NEXT: s_setpc_b64 s[30:31]
%x = call i16 @llvm.fptoui.sat.i16.f32(float %f)
ret i16 %x
}
diff --git a/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll b/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
index 830e14ec13ad15..503fa8ea2decc5 100644
--- a/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
@@ -3564,12 +3564,12 @@ define <4 x i16> @test_s_unsigned_v4f16_v4i16(<4 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_unsigned_v4f16_v4i16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s2
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s3
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s2
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s1
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_unsigned_v4f16_v4i16:
@@ -3599,13 +3599,13 @@ define <4 x i16> @test_s_unsigned_v4f16_v4i16(<4 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s0, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s1, 16
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s2
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s3
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s1
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_unsigned_v4f16_v4i16:
@@ -4173,45 +4173,44 @@ define <8 x i8> @test_unsigned_v8f16_v8i8(<8 x half> %f) {
; GFX11-TRUE16-LABEL: test_unsigned_v8f16_v8i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v4.l, v3.l
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, v4.l
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, v5.l
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, v1.l
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX11-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_min_u16 v0.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, v5.l
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, v6.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, v1.l
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, v0.l
+; GFX11-TRUE16-NEXT: v_min_u16 v0.h, 0xff, v1.h
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, v7.l
+; GFX11-TRUE16-NEXT: v_min_u16 v2.l, 0xff, v2.l
+; GFX11-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_min_u16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_min_u16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v0.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v0.h
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v4.l, v4.l
-; GFX11-TRUE16-NEXT: v_min_u16 v2.l, 0xff, v2.l
+; GFX11-TRUE16-NEXT: v_min_u16 v1.h, 0xff, v1.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, v5.l
; GFX11-TRUE16-NEXT: v_min_u16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v2.l
-; GFX11-TRUE16-NEXT: v_min_u16 v1.l, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v8.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v3.l, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v0.l, v0.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v1.l, v2.l
+; GFX11-TRUE16-NEXT: v_min_u16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_min_u16 v0.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v3.l, v0.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v3.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v8.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.h, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_unsigned_v8f16_v8i8:
@@ -4269,45 +4268,44 @@ define <8 x i8> @test_unsigned_v8f16_v8i8(<8 x half> %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, v3.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v4.l, v3.l
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, v4.l
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, v5.l
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, v1.l
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX12-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v2.l
-; GFX12-TRUE16-NEXT: v_min_u16 v0.h, 0xff, v2.h
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, v5.l
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, v6.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, v1.l
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, v0.l
+; GFX12-TRUE16-NEXT: v_min_u16 v0.h, 0xff, v1.h
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, v7.l
+; GFX12-TRUE16-NEXT: v_min_u16 v2.l, 0xff, v2.l
+; GFX12-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v4.l
; GFX12-TRUE16-NEXT: v_min_u16 v1.l, 0xff, v1.l
-; GFX12-TRUE16-NEXT: v_min_u16 v1.h, 0xff, v1.h
-; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v0.l
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v0.h
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v4.l, v4.l
-; GFX12-TRUE16-NEXT: v_min_u16 v2.l, 0xff, v2.l
+; GFX12-TRUE16-NEXT: v_min_u16 v1.h, 0xff, v1.h
+; GFX12-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, v5.l
; GFX12-TRUE16-NEXT: v_min_u16 v3.l, 0xff, v3.l
-; GFX12-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_or_b16 v8.h, v1.h, v0.h
-; GFX12-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v2.l
-; GFX12-TRUE16-NEXT: v_min_u16 v1.l, 0xff, v3.h
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.h
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v8.h
-; GFX12-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v0.l
-; GFX12-TRUE16-NEXT: v_or_b16 v8.l, v3.l, v0.h
+; GFX12-TRUE16-NEXT: v_or_b16 v6.h, v0.l, v0.h
+; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v1.h
+; GFX12-TRUE16-NEXT: v_or_b16 v2.l, v1.l, v2.l
+; GFX12-TRUE16-NEXT: v_min_u16 v3.h, 0xff, v3.h
+; GFX12-TRUE16-NEXT: v_min_u16 v0.h, 0xff, v2.h
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.h
+; GFX12-TRUE16-NEXT: v_or_b16 v6.l, v3.l, v0.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v3.h
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v5
-; GFX12-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v8
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[7:8]
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v8.h
+; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
+; GFX12-TRUE16-NEXT: v_or_b16 v0.l, v0.h, v1.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v6.l
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_unsigned_v8f16_v8i8:
@@ -5566,49 +5564,49 @@ define <8 x i8> @test_s_unsigned_v8f16_v8i8(<8 x half> inreg %f) {
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, s3
; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s4
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v4.l, s3
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, s2
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v5.l, s1
-; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, s2
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-TRUE16-NEXT: v_min_u32_e32 v0, 0xff, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v6.l, s1
; GFX11-TRUE16-NEXT: v_min_u32_e32 v4, 0xff, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX11-TRUE16-NEXT: v_min_u32_e32 v3, 0xff, v3
; GFX11-TRUE16-NEXT: v_min_u32_e32 v1, 0xff, v1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 8, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX11-TRUE16-NEXT: v_min_u32_e32 v3, 0xff, v3
; GFX11-TRUE16-NEXT: v_min_u32_e32 v7, 0xff, v2
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 8, v4
; GFX11-TRUE16-NEXT: v_min_u32_e32 v5, 0xff, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 8, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v1, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v1, v0
; GFX11-TRUE16-NEXT: v_min_u32_e32 v1, 0xff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v3, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v3, v11
; GFX11-TRUE16-NEXT: v_min_u32_e32 v0, 0xff, v0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v1, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[4:5]
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v1, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[7:8]
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_unsigned_v8f16_v8i8:
@@ -5678,51 +5676,52 @@ define <8 x i8> @test_s_unsigned_v8f16_v8i8(<8 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, s3
; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s2
-; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s4
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v4.l, s3
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, s2
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s2
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v5.l, s1
-; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, s2
; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s0, 16
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX12-TRUE16-NEXT: v_min_u32_e32 v0, 0xff, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v6.l, s1
; GFX12-TRUE16-NEXT: v_min_u32_e32 v4, 0xff, v4
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX12-TRUE16-NEXT: v_min_u32_e32 v3, 0xff, v3
; GFX12-TRUE16-NEXT: v_min_u32_e32 v1, 0xff, v1
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 8, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX12-TRUE16-NEXT: v_min_u32_e32 v3, 0xff, v3
; GFX12-TRUE16-NEXT: v_min_u32_e32 v7, 0xff, v2
; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 8, v4
; GFX12-TRUE16-NEXT: v_min_u32_e32 v5, 0xff, v5
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 8, v3
-; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, v1, v0
+; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, v1, v0
; GFX12-TRUE16-NEXT: v_min_u32_e32 v1, 0xff, v6
-; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, v7, v4
+; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, v7, v8
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
; GFX12-TRUE16-NEXT: v_or_b32_e32 v2, v5, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v8
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff, v4
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
-; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, v3, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
+; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, v3, v11
; GFX12-TRUE16-NEXT: v_min_u32_e32 v0, 0xff, v0
-; GFX12-TRUE16-NEXT: v_or_b32_e32 v9, v1, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[4:5]
+; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, v1, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[7:8]
; GFX12-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v8
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v8
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v11
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.l
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_unsigned_v8f16_v8i8:
@@ -5937,18 +5936,18 @@ define <8 x i16> @test_s_unsigned_v8f16_v8i16(<8 x half> inreg %f) {
; GFX11-TRUE16-LABEL: test_s_unsigned_v8f16_v8i16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, s4
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, s5
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s4
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s5
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
-; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, s2
; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, s3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s4
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s1
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, s2
+; GFX11-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, s3
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_s_unsigned_v8f16_v8i16:
@@ -5990,20 +5989,19 @@ define <8 x i16> @test_s_unsigned_v8f16_v8i16(<8 x half> inreg %f) {
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, s4
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, s5
-; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s1, 16
-; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s4
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s5
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
-; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, s2
; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.l, s3
+; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.l, s2
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.l, s1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s0, 16
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.l, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v0.h, s4
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v1.h, s1
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v2.h, s2
+; GFX12-TRUE16-NEXT: v_cvt_u16_f16_e32 v3.h, s3
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_unsigned_v8f16_v8i16:
@@ -6396,23 +6394,52 @@ define <4 x i16> @test_s_unsigned_v4f32_v4i16(<4 x float> inreg %f) {
; GFX9-NEXT: v_or_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_s_unsigned_v4f32_v4i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_cvt_pk_u16_f32 v0, s0, s1
-; GFX11-NEXT: v_cvt_pk_u16_f32 v1, s2, s3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-FAKE16-LABEL: test_s_unsigned_v4f32_v4i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_cvt_pk_u16_f32 v0, s0, s1
+; GFX11-FAKE16-NEXT: v_cvt_pk_u16_f32 v1, s2, s3
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: test_s_unsigned_v4f32_v4i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_cvt_pk_u16_f32 v0, s0, s1
-; GFX12-NEXT: v_cvt_pk_u16_f32 v1, s2, s3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_s_unsigned_v4f32_v4i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_cvt_pk_u16_f32 v0, s0, s0
+; GFX11-TRUE16-NEXT: v_cvt_pk_u16_f32 v1, s2, s2
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: test_s_unsigned_v4f32_v4i16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_cvt_pk_u16_f32 v0, s0, s1
+; GFX12-FAKE16-NEXT: v_cvt_pk_u16_f32 v1, s2, s3
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_unsigned_v4f32_v4i16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_cvt_pk_u16_f32 v0, s0, s0
+; GFX12-TRUE16-NEXT: v_cvt_pk_u16_f32 v1, s2, s2
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GI-LABEL: test_s_unsigned_v4f32_v4i16:
+; GFX12-GI: ; %bb.0:
+; GFX12-GI-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GI-NEXT: s_wait_expcnt 0x0
+; GFX12-GI-NEXT: s_wait_samplecnt 0x0
+; GFX12-GI-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GI-NEXT: s_wait_kmcnt 0x0
+; GFX12-GI-NEXT: v_cvt_pk_u16_f32 v0, s0, s1
+; GFX12-GI-NEXT: v_cvt_pk_u16_f32 v1, s2, s3
+; GFX12-GI-NEXT: s_setpc_b64 s[30:31]
%x = call <4 x i16> @llvm.fptoui.sat.v4f32.v4i16(<4 x float> %f)
ret <4 x i16> %x
}
@@ -6677,39 +6704,75 @@ define <4 x i8> @test_s_unsigned_v4f32_v4i8(<4 x float> inreg %f) {
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-ISEL-LABEL: test_s_unsigned_v4f32_v4i8:
-; GFX12-ISEL: ; %bb.0:
-; GFX12-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-ISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-ISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s3, s3
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s1, s1
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s0, s0
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_min_u32 s3, s3, 0xff
-; GFX12-ISEL-NEXT: s_min_u32 s2, s2, 0xff
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_lshl_b32 s3, s3, 8
-; GFX12-ISEL-NEXT: s_min_u32 s1, s1, 0xff
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_or_b32 s2, s2, s3
-; GFX12-ISEL-NEXT: s_min_u32 s0, s0, 0xff
-; GFX12-ISEL-NEXT: s_lshl_b32 s1, s1, 8
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_lshl_b32 s3, s2, 16
-; GFX12-ISEL-NEXT: s_or_b32 s0, s0, s1
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_or_b32 s1, s1, s3
-; GFX12-ISEL-NEXT: s_lshr_b32 s3, s3, 24
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_lshr_b32 s1, s1, 8
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
-; GFX12-ISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_unsigned_v4f32_v4i8:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s3, s3
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s1, s1
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_min_u32 s3, s3, 0xff
+; GFX12-FAKE16-NEXT: s_min_u32 s2, s2, 0xff
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_lshl_b32 s3, s3, 8
+; GFX12-FAKE16-NEXT: s_min_u32 s1, s1, 0xff
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX12-FAKE16-NEXT: s_min_u32 s0, s0, 0xff
+; GFX12-FAKE16-NEXT: s_lshl_b32 s1, s1, 8
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_lshl_b32 s3, s2, 16
+; GFX12-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_or_b32 s1, s1, s3
+; GFX12-FAKE16-NEXT: s_lshr_b32 s3, s3, 24
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_unsigned_v4f32_v4i8:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s3, s3
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s1, s1
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_min_u32 s3, s3, 0xff
+; GFX12-TRUE16-NEXT: s_min_u32 s2, s2, 0xff
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_lshl_b32 s3, s3, 8
+; GFX12-TRUE16-NEXT: s_min_u32 s1, s1, 0xff
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX12-TRUE16-NEXT: s_min_u32 s0, s0, 0xff
+; GFX12-TRUE16-NEXT: s_lshl_b32 s1, s1, 8
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_lshl_b32 s3, s2, 16
+; GFX12-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_or_b32 s1, s1, s3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_lshr_b32 s0, s1, 8
+; GFX12-TRUE16-NEXT: s_lshr_b32 s1, s3, 24
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, s0
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, s2
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, s1
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_unsigned_v4f32_v4i8:
; GFX12-GI: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/frem.ll b/llvm/test/CodeGen/AMDGPU/frem.ll
index 112cfabd6d4343..b743a4803a09d9 100644
--- a/llvm/test/CodeGen/AMDGPU/frem.ll
+++ b/llvm/test/CodeGen/AMDGPU/frem.ll
@@ -529,67 +529,70 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]
-; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v1, s[4:5] offset:8
+; GFX11-TRUE16-NEXT: global_load_d16_b16 v1, v0, s[2:3]
+; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[4:5] offset:8
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v4, |v1.l|
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, |v0.l|
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, |v0.h|
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, |v0.l|
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v1, v2
+; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v2
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB0_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %frem.else
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v1, v2
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v1.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v2
; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v0.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v1.l, v0.h, vcc_lo
; GFX11-TRUE16-NEXT: s_branch .LBB0_3
; GFX11-TRUE16-NEXT: .LBB0_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: .LBB0_3: ; %Flow18
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB0_8
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB0_9
; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.compute
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, v2
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, v4
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v3, 11
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, v2
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, v2
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v2
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v2, v4, 1
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v3
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v4, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v5, null, v2, v2, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v6, v5
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v2, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v7, -v5, v6, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v6
+; GFX11-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v7, v3, v6
-; GFX11-TRUE16-NEXT: v_fma_f32 v8, -v5, v7, v3
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
-; GFX11-TRUE16-NEXT: v_fma_f32 v3, -v5, v7, v3
+; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v3, v3, v6, v7
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v2, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB0_7
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB0_8
; GFX11-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -597,29 +600,48 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX11-TRUE16-NEXT: .LBB0_6: ; %frem.loop_body
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v4, v1, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, v4
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
-; GFX11-TRUE16-NEXT: v_fma_f32 v1, -v4, v2, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, v1, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v4, -v4, v3, v7
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB0_6
-; GFX11-TRUE16-NEXT: .LBB0_7: ; %frem.loop_exit
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX11-TRUE16-NEXT: .LBB0_8: ; %Flow19
-; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v0.h
-; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, 0x7c00, |v0.l|
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX11-TRUE16-NEXT: ; %bb.7: ; %Flow
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX11-TRUE16-NEXT: .LBB0_8: ; %frem.loop_exit
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v4, -v5, v3, v4
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
+; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0x7fff, v2, v1
+; GFX11-TRUE16-NEXT: .LBB0_9: ; %Flow19
+; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, 0x7c00, |v1.l|
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, 0
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v3.l, s2
-; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX11-TRUE16-NEXT: global_store_b16 v2, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: frem_f16:
@@ -752,13 +774,13 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX1150-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[10:11]
; GFX1150-TRUE16-NEXT: global_load_d16_b16 v1, v1, s[0:1] offset:8
; GFX1150-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1150-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX1150-TRUE16-NEXT: s_and_b32 s1, s2, 0x7fff
; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
-; GFX1150-TRUE16-NEXT: s_and_b32 s2, s1, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s1, s0
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s0, s2
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s1, s1
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s0, s0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s1, s0
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB0_2
@@ -772,47 +794,48 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX1150-TRUE16-NEXT: s_branch .LBB0_3
; GFX1150-TRUE16-NEXT: .LBB0_2:
; GFX1150-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX1150-TRUE16-NEXT: .LBB0_3: ; %Flow18
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB0_8
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB0_9
; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.compute
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s0
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s0
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s1
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s1
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s1
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v5
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v4
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v6, null, v3, v3, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v5, v5
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v7, v6
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v4
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v4, vcc_lo, 1.0, v3, 1.0
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v5
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v2
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v8, -v6, v7, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v7
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v8, v4, v7
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1150-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v9, -v6, v8, v4
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v7
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v4, -v6, v8, v4
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX1150-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v4, v4, v7, v8
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v3, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB0_7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB0_8
; GFX1150-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s0, s1, s0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -820,23 +843,45 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX1150-TRUE16-NEXT: .LBB0_6: ; %frem.loop_body
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v5, v2, v4
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, v4
; GFX1150-TRUE16-NEXT: s_add_i32 s0, s0, -11
; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s0, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1150-TRUE16-NEXT: v_fma_f32 v4, v4, v3, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB0_6
+; GFX1150-TRUE16-NEXT: ; %bb.7: ; %Flow
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, s0
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX1150-TRUE16-NEXT: .LBB0_8: ; %frem.loop_exit
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v2, v5, v3
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v2
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v5, v2, v3
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v4, v5, v3
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB0_6
-; GFX1150-TRUE16-NEXT: .LBB0_7: ; %frem.loop_exit
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1150-TRUE16-NEXT: .LBB0_8: ; %Flow19
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX1150-TRUE16-NEXT: .LBB0_9: ; %Flow19
; GFX1150-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x7fff, v0
; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
@@ -985,13 +1030,13 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX1200-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[10:11]
; GFX1200-TRUE16-NEXT: global_load_d16_b16 v1, v1, s[0:1] offset:8
; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX1200-TRUE16-NEXT: s_and_b32 s1, s2, 0x7fff
; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
-; GFX1200-TRUE16-NEXT: s_and_b32 s2, s1, 0x7fff
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s1, s0
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s0, s2
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s1, s1
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s0, s0
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s1, s0
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB0_2
@@ -1005,48 +1050,49 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX1200-TRUE16-NEXT: s_branch .LBB0_3
; GFX1200-TRUE16-NEXT: .LBB0_2:
; GFX1200-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX1200-TRUE16-NEXT: .LBB0_3: ; %Flow18
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB0_8
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB0_9
; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.compute
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s0
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s0
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s1
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s1
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s1
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v5
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v4
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v6, null, v3, v3, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v5, v5
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v7, v6
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v4
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v4, vcc_lo, 1.0, v3, 1.0
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v5
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v2
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v8, -v6, v7, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v7
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v8, v4, v7
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1200-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v9, -v6, v8, v4
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v7
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v4, -v6, v8, v4
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX1200-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v4, v4, v7, v8
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v3, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB0_7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB0_8
; GFX1200-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s0, s1, s0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1054,26 +1100,48 @@ define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1
; GFX1200-TRUE16-NEXT: .LBB0_6: ; %frem.loop_body
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v5, v2, v4
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, v4
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_add_co_i32 s0, s0, -11
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s0, 11
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v4, v4, v3, v7
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB0_6
+; GFX1200-TRUE16-NEXT: ; %bb.7: ; %Flow
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, s0
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX1200-TRUE16-NEXT: .LBB0_8: ; %frem.loop_exit
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v2, v5, v3
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v4, v5, v3
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v2
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v5, v2, v3
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB0_6
-; GFX1200-TRUE16-NEXT: .LBB0_7: ; %frem.loop_exit
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1200-TRUE16-NEXT: .LBB0_8: ; %Flow19
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX1200-TRUE16-NEXT: .LBB0_9: ; %Flow19
; GFX1200-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x7fff, v0
; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -1591,8 +1659,8 @@ define amdgpu_kernel void @fast_frem_f16(ptr addrspace(1) %out, ptr addrspace(1)
; GFX1150-TRUE16-NEXT: v_trunc_f16_e32 v0.l, v0.l
; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v3.l
-; GFX1150-TRUE16-NEXT: global_store_b16 v1, v2, s[0:1]
+; GFX1150-TRUE16-NEXT: v_fma_f16 v0.l, v0.l, v3.l, v2.l
+; GFX1150-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX1150-TRUE16-NEXT: s_endpgm
;
; GFX1150-FAKE16-LABEL: fast_frem_f16:
@@ -1661,8 +1729,8 @@ define amdgpu_kernel void @fast_frem_f16(ptr addrspace(1) %out, ptr addrspace(1)
; GFX1200-TRUE16-NEXT: v_trunc_f16_e32 v0.l, v0.l
; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v3.l
-; GFX1200-TRUE16-NEXT: global_store_b16 v1, v2, s[0:1]
+; GFX1200-TRUE16-NEXT: v_fma_f16 v0.l, v0.l, v3.l, v2.l
+; GFX1200-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX1200-TRUE16-NEXT: s_endpgm
;
; GFX1200-FAKE16-LABEL: fast_frem_f16:
@@ -2074,8 +2142,8 @@ define amdgpu_kernel void @unsafe_frem_f16(ptr addrspace(1) %out, ptr addrspace(
; GFX1150-TRUE16-NEXT: v_trunc_f16_e32 v0.l, v0.l
; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v3.l
-; GFX1150-TRUE16-NEXT: global_store_b16 v1, v2, s[0:1]
+; GFX1150-TRUE16-NEXT: v_fma_f16 v0.l, v0.l, v3.l, v2.l
+; GFX1150-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX1150-TRUE16-NEXT: s_endpgm
;
; GFX1150-FAKE16-LABEL: unsafe_frem_f16:
@@ -2144,8 +2212,8 @@ define amdgpu_kernel void @unsafe_frem_f16(ptr addrspace(1) %out, ptr addrspace(
; GFX1200-TRUE16-NEXT: v_trunc_f16_e32 v0.l, v0.l
; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v3.l
-; GFX1200-TRUE16-NEXT: global_store_b16 v1, v2, s[0:1]
+; GFX1200-TRUE16-NEXT: v_fma_f16 v0.l, v0.l, v3.l, v2.l
+; GFX1200-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX1200-TRUE16-NEXT: s_endpgm
;
; GFX1200-FAKE16-LABEL: unsafe_frem_f16:
@@ -6039,48 +6107,49 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB9_3
; GFX11-TRUE16-NEXT: .LBB9_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: .LBB9_3: ; %Flow57
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_8
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_9
; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.compute19
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, v4
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, v3
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, v3
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, v3
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v3, v6, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v5
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, -1, v3
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v3, v4, 1
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v4, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v6, null, v3, v3, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v4, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v7, v6
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v4, vcc_lo, 1.0, v3, 1.0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v8, -v6, v7, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v7
+; GFX11-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v8, v4, v7
-; GFX11-TRUE16-NEXT: v_fma_f32 v9, -v6, v8, v4
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v7
-; GFX11-TRUE16-NEXT: v_fma_f32 v4, -v6, v8, v4
+; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v4, v4, v7, v8
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v3, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB9_7
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB9_8
; GFX11-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body27.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -6088,22 +6157,41 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: .LBB9_6: ; %frem.loop_body27
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v5, v2, v4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, v4
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
-; GFX11-TRUE16-NEXT: v_fma_f32 v2, -v5, v3, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, v2, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v4, -v4, v3, v7
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_6
-; GFX11-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit28
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX11-TRUE16-NEXT: .LBB9_8:
+; GFX11-TRUE16-NEXT: ; %bb.7: ; %Flow55
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX11-TRUE16-NEXT: .LBB9_8: ; %frem.loop_exit28
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v4, -v5, v3, v4
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
+; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX11-TRUE16-NEXT: .LBB9_9:
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
@@ -6111,81 +6199,101 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v6, |v4.l|
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v7, v6
-; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB9_10
-; GFX11-TRUE16-NEXT: ; %bb.9: ; %frem.else
+; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB9_11
+; GFX11-TRUE16-NEXT: ; %bb.10: ; %frem.else
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v3.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v7, v6
; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v3.l, v0.h, vcc_lo
-; GFX11-TRUE16-NEXT: s_branch .LBB9_11
-; GFX11-TRUE16-NEXT: .LBB9_10:
+; GFX11-TRUE16-NEXT: s_branch .LBB9_12
+; GFX11-TRUE16-NEXT: .LBB9_11:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
-; GFX11-TRUE16-NEXT: .LBB9_11: ; %Flow53
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: .LBB9_12: ; %Flow53
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_16
-; GFX11-TRUE16-NEXT: ; %bb.12: ; %frem.compute
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, v7
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_18
+; GFX11-TRUE16-NEXT: ; %bb.13: ; %frem.compute
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v5, v7
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v7, v6
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v6, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v9, v6
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v5, 11
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v6
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v6, v9, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v8
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v5, v5, 11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, -1, v6
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v6, v7, 1
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v7, v9
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v9, null, v6, v6, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v7, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v10, v9
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v7, vcc_lo, 1.0, v6, 1.0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v10, null, v6, v6, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v11, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v9, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v8, vcc_lo, 1.0, v6, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v11, -v9, v10, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v10, v11, v10
+; GFX11-TRUE16-NEXT: v_fma_f32 v12, -v10, v11, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v11, v7, v10
-; GFX11-TRUE16-NEXT: v_fma_f32 v12, -v9, v11, v7
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v11
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v12, v8, v11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v10
-; GFX11-TRUE16-NEXT: v_fma_f32 v7, -v9, v11, v7
+; GFX11-TRUE16-NEXT: v_fma_f32 v13, -v10, v12, v8
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v12, v13, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v8, -v10, v12, v8
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v7, v7, v10, v11
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v8
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v7, v7, v6, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX11-TRUE16-NEXT: ; %bb.13: ; %frem.loop_body.preheader
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v8, v8, v11, v12
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB9_17
+; GFX11-TRUE16-NEXT: ; %bb.14: ; %frem.loop_body.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB9_14: ; %frem.loop_body
+; GFX11-TRUE16-NEXT: .LBB9_15: ; %frem.loop_body
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v8, v5, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, v7
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v7, v10, v8
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v7, -v7, v6, v10
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_15
+; GFX11-TRUE16-NEXT: ; %bb.16: ; %Flow
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, v10
+; GFX11-TRUE16-NEXT: .LBB9_17: ; %frem.loop_exit
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v7, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v8, v7, v8
; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v8, v8
-; GFX11-TRUE16-NEXT: v_fma_f32 v5, -v8, v6, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v5
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, v5, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v5, v5, 11
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB9_14
-; GFX11-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
-; GFX11-TRUE16-NEXT: .LBB9_16: ; %Flow54
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v7, -v8, v6, v7
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v5, v6, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v5.l, v5
+; GFX11-TRUE16-NEXT: v_bfi_b32 v5, 0x7fff, v5, v3
+; GFX11-TRUE16-NEXT: .LBB9_18: ; %Flow54
; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, 0x7c00, |v0.l|
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
@@ -6430,199 +6538,245 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-LABEL: frem_v2f16:
; GFX1150-TRUE16: ; %bb.0:
; GFX1150-TRUE16-NEXT: s_clause 0x1
-; GFX1150-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1150-TRUE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
-; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1150-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX1150-TRUE16-NEXT: s_load_b64 s[2:3], s[4:5], 0x34
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX1150-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX1150-TRUE16-NEXT: s_clause 0x1
-; GFX1150-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]
-; GFX1150-TRUE16-NEXT: global_load_b32 v0, v0, s[6:7] offset:16
+; GFX1150-TRUE16-NEXT: global_load_b32 v0, v1, s[10:11]
+; GFX1150-TRUE16-NEXT: global_load_b32 v1, v1, s[2:3] offset:16
; GFX1150-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX1150-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
-; GFX1150-TRUE16-NEXT: s_and_b32 s2, s4, 0x7fff
-; GFX1150-TRUE16-NEXT: s_and_b32 s5, s3, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s6, s2
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s5, s5
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1150-TRUE16-NEXT: s_and_b32 s2, s0, 0x7fff
+; GFX1150-TRUE16-NEXT: s_and_b32 s4, s1, 0x7fff
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s3, s2
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s2, s4
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s6, s5
+; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s3, s2
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB9_2
; GFX1150-TRUE16-NEXT: ; %bb.1: ; %frem.else20
-; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s6, s5
-; GFX1150-TRUE16-NEXT: v_and_b16 v0.l, 0x8000, s4
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s7, -1, 0
+; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s3, s2
+; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v0.l
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.l, s4, v0.l, s7
-; GFX1150-TRUE16-NEXT: s_mov_b32 s7, 0
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v2.l, v0.l, v0.h, s4
+; GFX1150-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX1150-TRUE16-NEXT: s_branch .LBB9_3
; GFX1150-TRUE16-NEXT: .LBB9_2:
-; GFX1150-TRUE16-NEXT: s_mov_b32 s7, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX1150-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX1150-TRUE16-NEXT: .LBB9_3: ; %Flow57
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s7, s7, exec_lo
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s7, 1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s7, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_8
+; GFX1150-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_9
; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.compute19
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s5
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s5
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s6
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s6
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s2
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s3
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s3
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s2
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v1, v1, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v3, -1, v3
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v4, null, v1, v1, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v3, v3
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v5, v4
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, v1, 1.0
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s3, v5
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s2, v2
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v6, -v4, v5, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v5, v6, v5
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v6, v2, v5
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1150-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v7, -v4, v6, v2
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v5
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v2, -v4, v6, v2
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX1150-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v2, v2, v5, v6
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v3
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v2, v2, v1, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB9_7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB9_8
; GFX1150-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body27.preheader
-; GFX1150-TRUE16-NEXT: s_sub_i32 s5, s6, s5
+; GFX1150-TRUE16-NEXT: s_sub_i32 s2, s3, s2
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_add_i32 s5, s5, 11
+; GFX1150-TRUE16-NEXT: s_add_i32 s2, s2, 11
; GFX1150-TRUE16-NEXT: .LBB9_6: ; %frem.loop_body27
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v3, v0, v2
-; GFX1150-TRUE16-NEXT: s_add_i32 s5, s5, -11
-; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s5, 11
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v3, v3
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v3, 0x80000000, v3
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, v4
+; GFX1150-TRUE16-NEXT: s_add_i32 s2, s2, -11
+; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v0, v3, v1
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v0
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v3, v0, v1
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1150-TRUE16-NEXT: v_fma_f32 v4, v4, v3, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_6
-; GFX1150-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit28
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1150-TRUE16-NEXT: .LBB9_8:
-; GFX1150-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
-; GFX1150-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
-; GFX1150-TRUE16-NEXT: s_and_b32 s4, s8, 0x7fff
-; GFX1150-TRUE16-NEXT: s_and_b32 s6, s5, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s7, s4
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s6, s6
+; GFX1150-TRUE16-NEXT: ; %bb.7: ; %Flow55
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, s2
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX1150-TRUE16-NEXT: .LBB9_8: ; %frem.loop_exit28
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v4, v5, v3
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX1150-TRUE16-NEXT: .LBB9_9:
+; GFX1150-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX1150-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX1150-TRUE16-NEXT: s_and_b32 s3, s2, 0x7fff
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s1, s0
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s0, s3
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s7, s6
-; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB9_10
-; GFX1150-TRUE16-NEXT: ; %bb.9: ; %frem.else
-; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s7, s6
-; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s8
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s9, -1, 0
+; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s1, s0
+; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB9_11
+; GFX1150-TRUE16-NEXT: ; %bb.10: ; %frem.else
+; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s1, s0
+; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v3.l
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v1.l, s8, v0.h, s9
-; GFX1150-TRUE16-NEXT: s_mov_b32 s8, 0
-; GFX1150-TRUE16-NEXT: s_branch .LBB9_11
-; GFX1150-TRUE16-NEXT: .LBB9_10:
-; GFX1150-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-TRUE16-NEXT: .LBB9_11: ; %Flow53
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_16
-; GFX1150-TRUE16-NEXT: ; %bb.12: ; %frem.compute
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s6
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s6
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s7
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s7
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v5.l, v3.l, v0.h, s3
+; GFX1150-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1150-TRUE16-NEXT: s_branch .LBB9_12
+; GFX1150-TRUE16-NEXT: .LBB9_11:
+; GFX1150-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX1150-TRUE16-NEXT: .LBB9_12: ; %Flow53
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, s2
+; GFX1150-TRUE16-NEXT: s_and_b32 s2, s3, exec_lo
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_18
+; GFX1150-TRUE16-NEXT: ; %bb.13: ; %frem.compute
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, s0
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v5, s1
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, s1
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v6, v6, 1
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v7, v5, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v4, -1, v4
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v5, null, v2, v2, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v4, v4
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v6, v5
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v3
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v2, 1.0
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v8
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v10, null, v6, v6, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v5
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v11, v10
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v9, v5
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v8, vcc_lo, 1.0, v6, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v7, -v5, v6, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v12, -v10, v11, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v6
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v7, v3, v6
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v12, v8, v11
+; GFX1150-TRUE16-NEXT: v_fma_f32 v13, -v10, v12, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v8, -v5, v7, v3
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v3, -v5, v7, v3
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v12, v13, v11
+; GFX1150-TRUE16-NEXT: v_fma_f32 v8, -v10, v12, v8
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v3, v3, v6, v7
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v2, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX1150-TRUE16-NEXT: ; %bb.13: ; %frem.loop_body.preheader
-; GFX1150-TRUE16-NEXT: s_sub_i32 s6, s7, s6
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v8, v8, v11, v12
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v9
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB9_17
+; GFX1150-TRUE16-NEXT: ; %bb.14: ; %frem.loop_body.preheader
+; GFX1150-TRUE16-NEXT: s_sub_i32 s0, s1, s0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_add_i32 s6, s6, 11
-; GFX1150-TRUE16-NEXT: .LBB9_14: ; %frem.loop_body
+; GFX1150-TRUE16-NEXT: s_add_i32 s0, s0, 11
+; GFX1150-TRUE16-NEXT: .LBB9_15: ; %frem.loop_body
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v4, v1, v3
-; GFX1150-TRUE16-NEXT: s_add_i32 s6, s6, -11
-; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s6, 11
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v10, v7
+; GFX1150-TRUE16-NEXT: s_add_i32 s0, s0, -11
+; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s0, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v7, v10, v8
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v7, 0x80000000, v7
+; GFX1150-TRUE16-NEXT: v_fma_f32 v7, v7, v6, v10
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v9, v7, v6
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_15
+; GFX1150-TRUE16-NEXT: ; %bb.16: ; %Flow
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v9, s0
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, v10
+; GFX1150-TRUE16-NEXT: .LBB9_17: ; %frem.loop_exit
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v7, v7, v9
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v1, v4, v2
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v1
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v4, v1, v2
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v8, v7, v8
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v8, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB9_14
-; GFX1150-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-TRUE16-NEXT: .LBB9_16: ; %Flow54
-; GFX1150-TRUE16-NEXT: s_cmp_lg_f16 s3, 0
-; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v2, 0
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_nge_f16 s2, 0x7c00
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v8, 0x80000000, v8
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v6, v7, v6
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v5, v6, v5
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v5.l, v5
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v5, 0x7fff, v5, v3
+; GFX1150-TRUE16-NEXT: .LBB9_18: ; %Flow54
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
+; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v0.l
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v4.l
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, s0
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v2, 0x7fff, v3
+; GFX1150-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v2.l
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s2, s2, s3
-; GFX1150-TRUE16-NEXT: s_cmp_lg_f16 s5, 0
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s2
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_nge_f16 s4, 0x7c00
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s2, s3, s2
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s2
-; GFX1150-TRUE16-NEXT: global_store_b32 v2, v0, s[0:1]
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.l, s0
+; GFX1150-TRUE16-NEXT: global_store_b32 v1, v0, s[8:9]
; GFX1150-TRUE16-NEXT: s_endpgm
;
; GFX1150-FAKE16-LABEL: frem_v2f16:
@@ -6876,213 +7030,260 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-LABEL: frem_v2f16:
; GFX1200-TRUE16: ; %bb.0:
; GFX1200-TRUE16-NEXT: s_clause 0x1
-; GFX1200-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1200-TRUE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
-; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1200-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX1200-TRUE16-NEXT: s_load_b64 s[2:3], s[4:5], 0x34
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX1200-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1200-TRUE16-NEXT: s_clause 0x1
-; GFX1200-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]
-; GFX1200-TRUE16-NEXT: global_load_b32 v0, v0, s[6:7] offset:16
+; GFX1200-TRUE16-NEXT: global_load_b32 v0, v1, s[10:11]
+; GFX1200-TRUE16-NEXT: global_load_b32 v1, v1, s[2:3] offset:16
; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s4, v1
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
-; GFX1200-TRUE16-NEXT: s_and_b32 s2, s4, 0x7fff
-; GFX1200-TRUE16-NEXT: s_and_b32 s5, s3, 0x7fff
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s6, s2
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s5, s5
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1200-TRUE16-NEXT: s_and_b32 s2, s0, 0x7fff
+; GFX1200-TRUE16-NEXT: s_and_b32 s4, s1, 0x7fff
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s3, s2
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s2, s4
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s6, s5
+; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s3, s2
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB9_2
; GFX1200-TRUE16-NEXT: ; %bb.1: ; %frem.else20
-; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s6, s5
-; GFX1200-TRUE16-NEXT: v_and_b16 v0.l, 0x8000, s4
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s7, -1, 0
+; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s3, s2
+; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v0.l
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.l, s4, v0.l, s7
-; GFX1200-TRUE16-NEXT: s_mov_b32 s7, 0
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v2.l, v0.l, v0.h, s4
+; GFX1200-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX1200-TRUE16-NEXT: s_branch .LBB9_3
; GFX1200-TRUE16-NEXT: .LBB9_2:
-; GFX1200-TRUE16-NEXT: s_mov_b32 s7, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX1200-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX1200-TRUE16-NEXT: .LBB9_3: ; %Flow57
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s7, s7, exec_lo
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s7, 1, 0
+; GFX1200-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s7, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_8
+; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_9
; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.compute19
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s5
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s5
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s6
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s6
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s2
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s3
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s3
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s2
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v1, v1, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s5, v3
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v3, -1, v3
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v4, null, v1, v1, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v3, v3
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v5, v4
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, v1, 1.0
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s3, v5
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s2, v2
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v6, -v4, v5, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v5, v6, v5
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v6, v2, v5
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1200-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v7, -v4, v6, v2
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v5
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v2, -v4, v6, v2
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX1200-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v2, v2, v5, v6
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v3
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v2, v2, v1, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB9_7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB9_8
; GFX1200-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body27.preheader
-; GFX1200-TRUE16-NEXT: s_sub_co_i32 s5, s6, s5
+; GFX1200-TRUE16-NEXT: s_sub_co_i32 s2, s3, s2
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s5, s5, 11
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s2, s2, 11
; GFX1200-TRUE16-NEXT: .LBB9_6: ; %frem.loop_body27
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v3, v0, v2
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, v4
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s5, s5, -11
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s2, s2, -11
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s5, 11
-; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v3, v3
+; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v3, 0x80000000, v3
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v0, v3, v1
+; GFX1200-TRUE16-NEXT: v_fma_f32 v4, v4, v3, v7
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_6
+; GFX1200-TRUE16-NEXT: ; %bb.7: ; %Flow55
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, s2
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX1200-TRUE16-NEXT: .LBB9_8: ; %frem.loop_exit28
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v4, v5, v3
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v0
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v3, v0, v1
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_6
-; GFX1200-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit28
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1200-TRUE16-NEXT: .LBB9_8:
-; GFX1200-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
-; GFX1200-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
-; GFX1200-TRUE16-NEXT: s_and_b32 s4, s8, 0x7fff
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX1200-TRUE16-NEXT: .LBB9_9:
+; GFX1200-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX1200-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v3, s0
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s6, s5, 0x7fff
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s7, s4
+; GFX1200-TRUE16-NEXT: s_and_b32 s3, s2, 0x7fff
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s1, s0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s6, s6
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s0, s3
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s7, s6
-; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB9_10
-; GFX1200-TRUE16-NEXT: ; %bb.9: ; %frem.else
-; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s7, s6
-; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s8
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s9, -1, 0
+; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s1, s0
+; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB9_11
+; GFX1200-TRUE16-NEXT: ; %bb.10: ; %frem.else
+; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s1, s0
+; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v3.l
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v1.l, s8, v0.h, s9
-; GFX1200-TRUE16-NEXT: s_mov_b32 s8, 0
-; GFX1200-TRUE16-NEXT: s_branch .LBB9_11
-; GFX1200-TRUE16-NEXT: .LBB9_10:
-; GFX1200-TRUE16-NEXT: s_mov_b32 s8, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-TRUE16-NEXT: .LBB9_11: ; %Flow53
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v5.l, v3.l, v0.h, s3
+; GFX1200-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1200-TRUE16-NEXT: s_branch .LBB9_12
+; GFX1200-TRUE16-NEXT: .LBB9_11:
+; GFX1200-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX1200-TRUE16-NEXT: .LBB9_12: ; %Flow53
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, s2
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s8, s8, exec_lo
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s8, 1, 0
+; GFX1200-TRUE16-NEXT: s_and_b32 s2, s3, exec_lo
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s8, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_16
-; GFX1200-TRUE16-NEXT: ; %bb.12: ; %frem.compute
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s6
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s6
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s7
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s7
+; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_18
+; GFX1200-TRUE16-NEXT: ; %bb.13: ; %frem.compute
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, s0
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v5, s1
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, s1
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v6, v6, 1
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v7, v5, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s0
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s6, v4
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v4, -1, v4
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s7, v3
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v5, null, v2, v2, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v4, v4
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v6, v5
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v3
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v2, 1.0
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v8
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v10, null, v6, v6, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v5
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v11, v10
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v9, v5
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v8, vcc_lo, 1.0, v6, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v7, -v5, v6, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v12, -v10, v11, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v11
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v6
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v7, v3, v6
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v12, v8, v11
+; GFX1200-TRUE16-NEXT: v_fma_f32 v13, -v10, v12, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v8, -v5, v7, v3
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v3, -v5, v7, v3
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v12, v13, v11
+; GFX1200-TRUE16-NEXT: v_fma_f32 v8, -v10, v12, v8
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v3, v3, v6, v7
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v2, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX1200-TRUE16-NEXT: ; %bb.13: ; %frem.loop_body.preheader
-; GFX1200-TRUE16-NEXT: s_sub_co_i32 s6, s7, s6
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v8, v8, v11, v12
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v9
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB9_17
+; GFX1200-TRUE16-NEXT: ; %bb.14: ; %frem.loop_body.preheader
+; GFX1200-TRUE16-NEXT: s_sub_co_i32 s0, s1, s0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s6, s6, 11
-; GFX1200-TRUE16-NEXT: .LBB9_14: ; %frem.loop_body
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s0, s0, 11
+; GFX1200-TRUE16-NEXT: .LBB9_15: ; %frem.loop_body
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v4, v1, v3
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v10, v7
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s6, s6, -11
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s0, s0, -11
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s6, 11
-; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s0, 11
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v7, v10, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v1, v4, v2
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v7, 0x80000000, v7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v7, v7, v6, v10
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v9, v7, v6
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_15
+; GFX1200-TRUE16-NEXT: ; %bb.16: ; %Flow
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v9, s0
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, v10
+; GFX1200-TRUE16-NEXT: .LBB9_17: ; %frem.loop_exit
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v7, v7, v9
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v8, v7, v8
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v8, v8
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v8, 0x80000000, v8
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v1
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v4, v1, v2
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v6, v7, v6
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v5, v6, v5
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v5.l, v5
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB9_14
-; GFX1200-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-TRUE16-NEXT: .LBB9_16: ; %Flow54
-; GFX1200-TRUE16-NEXT: s_cmp_lg_f16 s3, 0
-; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v2, 0
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1200-TRUE16-NEXT: s_cmp_nge_f16 s2, 0x7c00
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1200-TRUE16-NEXT: s_and_b32 s2, s2, s3
-; GFX1200-TRUE16-NEXT: s_cmp_lg_f16 s5, 0
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s2
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1200-TRUE16-NEXT: s_cmp_nge_f16 s4, 0x7c00
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v5, 0x7fff, v5, v3
+; GFX1200-TRUE16-NEXT: .LBB9_18: ; %Flow54
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
+; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v0.l
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v4.l
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s2, s3, s2
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, s0
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v2, 0x7fff, v3
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v2.l
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s2
-; GFX1200-TRUE16-NEXT: global_store_b32 v2, v0, s[0:1]
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.l, s0
+; GFX1200-TRUE16-NEXT: global_store_b32 v1, v0, s[8:9]
; GFX1200-TRUE16-NEXT: s_endpgm
;
; GFX1200-FAKE16-LABEL: frem_v2f16:
@@ -9211,48 +9412,49 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB10_3
; GFX11-TRUE16-NEXT: .LBB10_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: .LBB10_3: ; %Flow135
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_8
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_9
; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.compute85
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v7, v6
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, v6
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, v5
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v8, v5
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v7, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v6, v4, 11
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, v5
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v5, v8, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v7
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, -1, v5
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v5, v6, 1
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v6, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v8, null, v5, v5, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v6, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v9, v8
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v6, vcc_lo, 1.0, v5, 1.0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v9, null, v5, v5, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, -1, v4
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v10, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v8, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v7, vcc_lo, 1.0, v5, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v8, v9, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v9
+; GFX11-TRUE16-NEXT: v_fma_f32 v11, -v9, v10, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v10, v6, v9
-; GFX11-TRUE16-NEXT: v_fma_f32 v11, -v8, v10, v6
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v10, v11, v10
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v11, v7, v10
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v10, v11, v9
-; GFX11-TRUE16-NEXT: v_fma_f32 v6, -v8, v10, v6
+; GFX11-TRUE16-NEXT: v_fma_f32 v12, -v9, v11, v7
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v7, -v9, v11, v7
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v6, v6, v9, v10
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v7
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v6, v6, v5, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_7
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v7, v7, v10, v11
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_8
; GFX11-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body93.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -9260,22 +9462,41 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: .LBB10_6: ; %frem.loop_body93
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v7, v4, v6
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, v6
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
-; GFX11-TRUE16-NEXT: v_fma_f32 v4, -v7, v5, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, v4, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v6, v9, v7
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v6, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v6, -v6, v5, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, v6, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v6, v6, 11
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_6
-; GFX11-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit94
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4
-; GFX11-TRUE16-NEXT: .LBB10_8:
+; GFX11-TRUE16-NEXT: ; %bb.7: ; %Flow133
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, v9
+; GFX11-TRUE16-NEXT: .LBB10_8: ; %frem.loop_exit94
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, -10, v8
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v6, v6, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v7, v6, v7
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v6, -v7, v5, v6
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, v6, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v5, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v4.l, v4
+; GFX11-TRUE16-NEXT: v_bfi_b32 v4, 0x7fff, v4, v0
+; GFX11-TRUE16-NEXT: .LBB10_9:
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
@@ -9283,160 +9504,200 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v8, |v6.l|
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v9, v8
-; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_10
-; GFX11-TRUE16-NEXT: ; %bb.9: ; %frem.else53
+; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_11
+; GFX11-TRUE16-NEXT: ; %bb.10: ; %frem.else53
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v5.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v9, v8
; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v5.l, v0.h, vcc_lo
-; GFX11-TRUE16-NEXT: s_branch .LBB10_11
-; GFX11-TRUE16-NEXT: .LBB10_10:
+; GFX11-TRUE16-NEXT: s_branch .LBB10_12
+; GFX11-TRUE16-NEXT: .LBB10_11:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7
-; GFX11-TRUE16-NEXT: .LBB10_11: ; %Flow131
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: .LBB10_12: ; %Flow131
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_16
-; GFX11-TRUE16-NEXT: ; %bb.12: ; %frem.compute52
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v10, v9
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_18
+; GFX11-TRUE16-NEXT: ; %bb.13: ; %frem.compute52
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v7, v9
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v9, v8
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v11, v8
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v10, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v9, v7, 11
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v7, v8
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v8, v11, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v10
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, -1, v8
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v8, v9, 1
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v9, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v11, null, v8, v8, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v9, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v12, v11
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v9, vcc_lo, 1.0, v8, 1.0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v12, null, v8, v8, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, -1, v7
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v13, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v11, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v10
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v10, vcc_lo, 1.0, v8, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v13, -v11, v12, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v12, v13, v12
+; GFX11-TRUE16-NEXT: v_fma_f32 v14, -v12, v13, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v13, v9, v12
-; GFX11-TRUE16-NEXT: v_fma_f32 v14, -v11, v13, v9
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v13, v14, v13
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v14, v10, v13
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v13, v14, v12
-; GFX11-TRUE16-NEXT: v_fma_f32 v9, -v11, v13, v9
+; GFX11-TRUE16-NEXT: v_fma_f32 v15, -v12, v14, v10
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v14, v15, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v12, v14, v10
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v9, v9, v12, v13
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v10
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v9, v9, v8, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX11-TRUE16-NEXT: ; %bb.13: ; %frem.loop_body60.preheader
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v10, v10, v13, v14
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v10, v10, v8, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_17
+; GFX11-TRUE16-NEXT: ; %bb.14: ; %frem.loop_body60.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_14: ; %frem.loop_body60
+; GFX11-TRUE16-NEXT: .LBB10_15: ; %frem.loop_body60
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v10, v7, v9
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v9
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v9, v12, v10
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v9, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v9, -v9, v8, v12
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, v9, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v9, v9, 11
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_15
+; GFX11-TRUE16-NEXT: ; %bb.16: ; %Flow129
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, v12
+; GFX11-TRUE16-NEXT: .LBB10_17: ; %frem.loop_exit61
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, -10, v11
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v9, v9, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v10, v9, v10
; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v10, v10
-; GFX11-TRUE16-NEXT: v_fma_f32 v7, -v10, v8, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, v7, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_14
-; GFX11-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit61
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7
-; GFX11-TRUE16-NEXT: .LBB10_16:
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v9, -v10, v8, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, v9, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v8, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v7.l, v7
+; GFX11-TRUE16-NEXT: v_bfi_b32 v7, 0x7fff, v7, v5
+; GFX11-TRUE16-NEXT: .LBB10_18:
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v10, |v1.l|
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v9, |v3.l|
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v10, v9
-; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_18
-; GFX11-TRUE16-NEXT: ; %bb.17: ; %frem.else20
+; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_20
+; GFX11-TRUE16-NEXT: ; %bb.19: ; %frem.else20
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v1.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v10, v9
; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v1.l, v0.h, vcc_lo
-; GFX11-TRUE16-NEXT: s_branch .LBB10_19
-; GFX11-TRUE16-NEXT: .LBB10_18:
+; GFX11-TRUE16-NEXT: s_branch .LBB10_21
+; GFX11-TRUE16-NEXT: .LBB10_20:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8
-; GFX11-TRUE16-NEXT: .LBB10_19: ; %Flow127
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX11-TRUE16-NEXT: .LBB10_21: ; %Flow127
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_24
-; GFX11-TRUE16-NEXT: ; %bb.20: ; %frem.compute19
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, v10
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_27
+; GFX11-TRUE16-NEXT: ; %bb.22: ; %frem.compute19
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v8, v10
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v10, v9
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v9, v9
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v12, v9
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v10, v8, 11
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, v9
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v9, v12, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v11
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v8, v8, 11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, -1, v9
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v9, v10, 1
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v10, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v12, null, v9, v9, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v10, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v13, v12
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v10, vcc_lo, 1.0, v9, 1.0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v13, null, v9, v9, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, -1, v8
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v14, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v12, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v11
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v11, vcc_lo, 1.0, v9, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v14, -v12, v13, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v13, v14, v13
+; GFX11-TRUE16-NEXT: v_fma_f32 v15, -v13, v14, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v14, v10, v13
-; GFX11-TRUE16-NEXT: v_fma_f32 v15, -v12, v14, v10
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v14, v15, v14
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v15, v11, v14
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v14, v15, v13
-; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v12, v14, v10
+; GFX11-TRUE16-NEXT: v_fma_f32 v16, -v13, v15, v11
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v15, v16, v14
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v11, -v13, v15, v11
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v10, v10, v13, v14
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v11
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v10, v10, v9, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX11-TRUE16-NEXT: ; %bb.21: ; %frem.loop_body27.preheader
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v11, v11, v14, v15
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_26
+; GFX11-TRUE16-NEXT: ; %bb.23: ; %frem.loop_body27.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_22: ; %frem.loop_body27
+; GFX11-TRUE16-NEXT: .LBB10_24: ; %frem.loop_body27
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v11, v8, v10
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, v10
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v10, v13, v11
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v10, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v10, v9, v13
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, v10, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v10, v10, 11
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_24
+; GFX11-TRUE16-NEXT: ; %bb.25: ; %Flow125
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, v13
+; GFX11-TRUE16-NEXT: .LBB10_26: ; %frem.loop_exit28
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, -10, v12
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v10, v10, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v11, v10, v11
; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v11, v11
-; GFX11-TRUE16-NEXT: v_fma_f32 v8, -v11, v9, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, v8, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v8, v8, 11
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_22
-; GFX11-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit28
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8
-; GFX11-TRUE16-NEXT: .LBB10_24:
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v10, -v11, v9, v10
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, v10, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v8, v9, v8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v8.l, v8
+; GFX11-TRUE16-NEXT: v_bfi_b32 v8, 0x7fff, v8, v1
+; GFX11-TRUE16-NEXT: .LBB10_27:
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
@@ -9444,81 +9705,101 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v12, |v10.l|
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v13, v12
-; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_26
-; GFX11-TRUE16-NEXT: ; %bb.25: ; %frem.else
+; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_29
+; GFX11-TRUE16-NEXT: ; %bb.28: ; %frem.else
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v9.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v13, v12
; GFX11-TRUE16-NEXT: s_mov_b32 s2, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v9.l, v0.h, vcc_lo
-; GFX11-TRUE16-NEXT: s_branch .LBB10_27
-; GFX11-TRUE16-NEXT: .LBB10_26:
+; GFX11-TRUE16-NEXT: s_branch .LBB10_30
+; GFX11-TRUE16-NEXT: .LBB10_29:
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11
-; GFX11-TRUE16-NEXT: .LBB10_27: ; %Flow123
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX11-TRUE16-NEXT: .LBB10_30: ; %Flow123
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_32
-; GFX11-TRUE16-NEXT: ; %bb.28: ; %frem.compute
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v14, v13
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_36
+; GFX11-TRUE16-NEXT: ; %bb.31: ; %frem.compute
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v11, v13
-; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v13, v12
-; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v12, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v15, v12
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v14, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v13, v11, 11
+; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, v12
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v12, v15, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v14
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v11, v11, 11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, -1, v12
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v12, v13, 1
-; GFX11-TRUE16-NEXT: v_not_b32_e32 v13, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v15, null, v12, v12, 1.0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v13, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v16, v15
-; GFX11-TRUE16-NEXT: v_div_scale_f32 v13, vcc_lo, 1.0, v12, 1.0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v16, null, v12, v12, 1.0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, -1, v11
+; GFX11-TRUE16-NEXT: v_rcp_f32_e32 v17, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_not_b32_e32 v15, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v14
+; GFX11-TRUE16-NEXT: v_div_scale_f32 v14, vcc_lo, 1.0, v12, 1.0
; GFX11-TRUE16-NEXT: s_denorm_mode 15
; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-TRUE16-NEXT: v_fma_f32 v17, -v15, v16, 1.0
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v16, v17, v16
+; GFX11-TRUE16-NEXT: v_fma_f32 v18, -v16, v17, 1.0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v17, v13, v16
-; GFX11-TRUE16-NEXT: v_fma_f32 v18, -v15, v17, v13
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v17, v18, v17
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v18, v14, v17
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v17, v18, v16
-; GFX11-TRUE16-NEXT: v_fma_f32 v13, -v15, v17, v13
+; GFX11-TRUE16-NEXT: v_fma_f32 v19, -v16, v18, v14
+; GFX11-TRUE16-NEXT: v_fmac_f32_e32 v18, v19, v17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v14, -v16, v18, v14
; GFX11-TRUE16-NEXT: s_denorm_mode 12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_div_fmas_f32 v13, v13, v16, v17
-; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v14
-; GFX11-TRUE16-NEXT: v_div_fixup_f32 v13, v13, v12, 1.0
-; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX11-TRUE16-NEXT: ; %bb.29: ; %frem.loop_body.preheader
+; GFX11-TRUE16-NEXT: v_div_fmas_f32 v14, v14, v17, v18
+; GFX11-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_35
+; GFX11-TRUE16-NEXT: ; %bb.32: ; %frem.loop_body.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_30: ; %frem.loop_body
+; GFX11-TRUE16-NEXT: .LBB10_33: ; %frem.loop_body
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_mul_f32_e32 v14, v11, v13
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, v13
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, -11
; GFX11-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v13, v16, v14
+; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v13, v13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v13, -v13, v12, v16
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v15, v13, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v13, v13, 11
+; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_33
+; GFX11-TRUE16-NEXT: ; %bb.34: ; %Flow
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, v16
+; GFX11-TRUE16-NEXT: .LBB10_35: ; %frem.loop_exit
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, -10, v15
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v13, v13, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_f32_e32 v14, v13, v14
; GFX11-TRUE16-NEXT: v_rndne_f32_e32 v14, v14
-; GFX11-TRUE16-NEXT: v_fma_f32 v11, -v14, v12, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, v11, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v14, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_ldexp_f32 v11, v11, 11
-; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB10_30
-; GFX11-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11
-; GFX11-TRUE16-NEXT: .LBB10_32: ; %Flow124
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fma_f32 v13, -v14, v12, v13
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, v13, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_ldexp_f32 v11, v12, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v11.l, v11
+; GFX11-TRUE16-NEXT: v_bfi_b32 v11, 0x7fff, v11, v9
+; GFX11-TRUE16-NEXT: .LBB10_36: ; %Flow124
; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v2.l
; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, 0x7c00, |v0.l|
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, 0
@@ -9981,381 +10262,474 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-LABEL: frem_v4f16:
; GFX1150-TRUE16: ; %bb.0:
; GFX1150-TRUE16-NEXT: s_clause 0x1
-; GFX1150-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1150-TRUE16-NEXT: s_load_b64 s[8:9], s[4:5], 0x34
+; GFX1150-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX1150-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v2, 0
; GFX1150-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX1150-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[2:3]
+; GFX1150-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[10:11]
; GFX1150-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
-; GFX1150-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[8:9] offset:32
-; GFX1150-TRUE16-NEXT: s_and_b32 s3, s5, 0x7fff
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s8, s3
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX1150-TRUE16-NEXT: global_load_b64 v[1:2], v2, s[4:5] offset:32
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1150-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s2, v1
-; GFX1150-TRUE16-NEXT: s_and_b32 s6, s4, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s6, s6
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s8, s6
-; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_2
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v2
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v2, 0x7fff, v0
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v3, 0x7fff, v1
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s3, v1
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, v2.l
+; GFX1150-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
+; GFX1150-TRUE16-NEXT: s_cbranch_vccz .LBB10_2
; GFX1150-TRUE16-NEXT: ; %bb.1: ; %frem.else86
-; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s8, s6
-; GFX1150-TRUE16-NEXT: v_and_b16 v0.l, 0x8000, s5
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s9, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.l, s5, v0.l, s9
-; GFX1150-TRUE16-NEXT: s_mov_b32 s9, 0
+; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v0.l
+; GFX1150-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
+; GFX1150-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v2.l, v0.l, v0.h, vcc_lo
; GFX1150-TRUE16-NEXT: s_branch .LBB10_3
; GFX1150-TRUE16-NEXT: .LBB10_2:
-; GFX1150-TRUE16-NEXT: s_mov_b32 s9, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX1150-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX1150-TRUE16-NEXT: .LBB10_3: ; %Flow135
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s9, s9, exec_lo
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s9, 1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s9, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_8
+; GFX1150-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_9
; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.compute85
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s6
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s8
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s8
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v1, v1, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v3, -1, v3
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v4, null, v1, v1, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v3, v3
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v5, v4
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, v1, 1.0
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, v4
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, v3
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, v3
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v6, 1
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v6, -v4, v5, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v5, v6, v5
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v6, v2, v5
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1150-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v7, -v4, v6, v2
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v5
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v2, -v4, v6, v2
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX1150-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v2, v2, v5, v6
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v3
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v2, v2, v1, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_8
; GFX1150-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body93.preheader
-; GFX1150-TRUE16-NEXT: s_sub_i32 s6, s8, s6
+; GFX1150-TRUE16-NEXT: s_sub_i32 s4, s4, s5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_add_i32 s6, s6, 11
+; GFX1150-TRUE16-NEXT: s_add_i32 s4, s4, 11
; GFX1150-TRUE16-NEXT: .LBB10_6: ; %frem.loop_body93
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v3, v0, v2
-; GFX1150-TRUE16-NEXT: s_add_i32 s6, s6, -11
-; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s6, 11
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, v4
+; GFX1150-TRUE16-NEXT: s_add_i32 s4, s4, -11
+; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s4, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v3, v3
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v3, 0x80000000, v3
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v0, v3, v1
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v0
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v3, v0, v1
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1150-TRUE16-NEXT: v_fma_f32 v4, v4, v3, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_6
-; GFX1150-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit94
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1150-TRUE16-NEXT: .LBB10_8:
-; GFX1150-TRUE16-NEXT: s_lshr_b32 s10, s5, 16
-; GFX1150-TRUE16-NEXT: s_lshr_b32 s6, s4, 16
-; GFX1150-TRUE16-NEXT: s_and_b32 s5, s10, 0x7fff
-; GFX1150-TRUE16-NEXT: s_and_b32 s8, s6, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s9, s5
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s8, s8
+; GFX1150-TRUE16-NEXT: ; %bb.7: ; %Flow133
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX1150-TRUE16-NEXT: .LBB10_8: ; %frem.loop_exit94
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v4, v5, v3
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX1150-TRUE16-NEXT: .LBB10_9:
+; GFX1150-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX1150-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v3, s2
+; GFX1150-TRUE16-NEXT: s_and_b32 s2, s2, 0x7fff
+; GFX1150-TRUE16-NEXT: s_and_b32 s5, s4, 0x7fff
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s3, s2
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s2, s5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s9, s8
-; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_10
-; GFX1150-TRUE16-NEXT: ; %bb.9: ; %frem.else53
-; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s9, s8
-; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s10
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s11, -1, 0
+; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s3, s2
+; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_11
+; GFX1150-TRUE16-NEXT: ; %bb.10: ; %frem.else53
+; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s3, s2
+; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v3.l
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s5, -1, 0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v1.l, s10, v0.h, s11
-; GFX1150-TRUE16-NEXT: s_mov_b32 s10, 0
-; GFX1150-TRUE16-NEXT: s_branch .LBB10_11
-; GFX1150-TRUE16-NEXT: .LBB10_10:
-; GFX1150-TRUE16-NEXT: s_mov_b32 s10, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-TRUE16-NEXT: .LBB10_11: ; %Flow131
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_16
-; GFX1150-TRUE16-NEXT: ; %bb.12: ; %frem.compute52
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s8
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s8
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s9
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s9
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v5.l, v3.l, v0.h, s5
+; GFX1150-TRUE16-NEXT: s_mov_b32 s5, 0
+; GFX1150-TRUE16-NEXT: s_branch .LBB10_12
+; GFX1150-TRUE16-NEXT: .LBB10_11:
+; GFX1150-TRUE16-NEXT: s_mov_b32 s5, -1
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX1150-TRUE16-NEXT: .LBB10_12: ; %Flow131
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, s4
+; GFX1150-TRUE16-NEXT: s_and_b32 s4, s5, exec_lo
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_18
+; GFX1150-TRUE16-NEXT: ; %bb.13: ; %frem.compute52
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, s2
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v5, s3
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, s3
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v6, v6, 1
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v7, v5, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s2
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v4, -1, v4
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v5, null, v2, v2, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v4, v4
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v6, v5
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v3
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v2, 1.0
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s3, v8
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v10, null, v6, v6, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s2, v5
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v11, v10
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v9, v5
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v8, vcc_lo, 1.0, v6, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v7, -v5, v6, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v12, -v10, v11, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v6
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v7, v3, v6
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v12, v8, v11
+; GFX1150-TRUE16-NEXT: v_fma_f32 v13, -v10, v12, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v8, -v5, v7, v3
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v3, -v5, v7, v3
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v12, v13, v11
+; GFX1150-TRUE16-NEXT: v_fma_f32 v8, -v10, v12, v8
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v3, v3, v6, v7
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v2, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX1150-TRUE16-NEXT: ; %bb.13: ; %frem.loop_body60.preheader
-; GFX1150-TRUE16-NEXT: s_sub_i32 s8, s9, s8
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v8, v8, v11, v12
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v9
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_17
+; GFX1150-TRUE16-NEXT: ; %bb.14: ; %frem.loop_body60.preheader
+; GFX1150-TRUE16-NEXT: s_sub_i32 s2, s3, s2
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_add_i32 s8, s8, 11
-; GFX1150-TRUE16-NEXT: .LBB10_14: ; %frem.loop_body60
+; GFX1150-TRUE16-NEXT: s_add_i32 s2, s2, 11
+; GFX1150-TRUE16-NEXT: .LBB10_15: ; %frem.loop_body60
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v4, v1, v3
-; GFX1150-TRUE16-NEXT: s_add_i32 s8, s8, -11
-; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s8, 11
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v10, v7
+; GFX1150-TRUE16-NEXT: s_add_i32 s2, s2, -11
+; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v7, v10, v8
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v7, 0x80000000, v7
+; GFX1150-TRUE16-NEXT: v_fma_f32 v7, v7, v6, v10
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v9, v7, v6
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_15
+; GFX1150-TRUE16-NEXT: ; %bb.16: ; %Flow129
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v9, s2
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, v10
+; GFX1150-TRUE16-NEXT: .LBB10_17: ; %frem.loop_exit61
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v7, v7, v9
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v1, v4, v2
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v1
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v4, v1, v2
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v8, v7, v8
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v8, v8
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_14
-; GFX1150-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit61
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-TRUE16-NEXT: .LBB10_16:
-; GFX1150-TRUE16-NEXT: s_and_b32 s8, s7, 0x7fff
-; GFX1150-TRUE16-NEXT: s_and_b32 s9, s2, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s10, s8
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s9, s9
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s10, s9
-; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_18
-; GFX1150-TRUE16-NEXT: ; %bb.17: ; %frem.else20
-; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s10, s9
-; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s7
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s11, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v2.l, s7, v0.h, s11
-; GFX1150-TRUE16-NEXT: s_mov_b32 s11, 0
-; GFX1150-TRUE16-NEXT: s_branch .LBB10_19
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v8, 0x80000000, v8
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v6, v7, v6
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v5, v6, v5
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v5.l, v5
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v5, 0x7fff, v5, v3
; GFX1150-TRUE16-NEXT: .LBB10_18:
-; GFX1150-TRUE16-NEXT: s_mov_b32 s11, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1150-TRUE16-NEXT: .LBB10_19: ; %Flow127
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s11, s11, exec_lo
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s11, 1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s11, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_24
-; GFX1150-TRUE16-NEXT: ; %bb.20: ; %frem.compute19
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s9
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s9
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s10
+; GFX1150-TRUE16-NEXT: s_and_b32 s2, s0, 0x7fff
+; GFX1150-TRUE16-NEXT: s_and_b32 s4, s1, 0x7fff
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s3, s2
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s2, s4
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, s0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s3, s2
+; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_20
+; GFX1150-TRUE16-NEXT: ; %bb.19: ; %frem.else20
+; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s3, s2
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v6.l
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v8.l, v6.l, v0.h, s4
+; GFX1150-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX1150-TRUE16-NEXT: s_branch .LBB10_21
+; GFX1150-TRUE16-NEXT: .LBB10_20:
+; GFX1150-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX1150-TRUE16-NEXT: .LBB10_21: ; %Flow127
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, s1
+; GFX1150-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_27
+; GFX1150-TRUE16-NEXT: ; %bb.22: ; %frem.compute19
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v9, s2
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v8, s3
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, s3
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v9, v9, 1
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v10, v8, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, s2
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v6, null, v3, v3, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v5, v5
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v7, v6
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v4
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v4, vcc_lo, 1.0, v3, 1.0
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s3, v11
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v13, null, v9, v9, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s2, v8
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v8, -1, v8
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v14, v13
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v12, v8
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v11
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v11, vcc_lo, 1.0, v9, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v8, -v6, v7, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v15, -v13, v14, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v14, v15, v14
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v7
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v8, v4, v7
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v15, v11, v14
+; GFX1150-TRUE16-NEXT: v_fma_f32 v16, -v13, v15, v11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v9, -v6, v8, v4
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v7
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v4, -v6, v8, v4
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v15, v16, v14
+; GFX1150-TRUE16-NEXT: v_fma_f32 v11, -v13, v15, v11
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v4, v4, v7, v8
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v3, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX1150-TRUE16-NEXT: ; %bb.21: ; %frem.loop_body27.preheader
-; GFX1150-TRUE16-NEXT: s_sub_i32 s9, s10, s9
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v11, v11, v14, v15
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v12
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_26
+; GFX1150-TRUE16-NEXT: ; %bb.23: ; %frem.loop_body27.preheader
+; GFX1150-TRUE16-NEXT: s_sub_i32 s2, s3, s2
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_add_i32 s9, s9, 11
-; GFX1150-TRUE16-NEXT: .LBB10_22: ; %frem.loop_body27
+; GFX1150-TRUE16-NEXT: s_add_i32 s2, s2, 11
+; GFX1150-TRUE16-NEXT: .LBB10_24: ; %frem.loop_body27
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v5, v2, v4
-; GFX1150-TRUE16-NEXT: s_add_i32 s9, s9, -11
-; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s9, 11
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v13, v10
+; GFX1150-TRUE16-NEXT: s_add_i32 s2, s2, -11
+; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v10, v13, v11
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v10, v10
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v10, 0x80000000, v10
+; GFX1150-TRUE16-NEXT: v_fma_f32 v10, v10, v9, v13
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v10
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v12, v10, v9
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v12, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v10, v10, 11
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_24
+; GFX1150-TRUE16-NEXT: ; %bb.25: ; %Flow125
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v12, s2
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v10, v13
+; GFX1150-TRUE16-NEXT: .LBB10_26: ; %frem.loop_exit28
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v12, -10, v12
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v10, v10, v12
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v11, v10, v11
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v11, v11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v2, v5, v3
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v2
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v5, v2, v3
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v11, 0x80000000, v11
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v10, v11, v9
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v10
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v9, v10, v9
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc_lo
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_22
-; GFX1150-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit28
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1150-TRUE16-NEXT: .LBB10_24:
-; GFX1150-TRUE16-NEXT: s_lshr_b32 s12, s7, 16
-; GFX1150-TRUE16-NEXT: s_lshr_b32 s9, s2, 16
-; GFX1150-TRUE16-NEXT: s_and_b32 s7, s12, 0x7fff
-; GFX1150-TRUE16-NEXT: s_and_b32 s10, s9, 0x7fff
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s11, s7
-; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s10, s10
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v8, v9, v8
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v8.l, v8
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v8, 0x7fff, v8, v6
+; GFX1150-TRUE16-NEXT: .LBB10_27:
+; GFX1150-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX1150-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v9, s0
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX1150-TRUE16-NEXT: s_and_b32 s3, s2, 0x7fff
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s1, s0
+; GFX1150-TRUE16-NEXT: s_cvt_f32_f16 s0, s3
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s11, s10
-; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_26
-; GFX1150-TRUE16-NEXT: ; %bb.25: ; %frem.else
-; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s11, s10
-; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s12
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s13, -1, 0
+; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s1, s0
+; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_29
+; GFX1150-TRUE16-NEXT: ; %bb.28: ; %frem.else
+; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s1, s0
+; GFX1150-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v9.l
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v3.l, s12, v0.h, s13
-; GFX1150-TRUE16-NEXT: s_mov_b32 s12, 0
-; GFX1150-TRUE16-NEXT: s_branch .LBB10_27
-; GFX1150-TRUE16-NEXT: .LBB10_26:
-; GFX1150-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX1150-TRUE16-NEXT: .LBB10_27: ; %Flow123
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_32
-; GFX1150-TRUE16-NEXT: ; %bb.28: ; %frem.compute
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, s10
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v6, s10
-; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s11
-; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s11
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v11.l, v9.l, v0.h, s3
+; GFX1150-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1150-TRUE16-NEXT: s_branch .LBB10_30
+; GFX1150-TRUE16-NEXT: .LBB10_29:
+; GFX1150-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX1150-TRUE16-NEXT: .LBB10_30: ; %Flow123
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v10, s2
+; GFX1150-TRUE16-NEXT: s_and_b32 s2, s3, exec_lo
+; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1150-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_36
+; GFX1150-TRUE16-NEXT: ; %bb.31: ; %frem.compute
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v12, s0
+; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v11, s1
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v14, s1
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v12, v12, 1
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v13, v11, 11
+; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, s0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, 1
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, -1, v6
-; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, 11
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v7, null, v4, v4, 1.0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_not_b32_e32 v6, v6
-; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
-; GFX1150-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v4, 1.0
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s1, v14
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v16, null, v12, v12, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_readfirstlane_b32 s0, v11
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v11, -1, v11
+; GFX1150-TRUE16-NEXT: v_rcp_f32_e32 v17, v16
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_not_b32_e32 v15, v11
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v14
+; GFX1150-TRUE16-NEXT: v_div_scale_f32 v14, vcc_lo, 1.0, v12, 1.0
; GFX1150-TRUE16-NEXT: s_denorm_mode 15
-; GFX1150-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_fma_f32 v18, -v16, v17, 1.0
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v17, v18, v17
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v18, v14, v17
+; GFX1150-TRUE16-NEXT: v_fma_f32 v19, -v16, v18, v14
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v18, v19, v17
+; GFX1150-TRUE16-NEXT: v_fma_f32 v14, -v16, v18, v14
; GFX1150-TRUE16-NEXT: s_denorm_mode 12
-; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
-; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v4, 1.0
-; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX1150-TRUE16-NEXT: ; %bb.29: ; %frem.loop_body.preheader
-; GFX1150-TRUE16-NEXT: s_sub_i32 s10, s11, s10
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1150-TRUE16-NEXT: v_div_fmas_f32 v14, v14, v17, v18
+; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v15
+; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
+; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_35
+; GFX1150-TRUE16-NEXT: ; %bb.32: ; %frem.loop_body.preheader
+; GFX1150-TRUE16-NEXT: s_sub_i32 s0, s1, s0
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_add_i32 s10, s10, 11
-; GFX1150-TRUE16-NEXT: .LBB10_30: ; %frem.loop_body
+; GFX1150-TRUE16-NEXT: s_add_i32 s0, s0, 11
+; GFX1150-TRUE16-NEXT: .LBB10_33: ; %frem.loop_body
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v6, v3, v5
-; GFX1150-TRUE16-NEXT: s_add_i32 s10, s10, -11
-; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s10, 11
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v16, v13
+; GFX1150-TRUE16-NEXT: s_add_i32 s0, s0, -11
+; GFX1150-TRUE16-NEXT: s_cmp_gt_i32 s0, 11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v6, v6
-; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v6, 0x80000000, v6
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v13, v16, v14
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v13, v13
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v3, v6, v4
-; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v3
-; GFX1150-TRUE16-NEXT: v_add_f32_e32 v6, v3, v4
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v13, 0x80000000, v13
+; GFX1150-TRUE16-NEXT: v_fma_f32 v13, v13, v12, v16
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v13
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v15, v13, v12
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v13, v13, 11
+; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_33
+; GFX1150-TRUE16-NEXT: ; %bb.34: ; %Flow
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v15, s0
+; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v13, v16
+; GFX1150-TRUE16-NEXT: .LBB10_35: ; %frem.loop_exit
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v15, -10, v15
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v13, v13, v15
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc_lo
-; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, 11
-; GFX1150-TRUE16-NEXT: s_cbranch_scc1 .LBB10_30
-; GFX1150-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit
-; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX1150-TRUE16-NEXT: .LBB10_32: ; %Flow124
-; GFX1150-TRUE16-NEXT: s_cmp_lg_f16 s4, 0
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_nge_f16 s3, 0x7c00
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s3, s3, s4
-; GFX1150-TRUE16-NEXT: s_cmp_lg_f16 s6, 0
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s3
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_nge_f16 s5, 0x7c00
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s3, s4, s3
-; GFX1150-TRUE16-NEXT: s_cmp_lg_f16 s2, 0
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s3
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_nge_f16 s8, 0x7c00
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s2, s3, s2
-; GFX1150-TRUE16-NEXT: s_cmp_lg_f16 s9, 0
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v2.l, s2
+; GFX1150-TRUE16-NEXT: v_mul_f32_e32 v14, v13, v14
+; GFX1150-TRUE16-NEXT: v_rndne_f32_e32 v14, v14
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_xor_b32_e32 v14, 0x80000000, v14
+; GFX1150-TRUE16-NEXT: v_fmac_f32_e32 v13, v14, v12
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v13
+; GFX1150-TRUE16-NEXT: v_add_f32_e32 v12, v13, v12
+; GFX1150-TRUE16-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_ldexp_f32 v11, v12, v11
+; GFX1150-TRUE16-NEXT: v_cvt_f16_f32_e32 v11.l, v11
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1150-TRUE16-NEXT: v_bfi_b32 v11, 0x7fff, v11, v9
+; GFX1150-TRUE16-NEXT: .LBB10_36: ; %Flow124
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
+; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v3
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v3, 0x7fff, v9
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1150-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v0.l
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v4.l
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, s0
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v2, 0
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1150-TRUE16-NEXT: s_cmp_nge_f16 s7, 0x7c00
-; GFX1150-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1150-TRUE16-NEXT: s_and_b32 s2, s3, s2
-; GFX1150-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v3.l, s2
-; GFX1150-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1150-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v1.l
+; GFX1150-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v6
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v7.l
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.l, s0
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1150-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v1.l
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1150-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v10.l
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v8.l, s0
+; GFX1150-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v3.l
+; GFX1150-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1150-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v11.l, s0
+; GFX1150-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[8:9]
; GFX1150-TRUE16-NEXT: s_endpgm
;
; GFX1150-FAKE16-LABEL: frem_v4f16:
@@ -10841,414 +11215,504 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-LABEL: frem_v4f16:
; GFX1200-TRUE16: ; %bb.0:
; GFX1200-TRUE16-NEXT: s_clause 0x1
-; GFX1200-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1200-TRUE16-NEXT: s_load_b64 s[8:9], s[4:5], 0x34
+; GFX1200-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX1200-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v2, 0
; GFX1200-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1200-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[2:3]
+; GFX1200-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[10:11]
; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s5, v0
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s7, v1
-; GFX1200-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[8:9] offset:32
-; GFX1200-TRUE16-NEXT: s_and_b32 s3, s5, 0x7fff
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s8, s3
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX1200-TRUE16-NEXT: global_load_b64 v[1:2], v2, s[4:5] offset:32
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s2, v1
-; GFX1200-TRUE16-NEXT: s_and_b32 s6, s4, 0x7fff
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s6, s6
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s8, s6
-; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_2
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v2
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v2, 0x7fff, v0
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v3, 0x7fff, v1
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s3, v1
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, v2.l
+; GFX1200-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
+; GFX1200-TRUE16-NEXT: s_cbranch_vccz .LBB10_2
; GFX1200-TRUE16-NEXT: ; %bb.1: ; %frem.else86
-; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s8, s6
-; GFX1200-TRUE16-NEXT: v_and_b16 v0.l, 0x8000, s5
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s9, -1, 0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.l, s5, v0.l, s9
-; GFX1200-TRUE16-NEXT: s_mov_b32 s9, 0
+; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v0.l
+; GFX1200-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
+; GFX1200-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v2.l, v0.l, v0.h, vcc_lo
; GFX1200-TRUE16-NEXT: s_branch .LBB10_3
; GFX1200-TRUE16-NEXT: .LBB10_2:
-; GFX1200-TRUE16-NEXT: s_mov_b32 s9, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr0
+; GFX1200-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX1200-TRUE16-NEXT: .LBB10_3: ; %Flow135
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s9, s9, exec_lo
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s9, 1, 0
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s9, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_8
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX1200-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
+; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_9
; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.compute85
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s6
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, s8
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s8
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v1, v1, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s6, v3
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v3, -1, v3
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v4, null, v1, v1, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v3, v3
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v5, v4
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, v1, 1.0
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, v4
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, v3
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v2, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v2, v3
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v6, 1
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s4, v5
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s5, v2
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v7, null, v3, v3, 1.0
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v2, -1, v2
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v6, v2
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v3, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v6, -v4, v5, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v5, v6, v5
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v6, v2, v5
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1200-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v7, -v4, v6, v2
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v5
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v2, -v4, v6, v2
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
+; GFX1200-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v2, v2, v5, v6
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v3
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v2, v2, v1, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_7
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_8
; GFX1200-TRUE16-NEXT: ; %bb.5: ; %frem.loop_body93.preheader
-; GFX1200-TRUE16-NEXT: s_sub_co_i32 s6, s8, s6
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s6, s6, 11
+; GFX1200-TRUE16-NEXT: s_sub_co_i32 s4, s4, s5
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s4, s4, 11
; GFX1200-TRUE16-NEXT: .LBB10_6: ; %frem.loop_body93
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v3, v0, v2
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s6, s6, -11
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s6, 11
-; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v3, v3
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, v4
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s4, s4, -11
+; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s4, 11
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v3, 0x80000000, v3
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v0, v3, v1
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v4, v7, v5
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
+; GFX1200-TRUE16-NEXT: v_fma_f32 v4, v4, v3, v7
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v0
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v3, v0, v1
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v6, v4, v3
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v0, v0, 11
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, 11
; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_6
-; GFX1200-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit94
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1200-TRUE16-NEXT: .LBB10_8:
-; GFX1200-TRUE16-NEXT: s_lshr_b32 s10, s5, 16
-; GFX1200-TRUE16-NEXT: s_lshr_b32 s6, s4, 16
-; GFX1200-TRUE16-NEXT: s_and_b32 s5, s10, 0x7fff
+; GFX1200-TRUE16-NEXT: ; %bb.7: ; %Flow133
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, s4
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, v7
+; GFX1200-TRUE16-NEXT: .LBB10_8: ; %frem.loop_exit94
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v5, v4, v5
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v4, v5, v3
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v4
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v3, v4, v3
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v3, v2
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v2.l, v2
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v2, 0x7fff, v2, v0
+; GFX1200-TRUE16-NEXT: .LBB10_9:
+; GFX1200-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX1200-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v3, s2
+; GFX1200-TRUE16-NEXT: s_and_b32 s2, s2, 0x7fff
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s8, s6, 0x7fff
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s9, s5
+; GFX1200-TRUE16-NEXT: s_and_b32 s5, s4, 0x7fff
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s3, s2
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s8, s8
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s2, s5
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s9, s8
-; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_10
-; GFX1200-TRUE16-NEXT: ; %bb.9: ; %frem.else53
-; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s9, s8
-; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s10
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s11, -1, 0
+; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s3, s2
+; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_11
+; GFX1200-TRUE16-NEXT: ; %bb.10: ; %frem.else53
+; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s3, s2
+; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v3.l
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s5, -1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v1.l, s10, v0.h, s11
-; GFX1200-TRUE16-NEXT: s_mov_b32 s10, 0
-; GFX1200-TRUE16-NEXT: s_branch .LBB10_11
-; GFX1200-TRUE16-NEXT: .LBB10_10:
-; GFX1200-TRUE16-NEXT: s_mov_b32 s10, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-TRUE16-NEXT: .LBB10_11: ; %Flow131
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v5.l, v3.l, v0.h, s5
+; GFX1200-TRUE16-NEXT: s_mov_b32 s5, 0
+; GFX1200-TRUE16-NEXT: s_branch .LBB10_12
+; GFX1200-TRUE16-NEXT: .LBB10_11:
+; GFX1200-TRUE16-NEXT: s_mov_b32 s5, -1
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX1200-TRUE16-NEXT: .LBB10_12: ; %Flow131
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, s4
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s10, s10, exec_lo
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s10, 1, 0
+; GFX1200-TRUE16-NEXT: s_and_b32 s4, s5, exec_lo
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s10, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_16
-; GFX1200-TRUE16-NEXT: ; %bb.12: ; %frem.compute52
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s8
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s8
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s9
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s9
+; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_18
+; GFX1200-TRUE16-NEXT: ; %bb.13: ; %frem.compute52
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, s2
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v5, s3
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, s3
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v6, v6, 1
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v7, v5, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s2
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s8, v4
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v4, -1, v4
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v5, null, v2, v2, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v4, v4
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v6, v5
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v3
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v2, 1.0
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s3, v8
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v10, null, v6, v6, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s2, v5
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v11, v10
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v9, v5
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v8, vcc_lo, 1.0, v6, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v7, -v5, v6, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v12, -v10, v11, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v11, v12, v11
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v6, v7, v6
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v7, v3, v6
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v12, v8, v11
+; GFX1200-TRUE16-NEXT: v_fma_f32 v13, -v10, v12, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v8, -v5, v7, v3
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v3, -v5, v7, v3
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v12, v13, v11
+; GFX1200-TRUE16-NEXT: v_fma_f32 v8, -v10, v12, v8
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v3, v3, v6, v7
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v2, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX1200-TRUE16-NEXT: ; %bb.13: ; %frem.loop_body60.preheader
-; GFX1200-TRUE16-NEXT: s_sub_co_i32 s8, s9, s8
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v8, v8, v11, v12
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v9
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_17
+; GFX1200-TRUE16-NEXT: ; %bb.14: ; %frem.loop_body60.preheader
+; GFX1200-TRUE16-NEXT: s_sub_co_i32 s2, s3, s2
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s8, s8, 11
-; GFX1200-TRUE16-NEXT: .LBB10_14: ; %frem.loop_body60
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s2, s2, 11
+; GFX1200-TRUE16-NEXT: .LBB10_15: ; %frem.loop_body60
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v4, v1, v3
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v10, v7
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s8, s8, -11
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s2, s2, -11
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s8, 11
-; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v4, v4
+; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v7, v10, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v4, 0x80000000, v4
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v1, v4, v2
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v7, v7
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v7, 0x80000000, v7
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v7, v7, v6, v10
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v9, v7, v6
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v7, v7, 11
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_15
+; GFX1200-TRUE16-NEXT: ; %bb.16: ; %Flow129
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v9, s2
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, v10
+; GFX1200-TRUE16-NEXT: .LBB10_17: ; %frem.loop_exit61
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v7, v7, v9
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v8, v7, v8
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v8, v8
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v8, 0x80000000, v8
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v6
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v1
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v4, v1, v2
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v7
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v6, v7, v6
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v5, v6, v5
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v5.l, v5
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v1, v1, 11
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_14
-; GFX1200-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit61
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-TRUE16-NEXT: .LBB10_16:
-; GFX1200-TRUE16-NEXT: s_and_b32 s8, s7, 0x7fff
-; GFX1200-TRUE16-NEXT: s_and_b32 s9, s2, 0x7fff
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v5, 0x7fff, v5, v3
+; GFX1200-TRUE16-NEXT: .LBB10_18:
+; GFX1200-TRUE16-NEXT: s_and_b32 s2, s0, 0x7fff
+; GFX1200-TRUE16-NEXT: s_and_b32 s4, s1, 0x7fff
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s10, s8
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s9, s9
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s3, s2
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s2, s4
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, s0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s10, s9
-; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_18
-; GFX1200-TRUE16-NEXT: ; %bb.17: ; %frem.else20
-; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s10, s9
-; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s7
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s11, -1, 0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s3, s2
+; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_20
+; GFX1200-TRUE16-NEXT: ; %bb.19: ; %frem.else20
+; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s3, s2
+; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v6.l
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v2.l, s7, v0.h, s11
-; GFX1200-TRUE16-NEXT: s_mov_b32 s11, 0
-; GFX1200-TRUE16-NEXT: s_branch .LBB10_19
-; GFX1200-TRUE16-NEXT: .LBB10_18:
-; GFX1200-TRUE16-NEXT: s_mov_b32 s11, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1200-TRUE16-NEXT: .LBB10_19: ; %Flow127
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v8.l, v6.l, v0.h, s4
+; GFX1200-TRUE16-NEXT: s_mov_b32 s4, 0
+; GFX1200-TRUE16-NEXT: s_branch .LBB10_21
+; GFX1200-TRUE16-NEXT: .LBB10_20:
+; GFX1200-TRUE16-NEXT: s_mov_b32 s4, -1
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
+; GFX1200-TRUE16-NEXT: .LBB10_21: ; %Flow127
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, s1
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s11, s11, exec_lo
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s11, 1, 0
+; GFX1200-TRUE16-NEXT: s_and_b32 s4, s4, exec_lo
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, 1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s11, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_24
-; GFX1200-TRUE16-NEXT: ; %bb.20: ; %frem.compute19
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s9
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s9
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s10
+; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s4, 1
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_27
+; GFX1200-TRUE16-NEXT: ; %bb.22: ; %frem.compute19
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v9, s2
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v8, s3
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, s3
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v9, v9, 1
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v10, v8, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, s2
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s9, v5
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, -1, v5
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s10, v4
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v6, null, v3, v3, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v5, v5
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v7, v6
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v4
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v4, vcc_lo, 1.0, v3, 1.0
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s3, v11
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v13, null, v9, v9, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s2, v8
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v8, -1, v8
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v14, v13
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v12, v8
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v11
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v11, vcc_lo, 1.0, v9, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v8, -v6, v7, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v15, -v13, v14, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v14, v15, v14
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v7, v8, v7
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v8, v4, v7
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v15, v11, v14
+; GFX1200-TRUE16-NEXT: v_fma_f32 v16, -v13, v15, v11
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v9, -v6, v8, v4
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v7
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v4, -v6, v8, v4
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v15, v16, v14
+; GFX1200-TRUE16-NEXT: v_fma_f32 v11, -v13, v15, v11
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v4, v4, v7, v8
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v3, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX1200-TRUE16-NEXT: ; %bb.21: ; %frem.loop_body27.preheader
-; GFX1200-TRUE16-NEXT: s_sub_co_i32 s9, s10, s9
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v11, v11, v14, v15
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v12
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_26
+; GFX1200-TRUE16-NEXT: ; %bb.23: ; %frem.loop_body27.preheader
+; GFX1200-TRUE16-NEXT: s_sub_co_i32 s2, s3, s2
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s9, s9, 11
-; GFX1200-TRUE16-NEXT: .LBB10_22: ; %frem.loop_body27
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s2, s2, 11
+; GFX1200-TRUE16-NEXT: .LBB10_24: ; %frem.loop_body27
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v5, v2, v4
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v13, v10
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s9, s9, -11
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s2, s2, -11
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s9, 11
-; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v5, v5
+; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s2, 11
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v10, v13, v11
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v2, v5, v3
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v10, v10
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v10, 0x80000000, v10
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v10, v10, v9, v13
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v10
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v12, v10, v9
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v12, vcc_lo
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v10, v10, 11
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_24
+; GFX1200-TRUE16-NEXT: ; %bb.25: ; %Flow125
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v12, s2
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v10, v13
+; GFX1200-TRUE16-NEXT: .LBB10_26: ; %frem.loop_exit28
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v12, -10, v12
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v10, v10, v12
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v11, v10, v11
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v11, v11
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v11, 0x80000000, v11
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v10, v11, v9
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v2
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v5, v2, v3
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v10
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v9, v10, v9
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v8, v9, v8
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v8.l, v8
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, 11
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_22
-; GFX1200-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit28
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1200-TRUE16-NEXT: .LBB10_24:
-; GFX1200-TRUE16-NEXT: s_lshr_b32 s12, s7, 16
-; GFX1200-TRUE16-NEXT: s_lshr_b32 s9, s2, 16
-; GFX1200-TRUE16-NEXT: s_and_b32 s7, s12, 0x7fff
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v8, 0x7fff, v8, v6
+; GFX1200-TRUE16-NEXT: .LBB10_27:
+; GFX1200-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX1200-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s10, s9, 0x7fff
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s11, s7
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v9, s0
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
+; GFX1200-TRUE16-NEXT: s_and_b32 s3, s2, 0x7fff
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s10, s10
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s1, s0
+; GFX1200-TRUE16-NEXT: s_cvt_f32_f16 s0, s3
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s11, s10
-; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_26
-; GFX1200-TRUE16-NEXT: ; %bb.25: ; %frem.else
-; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s11, s10
-; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, s12
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s13, -1, 0
+; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s1, s0
+; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_29
+; GFX1200-TRUE16-NEXT: ; %bb.28: ; %frem.else
+; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s1, s0
+; GFX1200-TRUE16-NEXT: v_and_b16 v0.h, 0x8000, v9.l
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v3.l, s12, v0.h, s13
-; GFX1200-TRUE16-NEXT: s_mov_b32 s12, 0
-; GFX1200-TRUE16-NEXT: s_branch .LBB10_27
-; GFX1200-TRUE16-NEXT: .LBB10_26:
-; GFX1200-TRUE16-NEXT: s_mov_b32 s12, -1
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX1200-TRUE16-NEXT: .LBB10_27: ; %Flow123
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v11.l, v9.l, v0.h, s3
+; GFX1200-TRUE16-NEXT: s_mov_b32 s3, 0
+; GFX1200-TRUE16-NEXT: s_branch .LBB10_30
+; GFX1200-TRUE16-NEXT: .LBB10_29:
+; GFX1200-TRUE16-NEXT: s_mov_b32 s3, -1
+; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
+; GFX1200-TRUE16-NEXT: .LBB10_30: ; %Flow123
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v10, s2
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s12, s12, exec_lo
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s12, 1, 0
+; GFX1200-TRUE16-NEXT: s_and_b32 s2, s3, exec_lo
+; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s12, 1
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_32
-; GFX1200-TRUE16-NEXT: ; %bb.28: ; %frem.compute
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, s10
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v6, s10
-; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s11
-; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s11
+; GFX1200-TRUE16-NEXT: s_cmp_lg_u32 s2, 1
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_36
+; GFX1200-TRUE16-NEXT: ; %bb.31: ; %frem.compute
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v12, s0
+; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v11, s1
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v14, s1
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v12, v12, 1
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v13, v11, 11
+; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, s0
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, 1
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s10, v6
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, -1, v6
-; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s11, v5
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, 11
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v7, null, v4, v4, 1.0
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_not_b32_e32 v6, v6
-; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v8, v7
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
-; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v5
-; GFX1200-TRUE16-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v4, 1.0
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s1, v14
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v16, null, v12, v12, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1200-TRUE16-NEXT: v_readfirstlane_b32 s0, v11
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v11, -1, v11
+; GFX1200-TRUE16-NEXT: v_rcp_f32_e32 v17, v16
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_not_b32_e32 v15, v11
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v14
+; GFX1200-TRUE16-NEXT: v_div_scale_f32 v14, vcc_lo, 1.0, v12, 1.0
; GFX1200-TRUE16-NEXT: s_denorm_mode 15
-; GFX1200-TRUE16-NEXT: v_fma_f32 v9, -v7, v8, 1.0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v18, -v16, v17, 1.0
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v17, v18, v17
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v8, v9, v8
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v9, v5, v8
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v18, v14, v17
+; GFX1200-TRUE16-NEXT: v_fma_f32 v19, -v16, v18, v14
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v10, -v7, v9, v5
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v9, v10, v8
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_fma_f32 v5, -v7, v9, v5
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v18, v19, v17
+; GFX1200-TRUE16-NEXT: v_fma_f32 v14, -v16, v18, v14
; GFX1200-TRUE16-NEXT: s_denorm_mode 12
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v5, v5, v8, v9
-; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
-; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v4, 1.0
-; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX1200-TRUE16-NEXT: ; %bb.29: ; %frem.loop_body.preheader
-; GFX1200-TRUE16-NEXT: s_sub_co_i32 s10, s11, s10
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-TRUE16-NEXT: v_div_fmas_f32 v14, v14, v17, v18
+; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v15
+; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
+; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_35
+; GFX1200-TRUE16-NEXT: ; %bb.32: ; %frem.loop_body.preheader
+; GFX1200-TRUE16-NEXT: s_sub_co_i32 s0, s1, s0
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s10, s10, 11
-; GFX1200-TRUE16-NEXT: .LBB10_30: ; %frem.loop_body
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s0, s0, 11
+; GFX1200-TRUE16-NEXT: .LBB10_33: ; %frem.loop_body
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v6, v3, v5
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v16, v13
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_add_co_i32 s10, s10, -11
+; GFX1200-TRUE16-NEXT: s_add_co_i32 s0, s0, -11
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s10, 11
-; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v6, v6
+; GFX1200-TRUE16-NEXT: s_cmp_gt_i32 s0, 11
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v13, v16, v14
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v13, v13
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v13, 0x80000000, v13
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_fma_f32 v13, v13, v12, v16
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v13
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v15, v13, v12
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v6, 0x80000000, v6
-; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v3, v6, v4
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v13, v13, 11
+; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_33
+; GFX1200-TRUE16-NEXT: ; %bb.34: ; %Flow
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v15, s0
+; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v13, v16
+; GFX1200-TRUE16-NEXT: .LBB10_35: ; %frem.loop_exit
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v15, -10, v15
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v13, v13, v15
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_mul_f32_e32 v14, v13, v14
+; GFX1200-TRUE16-NEXT: v_rndne_f32_e32 v14, v14
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_xor_b32_e32 v14, 0x80000000, v14
+; GFX1200-TRUE16-NEXT: v_fmac_f32_e32 v13, v14, v12
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v3
-; GFX1200-TRUE16-NEXT: v_add_f32_e32 v6, v3, v4
+; GFX1200-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v13
+; GFX1200-TRUE16-NEXT: v_add_f32_e32 v12, v13, v12
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc_lo
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_ldexp_f32 v11, v12, v11
+; GFX1200-TRUE16-NEXT: v_cvt_f16_f32_e32 v11.l, v11
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, 11
-; GFX1200-TRUE16-NEXT: s_cbranch_scc1 .LBB10_30
-; GFX1200-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit
-; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX1200-TRUE16-NEXT: .LBB10_32: ; %Flow124
-; GFX1200-TRUE16-NEXT: s_cmp_lg_f16 s4, 0
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
-; GFX1200-TRUE16-NEXT: s_cmp_nge_f16 s3, 0x7c00
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s3, s3, s4
-; GFX1200-TRUE16-NEXT: s_cmp_lg_f16 s6, 0
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s3
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1200-TRUE16-NEXT: s_cmp_nge_f16 s5, 0x7c00
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s4, -1, 0
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s3, s4, s3
-; GFX1200-TRUE16-NEXT: s_cmp_lg_f16 s2, 0
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s3
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1200-TRUE16-NEXT: s_cmp_nge_f16 s8, 0x7c00
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
-; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s2, s3, s2
-; GFX1200-TRUE16-NEXT: s_cmp_lg_f16 s9, 0
+; GFX1200-TRUE16-NEXT: v_bfi_b32 v11, 0x7fff, v11, v9
+; GFX1200-TRUE16-NEXT: .LBB10_36: ; %Flow124
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
+; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v1.l
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v3
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v3, 0x7fff, v9
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1200-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v0.l
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v4.l
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v2.l, s2
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, s0
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v2, 0
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
-; GFX1200-TRUE16-NEXT: s_cmp_nge_f16 s7, 0x7c00
-; GFX1200-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
+; GFX1200-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v1.l
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v6
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v7.l
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: s_and_b32 s2, s3, s2
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.l, s0
+; GFX1200-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v1.l
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
+; GFX1200-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, 0, v10.l
+; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v8.l, s0
+; GFX1200-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, 0x7c00, v3.l
+; GFX1200-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX1200-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX1200-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v3.l, s2
-; GFX1200-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1200-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v11.l, s0
+; GFX1200-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[8:9]
; GFX1200-TRUE16-NEXT: s_endpgm
;
; GFX1200-FAKE16-LABEL: frem_v4f16:
diff --git a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
index 38eee088d0902b..65c79a6a4bab12 100644
--- a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
@@ -34,19 +34,12 @@ define void @void_func_i8_inreg(i8 inreg %arg0) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-TRUE16-LABEL: void_func_i8_inreg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: global_store_b8 v[0:1], v0, off
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: void_func_i8_inreg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-FAKE16-NEXT: global_store_b8 v[0:1], v0, off
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: void_func_i8_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: global_store_b8 v[0:1], v0, off
+; GFX11-NEXT: s_setpc_b64 s[30:31]
store i8 %arg0, ptr addrspace(1) poison
ret void
}
@@ -60,19 +53,12 @@ define void @void_func_i16_inreg(i16 inreg %arg0) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-TRUE16-LABEL: void_func_i16_inreg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: void_func_i16_inreg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: void_func_i16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-NEXT: s_setpc_b64 s[30:31]
store i16 %arg0, ptr addrspace(1) poison
ret void
}
@@ -125,19 +111,12 @@ define void @void_func_f16_inreg(half inreg %arg0) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-TRUE16-LABEL: void_func_f16_inreg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: void_func_f16_inreg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: void_func_f16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-NEXT: s_setpc_b64 s[30:31]
store half %arg0, ptr addrspace(1) poison
ret void
}
@@ -2144,19 +2123,12 @@ define void @void_func_bf16_inreg(bfloat inreg %arg0) #0 {
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-TRUE16-LABEL: void_func_bf16_inreg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
-; GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: void_func_bf16_inreg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v0, off
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: void_func_bf16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: global_store_b16 v[0:1], v0, off
+; GFX11-NEXT: s_setpc_b64 s[30:31]
store bfloat %arg0, ptr addrspace(1) poison
ret void
}
@@ -2617,3 +2589,6 @@ define void @void_func_a16i32_inreg__noimplicit([16 x i32] inreg %arg0, ptr addr
attributes #0 = { nounwind }
attributes #1 = { nounwind noinline }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX11-FAKE16: {{.*}}
+; GFX11-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/function-returns.ll b/llvm/test/CodeGen/AMDGPU/function-returns.ll
index dd9548c42e1484..019e49a823aa28 100644
--- a/llvm/test/CodeGen/AMDGPU/function-returns.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-returns.ll
@@ -1106,32 +1106,59 @@ define <16 x i8> @v16i8_func_void() #0 {
; GFX789-NEXT: v_mov_b32_e32 v3, v18
; GFX789-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v16i8_func_void:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
-; GFX11-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-NEXT: s_mov_b32 s2, -1
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: buffer_load_b128 v[0:3], off, s[0:3], 0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v11, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v16
-; GFX11-NEXT: v_mov_b32_e32 v8, v2
-; GFX11-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v3, v18
-; GFX11-NEXT: v_mov_b32_e32 v2, v17
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: v16i8_func_void:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: buffer_load_b128 v[16:19], off, s[0:3], 0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v19
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v19.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v16i8_func_void:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: buffer_load_b128 v[0:3], off, s[0:3], 0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v3, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, v17
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%ptr = load volatile ptr addrspace(1), ptr addrspace(4) poison
%val = load <16 x i8>, ptr addrspace(1) %ptr
ret <16 x i8> %val
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
index 65d36087440003..ac9a12968f0297 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
@@ -3692,39 +3692,74 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_call_external_void_func_v5i8:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
-; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
-; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
-; GFX11-NEXT: global_load_b64 v[5:6], v[0:1], off
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v5
-; GFX11-NEXT: v_mov_b32_e32 v0, v5
-; GFX11-NEXT: v_mov_b32_e32 v4, v6
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_call_external_void_func_v5i8:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, s33
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s32
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
+; GFX11-TRUE16-NEXT: global_load_b64 v[3:4], v[0:1], off
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_v5i8:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, s33
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s32
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
+; GFX11-FAKE16-NEXT: global_load_b64 v[5:6], v[0:1], off
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v6
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, s33
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SCRATCH-LABEL: test_call_external_void_func_v5i8:
; GFX10-SCRATCH: ; %bb.0:
@@ -3846,41 +3881,78 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_call_external_void_func_v8i8:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
-; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
-; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
-; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b32_e32 v8, 8, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v3, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v8
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_call_external_void_func_v8i8:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, s33
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s32
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
+; GFX11-TRUE16-NEXT: global_load_b64 v[8:9], v[0:1], off
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v9.l
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_v8i8:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, s33
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s32
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
+; GFX11-FAKE16-NEXT: global_load_b64 v[0:1], v[0:1], off
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v8
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, s33
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SCRATCH-LABEL: test_call_external_void_func_v8i8:
; GFX10-SCRATCH: ; %bb.0:
@@ -4070,71 +4142,135 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_call_external_void_func_v32i8:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
-; GFX11-NEXT: v_dual_mov_b32 v4, 16 :: v_dual_mov_b32 v5, 0
-; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
-; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
-; GFX11-NEXT: global_load_b128 v[16:19], v[4:5], off
-; GFX11-NEXT: s_waitcnt vmcnt(1)
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v11, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 24, v19
-; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v35
-; GFX11-NEXT: v_mov_b32_e32 v8, v2
-; GFX11-NEXT: v_mov_b32_e32 v12, v3
-; GFX11-NEXT: v_mov_b32_e32 v20, v17
-; GFX11-NEXT: v_mov_b32_e32 v24, v18
-; GFX11-NEXT: v_mov_b32_e32 v28, v19
-; GFX11-NEXT: v_dual_mov_b32 v2, v36 :: v_dual_mov_b32 v3, v37
-; GFX11-NEXT: v_dual_mov_b32 v17, v32 :: v_dual_mov_b32 v18, v33
-; GFX11-NEXT: v_mov_b32_e32 v19, v34
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_call_external_void_func_v32i8:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, s33
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s32
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
+; GFX11-TRUE16-NEXT: global_load_b128 v[32:35], v[0:1], off
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0
+; GFX11-TRUE16-NEXT: global_load_b128 v[36:39], v[0:1], off
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 24, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v35
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 24, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v39
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.l
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_v32i8:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, s33
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s32
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, 16 :: v_dual_mov_b32 v5, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v[0:1], off
+; GFX11-FAKE16-NEXT: global_load_b128 v[16:19], v[4:5], off
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v35
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v2
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v20, v17
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, v19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, v36 :: v_dual_mov_b32 v3, v37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, v32 :: v_dual_mov_b32 v18, v33
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v19, v34
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, s33
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SCRATCH-LABEL: test_call_external_void_func_v32i8:
; GFX10-SCRATCH: ; %bb.0:
@@ -5190,16 +5326,17 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v41, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
-; GFX11-TRUE16-NEXT: global_load_b64 v[5:6], v[40:41], off
+; GFX11-TRUE16-NEXT: global_load_b64 v[3:4], v[40:41], off
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, v5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v0, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v3, 0xc0c0004
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, 4 :: v_dual_mov_b32 v1, 0
; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v42, 0
@@ -5447,20 +5584,20 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v41, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
-; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v[40:41], off
+; GFX11-TRUE16-NEXT: global_load_b64 v[8:9], v[40:41], off
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v9.l
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v5, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v6, v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v1, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v3, 0xc0c0004
; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v42, 0
@@ -5806,111 +5943,215 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_call_external_void_func_v32i8_ret:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v44, s0, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 32
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:12
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:8
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v42, s33 offset:4
-; GFX11-NEXT: ; meta instruction
-; GFX11-NEXT: scratch_store_b32 off, v43, s33
-; GFX11-NEXT: v_writelane_b32 v44, s30, 0
-; GFX11-NEXT: v_writelane_b32 v44, s31, 1
-; GFX11-NEXT: v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v41, 0
-; GFX11-NEXT: v_dual_mov_b32 v42, 16 :: v_dual_mov_b32 v43, 0
-; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
-; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: global_load_b128 v[0:3], v[40:41], off
-; GFX11-NEXT: global_load_b128 v[16:19], v[42:43], off
-; GFX11-NEXT: s_waitcnt vmcnt(1)
-; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v37, 24, v0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v11, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v21, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v23, 24, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v25, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v27, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v29, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v31, 24, v19
-; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v35
-; GFX11-NEXT: v_mov_b32_e32 v8, v2
-; GFX11-NEXT: v_mov_b32_e32 v12, v3
-; GFX11-NEXT: v_mov_b32_e32 v20, v17
-; GFX11-NEXT: v_mov_b32_e32 v24, v18
-; GFX11-NEXT: v_mov_b32_e32 v28, v19
-; GFX11-NEXT: v_dual_mov_b32 v2, v36 :: v_dual_mov_b32 v3, v37
-; GFX11-NEXT: v_dual_mov_b32 v17, v32 :: v_dual_mov_b32 v18, v33
-; GFX11-NEXT: v_mov_b32_e32 v19, v34
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: v_perm_b32 v12, v12, v13, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v14, v15, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v8, v8, v9, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v10, v11, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v4, v4, v5, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v6, v7, 0xc0c0004
-; GFX11-NEXT: v_lshl_or_b32 v6, v13, 16, v12
-; GFX11-NEXT: v_perm_b32 v0, v0, v1, 0xc0c0004
-; GFX11-NEXT: v_lshl_or_b32 v5, v9, 16, v8
-; GFX11-NEXT: v_perm_b32 v1, v28, v29, 0xc0c0004
-; GFX11-NEXT: v_lshl_or_b32 v4, v7, 16, v4
-; GFX11-NEXT: v_perm_b32 v7, v30, v31, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v8, v24, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v9, v26, v27, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v11, v20, v21, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v12, v22, v23, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v13, v16, v17, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v18, v19, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v2, v2, v3, 0xc0c0004
-; GFX11-NEXT: v_lshl_or_b32 v10, v7, 16, v1
-; GFX11-NEXT: v_lshl_or_b32 v9, v9, 16, v8
-; GFX11-NEXT: v_lshl_or_b32 v8, v12, 16, v11
-; GFX11-NEXT: v_lshl_or_b32 v7, v14, 16, v13
-; GFX11-NEXT: v_lshl_or_b32 v3, v2, 16, v0
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: global_store_b128 v[42:43], v[7:10], off
-; GFX11-NEXT: global_store_b128 v[40:41], v[3:6], off
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v43, off, s33
-; GFX11-NEXT: scratch_load_b32 v42, off, s33 offset:4
-; GFX11-NEXT: scratch_load_b32 v41, off, s33 offset:8
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 offset:12
-; GFX11-NEXT: v_readlane_b32 s30, v44, 0
-; GFX11-NEXT: v_readlane_b32 s31, v44, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v44, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v44, off, s33 offset:16 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_call_external_void_func_v32i8_ret:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, s33
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s32
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s0, 2
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 32
+; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:12
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s33
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s31, 1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v41, 0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v42, 16 :: v_dual_mov_b32 v43, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
+; GFX11-TRUE16-NEXT: global_load_b128 v[32:35], v[40:41], off
+; GFX11-TRUE16-NEXT: global_load_b128 v[36:39], v[42:43], off
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 24, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v35
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 24, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v39
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v32.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v33.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v34.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.l
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v14, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v6, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v13, 16, v12
+; GFX11-TRUE16-NEXT: v_perm_b32 v0, v0, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v9, 16, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v28, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v7, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v30, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v24, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v26, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v20, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v22, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v16, v17, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v18, v19, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v7, 16, v1
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v9, 16, v8
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v14, 16, v13
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v2, 16, v0
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: global_store_b128 v[42:43], v[7:10], off
+; GFX11-TRUE16-NEXT: global_store_b128 v[40:41], v[3:6], off
+; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s33
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s33 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s33 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 offset:12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v44, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v44, 1
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v44, 2
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s33 offset:16 ; 4-byte Folded Reload
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_v32i8_ret:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, s33
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s32
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s0, 2
+; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 32
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:12
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33 offset:8
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:4
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s33
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s31, 1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v41, 0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v42, 16 :: v_dual_mov_b32 v43, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v[40:41], off
+; GFX11-FAKE16-NEXT: global_load_b128 v[16:19], v[42:43], off
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v35
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v2
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v20, v17
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, v19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, v36 :: v_dual_mov_b32 v3, v37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, v32 :: v_dual_mov_b32 v18, v33
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v19, v34
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v14, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v10, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v6, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v13, 16, v12
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v9, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v28, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v7, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v30, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v24, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v26, v27, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v20, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v22, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v16, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v18, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v7, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v9, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v14, 16, v13
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v2, 16, v0
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: global_store_b128 v[42:43], v[7:10], off
+; GFX11-FAKE16-NEXT: global_store_b128 v[40:41], v[3:6], off
+; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s33
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s33 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s33 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s33 offset:12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v44, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v44, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, s33
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v44, 2
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s33 offset:16 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SCRATCH-LABEL: test_call_external_void_func_v32i8_ret:
; GFX10-SCRATCH: ; %bb.0:
@@ -9437,52 +9678,99 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_call_external_void_func_v16i8:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
-; GFX11-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: global_load_b128 v[0:3], v0, s[0:1]
-; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16i8 at abs32@hi
-; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16i8 at abs32@lo
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_lshrrev_b32_e32 v16, 8, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v18, 24, v0
-; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v11, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v13, 8, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX11-NEXT: v_lshrrev_b32_e32 v15, 24, v3
-; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v16
-; GFX11-NEXT: v_mov_b32_e32 v8, v2
-; GFX11-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v3, v18
-; GFX11-NEXT: v_mov_b32_e32 v2, v17
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_call_external_void_func_v16i8:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, s33
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s32
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: global_load_b128 v[16:19], v0, s[0:1]
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v16i8 at abs32@hi
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v16i8 at abs32@lo
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v19
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v19.l
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_v16i8:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, s33
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s32
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v0, s[0:1]
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v16i8 at abs32@hi
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v16i8 at abs32@lo
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 24, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v1, v16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, v2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v3, v18
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, v17
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, s33
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SCRATCH-LABEL: test_call_external_void_func_v16i8:
; GFX10-SCRATCH: ; %bb.0:
@@ -17757,32 +18045,63 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: test_call_external_void_func_bf16_inreg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, s33
-; GFX11-NEXT: s_mov_b32 s33, s32
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
-; GFX11-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
-; GFX11-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: v_readlane_b32 s30, v40, 0
-; GFX11-NEXT: v_readlane_b32 s31, v40, 1
-; GFX11-NEXT: s_mov_b32 s32, s33
-; GFX11-NEXT: v_readlane_b32 s0, v40, 2
-; GFX11-NEXT: s_or_saveexec_b32 s1, -1
-; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
-; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: s_mov_b32 s33, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_call_external_void_func_bf16_inreg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, s33
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s32
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s4
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
+; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s4, v40, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v40, 3
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s33, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_call_external_void_func_bf16_inreg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, s33
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s32
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
+; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: s_mov_b32 s32, s33
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s33, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SCRATCH-LABEL: test_call_external_void_func_bf16_inreg:
; GFX10-SCRATCH: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/global_atomics.ll b/llvm/test/CodeGen/AMDGPU/global_atomics.ll
index fdc8eff962d247..9aa3800ff64a5c 100644
--- a/llvm/test/CodeGen/AMDGPU/global_atomics.ll
+++ b/llvm/test/CodeGen/AMDGPU/global_atomics.ll
@@ -7594,9 +7594,8 @@ define amdgpu_kernel void @atomic_store_i8_offset(i8 %in, ptr addrspace(1) %out)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b8 v1, v0, s[0:1] offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -7653,9 +7652,8 @@ define amdgpu_kernel void @atomic_store_i8(i8 %in, ptr addrspace(1) %out) {
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b8 v1, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -7865,9 +7863,8 @@ define amdgpu_kernel void @atomic_store_i16_offset(i16 %in, ptr addrspace(1) %ou
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1] offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -7924,9 +7921,8 @@ define amdgpu_kernel void @atomic_store_i16(i16 %in, ptr addrspace(1) %out) {
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -7984,9 +7980,8 @@ define amdgpu_kernel void @atomic_store_f16_offset(half %in, ptr addrspace(1) %o
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1] offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -8043,9 +8038,8 @@ define amdgpu_kernel void @atomic_store_f16(half %in, ptr addrspace(1) %out) {
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -8103,9 +8097,8 @@ define amdgpu_kernel void @atomic_store_bf16_offset(bfloat %in, ptr addrspace(1)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1] offset:16
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -8161,9 +8154,8 @@ define amdgpu_kernel void @atomic_store_bf16(bfloat %in, ptr addrspace(1) %out)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2c
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/half.ll b/llvm/test/CodeGen/AMDGPU/half.ll
index 8f274a55c53b83..e6885281c60bcc 100644
--- a/llvm/test/CodeGen/AMDGPU/half.ll
+++ b/llvm/test/CodeGen/AMDGPU/half.ll
@@ -380,17 +380,30 @@ define amdgpu_kernel void @extload_v3f16_to_v3f32_arg(ptr addrspace(1) %out, <3
; VI-NEXT: flat_store_dwordx3 v[3:4], v[0:2]
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: extload_v3f16_to_v3f32_arg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-NEXT: v_mov_b32_e32 v3, 0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-NEXT: v_cvt_f32_f16_e32 v0, s2
-; GFX11-NEXT: v_cvt_f32_f16_e32 v1, s4
-; GFX11-NEXT: v_cvt_f32_f16_e32 v2, s3
-; GFX11-NEXT: global_store_b96 v3, v[0:2], s[0:1]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: extload_v3f16_to_v3f32_arg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, s3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: global_store_b96 v3, v[0:2], s[0:1]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: extload_v3f16_to_v3f32_arg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, 0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s2
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, s4
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, s3
+; GFX11-FAKE16-NEXT: global_store_b96 v3, v[0:2], s[0:1]
+; GFX11-FAKE16-NEXT: s_endpgm
%ext = fpext <3 x half> %arg to <3 x float>
store <3 x float> %ext, ptr addrspace(1) %out
ret void
@@ -433,19 +446,34 @@ define amdgpu_kernel void @extload_v4f16_to_v4f32_arg(ptr addrspace(1) %out, <4
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: extload_v4f16_to_v4f32_arg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-NEXT: v_mov_b32_e32 v4, 0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_lshr_b32 s4, s3, 16
-; GFX11-NEXT: s_lshr_b32 s5, s2, 16
-; GFX11-NEXT: v_cvt_f32_f16_e32 v0, s2
-; GFX11-NEXT: v_cvt_f32_f16_e32 v3, s4
-; GFX11-NEXT: v_cvt_f32_f16_e32 v1, s5
-; GFX11-NEXT: v_cvt_f32_f16_e32 v2, s3
-; GFX11-NEXT: global_store_b128 v4, v[0:3], s[0:1]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: extload_v4f16_to_v4f32_arg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, s4
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s2
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, s3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: extload_v4f16_to_v4f32_arg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, 0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s2, 16
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s2
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, s4
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, s5
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, s3
+; GFX11-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX11-FAKE16-NEXT: s_endpgm
%ext = fpext <4 x half> %arg to <4 x float>
store <4 x float> %ext, ptr addrspace(1) %out
ret void
@@ -676,24 +704,44 @@ define amdgpu_kernel void @extload_v3f16_to_v3f64_arg(ptr addrspace(1) %out, <3
; CIVI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; CIVI-NEXT: s_endpgm
;
-; GFX11-LABEL: extload_v3f16_to_v3f64_arg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-NEXT: v_cvt_f32_f16_e32 v0, s3
-; GFX11-NEXT: v_cvt_f32_f16_e32 v1, s4
-; GFX11-NEXT: v_cvt_f32_f16_e32 v6, s2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[4:5], v0
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[0:1], v6
-; GFX11-NEXT: v_mov_b32_e32 v6, 0
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16
-; GFX11-NEXT: global_store_b128 v6, v[0:3], s[0:1]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: extload_v3f16_to_v3f64_arg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, s3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16
+; GFX11-TRUE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: extload_v3f16_to_v3f64_arg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s3
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, s4
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v6, s2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v0
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v6
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, 0
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16
+; GFX11-FAKE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]
+; GFX11-FAKE16-NEXT: s_endpgm
%ext = fpext <3 x half> %arg to <3 x double>
store <3 x double> %ext, ptr addrspace(1) %out
ret void
@@ -756,27 +804,50 @@ define amdgpu_kernel void @extload_v4f16_to_v4f64_arg(ptr addrspace(1) %out, <4
; VI-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; VI-NEXT: s_endpgm
;
-; GFX11-LABEL: extload_v4f16_to_v4f64_arg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_lshr_b32 s5, s3, 16
-; GFX11-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-NEXT: v_cvt_f32_f16_e32 v2, s3
-; GFX11-NEXT: v_cvt_f32_f16_e32 v3, s5
-; GFX11-NEXT: v_cvt_f32_f16_e32 v0, s2
-; GFX11-NEXT: v_cvt_f32_f16_e32 v8, s4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[4:5], v2
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[6:7], v3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
-; GFX11-NEXT: v_mov_b32_e32 v8, 0
-; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
-; GFX11-NEXT: global_store_b128 v8, v[0:3], s[0:1]
-; GFX11-NEXT: s_endpgm
+; GFX11-TRUE16-LABEL: extload_v4f16_to_v4f64_arg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, 0
+; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s3, 16
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v5, s3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, s2
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s4
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v5
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
+; GFX11-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1]
+; GFX11-TRUE16-NEXT: s_endpgm
+;
+; GFX11-FAKE16-LABEL: extload_v4f16_to_v4f64_arg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, s3
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, s5
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s2
+; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v8, s4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v2
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, 0
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
+; GFX11-FAKE16-NEXT: global_store_b128 v8, v[0:3], s[0:1]
+; GFX11-FAKE16-NEXT: s_endpgm
%ext = fpext <4 x half> %arg to <4 x double>
store <4 x double> %ext, ptr addrspace(1) %out
ret void
diff --git a/llvm/test/CodeGen/AMDGPU/idiv-licm.ll b/llvm/test/CodeGen/AMDGPU/idiv-licm.ll
index 655b6e811933c2..aeb0fc80a20e0b 100644
--- a/llvm/test/CodeGen/AMDGPU/idiv-licm.ll
+++ b/llvm/test/CodeGen/AMDGPU/idiv-licm.ll
@@ -660,30 +660,30 @@ define amdgpu_kernel void @udiv16_invariant_denom(ptr addrspace(1) nocapture %ar
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c
; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX11-NEXT: v_mov_b16_e32 v1.l, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_and_b32 s2, s2, 0xffff
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_cvt_f32_u32_e32 v0, s2
-; GFX11-NEXT: s_mov_b32 s2, 0
; GFX11-NEXT: v_rcp_f32_e32 v0, v0
+; GFX11-NEXT: .p2align 6
; GFX11-NEXT: .LBB4_1: ; %bb3
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX11-NEXT: s_add_i32 s2, s2, 1
-; GFX11-NEXT: v_cvt_f32_u32_e32 v1, s3
-; GFX11-NEXT: s_lshl_b32 s3, s3, 1
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_mov_b32_e32 v2, s3
-; GFX11-NEXT: s_and_b32 s3, s2, 0xffff
+; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v1
; GFX11-NEXT: v_add_nc_u32_e32 v1, 1, v1
-; GFX11-NEXT: s_cmpk_eq_i32 s3, 0x400
-; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-NEXT: v_mul_f32_e32 v1, v1, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cvt_f32_u32_e32 v3, v2
+; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_add_nc_u32_e32 v3, 1, v3
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x400, v4
+; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_mul_f32 v3, v3, v0 :: v_dual_lshlrev_b32 v2, 1, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_trunc_f32_e32 v1, v1
-; GFX11-NEXT: v_cvt_u32_f32_e32 v1, v1
-; GFX11-NEXT: global_store_b16 v2, v1, s[0:1]
-; GFX11-NEXT: s_cbranch_scc0 .LBB4_1
+; GFX11-NEXT: v_trunc_f32_e32 v3, v3
+; GFX11-NEXT: v_cvt_u32_f32_e32 v3, v3
+; GFX11-NEXT: global_store_b16 v2, v3, s[0:1]
+; GFX11-NEXT: s_cbranch_vccz .LBB4_1
; GFX11-NEXT: ; %bb.2: ; %bb2
; GFX11-NEXT: s_endpgm
bb:
@@ -769,7 +769,7 @@ define amdgpu_kernel void @urem16_invariant_denom(ptr addrspace(1) nocapture %ar
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c
; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
-; GFX11-NEXT: s_mov_b32 s3, 0
+; GFX11-NEXT: v_mov_b16_e32 v1.l, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_and_b32 s2, s2, 0xffff
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
@@ -778,25 +778,25 @@ define amdgpu_kernel void @urem16_invariant_denom(ptr addrspace(1) nocapture %ar
; GFX11-NEXT: .p2align 6
; GFX11-NEXT: .LBB5_1: ; %bb3
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-NEXT: s_and_b32 s4, 0xffff, s3
-; GFX11-NEXT: s_add_i32 s3, s3, 1
-; GFX11-NEXT: v_cvt_f32_u32_e32 v1, s4
-; GFX11-NEXT: s_lshl_b32 s5, s4, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_add_nc_u32 v1, 1, v1
-; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-NEXT: v_mul_f32_e32 v1, v1, v0
+; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v1
+; GFX11-NEXT: v_add_nc_u32_e32 v1, 1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cvt_f32_u32_e32 v3, v2
+; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_add_nc_u32_e32 v3, 1, v3
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x400, v4
+; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_mul_f32 v3, v3, v0 :: v_dual_lshlrev_b32 v4, 1, v2
+; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, vcc_lo
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_trunc_f32_e32 v1, v1
-; GFX11-NEXT: v_cvt_u32_f32_e32 v1, v1
+; GFX11-NEXT: v_trunc_f32_e32 v3, v3
+; GFX11-NEXT: v_cvt_u32_f32_e32 v3, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mul_lo_u32 v1, v1, s2
-; GFX11-NEXT: v_sub_nc_u32_e32 v1, s4, v1
-; GFX11-NEXT: s_and_b32 s4, s3, 0xffff
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_cmpk_eq_i32 s4, 0x400
-; GFX11-NEXT: global_store_b16 v2, v1, s[0:1]
-; GFX11-NEXT: s_cbranch_scc0 .LBB5_1
+; GFX11-NEXT: v_mul_lo_u32 v3, v3, s2
+; GFX11-NEXT: v_sub_nc_u32_e32 v2, v2, v3
+; GFX11-NEXT: global_store_b16 v4, v2, s[0:1]
+; GFX11-NEXT: s_cbranch_vccz .LBB5_1
; GFX11-NEXT: ; %bb.2: ; %bb2
; GFX11-NEXT: s_endpgm
bb:
@@ -880,33 +880,31 @@ define amdgpu_kernel void @sdiv16_invariant_denom(ptr addrspace(1) nocapture %ar
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c
; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX11-NEXT: v_mov_b16_e32 v1.l, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_sext_i32_i16 s2, s2
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_cvt_f32_i32_e32 v0, s2
-; GFX11-NEXT: s_mov_b32 s2, 0
; GFX11-NEXT: v_rcp_f32_e32 v0, v0
; GFX11-NEXT: .p2align 6
; GFX11-NEXT: .LBB6_1: ; %bb3
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-NEXT: s_sext_i32_i16 s3, s2
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_cvt_f32_i32_e32 v1, s3
-; GFX11-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX11-NEXT: s_add_i32 s2, s2, 1
-; GFX11-NEXT: s_lshl_b32 s3, s3, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_add_nc_u32 v1, 1, v1
-; GFX11-NEXT: s_and_b32 s3, s2, 0xffff
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-NEXT: s_cmpk_eq_i32 s3, 0x400
+; GFX11-NEXT: v_bfe_i32 v2, v1, 0, 16
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_cvt_f32_i32_e32 v2, v2
+; GFX11-NEXT: v_add_nc_u32_e32 v2, 1, v2
+; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v1
; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-NEXT: v_mul_f32_e32 v1, v1, v0
-; GFX11-NEXT: v_trunc_f32_e32 v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_cvt_i32_f32_e32 v1, v1
-; GFX11-NEXT: global_store_b16 v2, v1, s[0:1]
-; GFX11-NEXT: s_cbranch_scc0 .LBB6_1
+; GFX11-NEXT: v_dual_mul_f32 v2, v2, v0 :: v_dual_add_nc_u32 v1, 1, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v3, 1, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v1
+; GFX11-NEXT: v_trunc_f32_e32 v2, v2
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x400, v4
+; GFX11-NEXT: v_cvt_i32_f32_e32 v2, v2
+; GFX11-NEXT: global_store_b16 v3, v2, s[0:1]
+; GFX11-NEXT: s_cbranch_vccz .LBB6_1
; GFX11-NEXT: ; %bb.2: ; %bb2
; GFX11-NEXT: s_endpgm
bb:
@@ -994,7 +992,7 @@ define amdgpu_kernel void @srem16_invariant_denom(ptr addrspace(1) nocapture %ar
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c
; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
-; GFX11-NEXT: s_mov_b32 s3, 0
+; GFX11-NEXT: v_mov_b16_e32 v1.l, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_sext_i32_i16 s2, s2
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
@@ -1003,25 +1001,28 @@ define amdgpu_kernel void @srem16_invariant_denom(ptr addrspace(1) nocapture %ar
; GFX11-NEXT: .p2align 6
; GFX11-NEXT: .LBB7_1: ; %bb3
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-NEXT: s_sext_i32_i16 s4, s3
-; GFX11-NEXT: s_and_b32 s5, 0xffff, s3
-; GFX11-NEXT: v_cvt_f32_i32_e32 v1, s4
-; GFX11-NEXT: s_lshl_b32 s5, s5, 1
-; GFX11-NEXT: s_add_i32 s3, s3, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_add_nc_u32 v1, 1, v1
-; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX11-NEXT: v_mul_f32_e32 v1, v1, v0
-; GFX11-NEXT: v_trunc_f32_e32 v1, v1
+; GFX11-NEXT: v_bfe_i32 v2, v1, 0, 16
+; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v1
+; GFX11-NEXT: v_add_nc_u32_e32 v1, 1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_cvt_f32_i32_e32 v3, v2
+; GFX11-NEXT: v_lshlrev_b32_e32 v4, 1, v4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v1
+; GFX11-NEXT: v_add_nc_u32_e32 v3, 1, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x400, v5
+; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mul_f32_e32 v3, v3, v0
+; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, vcc_lo
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_cvt_i32_f32_e32 v1, v1
-; GFX11-NEXT: v_mul_lo_u32 v1, v1, s2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_sub_nc_u32_e32 v1, s4, v1
-; GFX11-NEXT: s_and_b32 s4, s3, 0xffff
-; GFX11-NEXT: s_cmpk_eq_i32 s4, 0x400
-; GFX11-NEXT: global_store_b16 v2, v1, s[0:1]
-; GFX11-NEXT: s_cbranch_scc0 .LBB7_1
+; GFX11-NEXT: v_trunc_f32_e32 v3, v3
+; GFX11-NEXT: v_cvt_i32_f32_e32 v3, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_mul_lo_u32 v3, v3, s2
+; GFX11-NEXT: v_sub_nc_u32_e32 v2, v2, v3
+; GFX11-NEXT: global_store_b16 v4, v2, s[0:1]
+; GFX11-NEXT: s_cbranch_vccz .LBB7_1
; GFX11-NEXT: ; %bb.2: ; %bb2
; GFX11-NEXT: s_endpgm
bb:
diff --git a/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll b/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
index 1b1ef8b76da181..01e1816032eb2b 100644
--- a/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
+++ b/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
@@ -52,162 +52,6 @@ bb:
}
define amdgpu_kernel void @f2(i32 %arg, i32 %arg1, i32 %arg2, i1 %arg3, i32 %arg4, i1 %arg5, ptr %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %arg10, i1 %arg11) {
-; GFX11-LABEL: f2:
-; GFX11: ; %bb.0: ; %bb
-; GFX11-NEXT: s_mov_b64 s[18:19], s[4:5]
-; GFX11-NEXT: v_mov_b32_e32 v31, v0
-; GFX11-NEXT: s_load_b32 s26, s[18:19], 0x24
-; GFX11-NEXT: s_mov_b32 s17, s15
-; GFX11-NEXT: s_mov_b32 s12, s13
-; GFX11-NEXT: s_mov_b64 s[10:11], s[6:7]
-; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v31
-; GFX11-NEXT: s_mov_b64 s[6:7], s[2:3]
-; GFX11-NEXT: s_mov_b64 s[4:5], s[0:1]
-; GFX11-NEXT: s_mov_b32 s20, 0
-; GFX11-NEXT: s_mov_b32 s0, -1
-; GFX11-NEXT: s_mov_b32 s24, exec_lo
-; GFX11-NEXT: s_mov_b32 s32, 0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_mul_lo_u32 v0, s26, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_cmpx_eq_u32_e32 0, v0
-; GFX11-NEXT: s_cbranch_execz .LBB2_14
-; GFX11-NEXT: ; %bb.1: ; %bb14
-; GFX11-NEXT: s_load_b128 s[20:23], s[18:19], 0x2c
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_bitcmp1_b32 s21, 0
-; GFX11-NEXT: s_cselect_b32 s25, -1, 0
-; GFX11-NEXT: s_bitcmp0_b32 s21, 0
-; GFX11-NEXT: s_mov_b32 s21, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB2_3
-; GFX11-NEXT: ; %bb.2: ; %bb15
-; GFX11-NEXT: s_add_u32 s8, s18, 0x58
-; GFX11-NEXT: s_addc_u32 s9, s19, 0
-; GFX11-NEXT: s_getpc_b64 s[0:1]
-; GFX11-NEXT: s_add_u32 s0, s0, f0 at gotpcrel32@lo+4
-; GFX11-NEXT: s_addc_u32 s1, s1, f0 at gotpcrel32@hi+12
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: s_mov_b32 s13, s14
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
-; GFX11-NEXT: s_mov_b32 s15, s14
-; GFX11-NEXT: s_mov_b32 s14, s17
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: s_mov_b32 s14, s15
-; GFX11-NEXT: s_mov_b32 s0, 0
-; GFX11-NEXT: s_mov_b32 s2, -1
-; GFX11-NEXT: s_branch .LBB2_4
-; GFX11-NEXT: .LBB2_3:
-; GFX11-NEXT: s_mov_b32 s2, 0
-; GFX11-NEXT: .LBB2_4: ; %Flow10
-; GFX11-NEXT: s_and_b32 s0, s0, exec_lo
-; GFX11-NEXT: s_cselect_b32 s0, 1, 0
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_cmp_lg_u32 s0, 1
-; GFX11-NEXT: s_cbranch_scc1 .LBB2_13
-; GFX11-NEXT: ; %bb.5: ; %bb16
-; GFX11-NEXT: s_load_b32 s0, s[18:19], 0x54
-; GFX11-NEXT: s_bitcmp1_b32 s23, 0
-; GFX11-NEXT: s_cselect_b32 s8, -1, 0
-; GFX11-NEXT: s_and_b32 s1, s23, 1
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_bitcmp1_b32 s0, 0
-; GFX11-NEXT: s_mov_b32 s0, -1
-; GFX11-NEXT: s_cselect_b32 s3, -1, 0
-; GFX11-NEXT: s_cmp_eq_u32 s1, 0
-; GFX11-NEXT: s_cbranch_scc0 .LBB2_9
-; GFX11-NEXT: ; %bb.6: ; %bb18.preheader
-; GFX11-NEXT: s_load_b128 s[28:31], s[18:19], 0x44
-; GFX11-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-NEXT: s_mov_b32 vcc_lo, 0
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_mul_hi_u32 s1, s29, s28
-; GFX11-NEXT: s_mul_i32 s0, s29, s28
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_lshr_b64 s[0:1], s[0:1], 1
-; GFX11-NEXT: s_mov_b32 s1, 0
-; GFX11-NEXT: s_or_b32 s0, s0, 1
-; GFX11-NEXT: s_mov_b32 s9, s1
-; GFX11-NEXT: s_lshr_b32 s0, s0, s30
-; GFX11-NEXT: s_mul_i32 s0, s0, s22
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_mul_i32 s0, s0, s20
-; GFX11-NEXT: s_or_b32 s0, s26, s0
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_lshl_b64 s[22:23], s[0:1], 1
-; GFX11-NEXT: global_load_u16 v0, v0, s[22:23]
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s0, v0
-; GFX11-NEXT: s_cmp_eq_u32 s0, 0
-; GFX11-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-NEXT: .p2align 6
-; GFX11-NEXT: .LBB2_7: ; %bb18
-; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-NEXT: s_and_b32 s1, 0xffff, s1
-; GFX11-NEXT: s_cselect_b32 s1, -1, 0
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s13, s1, exec_lo
-; GFX11-NEXT: s_cselect_b32 s13, 1, 0
-; GFX11-NEXT: s_and_b32 s1, s3, s1
-; GFX11-NEXT: s_and_b32 s15, s25, exec_lo
-; GFX11-NEXT: s_cselect_b32 s15, 1, 0
-; GFX11-NEXT: s_and_b32 s1, s1, exec_lo
-; GFX11-NEXT: s_cselect_b32 s1, s13, s15
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s1, s1, 1
-; GFX11-NEXT: s_and_b32 s13, 0xffff, s9
-; GFX11-NEXT: s_cselect_b32 s13, 1, 0
-; GFX11-NEXT: s_and_b32 s15, s0, exec_lo
-; GFX11-NEXT: s_cselect_b32 s15, 1, 0
-; GFX11-NEXT: s_and_b32 s16, s8, exec_lo
-; GFX11-NEXT: s_cselect_b32 s13, s13, s15
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_bitcmp1_b32 s13, 0
-; GFX11-NEXT: s_cselect_b32 s13, 0x100, 0
-; GFX11-NEXT: s_or_b32 s9, s13, s9
-; GFX11-NEXT: s_cbranch_vccz .LBB2_7
-; GFX11-NEXT: ; %bb.8: ; %Flow
-; GFX11-NEXT: s_mov_b32 s0, 0
-; GFX11-NEXT: .LBB2_9: ; %Flow12
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s0
-; GFX11-NEXT: s_cbranch_vccz .LBB2_13
-; GFX11-NEXT: ; %bb.10:
-; GFX11-NEXT: s_xor_b32 s0, s3, -1
-; GFX11-NEXT: .LBB2_11: ; %bb17
-; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s0
-; GFX11-NEXT: s_cbranch_vccz .LBB2_11
-; GFX11-NEXT: ; %bb.12: ; %Flow6
-; GFX11-NEXT: s_mov_b32 s21, -1
-; GFX11-NEXT: .LBB2_13: ; %Flow11
-; GFX11-NEXT: s_and_b32 s20, s2, exec_lo
-; GFX11-NEXT: s_or_not1_b32 s0, s21, exec_lo
-; GFX11-NEXT: .LBB2_14: ; %Flow9
-; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s24
-; GFX11-NEXT: s_and_saveexec_b32 s21, s0
-; GFX11-NEXT: s_cbranch_execz .LBB2_16
-; GFX11-NEXT: ; %bb.15: ; %bb43
-; GFX11-NEXT: s_add_u32 s8, s18, 0x58
-; GFX11-NEXT: s_addc_u32 s9, s19, 0
-; GFX11-NEXT: s_getpc_b64 s[0:1]
-; GFX11-NEXT: s_add_u32 s0, s0, f0 at gotpcrel32@lo+4
-; GFX11-NEXT: s_addc_u32 s1, s1, f0 at gotpcrel32@hi+12
-; GFX11-NEXT: s_mov_b32 s13, s14
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
-; GFX11-NEXT: s_mov_b32 s14, s17
-; GFX11-NEXT: ; implicit-def: $sgpr15
-; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: s_or_b32 s20, s20, exec_lo
-; GFX11-NEXT: .LBB2_16: ; %Flow14
-; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s21
-; GFX11-NEXT: s_and_saveexec_b32 s0, s20
-; GFX11-NEXT: ; %bb.17: ; %UnifiedUnreachableBlock
-; GFX11-NEXT: ; divergent unreachable
-; GFX11-NEXT: ; %bb.18: ; %UnifiedReturnBlock
-; GFX11-NEXT: s_endpgm
bb:
%i = tail call i32 @llvm.amdgcn.workitem.id.x()
%i12 = mul i32 %arg, %i
diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
index 1526d59749a1f3..2e0ca416a02a6b 100644
--- a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
@@ -816,9 +816,8 @@ define amdgpu_kernel void @v_insertelement_v4bf16_0(ptr addrspace(1) %out, ptr a
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
; GFX1250-REAL16-NEXT: global_load_b64 v[0:1], v2, s[2:3] scale_offset
; GFX1250-REAL16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-REAL16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.l, s4
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250-REAL16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_lshrrev_b32 v3, 16, v0
+; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX1250-REAL16-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset
; GFX1250-REAL16-NEXT: s_endpgm
@@ -1051,10 +1050,10 @@ define amdgpu_kernel void @v_insertelement_v4bf16_2(ptr addrspace(1) %out, ptr a
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
; GFX1250-REAL16-NEXT: global_load_b64 v[0:1], v2, s[2:3] scale_offset
; GFX1250-REAL16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-REAL16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v1.l, s4
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX1250-REAL16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_lshrrev_b32 v1, 16, v1
+; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-REAL16-NEXT: v_mov_b16_e32 v3.h, v1.l
+; GFX1250-REAL16-NEXT: v_mov_b32_e32 v1, v3
; GFX1250-REAL16-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset
; GFX1250-REAL16-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
index 7bccc761fc5bbd..d92675e8392351 100644
--- a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
+++ b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
@@ -1891,7 +1891,7 @@ define amdgpu_kernel void @v_insertelement_v4f16_0(ptr addrspace(1) %out, ptr ad
; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[2:3]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s4
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
; GFX11-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
@@ -2089,11 +2089,12 @@ define amdgpu_kernel void @v_insertelement_v4f16_2(ptr addrspace(1) %out, ptr ad
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[2:3]
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, v3
; GFX11-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -2289,11 +2290,12 @@ define amdgpu_kernel void @v_insertelement_v4i16_2(ptr addrspace(1) %out, ptr ad
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[2:3]
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, v3
; GFX11-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -2711,11 +2713,12 @@ define amdgpu_kernel void @v_insertelement_v8i16_6(ptr addrspace(1) %out, ptr ad
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 4, v0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v4, s[2:3]
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, s4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v5
; GFX11-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3217,11 +3220,12 @@ define amdgpu_kernel void @v_insertelement_v16i16_6(ptr addrspace(1) %out, ptr a
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v8, s[2:3]
; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v8, s[2:3] offset:16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, s4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v9
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
diff --git a/llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll b/llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
index 6c14235874d62f..d320edc35017ea 100644
--- a/llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
+++ b/llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
@@ -178,9 +178,10 @@ define half @s_uitofp_i16_to_f16_abs(i16 inreg %arg0) nounwind {
; GFX11-TRUE16-LABEL: s_uitofp_i16_to_f16_abs:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cvt_f16_u16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
+; GFX11-TRUE16-NEXT: v_cvt_f16_u16_e32 v0.l, v0.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: s_uitofp_i16_to_f16_abs:
@@ -214,9 +215,10 @@ define half @s_uitofp_i16_to_f16_neg(i16 inreg %arg0) nounwind {
; GFX11-TRUE16-LABEL: s_uitofp_i16_to_f16_neg:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0x8000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cvt_f16_u16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x8000, v0
+; GFX11-TRUE16-NEXT: v_cvt_f16_u16_e32 v0.l, v0.l
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: s_uitofp_i16_to_f16_neg:
diff --git a/llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll b/llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
index e99181f425be96..736b58aa04df83 100644
--- a/llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
+++ b/llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
@@ -561,10 +561,12 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_cc_half(half inreg %a, half %b) {
; DAGISEL-GFX11-NEXT: {{ $}}
; DAGISEL-GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr8
; DAGISEL-GFX11-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; DAGISEL-GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
+ ; DAGISEL-GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY2]].lo16
; DAGISEL-GFX11-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; DAGISEL-GFX11-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @use, target-flags(amdgpu-gotprel32-hi) @use, implicit-def dead $scc
; DAGISEL-GFX11-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM killed [[SI_PC_ADD_REL_OFFSET]], 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
- ; DAGISEL-GFX11-NEXT: $vgpr0 = COPY [[COPY1]]
+ ; DAGISEL-GFX11-NEXT: $vgpr0 = COPY [[COPY3]]
; DAGISEL-GFX11-NEXT: $vgpr1 = COPY [[COPY]]
; DAGISEL-GFX11-NEXT: $sgpr30_sgpr31 = SI_CALL killed [[S_LOAD_DWORDX2_IMM]], @use, csr_amdgpu_si_gfx, implicit $vgpr0, implicit $vgpr1
; DAGISEL-GFX11-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
@@ -631,10 +633,12 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_cc_bfloat(bfloat inreg %a, bfloat %
; DAGISEL-GFX11-NEXT: {{ $}}
; DAGISEL-GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr8
; DAGISEL-GFX11-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; DAGISEL-GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
+ ; DAGISEL-GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY2]].lo16
; DAGISEL-GFX11-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; DAGISEL-GFX11-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @use, target-flags(amdgpu-gotprel32-hi) @use, implicit-def dead $scc
; DAGISEL-GFX11-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM killed [[SI_PC_ADD_REL_OFFSET]], 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
- ; DAGISEL-GFX11-NEXT: $vgpr0 = COPY [[COPY1]]
+ ; DAGISEL-GFX11-NEXT: $vgpr0 = COPY [[COPY3]]
; DAGISEL-GFX11-NEXT: $vgpr1 = COPY [[COPY]]
; DAGISEL-GFX11-NEXT: $sgpr30_sgpr31 = SI_CALL killed [[S_LOAD_DWORDX2_IMM]], @use, csr_amdgpu_si_gfx, implicit $vgpr0, implicit $vgpr1
; DAGISEL-GFX11-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
@@ -699,10 +703,12 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_cc_i16(i16 inreg %a, i16 %b) {
; DAGISEL-GFX11-NEXT: {{ $}}
; DAGISEL-GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr8
; DAGISEL-GFX11-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; DAGISEL-GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
+ ; DAGISEL-GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY2]].lo16
; DAGISEL-GFX11-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
; DAGISEL-GFX11-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @use, target-flags(amdgpu-gotprel32-hi) @use, implicit-def dead $scc
; DAGISEL-GFX11-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM killed [[SI_PC_ADD_REL_OFFSET]], 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
- ; DAGISEL-GFX11-NEXT: $vgpr0 = COPY [[COPY1]]
+ ; DAGISEL-GFX11-NEXT: $vgpr0 = COPY [[COPY3]]
; DAGISEL-GFX11-NEXT: $vgpr1 = COPY [[COPY]]
; DAGISEL-GFX11-NEXT: $sgpr30_sgpr31 = SI_CALL killed [[S_LOAD_DWORDX2_IMM]], @use, csr_amdgpu_si_gfx, implicit $vgpr0, implicit $vgpr1
; DAGISEL-GFX11-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
index de05fe56b8428b..361a1e88e5271b 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
@@ -92,9 +92,8 @@ define amdgpu_kernel void @v_alignbyte_b32(ptr addrspace(1) %out, i32 %src1, i32
; GFX11-TRUE16-SDAG-NEXT: s_clause 0x1
; GFX11-TRUE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c
; GFX11-TRUE16-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x24
-; GFX11-TRUE16-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX11-TRUE16-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX11-TRUE16-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-SDAG-NEXT: v_alignbyte_b32 v0, s0, s1, v0.l
; GFX11-TRUE16-SDAG-NEXT: global_store_b32 v1, v0, s[4:5]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
index 3b5000fc4443d5..cd41c21ac88623 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
@@ -303,7 +303,7 @@ define amdgpu_ps half @bitop3_b16_sss(i16 inreg %a, i16 inreg %b, i16 inreg %c)
; GFX1250-SDG-TRUE16-NEXT: s_mov_b64 s[64:65], 0
; GFX1250-SDG-TRUE16-NEXT: v_nop
; GFX1250-SDG-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-SDG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
+; GFX1250-SDG-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX1250-SDG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDG-TRUE16-NEXT: v_bitop3_b16 v0.l, s0, s1, v0.l bitop3:0x12
; GFX1250-SDG-TRUE16-NEXT: ; return to shader part epilog
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
index e284f99fa05b6e..aba6798a0471a7 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
@@ -150,7 +150,7 @@ entry:
define amdgpu_ps void @test_llvm_amdgcn_fdot2_bf16_bf16_sis(
; SDAG-GFX11-TRUE16-LABEL: test_llvm_amdgcn_fdot2_bf16_bf16_sis:
; SDAG-GFX11-TRUE16: ; %bb.0: ; %entry
-; SDAG-GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, s1
+; SDAG-GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s1
; SDAG-GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; SDAG-GFX11-TRUE16-NEXT: v_dot2_bf16_bf16 v2.l, s0, 0x3f803f80, v2.l
; SDAG-GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v2, off
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
index d39846a1744c11..28863072c7fbf9 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
@@ -186,42 +186,84 @@ define amdgpu_ps ptr addrspace(8) @num_records_i16_raw_buffer(ptr inreg %p, i16
; CHECK-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_3]]
; CHECK-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
;
- ; CHECK45-LABEL: name: num_records_i16_raw_buffer
- ; CHECK45: bb.0 (%ir-block.0):
- ; CHECK45-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
- ; CHECK45-NEXT: {{ $}}
- ; CHECK45-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr3
- ; CHECK45-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr2
- ; CHECK45-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1
- ; CHECK45-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr0
- ; CHECK45-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1
- ; CHECK45-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY1]]
- ; CHECK45-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 25
- ; CHECK45-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY4]], killed [[S_MOV_B32_]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; CHECK45-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64 = REG_SEQUENCE killed [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
- ; CHECK45-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[REG_SEQUENCE]], killed [[REG_SEQUENCE1]], implicit-def dead $scc
- ; CHECK45-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_]].sub1
- ; CHECK45-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
- ; CHECK45-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[S_MOV_B32_2]], [[COPY1]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 7
- ; CHECK45-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 killed [[S_AND_B32_]], killed [[S_MOV_B32_3]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 28
- ; CHECK45-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_4]], implicit-def dead $scc
- ; CHECK45-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY5]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY6]], implicit $exec
- ; CHECK45-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[S_LSHL_B32_1]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY7]], implicit $exec
- ; CHECK45-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
- ; CHECK45-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[COPY8]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY9]], implicit $exec
- ; CHECK45-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[S_LSHR_B32_]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY10]], implicit $exec
- ; CHECK45-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_2]]
- ; CHECK45-NEXT: $sgpr1 = COPY [[V_READFIRSTLANE_B32_]]
- ; CHECK45-NEXT: $sgpr2 = COPY [[V_READFIRSTLANE_B32_3]]
- ; CHECK45-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_1]]
- ; CHECK45-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ; FAKE16-LABEL: name: num_records_i16_raw_buffer
+ ; FAKE16: bb.0 (%ir-block.0):
+ ; FAKE16-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ; FAKE16-NEXT: {{ $}}
+ ; FAKE16-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr3
+ ; FAKE16-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr2
+ ; FAKE16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1
+ ; FAKE16-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; FAKE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1
+ ; FAKE16-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY1]]
+ ; FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 25
+ ; FAKE16-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY4]], killed [[S_MOV_B32_]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; FAKE16-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64 = REG_SEQUENCE killed [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[REG_SEQUENCE]], killed [[REG_SEQUENCE1]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_]].sub1
+ ; FAKE16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
+ ; FAKE16-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[S_MOV_B32_2]], [[COPY1]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 7
+ ; FAKE16-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 killed [[S_AND_B32_]], killed [[S_MOV_B32_3]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 28
+ ; FAKE16-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_4]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY5]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY6]], implicit $exec
+ ; FAKE16-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[S_LSHL_B32_1]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY7]], implicit $exec
+ ; FAKE16-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
+ ; FAKE16-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[COPY8]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY9]], implicit $exec
+ ; FAKE16-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[S_LSHR_B32_]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY10]], implicit $exec
+ ; FAKE16-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_2]]
+ ; FAKE16-NEXT: $sgpr1 = COPY [[V_READFIRSTLANE_B32_]]
+ ; FAKE16-NEXT: $sgpr2 = COPY [[V_READFIRSTLANE_B32_3]]
+ ; FAKE16-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_1]]
+ ; FAKE16-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ;
+ ; REAL16-LABEL: name: num_records_i16_raw_buffer
+ ; REAL16: bb.0 (%ir-block.0):
+ ; REAL16-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ; REAL16-NEXT: {{ $}}
+ ; REAL16-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr3
+ ; REAL16-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr2
+ ; REAL16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1
+ ; REAL16-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1
+ ; REAL16-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
+ ; REAL16-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY4]].lo16
+ ; REAL16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[COPY5]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; REAL16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 25
+ ; REAL16-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]]
+ ; REAL16-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY6]], killed [[S_MOV_B32_]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; REAL16-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE killed [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[REG_SEQUENCE]], killed [[REG_SEQUENCE2]], implicit-def dead $scc
+ ; REAL16-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_]].sub1
+ ; REAL16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
+ ; REAL16-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[S_MOV_B32_2]], [[COPY1]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 7
+ ; REAL16-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 killed [[S_AND_B32_]], killed [[S_MOV_B32_3]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 28
+ ; REAL16-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_4]], implicit-def dead $scc
+ ; REAL16-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY8]], implicit $exec
+ ; REAL16-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[S_LSHL_B32_1]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY9]], implicit $exec
+ ; REAL16-NEXT: [[COPY10:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
+ ; REAL16-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[COPY10]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY11]], implicit $exec
+ ; REAL16-NEXT: [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[S_LSHR_B32_]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY12]], implicit $exec
+ ; REAL16-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_2]]
+ ; REAL16-NEXT: $sgpr1 = COPY [[V_READFIRSTLANE_B32_]]
+ ; REAL16-NEXT: $sgpr2 = COPY [[V_READFIRSTLANE_B32_3]]
+ ; REAL16-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_1]]
+ ; REAL16-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
%rsrc = call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p0.i16(ptr %p, i16 0, i16 %numVals, i32 %flags)
ret ptr addrspace(8) %rsrc
}
@@ -487,54 +529,108 @@ define amdgpu_ps ptr addrspace(8) @general_case(ptr inreg %p, i16 inreg %stride,
; CHECK-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_3]]
; CHECK-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
;
- ; CHECK45-LABEL: name: general_case
- ; CHECK45: bb.0 (%ir-block.0):
- ; CHECK45-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5
- ; CHECK45-NEXT: {{ $}}
- ; CHECK45-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr5
- ; CHECK45-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr4
- ; CHECK45-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr3
- ; CHECK45-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr2
- ; CHECK45-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr1
- ; CHECK45-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr0
- ; CHECK45-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
- ; CHECK45-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
- ; CHECK45-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY3]]
- ; CHECK45-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 12
- ; CHECK45-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY6]], killed [[S_MOV_B32_]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; CHECK45-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
- ; CHECK45-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
- ; CHECK45-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[REG_SEQUENCE1]], killed [[S_MOV_B32_2]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 274877906943
- ; CHECK45-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[S_LSHR_B64_]], killed [[S_MOV_B]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_AND_B64_]], killed [[REG_SEQUENCE2]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 28
- ; CHECK45-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_3]], implicit-def dead $scc
- ; CHECK45-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_1]], %subreg.sub1
- ; CHECK45-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_OR_B64_]], killed [[REG_SEQUENCE3]], implicit-def dead $scc
- ; CHECK45-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub1
- ; CHECK45-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]].sub0
- ; CHECK45-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 25
- ; CHECK45-NEXT: [[S_LSHL_B32_2:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY8]], killed [[S_MOV_B32_4]], implicit-def dead $scc
- ; CHECK45-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_2]], %subreg.sub1
- ; CHECK45-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 [[REG_SEQUENCE]], killed [[REG_SEQUENCE4]], implicit-def dead $scc
- ; CHECK45-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub1
- ; CHECK45-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[COPY9]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY10]], implicit $exec
- ; CHECK45-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY11]], implicit $exec
- ; CHECK45-NEXT: [[COPY12:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
- ; CHECK45-NEXT: [[COPY13:%[0-9]+]]:vgpr_32 = COPY [[COPY12]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY13]], implicit $exec
- ; CHECK45-NEXT: [[COPY14:%[0-9]+]]:sreg_32 = COPY [[S_LSHR_B64_]].sub0
- ; CHECK45-NEXT: [[COPY15:%[0-9]+]]:vgpr_32 = COPY [[COPY14]]
- ; CHECK45-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY15]], implicit $exec
- ; CHECK45-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_2]]
- ; CHECK45-NEXT: $sgpr1 = COPY [[V_READFIRSTLANE_B32_]]
- ; CHECK45-NEXT: $sgpr2 = COPY [[V_READFIRSTLANE_B32_3]]
- ; CHECK45-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_1]]
- ; CHECK45-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ; FAKE16-LABEL: name: general_case
+ ; FAKE16: bb.0 (%ir-block.0):
+ ; FAKE16-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5
+ ; FAKE16-NEXT: {{ $}}
+ ; FAKE16-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr5
+ ; FAKE16-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr4
+ ; FAKE16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr3
+ ; FAKE16-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr2
+ ; FAKE16-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr1
+ ; FAKE16-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; FAKE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
+ ; FAKE16-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
+ ; FAKE16-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY3]]
+ ; FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 12
+ ; FAKE16-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY6]], killed [[S_MOV_B32_]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; FAKE16-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
+ ; FAKE16-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[REG_SEQUENCE1]], killed [[S_MOV_B32_2]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 274877906943
+ ; FAKE16-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[S_LSHR_B64_]], killed [[S_MOV_B]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_AND_B64_]], killed [[REG_SEQUENCE2]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 28
+ ; FAKE16-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_3]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_1]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_OR_B64_]], killed [[REG_SEQUENCE3]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub1
+ ; FAKE16-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]].sub0
+ ; FAKE16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 25
+ ; FAKE16-NEXT: [[S_LSHL_B32_2:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY8]], killed [[S_MOV_B32_4]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_2]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 [[REG_SEQUENCE]], killed [[REG_SEQUENCE4]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub1
+ ; FAKE16-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[COPY9]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY10]], implicit $exec
+ ; FAKE16-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[COPY7]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY11]], implicit $exec
+ ; FAKE16-NEXT: [[COPY12:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
+ ; FAKE16-NEXT: [[COPY13:%[0-9]+]]:vgpr_32 = COPY [[COPY12]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY13]], implicit $exec
+ ; FAKE16-NEXT: [[COPY14:%[0-9]+]]:sreg_32 = COPY [[S_LSHR_B64_]].sub0
+ ; FAKE16-NEXT: [[COPY15:%[0-9]+]]:vgpr_32 = COPY [[COPY14]]
+ ; FAKE16-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY15]], implicit $exec
+ ; FAKE16-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_2]]
+ ; FAKE16-NEXT: $sgpr1 = COPY [[V_READFIRSTLANE_B32_]]
+ ; FAKE16-NEXT: $sgpr2 = COPY [[V_READFIRSTLANE_B32_3]]
+ ; FAKE16-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_1]]
+ ; FAKE16-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ;
+ ; REAL16-LABEL: name: general_case
+ ; REAL16: bb.0 (%ir-block.0):
+ ; REAL16-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5
+ ; REAL16-NEXT: {{ $}}
+ ; REAL16-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr5
+ ; REAL16-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr4
+ ; REAL16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr3
+ ; REAL16-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr2
+ ; REAL16-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr1
+ ; REAL16-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
+ ; REAL16-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
+ ; REAL16-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY3]]
+ ; REAL16-NEXT: [[COPY7:%[0-9]+]]:vgpr_16 = COPY [[COPY6]].lo16
+ ; REAL16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 7
+ ; REAL16-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[REG_SEQUENCE1]], killed [[S_MOV_B32_]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 274877906943
+ ; REAL16-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[S_LSHR_B64_]], killed [[S_MOV_B]], implicit-def dead $scc
+ ; REAL16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[COPY7]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; REAL16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 12
+ ; REAL16-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE2]]
+ ; REAL16-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY8]], killed [[S_MOV_B32_1]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; REAL16-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_2]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_AND_B64_]], killed [[REG_SEQUENCE3]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 28
+ ; REAL16-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_3]], implicit-def dead $scc
+ ; REAL16-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_2]], %subreg.sub0, killed [[S_LSHL_B32_1]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_OR_B64_]], killed [[REG_SEQUENCE4]], implicit-def dead $scc
+ ; REAL16-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub1
+ ; REAL16-NEXT: [[COPY10:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]].sub0
+ ; REAL16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 25
+ ; REAL16-NEXT: [[S_LSHL_B32_2:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY10]], killed [[S_MOV_B32_4]], implicit-def dead $scc
+ ; REAL16-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_2]], %subreg.sub0, killed [[S_LSHL_B32_2]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 [[REG_SEQUENCE]], killed [[REG_SEQUENCE5]], implicit-def dead $scc
+ ; REAL16-NEXT: [[COPY11:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub1
+ ; REAL16-NEXT: [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[COPY11]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY12]], implicit $exec
+ ; REAL16-NEXT: [[COPY13:%[0-9]+]]:vgpr_32 = COPY [[COPY9]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY13]], implicit $exec
+ ; REAL16-NEXT: [[COPY14:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
+ ; REAL16-NEXT: [[COPY15:%[0-9]+]]:vgpr_32 = COPY [[COPY14]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY15]], implicit $exec
+ ; REAL16-NEXT: [[COPY16:%[0-9]+]]:sreg_32 = COPY [[S_LSHR_B64_]].sub0
+ ; REAL16-NEXT: [[COPY17:%[0-9]+]]:vgpr_32 = COPY [[COPY16]]
+ ; REAL16-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 killed [[COPY17]], implicit $exec
+ ; REAL16-NEXT: $sgpr0 = COPY [[V_READFIRSTLANE_B32_2]]
+ ; REAL16-NEXT: $sgpr1 = COPY [[V_READFIRSTLANE_B32_]]
+ ; REAL16-NEXT: $sgpr2 = COPY [[V_READFIRSTLANE_B32_3]]
+ ; REAL16-NEXT: $sgpr3 = COPY [[V_READFIRSTLANE_B32_1]]
+ ; REAL16-NEXT: SI_RETURN_TO_EPILOG $sgpr0, $sgpr1, $sgpr2, $sgpr3
%rsrc = call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p0.i64(ptr %p, i16 %stride, i64 %numVals, i32 %flags)
ret ptr addrspace(8) %rsrc
}
@@ -564,46 +660,92 @@ define amdgpu_ps float @general_case_load(ptr inreg %p, i16 inreg %stride, i64 i
; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_IDXEN]]
; CHECK-NEXT: SI_RETURN_TO_EPILOG $vgpr0
;
- ; CHECK45-LABEL: name: general_case_load
- ; CHECK45: bb.0 (%ir-block.0):
- ; CHECK45-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5
- ; CHECK45-NEXT: {{ $}}
- ; CHECK45-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr5
- ; CHECK45-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr4
- ; CHECK45-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr3
- ; CHECK45-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr2
- ; CHECK45-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr1
- ; CHECK45-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr0
- ; CHECK45-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
- ; CHECK45-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
- ; CHECK45-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY3]]
- ; CHECK45-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 12
- ; CHECK45-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY6]], killed [[S_MOV_B32_]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; CHECK45-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
- ; CHECK45-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
- ; CHECK45-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[REG_SEQUENCE1]], killed [[S_MOV_B32_2]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 274877906943
- ; CHECK45-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 killed [[S_LSHR_B64_]], killed [[S_MOV_B]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_AND_B64_]], killed [[REG_SEQUENCE2]], implicit-def dead $scc
- ; CHECK45-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 28
- ; CHECK45-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_3]], implicit-def dead $scc
- ; CHECK45-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_1]], %subreg.sub1
- ; CHECK45-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_OR_B64_]], killed [[REG_SEQUENCE3]], implicit-def dead $scc
- ; CHECK45-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub1
- ; CHECK45-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub0
- ; CHECK45-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]].sub0
- ; CHECK45-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 25
- ; CHECK45-NEXT: [[S_LSHL_B32_2:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY9]], killed [[S_MOV_B32_4]], implicit-def dead $scc
- ; CHECK45-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_2]], %subreg.sub1
- ; CHECK45-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[REG_SEQUENCE]], killed [[REG_SEQUENCE4]], implicit-def dead $scc
- ; CHECK45-NEXT: [[COPY10:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub1
- ; CHECK45-NEXT: [[COPY11:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub0
- ; CHECK45-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY11]], %subreg.sub0, killed [[COPY10]], %subreg.sub1, killed [[COPY8]], %subreg.sub2, killed [[COPY7]], %subreg.sub3
- ; CHECK45-NEXT: [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_1]]
- ; CHECK45-NEXT: [[BUFFER_LOAD_DWORD_VBUFFER_IDXEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_VBUFFER_IDXEN [[COPY12]], killed [[REG_SEQUENCE5]], $sgpr_null, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8)
- ; CHECK45-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_VBUFFER_IDXEN]]
- ; CHECK45-NEXT: SI_RETURN_TO_EPILOG $vgpr0
+ ; FAKE16-LABEL: name: general_case_load
+ ; FAKE16: bb.0 (%ir-block.0):
+ ; FAKE16-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5
+ ; FAKE16-NEXT: {{ $}}
+ ; FAKE16-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr5
+ ; FAKE16-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr4
+ ; FAKE16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr3
+ ; FAKE16-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr2
+ ; FAKE16-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr1
+ ; FAKE16-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; FAKE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
+ ; FAKE16-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
+ ; FAKE16-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY3]]
+ ; FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 12
+ ; FAKE16-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY6]], killed [[S_MOV_B32_]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; FAKE16-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
+ ; FAKE16-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[REG_SEQUENCE1]], killed [[S_MOV_B32_2]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 274877906943
+ ; FAKE16-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 killed [[S_LSHR_B64_]], killed [[S_MOV_B]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_AND_B64_]], killed [[REG_SEQUENCE2]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 28
+ ; FAKE16-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_3]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_1]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_OR_B64_]], killed [[REG_SEQUENCE3]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub1
+ ; FAKE16-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_1]].sub0
+ ; FAKE16-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]].sub0
+ ; FAKE16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 25
+ ; FAKE16-NEXT: [[S_LSHL_B32_2:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY9]], killed [[S_MOV_B32_4]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_2]], %subreg.sub1
+ ; FAKE16-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[REG_SEQUENCE]], killed [[REG_SEQUENCE4]], implicit-def dead $scc
+ ; FAKE16-NEXT: [[COPY10:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub1
+ ; FAKE16-NEXT: [[COPY11:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub0
+ ; FAKE16-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY11]], %subreg.sub0, killed [[COPY10]], %subreg.sub1, killed [[COPY8]], %subreg.sub2, killed [[COPY7]], %subreg.sub3
+ ; FAKE16-NEXT: [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_1]]
+ ; FAKE16-NEXT: [[BUFFER_LOAD_DWORD_VBUFFER_IDXEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_VBUFFER_IDXEN [[COPY12]], killed [[REG_SEQUENCE5]], $sgpr_null, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8)
+ ; FAKE16-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_VBUFFER_IDXEN]]
+ ; FAKE16-NEXT: SI_RETURN_TO_EPILOG $vgpr0
+ ;
+ ; REAL16-LABEL: name: general_case_load
+ ; REAL16: bb.0 (%ir-block.0):
+ ; REAL16-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5
+ ; REAL16-NEXT: {{ $}}
+ ; REAL16-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr5
+ ; REAL16-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr4
+ ; REAL16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr3
+ ; REAL16-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr2
+ ; REAL16-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr1
+ ; REAL16-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr0
+ ; REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
+ ; REAL16-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
+ ; REAL16-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY3]]
+ ; REAL16-NEXT: [[COPY7:%[0-9]+]]:vgpr_16 = COPY [[COPY6]].lo16
+ ; REAL16-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE1]].sub0
+ ; REAL16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 25
+ ; REAL16-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY8]], killed [[S_MOV_B32_]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; REAL16-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[REG_SEQUENCE]], killed [[REG_SEQUENCE2]], implicit-def dead $scc
+ ; REAL16-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_]].sub1
+ ; REAL16-NEXT: [[COPY10:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_]].sub0
+ ; REAL16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 7
+ ; REAL16-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[REG_SEQUENCE1]], killed [[S_MOV_B32_2]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 274877906943
+ ; REAL16-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 killed [[S_LSHR_B64_]], killed [[S_MOV_B]], implicit-def dead $scc
+ ; REAL16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[REG_SEQUENCE3:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[COPY7]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; REAL16-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 12
+ ; REAL16-NEXT: [[COPY11:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE3]]
+ ; REAL16-NEXT: [[S_LSHL_B32_1:%[0-9]+]]:sreg_32 = S_LSHL_B32 killed [[COPY11]], killed [[S_MOV_B32_3]], implicit-def dead $scc
+ ; REAL16-NEXT: [[REG_SEQUENCE4:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_1]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_1:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_AND_B64_]], killed [[REG_SEQUENCE4]], implicit-def dead $scc
+ ; REAL16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 28
+ ; REAL16-NEXT: [[S_LSHL_B32_2:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY]], killed [[S_MOV_B32_4]], implicit-def dead $scc
+ ; REAL16-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_1]], %subreg.sub0, killed [[S_LSHL_B32_2]], %subreg.sub1
+ ; REAL16-NEXT: [[S_OR_B64_2:%[0-9]+]]:sreg_64 = S_OR_B64 killed [[S_OR_B64_1]], killed [[REG_SEQUENCE5]], implicit-def dead $scc
+ ; REAL16-NEXT: [[COPY12:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub1
+ ; REAL16-NEXT: [[COPY13:%[0-9]+]]:sreg_32 = COPY [[S_OR_B64_2]].sub0
+ ; REAL16-NEXT: [[REG_SEQUENCE6:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY10]], %subreg.sub0, killed [[COPY9]], %subreg.sub1, killed [[COPY13]], %subreg.sub2, killed [[COPY12]], %subreg.sub3
+ ; REAL16-NEXT: [[COPY14:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_1]]
+ ; REAL16-NEXT: [[BUFFER_LOAD_DWORD_VBUFFER_IDXEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_VBUFFER_IDXEN [[COPY14]], killed [[REG_SEQUENCE6]], $sgpr_null, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8)
+ ; REAL16-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_VBUFFER_IDXEN]]
+ ; REAL16-NEXT: SI_RETURN_TO_EPILOG $vgpr0
%rsrc = call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p8.p0.i64(ptr %p, i16 %stride, i64 %numVals, i32 %flags)
%value = call float @llvm.amdgcn.struct.ptr.buffer.load(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0, i32 0)
ret float %value
@@ -728,8 +870,8 @@ define amdgpu_ps float @general_case_load_with_waterfall(ptr %p, i16 %stride, i6
; REAL16-NEXT: [[V_LSHLREV_B32_e64_1:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e64 killed [[S_MOV_B32_3]], [[COPY]], implicit $exec
; REAL16-NEXT: [[REG_SEQUENCE5:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, killed [[V_LSHLREV_B32_e64_1]], %subreg.sub1
; REAL16-NEXT: [[COPY15:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE5]].sub1
- ; REAL16-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
- ; REAL16-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; REAL16-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
; REAL16-NEXT: [[REG_SEQUENCE6:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[COPY3]], %subreg.lo16, killed [[DEF]], %subreg.hi16
; REAL16-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 12
; REAL16-NEXT: [[V_LSHLREV_B32_e64_2:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e64 killed [[S_MOV_B32_4]], killed [[REG_SEQUENCE6]], implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
index 0756e2142c2479..dbc8ded781d17f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
@@ -3,8 +3,8 @@
; RUN: llc < %s -mtriple=amdgpu8.10 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu9.00 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck -enable-var-scope -check-prefixes=GFX10-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-REAL16 %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-FAKE16 %s
define amdgpu_ps half @tbuffer_load_d16_x(ptr addrspace(8) inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_x:
@@ -91,12 +91,19 @@ define amdgpu_ps half @tbuffer_load_d16_xyz(ptr addrspace(8) inreg %rsrc) {
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, v1
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
-; GFX11-PACKED-LABEL: tbuffer_load_d16_xyz:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
-; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, v1
-; GFX11-PACKED-NEXT: ; return to shader part epilog
+; GFX11-PACKED-REAL16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-REAL16: ; %bb.0: ; %main_body
+; GFX11-PACKED-REAL16-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
+; GFX11-PACKED-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-PACKED-REAL16-NEXT: ; return to shader part epilog
+;
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, v1
+; GFX11-PACKED-FAKE16-NEXT: ; return to shader part epilog
main_body:
%data = call <3 x half> @llvm.amdgcn.raw.ptr.tbuffer.load.v3f16(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <3 x half> %data, i32 2
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
index c2b6224efd3b72..c5e03d220e892c 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
@@ -35,15 +35,25 @@ define amdgpu_kernel void @tbuffer_store_d16_x(ptr addrspace(8) %rsrc, half %dat
; GFX10-PACKED-NEXT: tbuffer_store_format_d16_x v0, off, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED]
; GFX10-PACKED-NEXT: s_endpgm
;
-; GFX11-PACKED-LABEL: tbuffer_store_d16_x:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: s_clause 0x1
-; GFX11-PACKED-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s6
-; GFX11-PACKED-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM]
-; GFX11-PACKED-NEXT: s_endpgm
+; GFX11-PACKED-TRUE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-TRUE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-TRUE16-NEXT: s_clause 0x1
+; GFX11-PACKED-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX11-PACKED-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-PACKED-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-TRUE16-NEXT: v_mov_b16_e32 v0.l, s6
+; GFX11-PACKED-TRUE16-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX11-PACKED-TRUE16-NEXT: s_endpgm
+;
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: s_clause 0x1
+; GFX11-PACKED-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX11-PACKED-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX11-PACKED-FAKE16-NEXT: s_endpgm
main_body:
call void @llvm.amdgcn.raw.ptr.tbuffer.store.f16(half %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 33, i32 0)
ret void
@@ -325,6 +335,3 @@ declare void @llvm.amdgcn.raw.ptr.tbuffer.store.v3i16(<3 x i16>, ptr addrspace(8
declare void @llvm.amdgcn.raw.ptr.tbuffer.store.bf16(bfloat, ptr addrspace(8), i32, i32, i32, i32)
declare void @llvm.amdgcn.raw.ptr.tbuffer.store.v2bf16(<2 x bfloat>, ptr addrspace(8), i32, i32, i32, i32)
declare void @llvm.amdgcn.raw.ptr.tbuffer.store.v4bf16(<4 x bfloat>, ptr addrspace(8), i32, i32, i32, i32)
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX11-PACKED-FAKE16: {{.*}}
-; GFX11-PACKED-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
index 35c08c9db079ae..43994e4956ff08 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
@@ -3,10 +3,10 @@
; RUN: llc < %s -mtriple=amdgpu8.10 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu9.00 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck -enable-var-scope -check-prefixes=GFX10-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-REAL16 %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-FAKE16 %s
+; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED,GFX12-PACKED-REAL16 %s
+; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED,GFX12-PACKED-FAKE16 %s
define amdgpu_ps half @tbuffer_load_d16_x(<4 x i32> inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_x:
@@ -106,19 +106,33 @@ define amdgpu_ps half @tbuffer_load_d16_xyz(<4 x i32> inreg %rsrc) {
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, v1
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
-; GFX11-PACKED-LABEL: tbuffer_load_d16_xyz:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
-; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, v1
-; GFX11-PACKED-NEXT: ; return to shader part epilog
-;
-; GFX12-PACKED-LABEL: tbuffer_load_d16_xyz:
-; GFX12-PACKED: ; %bb.0: ; %main_body
-; GFX12-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], null format:[BUF_FMT_32_FLOAT]
-; GFX12-PACKED-NEXT: s_wait_loadcnt 0x0
-; GFX12-PACKED-NEXT: v_mov_b32_e32 v0, v1
-; GFX12-PACKED-NEXT: ; return to shader part epilog
+; GFX11-PACKED-REAL16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-REAL16: ; %bb.0: ; %main_body
+; GFX11-PACKED-REAL16-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
+; GFX11-PACKED-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-PACKED-REAL16-NEXT: ; return to shader part epilog
+;
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], 0 format:[BUF_FMT_32_FLOAT]
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, v1
+; GFX11-PACKED-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-PACKED-REAL16-LABEL: tbuffer_load_d16_xyz:
+; GFX12-PACKED-REAL16: ; %bb.0: ; %main_body
+; GFX12-PACKED-REAL16-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], null format:[BUF_FMT_32_FLOAT]
+; GFX12-PACKED-REAL16-NEXT: s_wait_loadcnt 0x0
+; GFX12-PACKED-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX12-PACKED-REAL16-NEXT: ; return to shader part epilog
+;
+; GFX12-PACKED-FAKE16-LABEL: tbuffer_load_d16_xyz:
+; GFX12-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX12-PACKED-FAKE16-NEXT: tbuffer_load_d16_format_xyz v[0:1], off, s[0:3], null format:[BUF_FMT_32_FLOAT]
+; GFX12-PACKED-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, v1
+; GFX12-PACKED-FAKE16-NEXT: ; return to shader part epilog
main_body:
%data = call <3 x half> @llvm.amdgcn.raw.tbuffer.load.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <3 x half> %data, i32 2
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
index c1a92f89d57f12..7e19765b3b2765 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
@@ -39,25 +39,55 @@ define amdgpu_kernel void @tbuffer_store_d16_x(<4 x i32> %rsrc, half %data) {
; GFX10-PACKED-NEXT: tbuffer_store_format_d16_x v0, off, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED]
; GFX10-PACKED-NEXT: s_endpgm
;
-; GFX11-PACKED-LABEL: tbuffer_store_d16_x:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: s_clause 0x1
-; GFX11-PACKED-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s6
-; GFX11-PACKED-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM]
-; GFX11-PACKED-NEXT: s_endpgm
+; GFX11-PACKED-TRUE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-TRUE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-TRUE16-NEXT: s_clause 0x1
+; GFX11-PACKED-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX11-PACKED-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-PACKED-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-TRUE16-NEXT: v_mov_b16_e32 v0.l, s6
+; GFX11-PACKED-TRUE16-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX11-PACKED-TRUE16-NEXT: s_endpgm
;
-; GFX12-PACKED-LABEL: tbuffer_store_d16_x:
-; GFX12-PACKED: ; %bb.0: ; %main_body
-; GFX12-PACKED-NEXT: s_clause 0x1
-; GFX12-PACKED-NEXT: s_load_b32 s6, s[4:5], 0x34
-; GFX12-PACKED-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX12-PACKED-NEXT: s_wait_kmcnt 0x0
-; GFX12-PACKED-NEXT: v_mov_b32_e32 v0, s6
-; GFX12-PACKED-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM]
-; GFX12-PACKED-NEXT: s_endpgm
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: s_clause 0x1
+; GFX11-PACKED-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX11-PACKED-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX11-PACKED-FAKE16-NEXT: s_endpgm
+;
+; GFX12-PACKED-SDAG-TRUE16-LABEL: tbuffer_store_d16_x:
+; GFX12-PACKED-SDAG-TRUE16: ; %bb.0: ; %main_body
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_clause 0x1
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-PACKED-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s6
+; GFX12-PACKED-SDAG-TRUE16-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX12-PACKED-SDAG-FAKE16-LABEL: tbuffer_store_d16_x:
+; GFX12-PACKED-SDAG-FAKE16: ; %bb.0: ; %main_body
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_clause 0x1
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-PACKED-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX12-PACKED-SDAG-FAKE16-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX12-PACKED-GISEL-LABEL: tbuffer_store_d16_x:
+; GFX12-PACKED-GISEL: ; %bb.0: ; %main_body
+; GFX12-PACKED-GISEL-NEXT: s_clause 0x1
+; GFX12-PACKED-GISEL-NEXT: s_load_b32 s6, s[4:5], 0x34
+; GFX12-PACKED-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-PACKED-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-PACKED-GISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX12-PACKED-GISEL-NEXT: tbuffer_store_d16_format_x v0, off, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM]
+; GFX12-PACKED-GISEL-NEXT: s_endpgm
main_body:
call void @llvm.amdgcn.raw.tbuffer.store.f16(half %data, <4 x i32> %rsrc, i32 0, i32 0, i32 33, i32 0)
ret void
@@ -266,9 +296,5 @@ declare void @llvm.amdgcn.raw.tbuffer.store.v2f16(<2 x half>, <4 x i32>, i32, i3
declare void @llvm.amdgcn.raw.tbuffer.store.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i32)
declare void @llvm.amdgcn.raw.tbuffer.store.v4f16(<4 x half>, <4 x i32>, i32, i32, i32, i32)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX11-PACKED-FAKE16: {{.*}}
-; GFX11-PACKED-TRUE16: {{.*}}
; GFX12-PACKED-GISEL-FAKE16: {{.*}}
; GFX12-PACKED-GISEL-TRUE16: {{.*}}
-; GFX12-PACKED-SDAG-FAKE16: {{.*}}
-; GFX12-PACKED-SDAG-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
index 1f950e2ea82941..e1fed429058483 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
@@ -369,21 +369,21 @@ define amdgpu_kernel void @uniform_value_half(ptr addrspace(1) %out, half %in) {
; GFX12DAGISEL: ; %bb.0: ; %entry
; GFX12DAGISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12DAGISEL-NEXT: s_mov_b32 s3, exec_lo
-; GFX12DAGISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX12DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
; GFX12DAGISEL-NEXT: s_cvt_f32_f16 s2, s2
; GFX12DAGISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_2)
; GFX12DAGISEL-NEXT: v_mul_f32_e32 v0, s2, v0
-; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_2)
+; GFX12DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_2)
; GFX12DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
+; GFX12DAGISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX12DAGISEL-NEXT: s_cvt_f16_f32 s2, s2
; GFX12DAGISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12DAGISEL-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX12DAGISEL-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX12DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX12DAGISEL-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX12DAGISEL-NEXT: s_endpgm
entry:
%result = call half @llvm.amdgcn.wave.reduce.fadd(half %in, i32 1)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
index 78e0dd4908f3fb..b8bd9d9ffe7831 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
@@ -314,13 +314,12 @@ define amdgpu_kernel void @uniform_value_half(ptr addrspace(1) %out, half %in) {
; GFX12DAGISEL-LABEL: uniform_value_half:
; GFX12DAGISEL: ; %bb.0: ; %entry
; GFX12DAGISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
-; GFX12DAGISEL-NEXT: v_mov_b32_e32 v1, 0
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
; GFX12DAGISEL-NEXT: s_cvt_f32_f16 s2, s2
; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
; GFX12DAGISEL-NEXT: s_cvt_f16_f32 s2, s2
-; GFX12DAGISEL-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX12DAGISEL-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX12DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX12DAGISEL-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX12DAGISEL-NEXT: s_endpgm
entry:
%result = call half @llvm.amdgcn.wave.reduce.fmax(half %in, i32 1)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
index e45588dac7ff89..d72eb6dde10198 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
@@ -314,13 +314,12 @@ define amdgpu_kernel void @uniform_value_half(ptr addrspace(1) %out, half %in) {
; GFX12DAGISEL-LABEL: uniform_value_half:
; GFX12DAGISEL: ; %bb.0: ; %entry
; GFX12DAGISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
-; GFX12DAGISEL-NEXT: v_mov_b32_e32 v1, 0
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
; GFX12DAGISEL-NEXT: s_cvt_f32_f16 s2, s2
; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
; GFX12DAGISEL-NEXT: s_cvt_f16_f32 s2, s2
-; GFX12DAGISEL-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX12DAGISEL-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX12DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX12DAGISEL-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX12DAGISEL-NEXT: s_endpgm
entry:
%result = call half @llvm.amdgcn.wave.reduce.fmin(half %in, i32 1)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
index ede0a21ed57fd1..b5675133ea71e9 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
@@ -371,9 +371,8 @@ define amdgpu_kernel void @uniform_value_half(ptr addrspace(1) %out, half %in) {
; GFX12DAGISEL: ; %bb.0: ; %entry
; GFX12DAGISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12DAGISEL-NEXT: s_mov_b32 s3, exec_lo
-; GFX12DAGISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX12DAGISEL-NEXT: s_bcnt1_i32_b32 s3, s3
-; GFX12DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12DAGISEL-NEXT: v_cvt_f32_i32_e32 v0, s3
; GFX12DAGISEL-NEXT: s_wait_kmcnt 0x0
; GFX12DAGISEL-NEXT: s_cvt_f32_f16 s2, s2
@@ -384,8 +383,8 @@ define amdgpu_kernel void @uniform_value_half(ptr addrspace(1) %out, half %in) {
; GFX12DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12DAGISEL-NEXT: s_cvt_f16_f32 s2, s2
; GFX12DAGISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12DAGISEL-NEXT: v_mov_b16_e32 v0.l, s2
-; GFX12DAGISEL-NEXT: global_store_b16 v1, v0, s[0:1]
+; GFX12DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
+; GFX12DAGISEL-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX12DAGISEL-NEXT: s_endpgm
entry:
%result = call half @llvm.amdgcn.wave.reduce.fsub(half %in, i32 1)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
index f5e81c51963ba7..332b6ff3693b1b 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
@@ -3,8 +3,8 @@
; RUN: llc < %s -mtriple=amdgpu8.10 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu9.00 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck -enable-var-scope -check-prefixes=GFX10-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-REAL16 %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-FAKE16 %s
define amdgpu_ps half @tbuffer_load_d16_x(ptr addrspace(8) inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_x:
@@ -102,13 +102,21 @@ define amdgpu_ps half @tbuffer_load_d16_xyz(ptr addrspace(8) inreg %rsrc) {
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, v1
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
-; GFX11-PACKED-LABEL: tbuffer_load_d16_xyz:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
-; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, v1
-; GFX11-PACKED-NEXT: ; return to shader part epilog
+; GFX11-PACKED-REAL16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-REAL16: ; %bb.0: ; %main_body
+; GFX11-PACKED-REAL16-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-PACKED-REAL16-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
+; GFX11-PACKED-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-PACKED-REAL16-NEXT: ; return to shader part epilog
+;
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, v1
+; GFX11-PACKED-FAKE16-NEXT: ; return to shader part epilog
main_body:
%data = call <3 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v3f16(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <3 x half> %data, i32 2
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
index 7a9cc7ccb0c9a3..ede921a072ad86 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
@@ -38,16 +38,27 @@ define amdgpu_kernel void @tbuffer_store_d16_x(ptr addrspace(8) %rsrc, half %dat
; GFX10-PACKED-NEXT: tbuffer_store_format_d16_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen
; GFX10-PACKED-NEXT: s_endpgm
;
-; GFX11-PACKED-LABEL: tbuffer_store_d16_x:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: s_clause 0x1
-; GFX11-PACKED-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
-; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s6
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v1, s7
-; GFX11-PACKED-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
-; GFX11-PACKED-NEXT: s_endpgm
+; GFX11-PACKED-TRUE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-TRUE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-TRUE16-NEXT: s_clause 0x1
+; GFX11-PACKED-TRUE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX11-PACKED-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-PACKED-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-TRUE16-NEXT: v_mov_b16_e32 v0.l, s6
+; GFX11-PACKED-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX11-PACKED-TRUE16-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX11-PACKED-TRUE16-NEXT: s_endpgm
+;
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: s_clause 0x1
+; GFX11-PACKED-FAKE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX11-PACKED-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX11-PACKED-FAKE16-NEXT: s_endpgm
main_body:
call void @llvm.amdgcn.struct.ptr.tbuffer.store.f16(half %data, ptr addrspace(8) %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)
ret void
@@ -231,6 +242,3 @@ declare void @llvm.amdgcn.struct.ptr.tbuffer.store.f16(half, ptr addrspace(8), i
declare void @llvm.amdgcn.struct.ptr.tbuffer.store.v2f16(<2 x half>, ptr addrspace(8), i32, i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.ptr.tbuffer.store.v3f16(<3 x half>, ptr addrspace(8), i32, i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.ptr.tbuffer.store.v4f16(<4 x half>, ptr addrspace(8), i32, i32, i32, i32, i32)
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX11-PACKED-FAKE16: {{.*}}
-; GFX11-PACKED-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
index fc7047194bcc8e..7c668f3ce9823f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
@@ -3,10 +3,10 @@
; RUN: llc < %s -mtriple=amdgpu8.10 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu9.00 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck -enable-var-scope -check-prefixes=GFX10-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED %s
-; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-REAL16 %s
+; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED,GFX11-PACKED-FAKE16 %s
+; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED,GFX12-PACKED-REAL16 %s
+; RUN: llc < %s -mtriple=amdgpu12.00 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX12-PACKED,GFX12-PACKED-FAKE16 %s
define amdgpu_ps half @tbuffer_load_d16_x(<4 x i32> inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_x:
@@ -119,21 +119,37 @@ define amdgpu_ps half @tbuffer_load_d16_xyz(<4 x i32> inreg %rsrc) {
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, v1
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
-; GFX11-PACKED-LABEL: tbuffer_load_d16_xyz:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
-; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, v1
-; GFX11-PACKED-NEXT: ; return to shader part epilog
-;
-; GFX12-PACKED-LABEL: tbuffer_load_d16_xyz:
-; GFX12-PACKED: ; %bb.0: ; %main_body
-; GFX12-PACKED-NEXT: v_mov_b32_e32 v0, 0
-; GFX12-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], null format:[BUF_FMT_32_FLOAT] idxen
-; GFX12-PACKED-NEXT: s_wait_loadcnt 0x0
-; GFX12-PACKED-NEXT: v_mov_b32_e32 v0, v1
-; GFX12-PACKED-NEXT: ; return to shader part epilog
+; GFX11-PACKED-REAL16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-REAL16: ; %bb.0: ; %main_body
+; GFX11-PACKED-REAL16-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-PACKED-REAL16-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
+; GFX11-PACKED-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-PACKED-REAL16-NEXT: ; return to shader part epilog
+;
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_load_d16_xyz:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, v1
+; GFX11-PACKED-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-PACKED-REAL16-LABEL: tbuffer_load_d16_xyz:
+; GFX12-PACKED-REAL16: ; %bb.0: ; %main_body
+; GFX12-PACKED-REAL16-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-PACKED-REAL16-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], null format:[BUF_FMT_32_FLOAT] idxen
+; GFX12-PACKED-REAL16-NEXT: s_wait_loadcnt 0x0
+; GFX12-PACKED-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX12-PACKED-REAL16-NEXT: ; return to shader part epilog
+;
+; GFX12-PACKED-FAKE16-LABEL: tbuffer_load_d16_xyz:
+; GFX12-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX12-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-PACKED-FAKE16-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], null format:[BUF_FMT_32_FLOAT] idxen
+; GFX12-PACKED-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, v1
+; GFX12-PACKED-FAKE16-NEXT: ; return to shader part epilog
main_body:
%data = call <3 x half> @llvm.amdgcn.struct.tbuffer.load.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <3 x half> %data, i32 2
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
index 94668c0c126d9c..f9c7eb748a4c86 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
@@ -42,27 +42,60 @@ define amdgpu_kernel void @tbuffer_store_d16_x(<4 x i32> %rsrc, half %data, i32
; GFX10-PACKED-NEXT: tbuffer_store_format_d16_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen
; GFX10-PACKED-NEXT: s_endpgm
;
-; GFX11-PACKED-LABEL: tbuffer_store_d16_x:
-; GFX11-PACKED: ; %bb.0: ; %main_body
-; GFX11-PACKED-NEXT: s_clause 0x1
-; GFX11-PACKED-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
-; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s6
-; GFX11-PACKED-NEXT: v_mov_b32_e32 v1, s7
-; GFX11-PACKED-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
-; GFX11-PACKED-NEXT: s_endpgm
+; GFX11-PACKED-TRUE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-TRUE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-TRUE16-NEXT: s_clause 0x1
+; GFX11-PACKED-TRUE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX11-PACKED-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-PACKED-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-TRUE16-NEXT: v_mov_b16_e32 v0.l, s6
+; GFX11-PACKED-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX11-PACKED-TRUE16-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX11-PACKED-TRUE16-NEXT: s_endpgm
;
-; GFX12-PACKED-LABEL: tbuffer_store_d16_x:
-; GFX12-PACKED: ; %bb.0: ; %main_body
-; GFX12-PACKED-NEXT: s_clause 0x1
-; GFX12-PACKED-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
-; GFX12-PACKED-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-PACKED-NEXT: s_wait_kmcnt 0x0
-; GFX12-PACKED-NEXT: v_mov_b32_e32 v0, s6
-; GFX12-PACKED-NEXT: v_mov_b32_e32 v1, s7
-; GFX12-PACKED-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM] idxen
-; GFX12-PACKED-NEXT: s_endpgm
+; GFX11-PACKED-FAKE16-LABEL: tbuffer_store_d16_x:
+; GFX11-PACKED-FAKE16: ; %bb.0: ; %main_body
+; GFX11-PACKED-FAKE16-NEXT: s_clause 0x1
+; GFX11-PACKED-FAKE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX11-PACKED-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-PACKED-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX11-PACKED-FAKE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX11-PACKED-FAKE16-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX11-PACKED-FAKE16-NEXT: s_endpgm
+;
+; GFX12-PACKED-SDAG-TRUE16-LABEL: tbuffer_store_d16_x:
+; GFX12-PACKED-SDAG-TRUE16: ; %bb.0: ; %main_body
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_clause 0x1
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-PACKED-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s6
+; GFX12-PACKED-SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX12-PACKED-SDAG-TRUE16-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX12-PACKED-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX12-PACKED-SDAG-FAKE16-LABEL: tbuffer_store_d16_x:
+; GFX12-PACKED-SDAG-FAKE16: ; %bb.0: ; %main_body
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_clause 0x1
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-PACKED-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s6
+; GFX12-PACKED-SDAG-FAKE16-NEXT: v_mov_b32_e32 v1, s7
+; GFX12-PACKED-SDAG-FAKE16-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX12-PACKED-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX12-PACKED-GISEL-LABEL: tbuffer_store_d16_x:
+; GFX12-PACKED-GISEL: ; %bb.0: ; %main_body
+; GFX12-PACKED-GISEL-NEXT: s_clause 0x1
+; GFX12-PACKED-GISEL-NEXT: s_load_b64 s[6:7], s[4:5], 0x10
+; GFX12-PACKED-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-PACKED-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-PACKED-GISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX12-PACKED-GISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX12-PACKED-GISEL-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM] idxen
+; GFX12-PACKED-GISEL-NEXT: s_endpgm
main_body:
call void @llvm.amdgcn.struct.tbuffer.store.f16(half %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)
ret void
@@ -295,9 +328,5 @@ declare void @llvm.amdgcn.struct.tbuffer.store.v2f16(<2 x half>, <4 x i32>, i32,
declare void @llvm.amdgcn.struct.tbuffer.store.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.tbuffer.store.v4f16(<4 x half>, <4 x i32>, i32, i32, i32, i32, i32)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX11-PACKED-FAKE16: {{.*}}
-; GFX11-PACKED-TRUE16: {{.*}}
; GFX12-PACKED-GISEL-FAKE16: {{.*}}
; GFX12-PACKED-GISEL-TRUE16: {{.*}}
-; GFX12-PACKED-SDAG-FAKE16: {{.*}}
-; GFX12-PACKED-SDAG-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
index 448f56fbbd5892..4e11038f372bc7 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
@@ -151,10 +151,10 @@ define bfloat @v_exp2_fabs_bf16(bfloat %in) {
; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v1
; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2
; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1
@@ -290,10 +290,10 @@ define bfloat @v_exp2_fneg_fabs_bf16(bfloat %in) {
; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v1
; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2
; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1
@@ -430,10 +430,10 @@ define bfloat @v_exp2_fneg_bf16(bfloat %in) {
; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v1
; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2
; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1
@@ -922,37 +922,37 @@ define <2 x bfloat> @v_exp2_fabs_v2bf16(<2 x bfloat> %in) {
; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1200-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1200-SDAG-TRUE16-NEXT: v_and_b16 v1.l, 0x7fff, v1.l
-; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, s0
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v1, v1, v2 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, s0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v0, v0, v3 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v2
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3
+; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2
-; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3
-; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
@@ -1173,37 +1173,37 @@ define <2 x bfloat> @v_exp2_fneg_fabs_v2bf16(<2 x bfloat> %in) {
; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1200-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: v_or_b16 v0.l, 0x8000, v0.l
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1200-SDAG-TRUE16-NEXT: v_or_b16 v1.l, 0x8000, v1.l
-; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, s0
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v1, v1, v2 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, s0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v0, v0, v3 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v2
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3
+; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2
-; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3
-; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
@@ -1424,37 +1424,37 @@ define <2 x bfloat> @v_exp2_fneg_v2bf16(<2 x bfloat> %in) {
; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1200-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.l
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1200-SDAG-TRUE16-NEXT: v_xor_b16 v1.l, 0x8000, v1.l
-; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, s0
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0
; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v1, v1, v2 :: v_dual_lshlrev_b32 v0, 16, v0
-; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, s0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v0, v0, v3 :: v_dual_lshlrev_b32 v1, 16, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, vcc_lo
-; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v4
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v2
+; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3
+; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2
-; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3
-; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
-; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
-; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll b/llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
index 2ab76c99095f82..780fc3a409b9a0 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
@@ -112,7 +112,7 @@ define amdgpu_gs half @v_fptrunc_round_f32_to_f16_towardzero(float %a) {
;
; GFX11-SDAG-LABEL: v_fptrunc_round_f32_to_f16_towardzero:
; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, v0, s0
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
; GFX11-SDAG-NEXT: ; return to shader part epilog
;
; GFX11-GISEL-LABEL: v_fptrunc_round_f32_to_f16_towardzero:
@@ -125,15 +125,10 @@ define amdgpu_gs half @v_fptrunc_round_f32_to_f16_towardzero(float %a) {
; GISEL-NEXT: v_cvt_pkrtz_f16_f32_e32 v0, v0, v0
; GISEL-NEXT: ; return to shader part epilog
;
-; GFX12-SDAG-LABEL: v_fptrunc_round_f32_to_f16_towardzero:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, v0, s0
-; GFX12-SDAG-NEXT: ; return to shader part epilog
-;
-; GFX12-GISEL-LABEL: v_fptrunc_round_f32_to_f16_towardzero:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: ; return to shader part epilog
+; GFX12-LABEL: v_fptrunc_round_f32_to_f16_towardzero:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
+; GFX12-NEXT: ; return to shader part epilog
%res = call half @llvm.fptrunc.round.f16.f32(float %a, metadata !"round.towardzero")
ret half %res
}
@@ -180,7 +175,7 @@ define amdgpu_gs <2 x half> @v_fptrunc_round_poison_to_v2f16_towardzero(float %a
;
; GFX11-SDAG-LABEL: v_fptrunc_round_poison_to_v2f16_towardzero:
; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, v0, s0
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
; GFX11-SDAG-NEXT: ; return to shader part epilog
;
; GFX11-GISEL-LABEL: v_fptrunc_round_poison_to_v2f16_towardzero:
@@ -195,15 +190,10 @@ define amdgpu_gs <2 x half> @v_fptrunc_round_poison_to_v2f16_towardzero(float %a
; GISEL-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GISEL-NEXT: ; return to shader part epilog
;
-; GFX12-SDAG-LABEL: v_fptrunc_round_poison_to_v2f16_towardzero:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, v0, s0
-; GFX12-SDAG-NEXT: ; return to shader part epilog
-;
-; GFX12-GISEL-LABEL: v_fptrunc_round_poison_to_v2f16_towardzero:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: ; return to shader part epilog
+; GFX12-LABEL: v_fptrunc_round_poison_to_v2f16_towardzero:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
+; GFX12-NEXT: ; return to shader part epilog
%lo = call half @llvm.fptrunc.round.f16.f32(float %a, metadata !"round.towardzero")
%tmp = insertelement <2 x half> poison, half %lo, i32 0
ret <2 x half> %tmp
@@ -219,7 +209,7 @@ define amdgpu_gs <2 x half> @v_fptrunc_round_constant_to_v2f16_towardzero(float
;
; GFX11-SDAG-LABEL: v_fptrunc_round_constant_to_v2f16_towardzero:
; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, v0, s0
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.h, 0x3c00
; GFX11-SDAG-NEXT: ; return to shader part epilog
;
@@ -235,17 +225,11 @@ define amdgpu_gs <2 x half> @v_fptrunc_round_constant_to_v2f16_towardzero(float
; GISEL-NEXT: v_pack_b32_f16 v0, v0, 1.0
; GISEL-NEXT: ; return to shader part epilog
;
-; GFX12-SDAG-LABEL: v_fptrunc_round_constant_to_v2f16_towardzero:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, v0, s0
-; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.h, 0x3c00
-; GFX12-SDAG-NEXT: ; return to shader part epilog
-;
-; GFX12-GISEL-LABEL: v_fptrunc_round_constant_to_v2f16_towardzero:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_mov_b16_e32 v0.h, 0x3c00
-; GFX12-GISEL-NEXT: ; return to shader part epilog
+; GFX12-LABEL: v_fptrunc_round_constant_to_v2f16_towardzero:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, v0, v0
+; GFX12-NEXT: v_mov_b16_e32 v0.h, 0x3c00
+; GFX12-NEXT: ; return to shader part epilog
%lo = call half @llvm.fptrunc.round.f16.f32(float %a, metadata !"round.towardzero")
%tmp = insertelement <2 x half> poison, half %lo, i32 0
%res = insertelement <2 x half> %tmp, half 1.0, i32 1
@@ -421,8 +405,8 @@ define amdgpu_gs void @v_fptrunc_round_f32_to_f16_towardzero_multiple_calls(floa
;
; GFX11-SDAG-LABEL: v_fptrunc_round_f32_to_f16_towardzero_multiple_calls:
; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v4, v0, s0
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v5, v1, s0
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v4, v0, v0
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v5, v1, v0
; GFX11-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 2, 1), 1
; GFX11-SDAG-NEXT: v_cvt_f16_f32_e64 v0.l, v1
; GFX11-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 2, 2), 0
@@ -457,31 +441,18 @@ define amdgpu_gs void @v_fptrunc_round_f32_to_f16_towardzero_multiple_calls(floa
; GISEL-NEXT: global_store_short v[2:3], v0, off
; GISEL-NEXT: s_endpgm
;
-; GFX12-SDAG-LABEL: v_fptrunc_round_f32_to_f16_towardzero_multiple_calls:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v4, v0, s0
-; GFX12-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v5, v1, s0
-; GFX12-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 1), 1
-; GFX12-SDAG-NEXT: v_cvt_f16_f32_e64 v0.l, v1
-; GFX12-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_add_f16_e32 v0.h, v4.l, v5.l
-; GFX12-SDAG-NEXT: v_add_f16_e32 v0.l, v0.l, v0.h
-; GFX12-SDAG-NEXT: global_store_b16 v[2:3], v0, off
-; GFX12-SDAG-NEXT: s_endpgm
-;
-; GFX12-GISEL-LABEL: v_fptrunc_round_f32_to_f16_towardzero_multiple_calls:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: v_cvt_pk_rtz_f16_f32_e32 v4, v0, v0
-; GFX12-GISEL-NEXT: v_cvt_pk_rtz_f16_f32_e32 v5, v1, v0
-; GFX12-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 1), 1
-; GFX12-GISEL-NEXT: v_cvt_f16_f32_e64 v0.l, v1
-; GFX12-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_add_f16_e32 v0.h, v4.l, v5.l
-; GFX12-GISEL-NEXT: v_add_f16_e32 v0.l, v0.l, v0.h
-; GFX12-GISEL-NEXT: global_store_b16 v[2:3], v0, off
-; GFX12-GISEL-NEXT: s_endpgm
+; GFX12-LABEL: v_fptrunc_round_f32_to_f16_towardzero_multiple_calls:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: v_cvt_pk_rtz_f16_f32_e32 v4, v0, v0
+; GFX12-NEXT: v_cvt_pk_rtz_f16_f32_e32 v5, v1, v0
+; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 1), 1
+; GFX12-NEXT: v_cvt_f16_f32_e64 v0.l, v1
+; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-NEXT: v_add_f16_e32 v0.h, v4.l, v5.l
+; GFX12-NEXT: v_add_f16_e32 v0.l, v0.l, v0.h
+; GFX12-NEXT: global_store_b16 v[2:3], v0, off
+; GFX12-NEXT: s_endpgm
%res1 = call half @llvm.fptrunc.round.f16.f32(float %a, metadata !"round.towardzero")
%res2 = call half @llvm.fptrunc.round.f16.f32(float %b, metadata !"round.towardzero")
%res3 = call half @llvm.fptrunc.round.f16.f32(float %b, metadata !"round.upward")
@@ -601,7 +572,7 @@ define amdgpu_gs i32 @s_fptrunc_round_f32_to_f16_towardzero(float inreg %a, ptr
;
; GFX11-SDAG-LABEL: s_fptrunc_round_f32_to_f16_towardzero:
; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, s0, s0
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, s0, v0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v0
@@ -693,20 +664,35 @@ define amdgpu_gs void @s_fptrunc_round_f32_to_f16_upward_multiple_calls(float in
; GISEL-NEXT: global_store_short v[0:1], v2, off
; GISEL-NEXT: s_endpgm
;
-; GFX12-LABEL: s_fptrunc_round_f32_to_f16_upward_multiple_calls:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 1), 1
-; GFX12-NEXT: s_cvt_f16_f32 s0, s0
-; GFX12-NEXT: s_cvt_f16_f32 s2, s1
-; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 2
-; GFX12-NEXT: s_cvt_f16_f32 s1, s1
-; GFX12-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 3, 1), 0
-; GFX12-NEXT: s_add_f16 s0, s0, s2
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
-; GFX12-NEXT: s_add_f16 s0, s1, s0
-; GFX12-NEXT: v_mov_b16_e32 v2.l, s0
-; GFX12-NEXT: global_store_b16 v[0:1], v2, off
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: s_fptrunc_round_f32_to_f16_upward_multiple_calls:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 1), 1
+; GFX12-SDAG-NEXT: s_cvt_f16_f32 s0, s0
+; GFX12-SDAG-NEXT: s_cvt_f16_f32 s2, s1
+; GFX12-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 2
+; GFX12-SDAG-NEXT: s_cvt_f16_f32 s1, s1
+; GFX12-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 3, 1), 0
+; GFX12-SDAG-NEXT: s_add_f16 s0, s0, s2
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: s_add_f16 s0, s1, s0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s0
+; GFX12-SDAG-NEXT: global_store_b16 v[0:1], v2, off
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: s_fptrunc_round_f32_to_f16_upward_multiple_calls:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 1), 1
+; GFX12-GISEL-NEXT: s_cvt_f16_f32 s0, s0
+; GFX12-GISEL-NEXT: s_cvt_f16_f32 s2, s1
+; GFX12-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 2
+; GFX12-GISEL-NEXT: s_cvt_f16_f32 s1, s1
+; GFX12-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 3, 1), 0
+; GFX12-GISEL-NEXT: s_add_f16 s0, s0, s2
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: s_add_f16 s0, s1, s0
+; GFX12-GISEL-NEXT: v_mov_b16_e32 v2.l, s0
+; GFX12-GISEL-NEXT: global_store_b16 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_endpgm
%res1 = call half @llvm.fptrunc.round.f16.f32(float %a, metadata !"round.upward")
%res2 = call half @llvm.fptrunc.round.f16.f32(float %b, metadata !"round.upward")
%res3 = call half @llvm.fptrunc.round.f16.f32(float %b, metadata !"round.downward")
@@ -1084,9 +1070,9 @@ define amdgpu_gs <2 x i32> @s_fptrunc_round_v2f32_to_v2f16_towardzero(<2 x float
;
; GFX11-SDAG-LABEL: s_fptrunc_round_v2f32_to_v2f16_towardzero:
; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v0, s0, s0
-; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e64 v1, s1, s0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v0, s0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_cvt_pk_rtz_f16_f32_e32 v1, s1, v0
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll b/llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
index ad690fe234bc79..4d1cc8f92baaf4 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
@@ -258,15 +258,14 @@ define amdgpu_kernel void @rint_v2f16(
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s3
; GFX12-TRUE16-NEXT: s_mov_b32 s4, s0
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[8:11], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX12-TRUE16-NEXT: v_rndne_f16_e32 v1.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
-; GFX12-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], null
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-TRUE16-NEXT: v_rndne_f16_e32 v0.h, v1.l
+; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: rint_v2f16:
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.round.ll b/llvm/test/CodeGen/AMDGPU/llvm.round.ll
index c2776a0439996a..0fed9df4c29bae 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.round.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.round.ll
@@ -832,7 +832,7 @@ define amdgpu_kernel void @round_f16(ptr addrspace(1) %out, i32 %x.arg) #0 {
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_trunc_f16_e32 v0.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_sub_f16_e32 v0.h, s2, v0.l
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
@@ -996,7 +996,7 @@ define amdgpu_kernel void @round_v2f16(ptr addrspace(1) %out, i32 %in.arg) #0 {
; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16
; GFX11-TRUE16-NEXT: v_trunc_f16_e32 v0.l, s2
; GFX11-TRUE16-NEXT: v_trunc_f16_e32 v0.h, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, s3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_sub_f16_e32 v1.l, s2, v0.l
; GFX11-TRUE16-NEXT: v_sub_f16_e32 v1.h, s3, v0.h
@@ -1004,7 +1004,7 @@ define amdgpu_kernel void @round_v2f16(ptr addrspace(1) %out, i32 %in.arg) #0 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e64 s6, |v1.l|, 0.5
; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e64 s7, |v1.h|, 0.5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, s2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0, 0x3c00, s6
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0, 0x3c00, s7
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll b/llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
index bcaba060b812fa..b04bd5d4de3050 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
@@ -438,13 +438,21 @@ define amdgpu_ps half @sqrt_f16_s(half inreg %x) {
; GFX11-FAKE16-NEXT: v_sqrt_f16_e32 v0, s0
; GFX11-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX12-TRUE16-LABEL: sqrt_f16_s:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: v_s_sqrt_f16 s0, s0
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-TRUE16-NEXT: ; return to shader part epilog
+; GFX12-TRUE16-SDAG-LABEL: sqrt_f16_s:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-TRUE16-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-TRUE16-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-TRUE16-GISEL-LABEL: sqrt_f16_s:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-TRUE16-GISEL-NEXT: ; return to shader part epilog
;
; GFX12-FAKE16-LABEL: sqrt_f16_s:
; GFX12-FAKE16: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll b/llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
index 4664a4475d22ac..62747addbbd9ae 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
@@ -237,15 +237,14 @@ define amdgpu_kernel void @trunc_v2f16(
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s3
; GFX12-TRUE16-NEXT: s_mov_b32 s4, s0
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[8:11], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX12-TRUE16-NEXT: v_trunc_f16_e32 v1.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: v_trunc_f16_e32 v0.l, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l
-; GFX12-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], null
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-TRUE16-NEXT: v_trunc_f16_e32 v0.h, v1.l
+; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: trunc_v2f16:
diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
index 70d0d38eb656a0..ea1ce170d4757f 100644
--- a/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
@@ -1319,46 +1319,24 @@ define amdgpu_kernel void @constant_zextload_v3i1_to_v3i32(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b96 v3, v[0:2], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_zextload_v3i1_to_v3i32:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v3, 0
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v0, v3, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_and_b32 s4, s2, 1
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s3, s3, 2
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10001
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s2
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s3
-; GFX1250-TRUE16-NEXT: global_store_b96 v3, v[0:2], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_zextload_v3i1_to_v3i32:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v3, 0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v1, v3, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-FAKE16-NEXT: v_dual_lshrrev_b32 v2, 2, v0 :: v_dual_bitop2_b32 v0, 1, v1 bitop3:0x40
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v1, v1, 1, 1
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX1250-FAKE16-NEXT: global_store_b96 v3, v[0:2], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_zextload_v3i1_to_v3i32:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v3, 0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v1, v3, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v0, 0xffff, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-NEXT: v_dual_lshrrev_b32 v2, 2, v0 :: v_dual_bitop2_b32 v0, 1, v1 bitop3:0x40
+; GFX1250-NEXT: v_bfe_u32 v1, v1, 1, 1
+; GFX1250-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX1250-NEXT: global_store_b96 v3, v[0:2], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <3 x i1>, ptr addrspace(4) %in
%ext = zext <3 x i1> %load to <3 x i32>
store <3 x i32> %ext, ptr addrspace(1) %out
@@ -1558,47 +1536,25 @@ define amdgpu_kernel void @constant_zextload_v4i1_to_v4i32(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_zextload_v4i1_to_v4i32:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v4, 0
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v0, v4, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_and_b32 s4, s2, 1
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s2, 0x10002
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10001
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s3, s3, 3
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s2
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v3, s3
-; GFX1250-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_zextload_v4i1_to_v4i32:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v4, 0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v1, v4, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v1
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v0, 1, v1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v2, v1, 2, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v1, v1, 1, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1250-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 3, v3
-; GFX1250-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_zextload_v4i1_to_v4i32:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v4, 0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v1, v4, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v3, 0xffff, v1
+; GFX1250-NEXT: v_and_b32_e32 v0, 1, v1
+; GFX1250-NEXT: v_bfe_u32 v2, v1, 2, 1
+; GFX1250-NEXT: v_bfe_u32 v1, v1, 1, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1250-NEXT: v_lshrrev_b32_e32 v3, 3, v3
+; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <4 x i1>, ptr addrspace(4) %in
%ext = zext <4 x i1> %load to <4 x i32>
store <4 x i32> %ext, ptr addrspace(1) %out
@@ -1807,26 +1763,20 @@ define amdgpu_kernel void @constant_zextload_v8i1_to_v8i32(ptr addrspace(1) %out
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v8, 0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_u8 v0, v8, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_u8 v2, v8, s[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX12-TRUE16-NEXT: s_bfe_u32 s5, s2, 0x10005
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_and_b32 v0, 0xffff, v0
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10003
-; GFX12-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10001
-; GFX12-TRUE16-NEXT: s_and_b32 s6, s2, 1
-; GFX12-TRUE16-NEXT: s_bfe_u32 s7, s2, 0x10002
-; GFX12-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10004
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 7, v0
-; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v0, 6, 1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v5, s4
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v7, s3
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, s7
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v2
+; GFX12-TRUE16-NEXT: v_bfe_u32 v7, v2, 3, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v2, 1, 1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 1, v2
+; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v2, 2, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v1, v2, 5, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v2, 4, 1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 7, v9
+; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v9, 6, 1
; GFX12-TRUE16-NEXT: s_clause 0x1
-; GFX12-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16
; GFX12-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_zextload_v8i1_to_v8i32:
@@ -1865,25 +1815,20 @@ define amdgpu_kernel void @constant_zextload_v8i1_to_v8i32(ptr addrspace(1) %out
; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v8, 0
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v0, v8, s[2:3] nv
+; GFX1250-TRUE16-NEXT: global_load_u8 v2, v8, s[2:3] nv
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s5, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10003
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10001
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s6, s2, 0x10005
-; GFX1250-TRUE16-NEXT: s_and_b32 s7, s2, 1
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s8, s2, 0x10002
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10004
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s9, s5, 7
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s5, 0x10006
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s6
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v2, s5
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v7, s3
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v4, s7 :: v_dual_mov_b32 v5, s4
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v2
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v5, v2, 5, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v4, v2, 4, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v3, v2, 3, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v1, v2, 1, 1
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 7, v6
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v6, v6, 6, 1
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v0, 1, v2
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v2, v2, 2, 1
; GFX1250-TRUE16-NEXT: s_clause 0x1
-; GFX1250-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1]
+; GFX1250-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
+; GFX1250-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1]
; GFX1250-TRUE16-NEXT: s_endpgm
;
; GFX1250-FAKE16-LABEL: constant_zextload_v8i1_to_v8i32:
@@ -2221,40 +2166,36 @@ define amdgpu_kernel void @constant_zextload_v16i1_to_v16i32(ptr addrspace(1) %o
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v16, 0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_b16 v0, v16, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_b16 v2, v16, s[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX12-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10003
-; GFX12-TRUE16-NEXT: s_bfe_u32 s5, s2, 0x10001
-; GFX12-TRUE16-NEXT: s_bfe_u32 s6, s2, 0x10007
-; GFX12-TRUE16-NEXT: s_bfe_u32 s7, s2, 0x10009
-; GFX12-TRUE16-NEXT: s_bfe_u32 s8, s2, 0x1000d
-; GFX12-TRUE16-NEXT: s_and_b32 s9, s2, 1
-; GFX12-TRUE16-NEXT: s_bfe_u32 s10, s2, 0x1000a
-; GFX12-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x1000c
-; GFX12-TRUE16-NEXT: s_bfe_u32 s11, s3, 0x10005
-; GFX12-TRUE16-NEXT: s_bfe_u32 s12, s3, 0x1000b
-; GFX12-TRUE16-NEXT: s_lshr_b32 s13, s3, 15
-; GFX12-TRUE16-NEXT: s_bfe_u32 s14, s3, 0x10002
-; GFX12-TRUE16-NEXT: s_bfe_u32 s15, s3, 0x10006
-; GFX12-TRUE16-NEXT: s_bfe_u32 s16, s3, 0x10004
-; GFX12-TRUE16-NEXT: s_bfe_u32 s17, s3, 0x10008
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s3, 0x1000e
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s8
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v2, s3
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v3, s13 :: v_dual_mov_b32 v8, s16
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s10
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v4, s17
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v7, s12 :: v_dual_mov_b32 v10, s15
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s9
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v14, s14
+; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s2, v2
+; GFX12-TRUE16-NEXT: v_bfe_u32 v13, v2, 13, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v12, v2, 12, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v9, v2, 9, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v10, v2, 10, 1
+; GFX12-TRUE16-NEXT: s_and_b32 s2, 0xffff, s2
+; GFX12-TRUE16-NEXT: v_bfe_u32 v7, v2, 7, 1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s2, 15
+; GFX12-TRUE16-NEXT: s_bfe_u32 s9, s2, 0x1000e
+; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10005
+; GFX12-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x1000b
+; GFX12-TRUE16-NEXT: s_bfe_u32 s6, s2, 0x10002
+; GFX12-TRUE16-NEXT: s_bfe_u32 s7, s2, 0x10006
+; GFX12-TRUE16-NEXT: s_bfe_u32 s8, s2, 0x10004
+; GFX12-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10008
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_and_b32 v0, 1, v2
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v11, s4
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v5, s3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, s8
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, s7
+; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v2, 3, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v1, v2, 1, 1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s6
; GFX12-TRUE16-NEXT: s_clause 0x3
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[0:3], s[0:1] offset:48
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:32
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[0:1] offset:48
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:32
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[0:3], s[0:1]
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_zextload_v16i1_to_v16i32:
@@ -2297,49 +2238,89 @@ define amdgpu_kernel void @constant_zextload_v16i1_to_v16i32(ptr addrspace(1) %o
; GFX12-FAKE16-NEXT: global_store_b128 v16, v[12:15], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: constant_zextload_v16i1_to_v16i32:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-NEXT: v_mov_b32_e32 v16, 0
-; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: global_load_u16 v0, v16, s[2:3] nv
-; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-NEXT: s_and_b32 s6, 0xffff, s2
-; GFX1250-NEXT: s_bfe_u32 s3, s2, 0x10003
-; GFX1250-NEXT: s_bfe_u32 s4, s2, 0x10001
-; GFX1250-NEXT: s_bfe_u32 s5, s2, 0x10007
-; GFX1250-NEXT: s_bfe_u32 s7, s2, 0x10009
-; GFX1250-NEXT: s_bfe_u32 s8, s2, 0x1000d
-; GFX1250-NEXT: s_and_b32 s9, s2, 1
-; GFX1250-NEXT: s_bfe_u32 s10, s2, 0x1000a
-; GFX1250-NEXT: s_bfe_u32 s2, s2, 0x1000c
-; GFX1250-NEXT: s_bfe_u32 s11, s6, 0x10005
-; GFX1250-NEXT: s_bfe_u32 s12, s6, 0x1000b
-; GFX1250-NEXT: s_lshr_b32 s13, s6, 15
-; GFX1250-NEXT: s_bfe_u32 s14, s6, 0x10002
-; GFX1250-NEXT: s_bfe_u32 s15, s6, 0x10006
-; GFX1250-NEXT: s_bfe_u32 s16, s6, 0x10004
-; GFX1250-NEXT: s_bfe_u32 s17, s6, 0x10008
-; GFX1250-NEXT: s_bfe_u32 s6, s6, 0x1000e
-; GFX1250-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s8
-; GFX1250-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s13
-; GFX1250-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s10
-; GFX1250-NEXT: v_dual_mov_b32 v4, s17 :: v_dual_mov_b32 v7, s12
-; GFX1250-NEXT: v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, s9
-; GFX1250-NEXT: v_dual_mov_b32 v8, s16 :: v_dual_mov_b32 v9, s11
-; GFX1250-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v14, s14
-; GFX1250-NEXT: v_dual_mov_b32 v13, s4 :: v_dual_mov_b32 v15, s3
-; GFX1250-NEXT: s_clause 0x3
-; GFX1250-NEXT: global_store_b128 v16, v[0:3], s[0:1] offset:48
-; GFX1250-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:32
-; GFX1250-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:16
-; GFX1250-NEXT: global_store_b128 v16, v[12:15], s[0:1]
-; GFX1250-NEXT: s_endpgm
+; GFX1250-TRUE16-LABEL: constant_zextload_v16i1_to_v16i32:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v16, 0
+; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1250-TRUE16-NEXT: global_load_u16 v2, v16, s[2:3] nv
+; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v2
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v13, v2, 13, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v12, v2, 12, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v9, v2, 9, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v10, v2, 10, 1
+; GFX1250-TRUE16-NEXT: s_and_b32 s2, 0xffff, s2
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v7, v2, 7, 1
+; GFX1250-TRUE16-NEXT: s_lshr_b32 s5, s2, 15
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s9, s2, 0x1000e
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10005
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x1000b
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s6, s2, 0x10002
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s7, s2, 0x10006
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s8, s2, 0x10004
+; GFX1250-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10008
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v14, s9 :: v_dual_bitop2_b32 v0, 1, v2 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v8, s2
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v4, s8
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v6, s7
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v3, v2, 3, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v1, v2, 1, 1
+; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s6
+; GFX1250-TRUE16-NEXT: s_clause 0x3
+; GFX1250-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[0:1] offset:48
+; GFX1250-TRUE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:32
+; GFX1250-TRUE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:16
+; GFX1250-TRUE16-NEXT: global_store_b128 v16, v[0:3], s[0:1]
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: constant_zextload_v16i1_to_v16i32:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v16, 0
+; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1250-FAKE16-NEXT: global_load_u16 v0, v16, s[2:3] nv
+; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1250-FAKE16-NEXT: v_readfirstlane_b32 s2, v0
+; GFX1250-FAKE16-NEXT: s_and_b32 s6, 0xffff, s2
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s3, s2, 0x10003
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s4, s2, 0x10001
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s5, s2, 0x10007
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s7, s2, 0x10009
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s8, s2, 0x1000d
+; GFX1250-FAKE16-NEXT: s_and_b32 s9, s2, 1
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s10, s2, 0x1000a
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s2, s2, 0x1000c
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s11, s6, 0x10005
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s12, s6, 0x1000b
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s13, s6, 15
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s14, s6, 0x10002
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s15, s6, 0x10006
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s16, s6, 0x10004
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s17, s6, 0x10008
+; GFX1250-FAKE16-NEXT: s_bfe_u32 s6, s6, 0x1000e
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s8
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s13
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s10
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v4, s17 :: v_dual_mov_b32 v7, s12
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, s9
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v8, s16 :: v_dual_mov_b32 v9, s11
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v10, s15 :: v_dual_mov_b32 v14, s14
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v13, s4 :: v_dual_mov_b32 v15, s3
+; GFX1250-FAKE16-NEXT: s_clause 0x3
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[0:3], s[0:1] offset:48
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:32
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:16
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[12:15], s[0:1]
+; GFX1250-FAKE16-NEXT: s_endpgm
%load = load <16 x i1>, ptr addrspace(4) %in
%ext = zext <16 x i1> %load to <16 x i32>
store <16 x i32> %ext, ptr addrspace(1) %out
@@ -5585,48 +5566,25 @@ define amdgpu_kernel void @constant_zextload_v2i1_to_v2i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_zextload_v2i1_to_v2i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v3, v1
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v0, v1, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_and_b32 s2, s2, 1
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s3, s3, 1
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v2, s3
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_zextload_v2i1_to_v2i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v3, v1
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v0, v1, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v0
-; GFX1250-FAKE16-NEXT: v_dual_lshrrev_b32 v2, 1, v2 :: v_dual_bitop2_b32 v0, 1, v0 bitop3:0x40
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_zextload_v2i1_to_v2i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v1, 0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX1250-NEXT: v_mov_b32_e32 v3, v1
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v0, v1, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v2, 0xffff, v0
+; GFX1250-NEXT: v_dual_lshrrev_b32 v2, 1, v2 :: v_dual_bitop2_b32 v0, 1, v0 bitop3:0x40
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX1250-NEXT: global_store_b128 v1, v[0:3], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <2 x i1>, ptr addrspace(4) %in
%ext = zext <2 x i1> %load to <2 x i64>
store <2 x i64> %ext, ptr addrspace(1) %out
@@ -5729,47 +5687,26 @@ define amdgpu_kernel void @constant_sextload_v2i1_to_v2i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_sextload_v2i1_to_v2i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v4, 0
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v1, v4, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 1
-; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v2, 1, v1 :: v_dual_ashrrev_i32 v1, 31, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 1
-; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
-; GFX1250-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_sextload_v2i1_to_v2i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v4, 0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v0, v4, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 1, v0
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1250-FAKE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v2, v2, 0, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
-; GFX1250-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_sextload_v2i1_to_v2i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v4, 0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v0, v4, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_lshrrev_b32_e32 v2, 1, v0
+; GFX1250-NEXT: v_bfe_i32 v0, v0, 0, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-NEXT: v_ashrrev_i32_e32 v1, 31, v0
+; GFX1250-NEXT: v_bfe_i32 v2, v2, 0, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_ashrrev_i32_e32 v3, 31, v2
+; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <2 x i1>, ptr addrspace(4) %in
%ext = sext <2 x i1> %load to <2 x i64>
store <2 x i64> %ext, ptr addrspace(1) %out
@@ -5854,21 +5791,23 @@ define amdgpu_kernel void @constant_zextload_v3i1_to_v3i64(ptr addrspace(1) %out
; GFX12-TRUE16-LABEL: constant_zextload_v3i1_to_v3i64:
; GFX12-TRUE16: ; %bb.0:
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v5, 0
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_u8 v0, v5, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_u8 v0, v1, s[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
-; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v0, 1, 1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v0
+; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v0, 1, 1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 2, v1
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, v5 :: v_dual_and_b32 v4, 0xffff, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v6
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 2, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v4
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v4, 0xffff, v5
; GFX12-TRUE16-NEXT: s_clause 0x1
-; GFX12-TRUE16-NEXT: global_store_b64 v5, v[4:5], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: global_store_b128 v5, v[0:3], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b64 v1, v[4:5], s[0:1] offset:16
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_zextload_v3i1_to_v3i64:
@@ -5891,59 +5830,30 @@ define amdgpu_kernel void @constant_zextload_v3i1_to_v3i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v5, v[0:3], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_zextload_v3i1_to_v3i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v3, v1
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v0, v1, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10001
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s3, s3, 2
-; GFX1250-TRUE16-NEXT: s_and_b32 s2, s2, 1
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v0, s3
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s4
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s3
-; GFX1250-TRUE16-NEXT: global_store_b64 v1, v[0:1], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_zextload_v3i1_to_v3i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v5, 0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v0, v5, s[2:3] nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v3, v5
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v6, v0, 1, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-FAKE16-NEXT: v_dual_lshrrev_b32 v2, 2, v1 :: v_dual_bitop2_b32 v0, 1, v0 bitop3:0x40
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v1, v5
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v2
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v6
-; GFX1250-FAKE16-NEXT: s_clause 0x1
-; GFX1250-FAKE16-NEXT: global_store_b64 v5, v[4:5], s[0:1] offset:16
-; GFX1250-FAKE16-NEXT: global_store_b128 v5, v[0:3], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_zextload_v3i1_to_v3i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v5, 0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v0, v5, s[2:3] nv
+; GFX1250-NEXT: v_mov_b32_e32 v3, v5
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; GFX1250-NEXT: v_bfe_u32 v6, v0, 1, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1250-NEXT: v_dual_lshrrev_b32 v2, 2, v1 :: v_dual_bitop2_b32 v0, 1, v0 bitop3:0x40
+; GFX1250-NEXT: v_mov_b32_e32 v1, v5
+; GFX1250-NEXT: v_and_b32_e32 v4, 0xffff, v2
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1250-NEXT: v_and_b32_e32 v2, 0xffff, v6
+; GFX1250-NEXT: s_clause 0x1
+; GFX1250-NEXT: global_store_b64 v5, v[4:5], s[0:1] offset:16
+; GFX1250-NEXT: global_store_b128 v5, v[0:3], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <3 x i1>, ptr addrspace(4) %in
%ext = zext <3 x i1> %load to <3 x i64>
store <3 x i64> %ext, ptr addrspace(1) %out
@@ -6076,55 +5986,29 @@ define amdgpu_kernel void @constant_sextload_v3i1_to_v3i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_sextload_v3i1_to_v3i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v5, 0
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v1, v5, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v2, 2, v1 :: v_dual_lshrrev_b32 v4, 1, v1
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 1
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v6, v2, 0, 1
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v2, v4, 0, 1
-; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v1, 31, v0 :: v_dual_ashrrev_i32 v7, 31, v6
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
-; GFX1250-TRUE16-NEXT: s_clause 0x1
-; GFX1250-TRUE16-NEXT: global_store_b64 v5, v[6:7], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: global_store_b128 v5, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_sextload_v3i1_to_v3i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v5, 0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v0, v5, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_dual_lshrrev_b32 v2, 2, v0 :: v_dual_lshrrev_b32 v4, 1, v0
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v6, v2, 0, 1
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v2, v4, 0, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-FAKE16-NEXT: v_dual_ashrrev_i32 v1, 31, v0 :: v_dual_ashrrev_i32 v7, 31, v6
-; GFX1250-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
-; GFX1250-FAKE16-NEXT: s_clause 0x1
-; GFX1250-FAKE16-NEXT: global_store_b64 v5, v[6:7], s[0:1] offset:16
-; GFX1250-FAKE16-NEXT: global_store_b128 v5, v[0:3], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_sextload_v3i1_to_v3i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v5, 0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v0, v5, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_dual_lshrrev_b32 v2, 2, v0 :: v_dual_lshrrev_b32 v4, 1, v0
+; GFX1250-NEXT: v_bfe_i32 v0, v0, 0, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-NEXT: v_bfe_i32 v6, v2, 0, 1
+; GFX1250-NEXT: v_bfe_i32 v2, v4, 0, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1250-NEXT: v_dual_ashrrev_i32 v1, 31, v0 :: v_dual_ashrrev_i32 v7, 31, v6
+; GFX1250-NEXT: v_ashrrev_i32_e32 v3, 31, v2
+; GFX1250-NEXT: s_clause 0x1
+; GFX1250-NEXT: global_store_b64 v5, v[6:7], s[0:1] offset:16
+; GFX1250-NEXT: global_store_b128 v5, v[0:3], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <3 x i1>, ptr addrspace(4) %in
%ext = sext <3 x i1> %load to <3 x i64>
store <3 x i64> %ext, ptr addrspace(1) %out
@@ -6222,24 +6106,19 @@ define amdgpu_kernel void @constant_zextload_v4i1_to_v4i64(ptr addrspace(1) %out
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: global_load_d16_u8 v0, v1, s[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10002
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 3, v0
-; GFX12-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10001
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, 1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX12-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s3
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v2, 0xffff, v0
+; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v0, 1, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v0, 2, 1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 3, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v6
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_and_b32 v6, 0xffff, v7
+; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:16
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_zextload_v4i1_to_v4i64:
@@ -6279,24 +6158,24 @@ define amdgpu_kernel void @constant_zextload_v4i1_to_v4i64(ptr addrspace(1) %out
; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v5, v1
+; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v7, v1
; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX1250-TRUE16-NEXT: global_load_u8 v0, v1, s[2:3] nv
; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10002
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s3, s3, 3
-; GFX1250-TRUE16-NEXT: s_and_b32 s4, 0xffff, s4
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v0, s4
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s3
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10001
-; GFX1250-TRUE16-NEXT: s_and_b32 s2, s2, 1
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s3
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v0
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v6, v0, 2, 1
+; GFX1250-TRUE16-NEXT: v_bfe_u32 v8, v0, 1, 1
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v2, 3, v2 :: v_dual_bitop2_b32 v4, 1, v0 bitop3:0x40
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v6
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v8
+; GFX1250-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX1250-TRUE16-NEXT: s_clause 0x1
; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v2, s3
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
+; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[4:7], s[0:1]
; GFX1250-TRUE16-NEXT: s_endpgm
;
; GFX1250-FAKE16-LABEL: constant_zextload_v4i1_to_v4i64:
@@ -6479,63 +6358,33 @@ define amdgpu_kernel void @constant_sextload_v4i1_to_v4i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v8, v[0:3], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_sextload_v4i1_to_v4i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v9, 0
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v1, v9, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v2, 3, v1 :: v_dual_lshrrev_b32 v4, 2, v1
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 1
-; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 1, v1
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v6, v2, 0, 1
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v4, v4, 0, 1
-; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_bfe_i32 v2, v8, 0, 1
-; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v7, 31, v6 :: v_dual_ashrrev_i32 v5, 31, v4
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
-; GFX1250-TRUE16-NEXT: s_clause 0x1
-; GFX1250-TRUE16-NEXT: global_store_b128 v9, v[4:7], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: global_store_b128 v9, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_sextload_v4i1_to_v4i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v9, 0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v0, v9, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_dual_lshrrev_b32 v2, 3, v0 :: v_dual_lshrrev_b32 v4, 2, v0
-; GFX1250-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 1, v0
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v6, v2, 0, 1
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v4, v4, 0, 1
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX1250-FAKE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
-; GFX1250-FAKE16-NEXT: v_bfe_i32 v2, v8, 0, 1
-; GFX1250-FAKE16-NEXT: v_dual_ashrrev_i32 v7, 31, v6 :: v_dual_ashrrev_i32 v5, 31, v4
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX1250-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
-; GFX1250-FAKE16-NEXT: s_clause 0x1
-; GFX1250-FAKE16-NEXT: global_store_b128 v9, v[4:7], s[0:1] offset:16
-; GFX1250-FAKE16-NEXT: global_store_b128 v9, v[0:3], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_sextload_v4i1_to_v4i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v9, 0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v0, v9, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_dual_lshrrev_b32 v2, 3, v0 :: v_dual_lshrrev_b32 v4, 2, v0
+; GFX1250-NEXT: v_lshrrev_b32_e32 v8, 1, v0
+; GFX1250-NEXT: v_bfe_i32 v0, v0, 0, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-NEXT: v_bfe_i32 v6, v2, 0, 1
+; GFX1250-NEXT: v_bfe_i32 v4, v4, 0, 1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1250-NEXT: v_ashrrev_i32_e32 v1, 31, v0
+; GFX1250-NEXT: v_bfe_i32 v2, v8, 0, 1
+; GFX1250-NEXT: v_dual_ashrrev_i32 v7, 31, v6 :: v_dual_ashrrev_i32 v5, 31, v4
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250-NEXT: v_ashrrev_i32_e32 v3, 31, v2
+; GFX1250-NEXT: s_clause 0x1
+; GFX1250-NEXT: global_store_b128 v9, v[4:7], s[0:1] offset:16
+; GFX1250-NEXT: global_store_b128 v9, v[0:3], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <4 x i1>, ptr addrspace(4) %in
%ext = sext <4 x i1> %load to <4 x i64>
store <4 x i64> %ext, ptr addrspace(1) %out
@@ -6678,23 +6527,23 @@ define amdgpu_kernel void @constant_zextload_v8i1_to_v8i64(ptr addrspace(1) %out
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v13, v1
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v15, v1
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_u8 v12, v1, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_u8 v0, v1, s[2:3]
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v0, 0xffff, v12
-; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v12, 5, 1
-; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v12, 4, 1
-; GFX12-TRUE16-NEXT: v_bfe_u32 v10, v12, 3, 1
-; GFX12-TRUE16-NEXT: v_bfe_u32 v8, v12, 2, 1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 7, v0
-; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v0, 6, 1
-; GFX12-TRUE16-NEXT: v_bfe_u32 v14, v12, 1, 1
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 1, v12
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v8, 1, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v0
+; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v0, 3, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v0, 2, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v10, v0, 1, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v0, 5, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v0, 4, 1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 7, v12
+; GFX12-TRUE16-NEXT: v_bfe_u32 v12, v12, 6, 1
; GFX12-TRUE16-NEXT: s_clause 0x3
-; GFX12-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:48
-; GFX12-TRUE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:32
-; GFX12-TRUE16-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: global_store_b128 v1, v[12:15], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[8:11], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:32
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[12:15], s[0:1] offset:48
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_zextload_v8i1_to_v8i64:
@@ -6727,70 +6576,37 @@ define amdgpu_kernel void @constant_zextload_v8i1_to_v8i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v1, v[12:15], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_zextload_v8i1_to_v8i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v5, v1
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v9, v1
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v13, v1
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u8 v8, v1, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v8
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v12.l, v8.l
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v15, v1
-; GFX1250-TRUE16-NEXT: v_bfe_u32 v6, v8, 5, 1
-; GFX1250-TRUE16-NEXT: v_bfe_u32 v4, v8, 4, 1
-; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 7, v0
-; GFX1250-TRUE16-NEXT: v_bfe_u32 v0, v0, 6, 1
-; GFX1250-TRUE16-NEXT: v_bfe_u32 v10, v8, 3, 1
-; GFX1250-TRUE16-NEXT: v_bfe_u32 v14, v8, 1, 1
-; GFX1250-TRUE16-NEXT: v_bfe_u32 v8, v8, 2, 1
-; GFX1250-TRUE16-NEXT: v_and_b32_e32 v12, 1, v12
-; GFX1250-TRUE16-NEXT: s_clause 0x3
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:48
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:32
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: global_store_b128 v1, v[12:15], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_zextload_v8i1_to_v8i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v5, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v9, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v13, v1
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u8 v12, v1, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v12
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v15, v1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v6, v12, 5, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v4, v12, 4, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v10, v12, 3, 1
-; GFX1250-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 7, v0
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v0, v0, 6, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v8, v12, 2, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v14, v12, 1, 1
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v12, 1, v12
-; GFX1250-FAKE16-NEXT: s_clause 0x3
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:48
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:32
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:16
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[12:15], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_zextload_v8i1_to_v8i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v1, 0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v5, v1
+; GFX1250-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v9, v1
+; GFX1250-NEXT: v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v13, v1
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u8 v12, v1, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v0, 0xffff, v12
+; GFX1250-NEXT: v_mov_b32_e32 v15, v1
+; GFX1250-NEXT: v_bfe_u32 v6, v12, 5, 1
+; GFX1250-NEXT: v_bfe_u32 v4, v12, 4, 1
+; GFX1250-NEXT: v_bfe_u32 v10, v12, 3, 1
+; GFX1250-NEXT: v_lshrrev_b32_e32 v2, 7, v0
+; GFX1250-NEXT: v_bfe_u32 v0, v0, 6, 1
+; GFX1250-NEXT: v_bfe_u32 v8, v12, 2, 1
+; GFX1250-NEXT: v_bfe_u32 v14, v12, 1, 1
+; GFX1250-NEXT: v_and_b32_e32 v12, 1, v12
+; GFX1250-NEXT: s_clause 0x3
+; GFX1250-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:48
+; GFX1250-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:32
+; GFX1250-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:16
+; GFX1250-NEXT: global_store_b128 v1, v[12:15], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <8 x i1>, ptr addrspace(4) %in
%ext = zext <8 x i1> %load to <8 x i64>
store <8 x i64> %ext, ptr addrspace(1) %out
@@ -6958,42 +6774,36 @@ define amdgpu_kernel void @constant_sextload_v8i1_to_v8i64(ptr addrspace(1) %out
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v16, 0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_u8 v0, v16, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_u8 v1, v16, s[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v9, s3
-; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s3, 6
-; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s3, 7
-; GFX12-TRUE16-NEXT: s_lshr_b32 s6, s3, 4
-; GFX12-TRUE16-NEXT: s_lshr_b32 s8, s3, 5
-; GFX12-TRUE16-NEXT: s_lshr_b32 s10, s3, 2
-; GFX12-TRUE16-NEXT: s_lshr_b32 s12, s3, 3
-; GFX12-TRUE16-NEXT: s_lshr_b32 s14, s3, 1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX12-TRUE16-NEXT: v_bfe_i32 v12, v9, 0, 1
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s4
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v3, s5 :: v_dual_mov_b32 v4, s6
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s8
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v7, s9 :: v_dual_mov_b32 v8, s10
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v10, s12
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v14, s14
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 6, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 7, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 4, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 3, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 2, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 5, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 1, v1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v14, v5, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v12, v3, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v6, v4, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v4, v8, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v10, v9, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v8, v7, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v1, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 1
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v15, 31, v14
; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v13, 31, v12
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v15, s15
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v11, 31, v10
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v9, 31, v8
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v7, 31, v6
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v5, 31, v4
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
; GFX12-TRUE16-NEXT: s_clause 0x3
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[0:3], s[0:1] offset:48
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:32
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[0:1] offset:48
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:32
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[0:3], s[0:1]
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_sextload_v8i1_to_v8i64:
@@ -7039,49 +6849,87 @@ define amdgpu_kernel void @constant_sextload_v8i1_to_v8i64(ptr addrspace(1) %out
; GFX12-FAKE16-NEXT: global_store_b128 v16, v[12:15], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: constant_sextload_v8i1_to_v8i64:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-NEXT: v_mov_b32_e32 v16, 0
-; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: global_load_u8 v0, v16, s[2:3] nv
-; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_readfirstlane_b32 s3, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_mov_b32_e32 v10, s3
-; GFX1250-NEXT: s_lshr_b32 s2, s3, 6
-; GFX1250-NEXT: s_lshr_b32 s4, s3, 7
-; GFX1250-NEXT: s_lshr_b32 s6, s3, 4
-; GFX1250-NEXT: s_lshr_b32 s8, s3, 5
-; GFX1250-NEXT: s_lshr_b32 s10, s3, 2
-; GFX1250-NEXT: s_lshr_b32 s12, s3, 3
-; GFX1250-NEXT: s_lshr_b32 s14, s3, 1
-; GFX1250-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
-; GFX1250-NEXT: v_mov_b32_e32 v0, s2
-; GFX1250-NEXT: v_bfe_i32 v12, v10, 0, 1
-; GFX1250-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
-; GFX1250-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s4
-; GFX1250-NEXT: v_dual_mov_b32 v3, s5 :: v_dual_mov_b32 v4, s6
-; GFX1250-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
-; GFX1250-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s8
-; GFX1250-NEXT: v_dual_mov_b32 v7, s9 :: v_dual_mov_b32 v8, s10
-; GFX1250-NEXT: v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v10, s12
-; GFX1250-NEXT: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v14, s14
-; GFX1250-NEXT: v_dual_ashrrev_i32 v13, 31, v12 :: v_dual_mov_b32 v15, s15
-; GFX1250-NEXT: s_clause 0x3
-; GFX1250-NEXT: global_store_b128 v16, v[0:3], s[0:1] offset:48
-; GFX1250-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:32
-; GFX1250-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:16
-; GFX1250-NEXT: global_store_b128 v16, v[12:15], s[0:1]
-; GFX1250-NEXT: s_endpgm
+; GFX1250-TRUE16-LABEL: constant_sextload_v8i1_to_v8i64:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v17, 0
+; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1250-TRUE16-NEXT: global_load_u8 v2, v17, s[2:3] nv
+; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v8, 6, v2 :: v_dual_lshrrev_b32 v12, 7, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v16, 4, v2 :: v_dual_lshrrev_b32 v4, 1, v2
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v0, v2, 0, 1
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v6, 3, v2 :: v_dual_lshrrev_b32 v10, 2, v2
+; GFX1250-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 5, v2
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v2, v4, 0, 1
+; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v6, v6, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v4, v10, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v10, v14, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v14, v12, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v12, v8, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v8, v16, 0, 1
+; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v7, 31, v6
+; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v11, 31, v10
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v15, 31, v14 :: v_dual_ashrrev_i32 v5, 31, v4
+; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v13, 31, v12
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v9, 31, v8 :: v_dual_ashrrev_i32 v3, 31, v2
+; GFX1250-TRUE16-NEXT: s_clause 0x3
+; GFX1250-TRUE16-NEXT: global_store_b128 v17, v[12:15], s[0:1] offset:48
+; GFX1250-TRUE16-NEXT: global_store_b128 v17, v[8:11], s[0:1] offset:32
+; GFX1250-TRUE16-NEXT: global_store_b128 v17, v[4:7], s[0:1] offset:16
+; GFX1250-TRUE16-NEXT: global_store_b128 v17, v[0:3], s[0:1]
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: constant_sextload_v8i1_to_v8i64:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v16, 0
+; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1250-FAKE16-NEXT: global_load_u8 v0, v16, s[2:3] nv
+; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1250-FAKE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v10, s3
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s2, s3, 6
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s4, s3, 7
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s6, s3, 4
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s8, s3, 5
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s10, s3, 2
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s12, s3, 3
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s14, s3, 1
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s2
+; GFX1250-FAKE16-NEXT: v_bfe_i32 v12, v10, 0, 1
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s4
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v3, s5 :: v_dual_mov_b32 v4, s6
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s8
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v7, s9 :: v_dual_mov_b32 v8, s10
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v10, s12
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v14, s14
+; GFX1250-FAKE16-NEXT: v_dual_ashrrev_i32 v13, 31, v12 :: v_dual_mov_b32 v15, s15
+; GFX1250-FAKE16-NEXT: s_clause 0x3
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[0:3], s[0:1] offset:48
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[4:7], s[0:1] offset:32
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[8:11], s[0:1] offset:16
+; GFX1250-FAKE16-NEXT: global_store_b128 v16, v[12:15], s[0:1]
+; GFX1250-FAKE16-NEXT: s_endpgm
%load = load <8 x i1>, ptr addrspace(4) %in
%ext = sext <8 x i1> %load to <8 x i64>
store <8 x i64> %ext, ptr addrspace(1) %out
@@ -7307,61 +7155,51 @@ define amdgpu_kernel void @constant_zextload_v16i1_to_v16i64(ptr addrspace(1) %o
; GFX12-TRUE16-LABEL: constant_zextload_v16i1_to_v16i64:
; GFX12-TRUE16: ; %bb.0:
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, 0
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v5, v3
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, v3
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v7, v3
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v9, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v13, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v15, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v17, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v19, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v21, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v23, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v7, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v9, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v11, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v25, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v27, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v29, v1
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v31, v1
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_b16 v0, v3, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v0
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x1000a
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v6, 11, 1
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10009
-; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v6, 8, 1
-; GFX12-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x1000c
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 15, v6
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:80
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x1000d
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10007
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[0:3], s[0:1] offset:64
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s4
-; GFX12-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10006
-; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v6, 5, 1
-; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v6, 14, 1
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:96
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s4
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10004
-; GFX12-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10002
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:48
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s3
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v0
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10003
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:32
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s4
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, s3
-; GFX12-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10001
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, 1
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s2
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, s3
-; GFX12-TRUE16-NEXT: s_clause 0x1
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[6:9], s[0:1] offset:112
-; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1]
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v16, 1, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff, v0
+; GFX12-TRUE16-NEXT: v_bfe_u32 v14, v0, 3, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v12, v0, 2, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v18, v0, 1, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v0, 9, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v0, 13, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v10, v0, 7, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v28, v0, 4, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v20, v0, 10, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v8, v0, 6, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v0, 12, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v0, v24, 8, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v22, v24, 11, 1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 15, v24
+; GFX12-TRUE16-NEXT: v_bfe_u32 v30, v24, 5, 1
+; GFX12-TRUE16-NEXT: v_bfe_u32 v24, v24, 14, 1
+; GFX12-TRUE16-NEXT: s_clause 0x7
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[12:15], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[16:19], s[0:1]
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:64
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[20:23], s[0:1] offset:80
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:96
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[24:27], s[0:1] offset:112
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:48
+; GFX12-TRUE16-NEXT: global_store_b128 v1, v[28:31], s[0:1] offset:32
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_zextload_v16i1_to_v16i64:
@@ -7424,113 +7262,52 @@ define amdgpu_kernel void @constant_zextload_v16i1_to_v16i64(ptr addrspace(1) %o
; GFX12-FAKE16-NEXT: global_store_b128 v3, v[2:5], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-TRUE16-LABEL: constant_zextload_v16i1_to_v16i64:
-; GFX1250-TRUE16: ; %bb.0:
-; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-TRUE16-NEXT: v_nop
-; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v3, 0
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, v3
-; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-TRUE16-NEXT: global_load_u16 v0, v3, s[2:3] nv
-; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
-; GFX1250-TRUE16-NEXT: s_and_b32 s3, 0xffff, s2
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x1000a
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s3, 0x1000b
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v2, s4
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v4, s5
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10009
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s3, 0x10008
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:80
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s5
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s3, 0x1000e
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v4, s4
-; GFX1250-TRUE16-NEXT: s_lshr_b32 s4, s3, 15
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s3, s3, 0x10005
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:64
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s5
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s2, 0x1000c
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v4, s4
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x1000d
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:112
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s5
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s5, s2, 0x10006
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v4, s4
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10007
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:96
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v4, s4
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10004
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:48
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v4, s3
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s3, s2, 0x10003
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s4, s2, 0x10002
-; GFX1250-TRUE16-NEXT: s_bfe_u32 s2, s2, 0x10001
-; GFX1250-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:32
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v4, s3
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:16
-; GFX1250-TRUE16-NEXT: s_wait_xcnt 0x0
-; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v2, s2
-; GFX1250-TRUE16-NEXT: global_store_b128 v3, v[0:3], s[0:1]
-; GFX1250-TRUE16-NEXT: s_endpgm
-;
-; GFX1250-FAKE16-LABEL: constant_zextload_v16i1_to_v16i64:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-FAKE16-NEXT: v_nop
-; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v5, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v9, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v13, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v15, v1 :: v_dual_mov_b32 v17, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v21, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v23, v1 :: v_dual_mov_b32 v25, v1
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v27, v1 :: v_dual_mov_b32 v29, v1
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: global_load_u16 v12, v1, s[2:3] nv
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v31, v1 :: v_dual_bitop2_b32 v28, 1, v12 bitop3:0x40
-; GFX1250-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v12
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v0, v12, 10, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v6, v12, 9, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v14, v12, 13, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v18, v12, 7, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v2, v22, 11, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v4, v22, 8, 1
-; GFX1250-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 15, v22
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v8, v22, 14, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v26, v12, 3, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v30, v12, 1, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v24, v12, 2, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v20, v12, 4, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v16, v12, 6, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v12, v12, 12, 1
-; GFX1250-FAKE16-NEXT: v_bfe_u32 v22, v22, 5, 1
-; GFX1250-FAKE16-NEXT: s_clause 0x7
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:80
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:64
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:112
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[12:15], s[0:1] offset:96
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[16:19], s[0:1] offset:48
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[20:23], s[0:1] offset:32
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[24:27], s[0:1] offset:16
-; GFX1250-FAKE16-NEXT: global_store_b128 v1, v[28:31], s[0:1]
-; GFX1250-FAKE16-NEXT: s_endpgm
+; GFX1250-LABEL: constant_zextload_v16i1_to_v16i64:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-NEXT: v_nop
+; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT: v_mov_b32_e32 v1, 0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v5, v1
+; GFX1250-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v9, v1
+; GFX1250-NEXT: v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v13, v1
+; GFX1250-NEXT: v_dual_mov_b32 v15, v1 :: v_dual_mov_b32 v17, v1
+; GFX1250-NEXT: v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v21, v1
+; GFX1250-NEXT: v_dual_mov_b32 v23, v1 :: v_dual_mov_b32 v25, v1
+; GFX1250-NEXT: v_dual_mov_b32 v27, v1 :: v_dual_mov_b32 v29, v1
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: global_load_u16 v12, v1, s[2:3] nv
+; GFX1250-NEXT: s_wait_loadcnt 0x0
+; GFX1250-NEXT: v_dual_mov_b32 v31, v1 :: v_dual_bitop2_b32 v28, 1, v12 bitop3:0x40
+; GFX1250-NEXT: v_and_b32_e32 v22, 0xffff, v12
+; GFX1250-NEXT: v_bfe_u32 v0, v12, 10, 1
+; GFX1250-NEXT: v_bfe_u32 v6, v12, 9, 1
+; GFX1250-NEXT: v_bfe_u32 v14, v12, 13, 1
+; GFX1250-NEXT: v_bfe_u32 v18, v12, 7, 1
+; GFX1250-NEXT: v_bfe_u32 v2, v22, 11, 1
+; GFX1250-NEXT: v_bfe_u32 v4, v22, 8, 1
+; GFX1250-NEXT: v_lshrrev_b32_e32 v10, 15, v22
+; GFX1250-NEXT: v_bfe_u32 v8, v22, 14, 1
+; GFX1250-NEXT: v_bfe_u32 v26, v12, 3, 1
+; GFX1250-NEXT: v_bfe_u32 v30, v12, 1, 1
+; GFX1250-NEXT: v_bfe_u32 v24, v12, 2, 1
+; GFX1250-NEXT: v_bfe_u32 v20, v12, 4, 1
+; GFX1250-NEXT: v_bfe_u32 v16, v12, 6, 1
+; GFX1250-NEXT: v_bfe_u32 v12, v12, 12, 1
+; GFX1250-NEXT: v_bfe_u32 v22, v22, 5, 1
+; GFX1250-NEXT: s_clause 0x7
+; GFX1250-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:80
+; GFX1250-NEXT: global_store_b128 v1, v[4:7], s[0:1] offset:64
+; GFX1250-NEXT: global_store_b128 v1, v[8:11], s[0:1] offset:112
+; GFX1250-NEXT: global_store_b128 v1, v[12:15], s[0:1] offset:96
+; GFX1250-NEXT: global_store_b128 v1, v[16:19], s[0:1] offset:48
+; GFX1250-NEXT: global_store_b128 v1, v[20:23], s[0:1] offset:32
+; GFX1250-NEXT: global_store_b128 v1, v[24:27], s[0:1] offset:16
+; GFX1250-NEXT: global_store_b128 v1, v[28:31], s[0:1]
+; GFX1250-NEXT: s_endpgm
%load = load <16 x i1>, ptr addrspace(4) %in
%ext = zext <16 x i1> %load to <16 x i64>
store <16 x i64> %ext, ptr addrspace(1) %out
@@ -7818,71 +7595,64 @@ define amdgpu_kernel void @constant_sextload_v16i1_to_v16i64(ptr addrspace(1) %o
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v32, 0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_b16 v0, v32, s[2:3]
+; GFX12-TRUE16-NEXT: global_load_d16_b16 v1, v32, s[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s3, v0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v28, s3
-; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s3, 14
-; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s3, 15
-; GFX12-TRUE16-NEXT: s_lshr_b32 s8, s3, 13
-; GFX12-TRUE16-NEXT: s_lshr_b32 s10, s3, 10
-; GFX12-TRUE16-NEXT: s_lshr_b32 s12, s3, 11
-; GFX12-TRUE16-NEXT: s_lshr_b32 s6, s3, 12
-; GFX12-TRUE16-NEXT: s_lshr_b32 s14, s3, 8
-; GFX12-TRUE16-NEXT: s_lshr_b32 s16, s3, 9
-; GFX12-TRUE16-NEXT: s_lshr_b32 s18, s3, 6
-; GFX12-TRUE16-NEXT: s_lshr_b32 s20, s3, 7
-; GFX12-TRUE16-NEXT: s_lshr_b32 s22, s3, 4
-; GFX12-TRUE16-NEXT: s_lshr_b32 s24, s3, 5
-; GFX12-TRUE16-NEXT: s_lshr_b32 s26, s3, 2
-; GFX12-TRUE16-NEXT: s_lshr_b32 s28, s3, 3
-; GFX12-TRUE16-NEXT: s_lshr_b32 s30, s3, 1
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v3, s5
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v2, s4
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s8
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v8, s10
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v10, s12
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v13, s15
-; GFX12-TRUE16-NEXT: v_bfe_i32 v28, v28, 0, 1
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v7, s9
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v12, s14 :: v_dual_mov_b32 v15, s17
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v14, s16 :: v_dual_mov_b32 v17, s19
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v16, s18 :: v_dual_mov_b32 v19, s21
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v18, s20 :: v_dual_mov_b32 v21, s23
-; GFX12-TRUE16-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v20, s22 :: v_dual_mov_b32 v23, s25
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v22, s24 :: v_dual_mov_b32 v25, s27
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v24, s26 :: v_dual_mov_b32 v27, s29
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v26, s28 :: v_dual_mov_b32 v31, s31
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v30, s30
-; GFX12-TRUE16-NEXT: s_clause 0x1
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[0:3], s[0:1] offset:112
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[4:7], s[0:1] offset:96
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 14, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 15, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 12, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 13, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 10, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 11, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 9, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 6, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 7, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 4, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 1, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 3, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 2, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 5, v1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v30, v5, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v28, v3, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v26, v9, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v24, v7, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v22, v13, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v20, v11, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v18, v16, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v16, v15, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v14, v14, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v12, v12, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, v1, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v2, v2, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v6, v4, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v4, v10, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v10, v17, 0, 1
+; GFX12-TRUE16-NEXT: v_bfe_i32 v8, v8, 0, 1
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v31, 31, v30
; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v29, 31, v28
-; GFX12-TRUE16-NEXT: s_clause 0x5
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[8:11], s[0:1] offset:80
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[12:15], s[0:1] offset:64
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:48
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:32
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:16
-; GFX12-TRUE16-NEXT: global_store_b128 v32, v[28:31], s[0:1]
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v27, 31, v26
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v25, 31, v24
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v23, 31, v22
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v21, 31, v20
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v19, 31, v18
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v17, 31, v16
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v15, 31, v14
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v13, 31, v12
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v7, 31, v6
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v5, 31, v4
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v11, 31, v10
+; GFX12-TRUE16-NEXT: v_ashrrev_i32_e32 v9, 31, v8
+; GFX12-TRUE16-NEXT: s_clause 0x7
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[28:31], s[0:1] offset:112
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:96
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:80
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:64
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[12:15], s[0:1] offset:48
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[8:11], s[0:1] offset:32
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[4:7], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v32, v[0:3], s[0:1]
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: constant_sextload_v16i1_to_v16i64:
@@ -7957,77 +7727,131 @@ define amdgpu_kernel void @constant_sextload_v16i1_to_v16i64(ptr addrspace(1) %o
; GFX12-FAKE16-NEXT: global_store_b128 v32, v[28:31], s[0:1]
; GFX12-FAKE16-NEXT: s_endpgm
;
-; GFX1250-LABEL: constant_sextload_v16i1_to_v16i64:
-; GFX1250: ; %bb.0:
-; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-NEXT: v_nop
-; GFX1250-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX1250-NEXT: v_mov_b32_e32 v32, 0
-; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: global_load_u16 v0, v32, s[2:3] nv
-; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_readfirstlane_b32 s3, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_mov_b32_e32 v28, s3
-; GFX1250-NEXT: s_lshr_b32 s2, s3, 14
-; GFX1250-NEXT: s_lshr_b32 s4, s3, 15
-; GFX1250-NEXT: s_lshr_b32 s8, s3, 13
-; GFX1250-NEXT: s_lshr_b32 s10, s3, 10
-; GFX1250-NEXT: s_lshr_b32 s12, s3, 11
-; GFX1250-NEXT: s_lshr_b32 s6, s3, 12
-; GFX1250-NEXT: s_lshr_b32 s14, s3, 8
-; GFX1250-NEXT: s_lshr_b32 s16, s3, 9
-; GFX1250-NEXT: s_lshr_b32 s18, s3, 6
-; GFX1250-NEXT: s_lshr_b32 s20, s3, 7
-; GFX1250-NEXT: s_lshr_b32 s22, s3, 4
-; GFX1250-NEXT: s_lshr_b32 s24, s3, 5
-; GFX1250-NEXT: s_lshr_b32 s26, s3, 2
-; GFX1250-NEXT: s_lshr_b32 s28, s3, 3
-; GFX1250-NEXT: s_lshr_b32 s30, s3, 1
-; GFX1250-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
-; GFX1250-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
-; GFX1250-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
-; GFX1250-NEXT: v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v7, s9
-; GFX1250-NEXT: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11
-; GFX1250-NEXT: v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v11, s13
-; GFX1250-NEXT: v_mov_b32_e32 v12, s14
-; GFX1250-NEXT: v_bfe_i32 v28, v28, 0, 1
-; GFX1250-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
-; GFX1250-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s8
-; GFX1250-NEXT: v_dual_mov_b32 v13, s15 :: v_dual_mov_b32 v14, s16
-; GFX1250-NEXT: v_dual_mov_b32 v15, s17 :: v_dual_mov_b32 v16, s18
-; GFX1250-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
-; GFX1250-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
-; GFX1250-NEXT: v_dual_mov_b32 v17, s19 :: v_dual_mov_b32 v18, s20
-; GFX1250-NEXT: v_dual_mov_b32 v19, s21 :: v_dual_mov_b32 v20, s22
-; GFX1250-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
-; GFX1250-NEXT: v_dual_mov_b32 v21, s23 :: v_dual_mov_b32 v22, s24
-; GFX1250-NEXT: v_dual_mov_b32 v23, s25 :: v_dual_mov_b32 v24, s26
-; GFX1250-NEXT: v_dual_mov_b32 v25, s27 :: v_dual_mov_b32 v26, s28
-; GFX1250-NEXT: v_dual_mov_b32 v27, s29 :: v_dual_mov_b32 v30, s30
-; GFX1250-NEXT: v_dual_mov_b32 v31, s31 :: v_dual_ashrrev_i32 v29, 31, v28
-; GFX1250-NEXT: s_clause 0x7
-; GFX1250-NEXT: global_store_b128 v32, v[0:3], s[0:1] offset:112
-; GFX1250-NEXT: global_store_b128 v32, v[4:7], s[0:1] offset:96
-; GFX1250-NEXT: global_store_b128 v32, v[8:11], s[0:1] offset:80
-; GFX1250-NEXT: global_store_b128 v32, v[12:15], s[0:1] offset:64
-; GFX1250-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:48
-; GFX1250-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:32
-; GFX1250-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:16
-; GFX1250-NEXT: global_store_b128 v32, v[28:31], s[0:1]
-; GFX1250-NEXT: s_endpgm
+; GFX1250-TRUE16-LABEL: constant_sextload_v16i1_to_v16i64:
+; GFX1250-TRUE16: ; %bb.0:
+; GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-TRUE16-NEXT: v_nop
+; GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-TRUE16-NEXT: v_mov_b32_e32 v33, 0
+; GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1250-TRUE16-NEXT: global_load_u16 v2, v33, s[2:3] nv
+; GFX1250-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v28, 14, v2 :: v_dual_lshrrev_b32 v30, 15, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v8, 4, v2 :: v_dual_lshrrev_b32 v4, 1, v2
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v0, v2, 0, 1
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v6, 3, v2 :: v_dual_lshrrev_b32 v10, 2, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v32, 5, v2 :: v_dual_lshrrev_b32 v24, 12, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v26, 13, v2 :: v_dual_lshrrev_b32 v12, 6, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v14, 7, v2 :: v_dual_lshrrev_b32 v20, 10, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v22, 11, v2 :: v_dual_lshrrev_b32 v16, 8, v2
+; GFX1250-TRUE16-NEXT: v_dual_lshrrev_b32 v18, 9, v2 :: v_dual_ashrrev_i32 v1, 31, v0
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v2, v4, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v4, v10, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v10, v32, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v30, v30, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v28, v28, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v14, v14, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v26, v26, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v24, v24, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v18, v18, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v22, v22, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v20, v20, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v16, v16, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v12, v12, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v6, v6, 0, 1
+; GFX1250-TRUE16-NEXT: v_bfe_i32 v8, v8, 0, 1
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v11, 31, v10 :: v_dual_ashrrev_i32 v29, 31, v28
+; GFX1250-TRUE16-NEXT: v_ashrrev_i32_e32 v31, 31, v30
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v15, 31, v14 :: v_dual_ashrrev_i32 v25, 31, v24
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v27, 31, v26 :: v_dual_ashrrev_i32 v13, 31, v12
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v19, 31, v18 :: v_dual_ashrrev_i32 v21, 31, v20
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v23, 31, v22 :: v_dual_ashrrev_i32 v17, 31, v16
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v3, 31, v2 :: v_dual_ashrrev_i32 v5, 31, v4
+; GFX1250-TRUE16-NEXT: v_dual_ashrrev_i32 v7, 31, v6 :: v_dual_ashrrev_i32 v9, 31, v8
+; GFX1250-TRUE16-NEXT: s_clause 0x7
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[28:31], s[0:1] offset:112
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[24:27], s[0:1] offset:96
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[20:23], s[0:1] offset:80
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[16:19], s[0:1] offset:64
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[12:15], s[0:1] offset:48
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[8:11], s[0:1] offset:32
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[4:7], s[0:1] offset:16
+; GFX1250-TRUE16-NEXT: global_store_b128 v33, v[0:3], s[0:1]
+; GFX1250-TRUE16-NEXT: s_endpgm
+;
+; GFX1250-FAKE16-LABEL: constant_sextload_v16i1_to_v16i64:
+; GFX1250-FAKE16: ; %bb.0:
+; GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-FAKE16-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-FAKE16-NEXT: v_nop
+; GFX1250-FAKE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v32, 0
+; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1250-FAKE16-NEXT: global_load_u16 v0, v32, s[2:3] nv
+; GFX1250-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1250-FAKE16-NEXT: v_readfirstlane_b32 s3, v0
+; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v28, s3
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s2, s3, 14
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s4, s3, 15
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s8, s3, 13
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s10, s3, 10
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s12, s3, 11
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s6, s3, 12
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s14, s3, 8
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s16, s3, 9
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s18, s3, 6
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s20, s3, 7
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s22, s3, 4
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s24, s3, 5
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s26, s3, 2
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s28, s3, 3
+; GFX1250-FAKE16-NEXT: s_lshr_b32 s30, s3, 1
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v7, s9
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v11, s13
+; GFX1250-FAKE16-NEXT: v_mov_b32_e32 v12, s14
+; GFX1250-FAKE16-NEXT: v_bfe_i32 v28, v28, 0, 1
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v5, s7 :: v_dual_mov_b32 v6, s8
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v13, s15 :: v_dual_mov_b32 v14, s16
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v15, s17 :: v_dual_mov_b32 v16, s18
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v17, s19 :: v_dual_mov_b32 v18, s20
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v19, s21 :: v_dual_mov_b32 v20, s22
+; GFX1250-FAKE16-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v21, s23 :: v_dual_mov_b32 v22, s24
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v23, s25 :: v_dual_mov_b32 v24, s26
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v25, s27 :: v_dual_mov_b32 v26, s28
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v27, s29 :: v_dual_mov_b32 v30, s30
+; GFX1250-FAKE16-NEXT: v_dual_mov_b32 v31, s31 :: v_dual_ashrrev_i32 v29, 31, v28
+; GFX1250-FAKE16-NEXT: s_clause 0x7
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[0:3], s[0:1] offset:112
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[4:7], s[0:1] offset:96
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[8:11], s[0:1] offset:80
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[12:15], s[0:1] offset:64
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[16:19], s[0:1] offset:48
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[20:23], s[0:1] offset:32
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[24:27], s[0:1] offset:16
+; GFX1250-FAKE16-NEXT: global_store_b128 v32, v[28:31], s[0:1]
+; GFX1250-FAKE16-NEXT: s_endpgm
%load = load <16 x i1>, ptr addrspace(4) %in
%ext = sext <16 x i1> %load to <16 x i64>
store <16 x i64> %ext, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
index 1536ac5112e7b1..005f10193279f5 100644
--- a/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
@@ -6060,26 +6060,46 @@ define amdgpu_kernel void @constant_zextload_v4i16_to_v4i64(ptr addrspace(1) %ou
; EG-NEXT: ADD_INT * T8.X, PV.X, literal.x,
; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
;
-; GFX12-LABEL: constant_zextload_v4i16_to_v4i64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_and_b32 s4, 0xffff, s2
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
-; GFX12-NEXT: s_pack_hl_b32_b16 s2, s2, 0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, v1
-; GFX12-NEXT: s_pack_hl_b32_b16 s2, s3, 0
-; GFX12-NEXT: s_and_b32 s3, 0xffff, s3
-; GFX12-NEXT: global_store_b128 v1, v[0:3], s[0:1]
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_mov_b32_e32 v0, s3
-; GFX12-NEXT: v_mov_b32_e32 v2, s2
-; GFX12-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:16
-; GFX12-NEXT: s_endpgm
+; GFX12-TRUE16-LABEL: constant_zextload_v4i16_to_v4i64:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_and_b32 s4, 0xffff, s3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s4
+; GFX12-TRUE16-NEXT: s_pack_hl_b32_b16 s3, s3, 0
+; GFX12-TRUE16-NEXT: v_and_b32_e64 v0, 0xffff, s2
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v5, v3
+; GFX12-TRUE16-NEXT: s_pack_hl_b32_b16 s3, s2, 0
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, v3
+; GFX12-TRUE16-NEXT: global_store_b128 v3, v[2:5], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, s3
+; GFX12-TRUE16-NEXT: global_store_b128 v3, v[0:3], s[0:1]
+; GFX12-TRUE16-NEXT: s_endpgm
+;
+; GFX12-FAKE16-LABEL: constant_zextload_v4i16_to_v4i64:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_and_b32 s4, 0xffff, s2
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
+; GFX12-FAKE16-NEXT: s_pack_hl_b32_b16 s2, s2, 0
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, v1
+; GFX12-FAKE16-NEXT: s_pack_hl_b32_b16 s2, s3, 0
+; GFX12-FAKE16-NEXT: s_and_b32 s3, 0xffff, s3
+; GFX12-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1]
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, s2
+; GFX12-FAKE16-NEXT: global_store_b128 v1, v[0:3], s[0:1] offset:16
+; GFX12-FAKE16-NEXT: s_endpgm
%load = load <4 x i16>, ptr addrspace(4) %in
%ext = zext <4 x i16> %load to <4 x i64>
store <4 x i64> %ext, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
index dccc12ae2a03c0..ea08281541d193 100644
--- a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
@@ -10358,34 +10358,66 @@ define amdgpu_kernel void @constant_sextload_v8i8_to_v8i16(ptr addrspace(1) %out
; EG-NEXT: MOV * T12.X, T8.X,
; EG-NEXT: MOV * T12.Z, T4.X,
;
-; GFX12-LABEL: constant_sextload_v8i8_to_v8i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_lshr_b32 s4, s2, 16
-; GFX12-NEXT: s_lshr_b32 s5, s3, 16
-; GFX12-NEXT: s_ashr_i32 s6, s3, 24
-; GFX12-NEXT: s_bfe_i32 s7, s3, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s3, s3
-; GFX12-NEXT: s_ashr_i32 s8, s2, 24
-; GFX12-NEXT: s_bfe_i32 s9, s2, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s2, s2
-; GFX12-NEXT: s_bfe_i32 s5, s5, 0x80000
-; GFX12-NEXT: s_lshr_b32 s3, s3, 8
-; GFX12-NEXT: s_bfe_i32 s4, s4, 0x80000
-; GFX12-NEXT: s_lshr_b32 s2, s2, 8
-; GFX12-NEXT: s_pack_ll_b32_b16 s5, s5, s6
-; GFX12-NEXT: s_pack_ll_b32_b16 s3, s7, s3
-; GFX12-NEXT: s_pack_ll_b32_b16 s2, s9, s2
-; GFX12-NEXT: s_pack_ll_b32_b16 s4, s4, s8
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, s4
-; GFX12-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v3, s5
-; GFX12-NEXT: v_mov_b32_e32 v2, s3
-; GFX12-NEXT: global_store_b128 v4, v[0:3], s[0:1]
-; GFX12-NEXT: s_endpgm
+; GFX12-TRUE16-LABEL: constant_sextload_v8i8_to_v8i16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX12-TRUE16-NEXT: s_ashr_i32 s8, s2, 24
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, s2, 0, 8
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s2, s2
+; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX12-TRUE16-NEXT: s_ashr_i32 s6, s3, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s7, s3, 0x80000
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s3, s3
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v3, s2
+; GFX12-TRUE16-NEXT: s_bfe_i32 s5, s5, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s4, s4, 0x80000
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s4, s8
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s7, s3
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_mov_b32 v2, s3
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, s5
+; GFX12-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX12-TRUE16-NEXT: s_endpgm
+;
+; GFX12-FAKE16-LABEL: constant_sextload_v8i8_to_v8i16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
+; GFX12-FAKE16-NEXT: s_lshr_b32 s5, s3, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s6, s3, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s7, s3, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s3, s3
+; GFX12-FAKE16-NEXT: s_ashr_i32 s8, s2, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s9, s2, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s2, s2
+; GFX12-FAKE16-NEXT: s_bfe_i32 s5, s5, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s4, s4, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s7, s3
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s9, s2
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s8
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, s4
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v3, s5
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, s3
+; GFX12-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX12-FAKE16-NEXT: s_endpgm
%load = load <8 x i8>, ptr addrspace(4) %in
%ext = sext <8 x i8> %load to <8 x i16>
store <8 x i16> %ext, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/mad.u16.ll b/llvm/test/CodeGen/AMDGPU/mad.u16.ll
index 5c585f577cbece..692c663e0a4117 100644
--- a/llvm/test/CodeGen/AMDGPU/mad.u16.ll
+++ b/llvm/test/CodeGen/AMDGPU/mad.u16.ll
@@ -260,12 +260,23 @@ define amdgpu_ps i16 @s_mad_u16(i16 inreg %arg0, i16 inreg %arg1, i16 inreg %arg
; GFX10-NEXT: s_add_i32 s0, s0, s2
; GFX10-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_mad_u16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_mul_i32 s0, s0, s1
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_add_i32 s0, s0, s2
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_mad_u16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_lo_u32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_mad_u16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_mul_i32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, s2
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%mul = mul i16 %arg0, %arg1
%add = add i16 %mul, %arg2
ret i16 %add
@@ -293,13 +304,25 @@ define amdgpu_ps i32 @s_mad_u16_zext(i16 inreg %arg0, i16 inreg %arg1, i16 inreg
; GFX10-NEXT: s_and_b32 s0, s0, 0xffff
; GFX10-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_mad_u16_zext:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_mul_i32 s0, s0, s1
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_add_i32 s0, s0, s2
-; GFX11-NEXT: s_and_b32 s0, s0, 0xffff
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_mad_u16_zext:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_lo_u32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_mad_u16_zext:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_mul_i32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, s2
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%mul = mul i16 %arg0, %arg1
%add = add i16 %mul, %arg2
%zext = zext i16 %add to i32
@@ -331,14 +354,27 @@ define amdgpu_ps i64 @s_mad_u16_zext64(i16 inreg %arg0, i16 inreg %arg1, i16 inr
; GFX10-NEXT: s_and_b32 s0, s0, 0xffff
; GFX10-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_mad_u16_zext64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_mul_i32 s0, s0, s1
-; GFX11-NEXT: s_mov_b32 s1, 0
-; GFX11-NEXT: s_add_i32 s0, s0, s2
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s0, s0, 0xffff
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_mad_u16_zext64:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_lo_u32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_mad_u16_zext64:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_mul_i32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_mov_b32 s1, 0
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, s2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%mul = mul i16 %arg0, %arg1
%add = add i16 %mul, %arg2
%zext = zext i16 %add to i64
@@ -367,13 +403,25 @@ define amdgpu_ps i32 @s_mad_u16_sext(i16 inreg %arg0, i16 inreg %arg1, i16 inreg
; GFX10-NEXT: s_sext_i32_i16 s0, s0
; GFX10-NEXT: ; return to shader part epilog
;
-; GFX11-LABEL: s_mad_u16_sext:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_mul_i32 s0, s0, s1
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_add_i32 s0, s0, s2
-; GFX11-NEXT: s_sext_i32_i16 s0, s0
-; GFX11-NEXT: ; return to shader part epilog
+; GFX11-TRUE16-LABEL: s_mad_u16_sext:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mul_lo_u32 v0, v0, v1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
+; GFX11-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX11-FAKE16-LABEL: s_mad_u16_sext:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_mul_i32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, s2
+; GFX11-FAKE16-NEXT: s_sext_i32_i16 s0, s0
+; GFX11-FAKE16-NEXT: ; return to shader part epilog
%mul = mul i16 %arg0, %arg1
%add = add i16 %mul, %arg2
%sext = sext i16 %add to i32
@@ -383,3 +431,4 @@ define amdgpu_ps i32 @s_mad_u16_sext(i16 inreg %arg0, i16 inreg %arg1, i16 inreg
declare i32 @llvm.amdgcn.workitem.id.x()
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GCN: {{.*}}
+; GFX11: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll b/llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
index bd2fa2a024fa66..f860c5731ee6d6 100644
--- a/llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
@@ -116,21 +116,17 @@ define bfloat @v_maximumnum_bf16(bfloat %x, bfloat %y) #1 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -176,19 +172,15 @@ define bfloat @v_maximumnum_bf16(bfloat %x, bfloat %y) #1 {
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -304,12 +296,10 @@ define bfloat @v_maximumnum_bf16_nnan(bfloat %x, bfloat %y) #1 {
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v2
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v2
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -343,9 +333,8 @@ define bfloat @v_maximumnum_bf16_nnan(bfloat %x, bfloat %y) #1 {
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v2
; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -570,17 +559,11 @@ define <2 x bfloat> @v_maximumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v7
@@ -589,11 +572,8 @@ define <2 x bfloat> @v_maximumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v2.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -671,17 +651,11 @@ define <2 x bfloat> @v_maximumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v6
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v7
@@ -692,11 +666,8 @@ define <2 x bfloat> @v_maximumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v2.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -897,12 +868,9 @@ define <2 x bfloat> @v_maximumnum_v2bf16_nnan(<2 x bfloat> %x, <2 x bfloat> %y)
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v4
@@ -963,12 +931,9 @@ define <2 x bfloat> @v_maximumnum_v2bf16_nnan(<2 x bfloat> %x, <2 x bfloat> %y)
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v4
@@ -1271,58 +1236,48 @@ define <3 x bfloat> @v_maximumnum_v3bf16(<3 x bfloat> %x, <3 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v9, v8
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v10, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v6.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
@@ -1400,64 +1355,54 @@ define <3 x bfloat> @v_maximumnum_v3bf16(<3 x bfloat> %x, <3 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v7
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v9, v8
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v10
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v10, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v6.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX12-TRUE16-NEXT: s_and_b32 s0, s3, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1711,35 +1656,31 @@ define <3 x bfloat> @v_maximumnum_v3bf16_nnan(<3 x bfloat> %x, <3 x bfloat> %y)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v7, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v9, v8
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, s1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s4, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1794,29 +1735,24 @@ define <3 x bfloat> @v_maximumnum_v3bf16_nnan(<3 x bfloat> %x, <3 x bfloat> %y)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v7, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v9, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v4.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1824,7 +1760,7 @@ define <3 x bfloat> @v_maximumnum_v3bf16_nnan(<3 x bfloat> %x, <3 x bfloat> %y)
; GFX12-TRUE16-NEXT: s_and_b32 s1, s3, s1
; GFX12-TRUE16-NEXT: s_and_b32 s0, s4, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -2208,74 +2144,61 @@ define <4 x bfloat> @v_maximumnum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v11, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v0.l
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v13, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
@@ -2375,85 +2298,75 @@ define <4 x bfloat> @v_maximumnum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v11, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v9
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v0.l
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v13, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s4
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -2781,43 +2694,39 @@ define <4 x bfloat> @v_maximumnum_v4bf16_nnan(<4 x bfloat> %x, <4 x bfloat> %y)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v7.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v9, v8
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v10, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v12, v11
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v7.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s0, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v4.l, v6.l, s5
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v7.l, v6.l, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX11-TRUE16-NEXT: s_and_b32 s2, s3, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v7.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_maximumnum_v4bf16_nnan:
@@ -2887,48 +2796,44 @@ define <4 x bfloat> @v_maximumnum_v4bf16_nnan(<4 x bfloat> %x, <4 x bfloat> %y)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v4
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v7.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v9, v8
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v10, v5
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v4
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v12, v11
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v6.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v4.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v7.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
+; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
-; GFX12-TRUE16-NEXT: s_and_b32 s5, s0, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v4.l, v6.l, s5
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v7.l, v6.l, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX12-TRUE16-NEXT: s_and_b32 s2, s3, s4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_maximumnum_v4bf16_nnan:
@@ -3478,111 +3383,93 @@ define <6 x bfloat> @v_maximumnum_v6bf16(<6 x bfloat> %x, <6 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v7.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v8
; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v15, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v12.l, v11.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v14.l, v13.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v6.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v14.l, v13.l, s1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v11.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v13.l, v9.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v18, v19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v18, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v9.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v8.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v22, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v17, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v21, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, s5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, s1
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v15, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v6.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v12, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v1.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v11.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v8.l, s3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v14, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v16, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v6, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v12
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v14, v16
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, s2
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v8.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v17, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v18, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v13.l, v12.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v9.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v14, v13
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v16, v15
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v12.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s2, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v3
+; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s3
; GFX11-TRUE16-NEXT: s_and_b32 s6, s0, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v2.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v7
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v10
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v11
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v0.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v1.l
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v8.l, s5
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v6.l, v9.l, s6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v6.l, v9.l, s5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v12.l, s6
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s4
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, v0.l, s2
@@ -3719,124 +3606,106 @@ define <6 x bfloat> @v_maximumnum_v6bf16(<6 x bfloat> %x, <6 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v7.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v3
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v19.l, v7.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v15, v15
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v8
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v12.l, v11.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v14.l, v13.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v6.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v14.l, v13.l, s1
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v11.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v13.l, v9.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v18, v19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v11.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v22, v22
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v17, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v10.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v18, v19
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v9.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v8.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v13
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v21, v21
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, s5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, s1
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v15, v16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v6, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v12
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v14, v16
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v13
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, s2
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v6.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s4
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v12, v14
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v1.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v8.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v17, v17
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v11.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v4.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v8.l, s3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v14, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v16, v15
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v18, v19
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v13.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v9.l
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v14, v13
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v16, v15
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v12.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v9.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: s_and_b32 s5, s2, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v3
+; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s3
; GFX12-TRUE16-NEXT: s_and_b32 s6, s0, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v2.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v7
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v10
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v11
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v0.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v1.l
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v8.l, s5
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v6.l, v9.l, s6
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v6.l, v9.l, s5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v12.l, s6
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, s3
; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4623,163 +4492,138 @@ define <8 x bfloat> @v_maximumnum_v8bf16(<8 x bfloat> %x, <8 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v6
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v10.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v8.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v11.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v9.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v11.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v16.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v13, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v12.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v16.l, v12.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v15, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v18, v18
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v9.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v10.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v19, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v15.l, v12.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v12.l, v14.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v11.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v14, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v16.l, v15.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v13.l
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s1, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v14.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v14.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, s4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v15.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v12, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v15, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v14.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v13.l
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.h, v9.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v12.l, s3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v19
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v12.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v11.l, v10.l, s3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v16, v17
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v9.l, v8.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v13.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v14.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v2.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v14.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v12.l, v8.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v7
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v3.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v10.l, v13.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v7.l, v17.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v15, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v6.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v15, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v11.l, v14.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v13, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v7.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v3.l, v17.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v13, v12
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v16, v15
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v2.l, v9.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v5.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX11-TRUE16-NEXT: s_and_b32 s7, s2, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v10
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v15, v14
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s2
+; GFX11-TRUE16-NEXT: s_and_b32 s7, s0, s3
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v9.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v4
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v17.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0, v1.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v2.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v11
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0, v0.l
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, s6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v9.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v1.l, s3
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, s6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v8.l, s7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v9.l, v17.l, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX11-TRUE16-NEXT: s_and_b32 s2, s4, s5
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v14.l, s7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v6.l, v3.l, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, v2 :: v_dual_mov_b32 v2, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v8
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_maximumnum_v8bf16:
@@ -4939,184 +4783,160 @@ define <8 x bfloat> @v_maximumnum_v8bf16(<8 x bfloat> %x, <8 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v3
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v1
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v5
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v10.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v8.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v11.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v10.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v9.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v11.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v10.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v16.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v13, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v12.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v5
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v10.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v19, v19
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v16.l, v12.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v15.l, v12.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v15, v17
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v18, v18
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v13.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v9.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v14
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v12.l, v14.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v8.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v11.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v14, v15
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v12, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v4
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v15, v17
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v18
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v14
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v16.l, v15.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v13.l
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s1, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v14.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v14.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v14.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v13.l
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.h, v9.l, v8.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v12.l, s3
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s3, s4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v19.l, v15.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v14.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v7.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v19
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v12.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v12.l, v8.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v17
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s0, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v3.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.h, v11.l, v10.l, s3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v16, v17
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.h, v9.l, v8.l, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v3.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v13.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v10.l, v13.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v14.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v7.l, v17.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v15, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v2.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v6.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v15, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.h, v11.l, v14.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v8.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v4
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v13, v13
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v17
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v7.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v3.l, v17.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v13, v12
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v16, v15
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v2.l, v9.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v6.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v10
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v15, v14
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v8.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v5.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v14.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX12-TRUE16-NEXT: s_and_b32 s7, s2, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s2
+; GFX12-TRUE16-NEXT: s_and_b32 s7, s0, s3
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v9.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v4
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v17.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0, v1.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v2.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v11
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0, v0.l
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_and_b32 s3, s3, s6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v9.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v1.l, s3
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v8.l, s7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v9.l, v17.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX12-TRUE16-NEXT: s_and_b32 s2, s4, s5
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v14.l, s7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v6.l, v3.l, s0
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, v2 :: v_dual_mov_b32 v2, v7
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v8
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_maximumnum_v8bf16:
@@ -6532,327 +6352,276 @@ define <16 x bfloat> @v_maximumnum_v16bf16(<16 x bfloat> %x, <16 x bfloat> %y) #
; GFX11-TRUE16-LABEL: v_maximumnum_v16bf16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, v7 :: v_dual_mov_b32 v17, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v9
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v7.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v7.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v7
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v21, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v19
; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v18.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v20, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v18.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v19.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v21, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v23.l, v20.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v23.l, v22.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v25, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v22.l, v20.l, vcc_lo
; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v20.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v21.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v21.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s1, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v19.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v17.l, s3
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v26.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v28
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v24, v25
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v22.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v23.l, v26.l, v22.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v27
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v20.l, s1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v23.l
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v21.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v19.l, v18.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v27, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v11
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v24, v25
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v24, v25
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v23.l, v22.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v19.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v26, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v19.l, v7.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v24.l, v23.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v20.l, v21.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v22.l, v23.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.h, v18.l, v19.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v18
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v21.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v19, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v24.l, v20.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v23.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v19.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v19.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v20
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s0, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v23.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v20.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v26, v27
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v19
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v18.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v24.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v25, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v30
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v31
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v22.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v25.l, v28.l, v24.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v26
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v27, v29
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v25.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v18.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v26, v27
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.h, v21.l, v20.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.h, v6.l, v22.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v26, v27
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v23.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.h, v7.l, v21.l, s3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v24
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v19
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
; GFX11-TRUE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v25.l, v24.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v20
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v21, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v6.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v26, v27
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s0, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v22.l
; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v8
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v20
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v19.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v22.l, v21.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.h, v18.l, v7.l, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v26
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v21.l, v20.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.h, v23.l, v19.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v24.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v28.l, s3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.h, v17.l, v23.l, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.h, v20.l, v18.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v28.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v24.l, v21.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v19.l, v22.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v21.l, v17.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v6.l, v24.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v7.l, v28.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v22, v23
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v16.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v17.l, v14.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v14.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v20.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v18.l, v17.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v13
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v22, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v15.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v20.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v22, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v21, v23
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v7
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
; GFX11-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v14.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v7.l, v20.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v22, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v15.l, v17.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v13.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v13
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v4.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v14.l, v6.l, s3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v21
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v21
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v17, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v21
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v5.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v14.l, v6.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v21, v16
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v10.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v12.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v9.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v13, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v10.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v13, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v17, v14
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v22, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v5.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v11.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v12.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v12, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v14, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v21, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v5.l, v2.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v8.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v12.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v6
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v3.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v8
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v2.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v13
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v14
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v13
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v0.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v1.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX11-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX11-TRUE16-NEXT: s_and_b32 s4, s5, s8
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v9.l, v1.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v12.l, v2.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.l, v11.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v15
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v11.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v9.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v15 :: v_dual_mov_b32 v3, v20
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, v16 :: v_dual_mov_b32 v4, v19
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v19 :: v_dual_mov_b32 v5, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, v17
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_maximumnum_v16bf16:
@@ -7178,372 +6947,320 @@ define <16 x bfloat> @v_maximumnum_v16bf16(<16 x bfloat> %x, <16 x bfloat> %y) #
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v16, v7 :: v_dual_mov_b32 v17, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v16, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v15
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v6
; GFX12-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v14
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v13
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
; GFX12-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v12
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v7.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v6.l
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v6.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v7.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v18.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v17.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v20, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v20.l, v18.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v19.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v5
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v21, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v19
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v13
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v23.l, v22.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v25, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v21, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v22.l, v20.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v23.l, v20.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX12-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v24.l, v20.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v25.l, v21.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v21.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v28.l, v19.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; GFX12-TRUE16-NEXT: s_and_b32 s3, s1, s2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v19.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v17.l, s3
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v26.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v26.l, v22.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v24, v25
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v28
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v24, v25
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v24.l, v22.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v20.l, v21.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v26.l, v22.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v27
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v20.l, s1
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v25.l, v23.l
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v26.l, v21.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v22.l, v23.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.h, v19.l, v18.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v27, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v26
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.h, v18.l, v19.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v24, v25
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v11
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v18
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v18
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v21.l
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v19, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v23.l, v22.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v19.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v24.l, v20.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v26, v26
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v10
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v27.l, v7.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v10
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v18
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v19.l, v7.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v26.l, v6.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v24.l, v23.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v23.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v19.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v27
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v27.l, v18.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v30.l, v19.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v20
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v17
+; GFX12-TRUE16-NEXT: s_and_b32 s3, s0, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v31.l, v23.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v20.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v26, v27
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v19
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v18.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v24.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v25, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v30
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v31
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v22.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v25.l, v28.l, v24.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v26
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v7.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v27, v29
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v26.l, v24.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v27.l, v25.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v28.l, v18.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v26, v27
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s1, s2
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v29.l, v23.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v26, v27
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v23.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.h, v21.l, v20.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.h, v6.l, v22.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v29
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.h, v7.l, v21.l, s3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v24
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v19
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
; GFX12-TRUE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v25.l, v24.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v28
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v20
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v21, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v20.l, v6.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v26, v27
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s0, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v22.l
; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v8
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v20
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v19.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v22.l, v21.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v28.l, s3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.h, v18.l, v7.l, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v26
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.h, v17.l, v23.l, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.h, v20.l, v18.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v28.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v21.l, v20.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v24.l, v21.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v15
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.h, v23.l, v19.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v20.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v19.l, v22.l, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v24.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v21.l, v17.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v6
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.h, v7.l, v28.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v6.l, v24.l, s0
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v22, v23
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v15.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v16.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v17.l, v14.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v14.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v20.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v18.l, v17.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v13
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v22, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v14.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v6.l
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v21, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v14
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v15.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v20.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v22, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v13.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v5.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v17.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
; GFX12-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v16.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v14.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.h, v7.l, v20.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v22, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.h, v15.l, v17.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v13.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v3
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v13
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v12.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v4.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.l
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v11
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v21
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v5.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v14.l, v6.l, s3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v17, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v14.l, v6.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v21, v16
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v3.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v10.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v8
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s1
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v11
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v9.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v12.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v13, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v10.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v13, v12
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v16, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v12, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v17, v14
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v22, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v14, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v21, v16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v5.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v11.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v5.l, v2.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v8.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v12.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v6
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v3.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v8
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v2.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v13
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v14
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v13
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v0.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v1.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX12-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX12-TRUE16-NEXT: s_and_b32 s4, s5, s8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v9.l, v1.l, s4
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v12.l, v2.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.l, v11.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, s4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v11.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v9.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v15
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v20 :: v_dual_mov_b32 v3, v16
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v6
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v15 :: v_dual_mov_b32 v3, v20
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v19 :: v_dual_mov_b32 v5, v18
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v17
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_maximumnum_v16bf16:
@@ -10369,633 +10086,534 @@ define <32 x bfloat> @v_maximumnum_v32bf16(<32 x bfloat> %x, <32 x bfloat> %y) #
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v15
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v35, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v38, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v53, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v28
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v35, v35
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v38, v38
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v49, v49
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v30
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v48, v48
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v51, v51
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v34, v34
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v35, v35
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v36.l, v33.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v39.l, v65.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v50.l, v66.l, s4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v50, 0xffff0000, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v28
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v66, 0xffff0000, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v98, 0xffff0000, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v37, v37
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v52, v52
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v55, v55
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v49, v49
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v51, v51
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v53, v53
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
; GFX11-TRUE16-NEXT: v_and_b32_e32 v70, 0xffff0000, v9
; GFX11-TRUE16-NEXT: v_and_b32_e32 v86, 0xffff0000, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v22
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v101, 0xffff0000, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v50, v50
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v52, v52
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v54, v54
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v66, v66
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v11
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s16, v98, v98
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v37, v37
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v38, v38
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.l, v53.l, v67.l, s6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v64.l, v68.l, s8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v53.l, v128.l, v119.l, s22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v64.l, v148.l, v147.l, s28
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.l, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v66.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v35.l, v33.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.l, v37.l, v34.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.l, v39.l, v36.l, s4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v25
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v55, v55
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v55, 16, v12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v27
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s10, v70, v70
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s14, v86, v86
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s17, v101, v101
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v50.l, v100.l, v99.l, s16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v86.l, v147.l, v64.l, s29
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v129
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.l, v80.l, v71.l, s10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v80.l, v99.l, v50.l, s17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v64.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s16, v97, v128
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v86.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s17, v98, v129
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s44, v54, v54
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s47, v66, v66
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v54.l, v100.l, v99.l, s16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v66.l, v132.l, v131.l, s24
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s5
; GFX11-TRUE16-NEXT: v_and_b32_e32 v82, 0xffff0000, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v49, v49
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v51, v51
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s43, v53, v53
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s45, v55, v55
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s56, v69, v69
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v51.l, v80.l, v71.l, s10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v53.l, v96.l, v87.l, s14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v55.l, v112.l, v103.l, s18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.l, v48.l, v147.l, s28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v35
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v39
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v98.l, v99.l, v54.l, s17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v114.l, v131.l, v66.l, s25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v34
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s17
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v8
; GFX11-TRUE16-NEXT: v_and_b32_e32 v85, 0xffff0000, v24
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s29, v117, v97
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v66.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s12, v82, v82
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v36.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v97
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.l, v84.l, v83.l, s12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s1
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s17, s2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v20
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v30
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s12, v82, v82
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v53.l, s15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v54
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v100.l, v103.l, v55.l, s19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v118.l, v147.l, v48.l, s29
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v98
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s17, v69, v130
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s18, v80, v131
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s19, v81, v132
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v65, 0xffff0000, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v17
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v54, v54
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s26, v134, v134
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.l, v96.l, v87.l, s14
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v54.l, v132.l, v131.l, s24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v34.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v70.l, v83.l, v48.l, s13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v119.l, v53.l, s23
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v33.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.h, v66.l, v36.l, s2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v52, v52
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.l, v64.l, v38.l, s6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v52.l, v84.l, v83.l, s12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v64.l, v116.l, v115.l, s20
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s27, v145, v145
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v52.l, v116.l, v115.l, s20
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v55.l, v144.l, v135.l, s26
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v84.l, v131.l, v54.l, s25
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v39.l, s11
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v87.l, v49.l, s15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.l, v50.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v82.l, v115.l, v52.l, s21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v54.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v85.l, v135.l, v55.l, s27
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v135.l, v80.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s15, v96, v119
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v84.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v100.l, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v67.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v135
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s23, v87, v135
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s27, v115, v96
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.l, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v65.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v51.l, v112.l, v103.l, s18
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s18, v100, v130
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.l, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.l, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s18
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v101.l, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v68.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v132
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s15, 0, v87
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s16, 0, v96
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.l, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.l, v48.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v81.l, v103.l, v51.l, s19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v131
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s20, v102, v132
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v99.l, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v133
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s19, v101, v131
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.l, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v82.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v69.l, v69.l, v39.l, s20
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v98
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v144
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s21, v112, v133
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v145
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v100.l, v69.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v34.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s24, v99, v144
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v70.l, v70.l, v48.l, s21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v99.l, v68.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v71.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s25, v103, v145
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v101.l, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s15, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.l, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v134
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v80.l, v80.l, v50.l, s23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v81.l, v81.l, v51.l, s24
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v82.l, v82.l, v52.l, s25
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v100
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s16, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v34.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v149, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v65.l, v35.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v38.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v99
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v146
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s22, v113, v134
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.l, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.l, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v82.l
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s20, s5
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v30.l, s41
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.h, v69.l, v39.l, s5
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0, v48.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v101
-; GFX11-TRUE16-NEXT: s_and_b32 s4, s19, s4
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s26, v114, v146
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v86.l, v86.l, v64.l, s29
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v53
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v48
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v87
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v118
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s25, v97, v146
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v65, v65
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v28
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v50, v50
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v50.l, v68.l, v67.l, s8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v68.l, v144.l, v135.l, s26
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v51.l, s11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v52.l, s13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v102.l, v115.l, v64.l, s21
; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s42
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s21, s6
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v50.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0, v51.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0, v52.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v53.l, s26
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v86.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v103
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v112
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v113
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.h, v70.l, v48.l, s6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s23, s8
-; GFX11-TRUE16-NEXT: s_and_b32 s9, s24, s9
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s25, s10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v117
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v85.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v114
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v84.l, v84.l, v54.l, s27
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX11-TRUE16-NEXT: s_and_b32 s11, s26, s11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v84.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0, v55.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v37.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s28, v116, v119
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v49.l, s22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v49.l
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s18, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v85.l, v85.l, v55.l, s28
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.h, v67.l, v37.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v115
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.l, v71.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v85.l
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s27, s12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v102
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v116
-; GFX11-TRUE16-NEXT: s_and_b32 s7, s22, s7
-; GFX11-TRUE16-NEXT: s_and_b32 s13, s28, s13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.h, v85.l, v55.l, s13
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s24, v96, v145
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s42, v117, v81
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v81.l, v98.l, v54.l, s25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v34
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v36
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s46, v65, v65
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v65.l, v128.l, v119.l, s22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v85, 16, v51
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v86, 16, v52
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v64
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v116.l, v135.l, v68.l, s27
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v71
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v83
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v102
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v35.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v96
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v97
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v98
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v112.l, v119.l, v65.l, s23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v66
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v114
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s22, v85, v135
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s23, v86, v144
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s27, v101, v69
+; GFX11-TRUE16-NEXT: s_and_b32 s17, s17, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v37.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v39.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s7
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s29, v113, v80
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v51.l, s22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v83.l, v52.l, s23
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v102.l, v64.l, s27
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, s43
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s45
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v35.l, s17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v49
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v38
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v85.l, v114.l, v66.l, s29
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v83
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s18, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s19, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v34.l, v37.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.h, v36.l, v39.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s9
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0, v64.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s20, v82, v133
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v114
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v84, 16, v50
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v55
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v67
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v147, 16, v100
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s20
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s27, s10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s21, v84, v134
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s26, v99, v147
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v71
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s21
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v99
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v70, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s46
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0, v52.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v65
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v112
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v80.l, v87.l, v53.l, s24
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v102
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, s47
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s44, v128, v82
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v82.l, v100.l, v55.l, s26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v67
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s20, s3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v28
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.h, v38.l, v49.l, s3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s28, v103, v130
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v80
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s23, s6
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v50.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s56
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v100
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.h, v71.l, v52.l, s6
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v53.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v103
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v30
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s21, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.h, v67.l, v50.l, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s7, s24, s7
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s43, v119, v132
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.h, v80.l, v53.l, s7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v29
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s16, 0, v13.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s15, 0, v14.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s43
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v68
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s44, 0, v128
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v116
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v84.l, v112.l, v65.l, s28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v30
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v69
+; GFX11-TRUE16-NEXT: s_and_b32 s16, s44, s16
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s41, v115, v131
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s16
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s43, 0, v119
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v81
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v87.l, v118.l, v48.l, s42
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v86.l, v116.l, v68.l, s41
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0, v51.l
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s43, s15
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v54.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s15
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v101
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v112
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v82
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v84
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v85
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v86
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v87
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s22, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s25, s8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0, v55.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0, v65.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0, v66.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0, v68.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0, v48.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v113
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v115
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v116
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s41, 0, v117
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s42, 0, v118
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.h, v69.l, v51.l, s5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.h, v81.l, v54.l, s8
+; GFX11-TRUE16-NEXT: s_and_b32 s9, s26, s9
+; GFX11-TRUE16-NEXT: s_and_b32 s11, s28, s11
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s29, s12
+; GFX11-TRUE16-NEXT: s_and_b32 s13, s41, s13
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s42, s14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.h, v82.l, v55.l, s9
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v31
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v96, 0xffff0000, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v31
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v31
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v31
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v31.l, s40
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.h, v68.l, v38.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v87.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v96, v96
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v32.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v32.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v98, v98
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v34
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.h, v71.l, v49.l, s7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v87.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v31.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v96, v97
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v35
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.h, v80.l, v50.l, s8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v87.l, v32.l, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v36, v39
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v96.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v97, v97
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v98, v98
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v32
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v96.l, v32.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.h, v84.l, v65.l, s11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v31
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.h, v83.l, v64.l, s10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v35, v37
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v34, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v27
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v32.l, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v15.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v32.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.h, v81.l, v51.l, s9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v118
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v33.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v149, v149
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.h, v83.l, v53.l, s11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v38
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.h, v82.l, v52.l, s10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v31.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v29
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v48
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.h, v84.l, v54.l, s12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v33
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v31
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.h, v85.l, v66.l, s12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v34
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v35
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.h, v86.l, v68.l, s13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.h, v87.l, v48.l, s14
; GFX11-TRUE16-NEXT: s_and_b32 s0, s1, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s29, s14
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v70, v70
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v33.l, v32.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v51, v128
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.h, v86.l, v64.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v50
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v51, v51
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v30.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v51
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v53
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v31.l, v15.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v50
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v14.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v52, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v12.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v11
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v29.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v51, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v129, v133
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v11
; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v26
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v53
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v11.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v25
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.l, v26.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v54
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v55
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v37, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v26
; GFX11-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s1
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v53, v50
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v54, v52
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v9.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v12.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v39, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v11.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v27.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v26.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.l, v28.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v51, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v25.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v11.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v10.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v50, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v12.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v28
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v27.l, v11.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v26.l, v10.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v24.l, v8.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v23
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v28, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v39, v38
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v28.l, v12.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v10.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v27.l, v11.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v25
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v7
+; GFX11-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v8.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v39, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v23
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v26.l, v10.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v23.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v12.l, v9.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v25.l, v9.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v23.l, v7.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v22
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v25, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v38, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v9
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v22.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v10.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v22.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v9.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v23, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v21.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v25, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v23, v26
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v25, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v8.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v24
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v26, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v5
; GFX11-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v10.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v9.l, v8.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v26, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v24.l, v8.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v11.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v12.l, v5.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v20
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v9.l, v7.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v23, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v20
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v21
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v11
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v19.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v10.l, v6.l, s3
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v7.l, v5.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v10, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v18
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v9, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v5.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v22.l, v6.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v9, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v21.l, v5.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v18.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v5, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v18.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v19
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v20, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v17.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v16.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v16, v12
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v18, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v8.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v16
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v18.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v17.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v7, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v16.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v19.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v18, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v8
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v21, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v6
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v3.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v17
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v2.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v11
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v16
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v18
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v0.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v1.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX11-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX11-TRUE16-NEXT: s_and_b32 s4, s5, s8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v8.l, v0.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.l, v7.l, v1.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.l, v5.l, v2.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.l, v9.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v6.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v5.l, v0.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v9.l, v1.l, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v6.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v7.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v8.l, v4.l, s2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, v49 :: v_dual_mov_b32 v2, v48
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, v39 :: v_dual_mov_b32 v4, v38
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v36 :: v_dual_mov_b32 v6, v35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v34 :: v_dual_mov_b32 v8, v33
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, v32 :: v_dual_mov_b32 v10, v31
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v30 :: v_dual_mov_b32 v12, v37
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v35 :: v_dual_mov_b32 v1, v34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v33 :: v_dual_mov_b32 v3, v32
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v31 :: v_dual_mov_b32 v5, v30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v29 :: v_dual_mov_b32 v7, v28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, v27 :: v_dual_mov_b32 v9, v36
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_maximumnum_v32bf16:
@@ -11574,697 +11192,589 @@ define <32 x bfloat> @v_maximumnum_v32bf16(<32 x bfloat> %x, <32 x bfloat> %y) #
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v15
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v35, 0xffff0000, v14
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v38, 0xffff0000, v13
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v12
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v14
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v13
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v53, 0xffff0000, v12
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v14
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v29
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v29
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v28
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v28
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v35, v35
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v15
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v38, v38
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v49, v49
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v30
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v11
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v10
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v48, v48
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v51, v51
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v34, v34
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v35, v35
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v36.l, v33.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v39.l, v65.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v50.l, v66.l, s4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v27
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v11
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v26
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v10
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v14
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v50, 0xffff0000, v30
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v29
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v29
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v28
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v28
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v66, 0xffff0000, v10
; GFX12-TRUE16-NEXT: v_and_b32_e32 v98, 0xffff0000, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v37, v37
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v52, v52
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v55, v55
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v49, v49
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v51, v51
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v53, v53
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v15
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v11
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
; GFX12-TRUE16-NEXT: v_and_b32_e32 v70, 0xffff0000, v9
; GFX12-TRUE16-NEXT: v_and_b32_e32 v86, 0xffff0000, v7
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v22
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v6
; GFX12-TRUE16-NEXT: v_and_b32_e32 v101, 0xffff0000, v22
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v50, v50
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v52, v52
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v54, v54
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v66, v66
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v11
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s16, v98, v98
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v37, v37
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v38, v38
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.l, v53.l, v67.l, s6
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v64.l, v68.l, s8
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v53.l, v128.l, v119.l, s22
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v64.l, v148.l, v147.l, s28
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v35.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v98.l, v36.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v128.l, v65.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v129.l, v66.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v35.l, v33.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.l, v37.l, v34.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.l, v39.l, v36.l, s4
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v25
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v9
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v14
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v13
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v55, v55
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v55, 16, v12
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v27
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s10, v70, v70
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s14, v86, v86
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s17, v101, v101
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v50.l, v100.l, v99.l, s16
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v86.l, v147.l, v64.l, s29
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v129
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.l, v80.l, v71.l, s10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v80.l, v99.l, v50.l, s17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v117.l, v64.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s16, v97, v128
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v86.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s17, v98, v129
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s44, v54, v54
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s47, v66, v66
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v54.l, v100.l, v99.l, s16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v66.l, v132.l, v131.l, s24
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s5
; GFX12-TRUE16-NEXT: v_and_b32_e32 v82, 0xffff0000, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v49, v49
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v51, v51
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s43, v53, v53
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s45, v55, v55
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s56, v69, v69
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v51.l, v80.l, v71.l, s10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v53.l, v96.l, v87.l, s14
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v55.l, v112.l, v103.l, s18
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.l, v48.l, v147.l, s28
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v35
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v39
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v98.l, v99.l, v54.l, s17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v114.l, v131.l, v66.l, s25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v33
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v34
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v36
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v27
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v8
; GFX12-TRUE16-NEXT: v_and_b32_e32 v85, 0xffff0000, v24
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s29, v117, v97
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v66.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v20
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v4
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v30
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s12, v82, v82
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v36.l
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v27
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v97
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.l, v84.l, v83.l, s12
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s1
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s17, s2
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v20
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v4
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v53.l, s15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v54
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v100.l, v103.l, v55.l, s19
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v118.l, v147.l, v48.l, s29
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v98
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s17, v69, v130
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s18, v80, v131
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s19, v81, v132
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v65, 0xffff0000, v27
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v26
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v17
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v1
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v54, v54
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v15
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s26, v134, v134
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.l, v96.l, v87.l, s14
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v54.l, v132.l, v131.l, s24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v34.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v70.l, v83.l, v48.l, s13
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v119.l, v53.l, s23
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v119.l, v33.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.h, v66.l, v36.l, s2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s27, v145, v145
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v52.l, v116.l, v115.l, s20
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v55.l, v144.l, v135.l, s26
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v84.l, v131.l, v54.l, s25
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s7
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v39.l, s11
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v87.l, v49.l, s15
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v87.l, v50.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v82.l, v115.l, v52.l, s21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v115.l, v54.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v85.l, v135.l, v55.l, s27
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v135.l, v80.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s15, v96, v119
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v84.l
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v100.l, v37.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v130.l, v67.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v135
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v52, v52
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.l, v64.l, v38.l, s6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s15
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s16
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s23, v87, v135
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s27, v115, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v87.l, v33.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v65.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v51.l, v112.l, v103.l, s18
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s18, v100, v130
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s9
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v102.l, v39.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v132.l, v69.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v52.l, v84.l, v83.l, s12
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v64.l, v116.l, v115.l, s20
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s27, v145, v145
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v30.l, s41
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v53
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v48
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v87
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v118
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s25, v97, v146
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s18
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s19
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v65, v65
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v28
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v50, v50
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v50.l, v68.l, v67.l, s8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v68.l, v144.l, v135.l, s26
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v51.l, s11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v52.l, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v102.l, v115.l, v64.l, s21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s42
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s24, v96, v145
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s42, v117, v81
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s18
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v101.l, v38.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v131.l, v68.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v81.l, v98.l, v54.l, s25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v33
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v34
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v36
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s46, v65, v65
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v65.l, v128.l, v119.l, s22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v85, 16, v51
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v86, 16, v52
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v64
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v116.l, v135.l, v68.l, s27
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v71
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v83
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v102
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v132
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s15, 0, v87
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s16, 0, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v98.l, v67.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v112.l, v48.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v35.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v96
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v97
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v98
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v81.l, v103.l, v51.l, s19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v133.l, v70.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v131
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s20, v102, v132
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v99.l, v51.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v144.l, v81.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v133
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s19, v101, v131
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v103.l, v52.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v145.l, v82.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v112.l, v119.l, v65.l, s23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v66
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v114
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s22, v85, v135
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s23, v86, v144
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s27, v101, v69
+; GFX12-TRUE16-NEXT: s_and_b32 s17, s17, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v37.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v39.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s7
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s29, v113, v80
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v51.l, s22
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v83.l, v52.l, s23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v102.l, v64.l, s27
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, s43
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s45
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v14
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v35.l, s17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v49
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v38
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v69.l, v69.l, v39.l, s20
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v98
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v144
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s21, v112, v133
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v145
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v100.l, v69.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v34.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s24, v99, v144
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v85.l, v114.l, v66.l, s29
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v83
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s18, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s19, s2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v12
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.h, v34.l, v37.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.h, v36.l, v39.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s9
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0, v64.l
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s20, v82, v133
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v114
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v84, 16, v50
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v55
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v67
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v147, 16, v100
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s20
+; GFX12-TRUE16-NEXT: s_and_b32 s10, s27, s10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s21, v84, v134
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s26, v99, v147
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v38
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v71
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v49.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v29
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v70.l, v70.l, v48.l, s21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v99.l, v68.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v35.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v113.l, v49.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v134.l, v71.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s25, v103, v145
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v101.l, v70.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s15, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0, v39.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v114.l, v53.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v146.l, v83.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v134
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v80.l, v80.l, v50.l, s23
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v81.l, v81.l, v51.l, s24
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v82.l, v82.l, v52.l, s25
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v100
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s16, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s21
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v99
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v70, 16, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s46
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0, v52.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v65
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v112
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v80.l, v87.l, v53.l, s24
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v102
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, s47
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s44, v128, v82
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v82.l, v100.l, v55.l, s26
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v67
+; GFX12-TRUE16-NEXT: s_and_b32 s3, s20, s3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v28
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v34.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v149, 16, v13
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.h, v65.l, v35.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v38.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v99
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v146
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s22, v113, v134
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v103.l, v80.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v112.l, v81.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v113.l, v82.l
-; GFX12-TRUE16-NEXT: s_and_b32 s5, s20, s5
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v30.l, s41
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.h, v38.l, v49.l, s3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s28, v103, v130
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v80
+; GFX12-TRUE16-NEXT: s_and_b32 s6, s23, s6
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v50.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s56
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v100
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.h, v69.l, v39.l, s5
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0, v48.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v101
-; GFX12-TRUE16-NEXT: s_and_b32 s4, s19, s4
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s26, v114, v146
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v86.l, v86.l, v64.l, s29
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s42
-; GFX12-TRUE16-NEXT: s_and_b32 s6, s21, s6
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v50.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0, v51.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0, v52.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v53.l, s26
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v117.l, v86.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v103
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v112
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v113
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.h, v71.l, v52.l, s6
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v53.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v103
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v30
+; GFX12-TRUE16-NEXT: s_and_b32 s4, s21, s4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.h, v70.l, v48.l, s6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v118.l, v14.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v128.l, v30.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v114.l, v83.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
-; GFX12-TRUE16-NEXT: s_and_b32 s8, s23, s8
-; GFX12-TRUE16-NEXT: s_and_b32 s9, s24, s9
-; GFX12-TRUE16-NEXT: s_and_b32 s10, s25, s10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0, v64.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v117
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0, v53.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v116.l, v55.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v119.l, v85.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v114
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v84.l, v84.l, v54.l, s27
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0, v54.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX12-TRUE16-NEXT: s_and_b32 s11, s26, s11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v115.l, v84.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0, v55.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v37.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s28, v116, v119
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v49.l, s22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v49.l
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s18, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v85.l, v85.l, v55.l, s28
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.h, v67.l, v50.l, s4
+; GFX12-TRUE16-NEXT: s_and_b32 s7, s24, s7
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s43, v119, v132
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.h, v67.l, v37.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v115
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v102.l, v71.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v116.l, v85.l
-; GFX12-TRUE16-NEXT: s_and_b32 s12, s27, s12
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v102
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v116
-; GFX12-TRUE16-NEXT: s_and_b32 s7, s22, s7
-; GFX12-TRUE16-NEXT: s_and_b32 s13, s28, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.h, v80.l, v53.l, s7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v29
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s16, 0, v13.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s15, 0, v14.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s43
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v68
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s44, 0, v128
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v116
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v84.l, v112.l, v65.l, s28
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v30
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v69
+; GFX12-TRUE16-NEXT: s_and_b32 s16, s44, s16
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s41, v115, v131
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s16
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s43, 0, v119
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v81
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v87.l, v118.l, v48.l, s42
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v86.l, v116.l, v68.l, s41
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0, v51.l
+; GFX12-TRUE16-NEXT: s_and_b32 s15, s43, s15
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v54.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.h, v85.l, v55.l, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s15
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v101
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v112
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v82
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v84
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v85
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v86
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v87
+; GFX12-TRUE16-NEXT: s_and_b32 s5, s22, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s8, s25, s8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0, v55.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0, v65.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0, v66.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0, v68.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0, v48.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v113
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v115
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v116
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s41, 0, v117
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s42, 0, v118
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.h, v69.l, v51.l, s5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.h, v81.l, v54.l, s8
+; GFX12-TRUE16-NEXT: s_and_b32 s9, s26, s9
+; GFX12-TRUE16-NEXT: s_and_b32 s11, s28, s11
+; GFX12-TRUE16-NEXT: s_and_b32 s12, s29, s12
+; GFX12-TRUE16-NEXT: s_and_b32 s13, s41, s13
+; GFX12-TRUE16-NEXT: s_and_b32 s14, s42, s14
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.h, v82.l, v55.l, s9
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v31
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v96, 0xffff0000, v31
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v31
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v31
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v31
; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v31.l, s40
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.h, v68.l, v38.l, s4
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v87.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v96, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v34.l, v15.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v32.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v32.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v98, v98
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v34
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.h, v71.l, v49.l, s7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v87.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v96.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v97, v97
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v98, v98
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v15
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v32
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v35.l, v31.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v96, v97
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v35
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.h, v80.l, v50.l, s8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v96.l, v32.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.h, v84.l, v65.l, s11
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v87.l, v32.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v36, v39
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v32.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.h, v81.l, v51.l, s9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v118
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v38.l, v33.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v149, v149
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.h, v83.l, v53.l, s11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v38
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.h, v82.l, v52.l, s10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v31.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v29
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v48
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.h, v84.l, v54.l, s12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v13.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s1, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s29, s14
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v33.l, v32.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v51, v128
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v12
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.h, v86.l, v64.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v50
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v33
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v31
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.h, v83.l, v64.l, s10
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v35, v37
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v34, v39
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v27
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v32.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v51, v51
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v28
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v15.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v52.l, v29.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v30.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v51
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v53
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v32.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v33
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v31
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.h, v85.l, v66.l, s12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v34
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v35
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.h, v86.l, v68.l, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.h, v87.l, v48.l, s14
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s1, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v70, v70
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v33.l, v32.l, s0
; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v31.l, v15.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v50
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v14.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v52, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v28.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v12.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v11
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v29.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v51, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v10
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v129, v133
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v26
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v53
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v11.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v28.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v27.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v55.l, v10.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v25
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v13.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v54.l, v26.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v54
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v55
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v37, v39
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v28
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v26
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s1
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v53, v50
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v54, v52
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v25.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v9.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s2
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v12.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v39, v38
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v11.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v52.l, v27.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v26.l
+; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s3, v39, v38
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.l, v28.l, v12.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v51, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s3
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v25.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v11.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v28
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v10.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v50, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v28.l, v12.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v28
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v28.l, v12.l, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s3
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s0, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v10.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v27.l, v11.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v26.l, v10.l, s1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v24.l, v8.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v23
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v28, v28
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v27.l, v11.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v25
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v7
+; GFX12-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v24.l, v10.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v25.l, v8.l
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v39, v39
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v23
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v26.l, v10.l, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v23.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v24
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v12.l, v9.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v25.l, v9.l, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v23.l, v7.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v22
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v25, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v11.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v38, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v22.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v25, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v10.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v22.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v9.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v23, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v6.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v23, v26
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v25, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v7.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v21.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v8.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v24
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v22
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v12.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v5.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v26, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v5
; GFX12-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v10.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v7.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v26, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v9.l, v8.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v23, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v24.l, v8.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v11.l, v7.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v12.l, v5.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v20
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v9.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v23, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v20
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v21
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v7.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v11
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v19.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v9, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v19
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v5.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v10.l, v6.l, s3
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v22.l, v6.l, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v9, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v18
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v7.l, v5.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v10, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v18
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v21.l, v5.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v18.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v5, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v19
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v20, v20
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v18.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v18.l, v2.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v4.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v4.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v17.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v11, v10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v16.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v19.l, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v17.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v7, v5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v16.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v3.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v16, v12
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v18, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v19
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v19.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v18, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v8
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v21, v20
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v8.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v16
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v6
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v3.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v17
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v2.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v11
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v16
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v18
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0, v0.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0, v1.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX12-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX12-TRUE16-NEXT: s_and_b32 s4, s5, s8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v8.l, v0.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.l, v7.l, v1.l, s4
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.l, v5.l, v2.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.l, v9.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v6.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v5.l, v0.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v9.l, v1.l, s4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v6.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v7.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v8.l, v4.l, s2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v29 :: v_dual_mov_b32 v1, v49
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v48 :: v_dual_mov_b32 v3, v39
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v35 :: v_dual_mov_b32 v1, v34
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v33 :: v_dual_mov_b32 v3, v32
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v38 :: v_dual_mov_b32 v5, v36
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, v35 :: v_dual_mov_b32 v7, v34
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v33 :: v_dual_mov_b32 v9, v32
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v10, v31 :: v_dual_mov_b32 v11, v30
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v12, v37
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v31 :: v_dual_mov_b32 v5, v30
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, v29 :: v_dual_mov_b32 v7, v28
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v27 :: v_dual_mov_b32 v9, v36
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_maximumnum_v32bf16:
@@ -13032,21 +12542,17 @@ define bfloat @v_maximumnum_bf16_no_ieee(bfloat %x, bfloat %y) #0 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -13092,19 +12598,15 @@ define bfloat @v_maximumnum_bf16_no_ieee(bfloat %x, bfloat %y) #0 {
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -13333,17 +12835,11 @@ define <2 x bfloat> @v_maximumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v7
@@ -13352,11 +12848,8 @@ define <2 x bfloat> @v_maximumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v2.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -13434,17 +12927,11 @@ define <2 x bfloat> @v_maximumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v6
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v7
@@ -13455,11 +12942,8 @@ define <2 x bfloat> @v_maximumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v2.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -13773,58 +13257,48 @@ define <3 x bfloat> @v_maximumnum_v3bf16_no_ieee(<3 x bfloat> %x, <3 x bfloat> %
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v9, v8
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v10, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v6.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
@@ -13902,64 +13376,54 @@ define <3 x bfloat> @v_maximumnum_v3bf16_no_ieee(<3 x bfloat> %x, <3 x bfloat> %
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v7
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v9, v8
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v11, v10
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v10, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v6.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX12-TRUE16-NEXT: s_and_b32 s0, s3, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14363,74 +13827,61 @@ define <4 x bfloat> @v_maximumnum_v4bf16_no_ieee(<4 x bfloat> %x, <4 x bfloat> %
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v11, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v0.l
; GFX11-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v13, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
@@ -14530,85 +13981,75 @@ define <4 x bfloat> @v_maximumnum_v4bf16_no_ieee(<4 x bfloat> %x, <4 x bfloat> %
; GFX12-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s2, v11, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v9
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v11, v10
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0, v0.l
; GFX12-TRUE16-NEXT: v_cmp_gt_f32_e64 s1, v13, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v6.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s4
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/minimummaximum.ll b/llvm/test/CodeGen/AMDGPU/minimummaximum.ll
index 10f6984276d698..7871729b056ebd 100644
--- a/llvm/test/CodeGen/AMDGPU/minimummaximum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimummaximum.ll
@@ -247,28 +247,16 @@ define amdgpu_ps void @s_test_minmax_f16(half inreg %a, half inreg %b, half inre
; GFX1170-GISEL-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]
; GFX1170-GISEL-FAKE16-NEXT: s_endpgm
;
-; GFX12-SDAG-TRUE16-LABEL: s_test_minmax_f16:
-; GFX12-SDAG-TRUE16: ; %bb.0:
-; GFX12-SDAG-TRUE16-NEXT: s_maximum_f16 s0, s0, s1
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX12-SDAG-TRUE16-NEXT: s_mov_b32 s5, s4
-; GFX12-SDAG-TRUE16-NEXT: s_mov_b32 s4, s3
-; GFX12-SDAG-TRUE16-NEXT: s_minimum_f16 s0, s0, s2
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
-; GFX12-SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[4:5]
-; GFX12-SDAG-TRUE16-NEXT: s_endpgm
-;
-; GFX12-SDAG-FAKE16-LABEL: s_test_minmax_f16:
-; GFX12-SDAG-FAKE16: ; %bb.0:
-; GFX12-SDAG-FAKE16-NEXT: s_maximum_f16 s0, s0, s1
-; GFX12-SDAG-FAKE16-NEXT: s_mov_b32 s5, s4
-; GFX12-SDAG-FAKE16-NEXT: s_mov_b32 s4, s3
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
-; GFX12-SDAG-FAKE16-NEXT: s_minimum_f16 s0, s0, s2
-; GFX12-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
-; GFX12-SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[4:5]
-; GFX12-SDAG-FAKE16-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: s_test_minmax_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_maximum_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_mov_b32 s5, s4
+; GFX12-SDAG-NEXT: s_mov_b32 s4, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: s_minimum_f16 s0, s0, s2
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
+; GFX12-SDAG-NEXT: global_store_b16 v0, v1, s[4:5]
+; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-TRUE16-LABEL: s_test_minmax_f16:
; GFX12-GISEL-TRUE16: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
index d5d49a74815fc7..f1ffce9066d7e0 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
@@ -118,21 +118,17 @@ define bfloat @v_minimumnum_bf16(bfloat %x, bfloat %y) #1 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -178,19 +174,15 @@ define bfloat @v_minimumnum_bf16(bfloat %x, bfloat %y) #1 {
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -309,12 +301,10 @@ define bfloat @v_minimumnum_bf16_nnan(bfloat %x, bfloat %y) #1 {
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v2
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v2
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -348,9 +338,8 @@ define bfloat @v_minimumnum_bf16_nnan(bfloat %x, bfloat %y) #1 {
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v2
; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -579,17 +568,11 @@ define <2 x bfloat> @v_minimumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v7
@@ -598,11 +581,8 @@ define <2 x bfloat> @v_minimumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v2.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -680,17 +660,11 @@ define <2 x bfloat> @v_minimumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v6
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v7
@@ -701,11 +675,8 @@ define <2 x bfloat> @v_minimumnum_v2bf16(<2 x bfloat> %x, <2 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v2.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -909,12 +880,9 @@ define <2 x bfloat> @v_minimumnum_v2bf16_nnan(<2 x bfloat> %x, <2 x bfloat> %y)
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v4
@@ -975,12 +943,9 @@ define <2 x bfloat> @v_minimumnum_v2bf16_nnan(<2 x bfloat> %x, <2 x bfloat> %y)
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v4
@@ -1286,58 +1251,48 @@ define <3 x bfloat> @v_minimumnum_v3bf16(<3 x bfloat> %x, <3 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v9, v8
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v10, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v6.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
@@ -1415,64 +1370,54 @@ define <3 x bfloat> @v_minimumnum_v3bf16(<3 x bfloat> %x, <3 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v7
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v9, v8
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v10
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v10, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v6.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX12-TRUE16-NEXT: s_and_b32 s0, s3, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1728,35 +1673,31 @@ define <3 x bfloat> @v_minimumnum_v3bf16_nnan(<3 x bfloat> %x, <3 x bfloat> %y)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v7, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v9, v8
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, s1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s4, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1811,29 +1752,24 @@ define <3 x bfloat> @v_minimumnum_v3bf16_nnan(<3 x bfloat> %x, <3 x bfloat> %y)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v7, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v9, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -1841,7 +1777,7 @@ define <3 x bfloat> @v_minimumnum_v3bf16_nnan(<3 x bfloat> %x, <3 x bfloat> %y)
; GFX12-TRUE16-NEXT: s_and_b32 s1, s3, s1
; GFX12-TRUE16-NEXT: s_and_b32 s0, s4, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -2228,74 +2164,61 @@ define <4 x bfloat> @v_minimumnum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v11, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v0.l
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v13, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
@@ -2395,85 +2318,75 @@ define <4 x bfloat> @v_minimumnum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v11, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v9
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v0.l
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v13, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s4
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -2804,43 +2717,39 @@ define <4 x bfloat> @v_minimumnum_v4bf16_nnan(<4 x bfloat> %x, <4 x bfloat> %y)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v4
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v7.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v9, v8
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v10, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v12, v11
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v7.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s0, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v4.l, v6.l, s5
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v7.l, v6.l, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX11-TRUE16-NEXT: s_and_b32 s2, s3, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v7.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_minimumnum_v4bf16_nnan:
@@ -2910,48 +2819,44 @@ define <4 x bfloat> @v_minimumnum_v4bf16_nnan(<4 x bfloat> %x, <4 x bfloat> %y)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v4
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v7.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v9, v8
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v10, v5
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v4
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v12, v11
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v6.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v4.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v7.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
+; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
-; GFX12-TRUE16-NEXT: s_and_b32 s5, s0, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v8
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v4.l, v6.l, s5
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v7.l, v6.l, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX12-TRUE16-NEXT: s_and_b32 s2, s3, s4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_minimumnum_v4bf16_nnan:
@@ -3504,111 +3409,93 @@ define <6 x bfloat> @v_minimumnum_v6bf16(<6 x bfloat> %x, <6 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v7.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v8
; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v15, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v12.l, v11.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v14.l, v13.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v6.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v14.l, v13.l, s1
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v11.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v13.l, v9.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v18, v19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v18, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v9.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v8.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v22, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v17, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v21, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, s5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, s1
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v15, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v6.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v12, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v1.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v11.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v8.l, s3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v14, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v16, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v6, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v12
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v14, v16
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, s2
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v8.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v17, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v18, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v13.l, v12.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v9.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v14, v13
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v16, v15
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v12.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s2, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v3
+; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s3
; GFX11-TRUE16-NEXT: s_and_b32 s6, s0, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v2.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v7
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v10
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v11
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v0.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v1.l
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v8.l, s5
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v6.l, v9.l, s6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v6.l, v9.l, s5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v12.l, s6
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s4
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, v0.l, s2
@@ -3745,124 +3632,106 @@ define <6 x bfloat> @v_minimumnum_v6bf16(<6 x bfloat> %x, <6 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v7.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v3
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v19.l, v7.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v15, v15
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v8
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v9, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v12.l, v11.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v14.l, v13.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v6.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v14.l, v13.l, s1
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v11.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v13.l, v9.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v18, v19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v11.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v22, v22
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v17, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v10.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v18, v19
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v9.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v8.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v13
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v21, v21
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, s5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, s1
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v15, v16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v6, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v12
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v14, v16
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v13
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, s2
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v6.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s4
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v12, v14
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v1.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v7.l, v8.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v17, v17
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v11.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v4.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v8.l, s3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v14, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v16, v15
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v18, v19
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v13.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v9.l
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v14, v13
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v16, v15
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v1.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v12.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v9.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: s_and_b32 s5, s2, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v3
+; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s3
; GFX12-TRUE16-NEXT: s_and_b32 s6, s0, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v7
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v2.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v7
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v10
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v11
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v0.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v1.l
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v8.l, s5
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v6.l, v9.l, s6
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v6.l, v9.l, s5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v12.l, s6
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, s3
; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4651,163 +4520,138 @@ define <8 x bfloat> @v_minimumnum_v8bf16(<8 x bfloat> %x, <8 x bfloat> %y) #1 {
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v6
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v5
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v10.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v8.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v11.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v9.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v11.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v16.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v13, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v12.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v16.l, v12.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v15, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v18, v18
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v9.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v10.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v19, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v15.l, v12.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v12.l, v14.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v11.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v14, v15
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v16.l, v15.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v13.l
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s1, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v14.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v14.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, s4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v15.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v12, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v15, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v14.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v13.l
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.h, v9.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v12.l, s3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v19
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v12.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v11.l, v10.l, s3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v16, v17
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v9.l, v8.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v13.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v14.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v2.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v14.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v12.l, v8.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v7
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v3.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v10.l, v13.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v7.l, v17.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v15, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v6.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v15, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v11.l, v14.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v4
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v13, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v7.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v3.l, v17.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v13, v12
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v16, v15
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v2.l, v9.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v5.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX11-TRUE16-NEXT: s_and_b32 s7, s2, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v10
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v15, v14
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s2
+; GFX11-TRUE16-NEXT: s_and_b32 s7, s0, s3
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v9.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v4
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v17.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0x8000, v1.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v2.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v11
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, s6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v9.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v1.l, s3
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, s6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v8.l, s7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v9.l, v17.l, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX11-TRUE16-NEXT: s_and_b32 s2, s4, s5
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v14.l, s7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v6.l, v3.l, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, v2 :: v_dual_mov_b32 v2, v7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, v3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v8
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_minimumnum_v8bf16:
@@ -4967,184 +4811,160 @@ define <8 x bfloat> @v_minimumnum_v8bf16(<8 x bfloat> %x, <8 x bfloat> %y) #1 {
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v3
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v1
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v7
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v5
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v8, v8
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v10.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v8.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v11.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v10.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v9.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v11.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v10.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v16.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v13, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v12.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v5
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v10.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v19, v19
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v16.l, v12.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v15.l, v12.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v15, v17
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v18, v18
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v13.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v9.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v14
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v12.l, v14.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v8.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v10
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v8.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v11.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v14, v15
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v12, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v4
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v15, v17
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v18
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v12.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v14
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v16.l, v15.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v13.l
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s1, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v14.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v14.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v13.l, s0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v14.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v13.l
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.h, v9.l, v8.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v12.l, s3
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s3, s4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v19.l, v15.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v14.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v7.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v19
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v12.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v12.l, v8.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v17
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s0, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v3.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.h, v11.l, v10.l, s3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v16, v17
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.h, v9.l, v8.l, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v3.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v13.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.h, v10.l, v13.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v15.l, v14.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v7.l, v17.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v15, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v2.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v6.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v15, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v4
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.h, v11.l, v14.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v8.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v4
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v13, v13
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v13, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v17
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v15.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v7.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v3.l, v17.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v13, v12
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v16, v15
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v2.l, v9.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v6.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v10
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v15, v14
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v8.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v5.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v14.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX12-TRUE16-NEXT: s_and_b32 s7, s2, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v5.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v0.l, s2
+; GFX12-TRUE16-NEXT: s_and_b32 s7, s0, s3
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v9.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v4
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v17.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0x8000, v1.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v2.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v11
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_and_b32 s3, s3, s6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v9.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v1.l, s3
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v8.l, s7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v9.l, v17.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
; GFX12-TRUE16-NEXT: s_and_b32 s2, s4, s5
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v14.l, s7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v6.l, v3.l, s0
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, v2 :: v_dual_mov_b32 v2, v7
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, v3
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v8
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_minimumnum_v8bf16:
@@ -6562,327 +6382,276 @@ define <16 x bfloat> @v_minimumnum_v16bf16(<16 x bfloat> %x, <16 x bfloat> %y) #
; GFX11-TRUE16-LABEL: v_minimumnum_v16bf16:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, v7 :: v_dual_mov_b32 v17, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v9
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v7.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v7.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v7
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v21, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v19
; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v18.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v20, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v18.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v19.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v21, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v23.l, v20.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v23.l, v22.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v25, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v22.l, v20.l, vcc_lo
; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v20.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v21.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v21.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s1, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v19.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v17.l, s3
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v26.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v28
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v24, v25
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v22.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v23.l, v26.l, v22.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v27
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v20.l, s1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v23.l
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v21.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v19.l, v18.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v27, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v11
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v24, v25
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v24, v25
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v23.l, v22.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v19.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v26, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v19.l, v7.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v24.l, v23.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v20.l, v21.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v22.l, v23.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.h, v18.l, v19.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v18
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v21.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v19, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v24.l, v20.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v23.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v19.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v19.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v20
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s0, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v23.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v20.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v26, v27
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v19
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v18.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v24.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v25, v27
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v30
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v31
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v22.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v25.l, v28.l, v24.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v26
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v27, v29
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v25.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v18.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v26, v27
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.h, v21.l, v20.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.h, v6.l, v22.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v26, v27
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v23.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.h, v7.l, v21.l, s3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v24
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v19
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
; GFX11-TRUE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v25.l, v24.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v20
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v21, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v6.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v26, v27
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s0, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v22.l
; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v8
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v20
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v19.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v22.l, v21.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.h, v18.l, v7.l, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v26
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v21.l, v20.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.h, v23.l, v19.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v24.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v28.l, s3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.h, v17.l, v23.l, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.h, v20.l, v18.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v28.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v24.l, v21.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v19.l, v22.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v21.l, v17.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v6.l, v24.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v7.l, v28.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v22, v23
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v16.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v17.l, v14.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v14.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v20.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v18.l, v17.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v13
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v22, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v15.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v20.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v22, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v21, v23
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v7
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
; GFX11-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v14.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v7.l, v20.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v22, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v15.l, v17.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v12
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v13.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v13
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v17, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v4.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v14.l, v6.l, s3
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v21
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v22, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v21
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v17, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v21
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v5.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v17.l, v14.l, v6.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v21, v16
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v10.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v12.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v9.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v13, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v10.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v13, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v17, v14
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v22, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v5.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v11.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v12.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v12, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v14, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v21, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v5.l, v2.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v8.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v12.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v6
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v3.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v8
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v2.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v13
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v14
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v13
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v0.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v1.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX11-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX11-TRUE16-NEXT: s_and_b32 s4, s5, s8
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v9.l, v1.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v12.l, v2.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v16.l, v11.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v15
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v11.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v20.l, v9.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v15 :: v_dual_mov_b32 v3, v20
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, v16 :: v_dual_mov_b32 v4, v19
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, v18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v19 :: v_dual_mov_b32 v5, v18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, v17
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_minimumnum_v16bf16:
@@ -7208,372 +6977,320 @@ define <16 x bfloat> @v_minimumnum_v16bf16(<16 x bfloat> %x, <16 x bfloat> %y) #
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v16, v7 :: v_dual_mov_b32 v17, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v16, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v15
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v6
; GFX12-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v14
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v13
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v16
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
; GFX12-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v12
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v15
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v7.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v6.l
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v6.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v7.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v18.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v17.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v20, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v20.l, v18.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v19.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v13
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v5
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v21, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v19
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v13
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v23.l, v22.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v25, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v17.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v21, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v22.l, v20.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v23.l, v20.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX12-TRUE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v24.l, v20.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v18.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v25.l, v21.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v19.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v21.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v28.l, v19.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; GFX12-TRUE16-NEXT: s_and_b32 s3, s1, s2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v19.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v17.l, s3
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v26.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v26.l, v22.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v24, v25
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v28
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v24, v25
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v24.l, v22.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v20.l, v21.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v26.l, v22.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v27
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v20.l, s1
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v25.l, v23.l
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v26.l, v21.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v22.l, v23.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.h, v19.l, v18.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v27, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v26
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.h, v18.l, v19.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7
; GFX12-TRUE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v24, v25
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v11
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v18
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v18
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v21.l
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v19, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v23.l, v22.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v19.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v24.l, v20.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v26, v26
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v10
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v27.l, v7.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v10
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v18
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v19.l, v7.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v26.l, v6.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v24.l, v23.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v17.l, v23.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v19.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX12-TRUE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v27
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v27.l, v18.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v30.l, v19.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v20
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v17
+; GFX12-TRUE16-NEXT: s_and_b32 s3, s0, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v31.l, v23.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v20.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v26, v27
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v19
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v18.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v24.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v25, v27
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v30
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v31
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v22.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v25.l, v28.l, v24.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v26
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v18.l, v7.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v27, v29
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v26.l, v24.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v27.l, v25.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v28.l, v18.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v20.l, v18.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v26, v27
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v28.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v20
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v23.l, v23.l, v19.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s1, s2
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v29.l, v23.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v26, v27
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v22.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v23.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.h, v21.l, v20.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.h, v6.l, v22.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v29
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.h, v7.l, v21.l, s3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v24
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v19
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
; GFX12-TRUE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v25.l, v24.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v28
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v20
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v21, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v20.l, v6.l
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v26, v27
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s0, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v22.l
; GFX12-TRUE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v8
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v20
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v19.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v22.l, v21.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v24.l, v28.l, s3
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.h, v18.l, v7.l, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v26
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.h, v17.l, v23.l, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.h, v20.l, v18.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v28.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v21.l, v20.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v24.l, v21.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v23
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v26, v26
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v15
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.h, v23.l, v19.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v20.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v19.l, v22.l, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v24.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v21.l, v17.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v6
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.l, v16.l, v15.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.h, v7.l, v28.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v6.l, v24.l, s0
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v22, v23
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v15.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v16.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v17.l, v14.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v14.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v20.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v18.l, v17.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v13
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v22, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v14.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v6.l
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v21, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v14
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v13.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v16.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v15.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v20.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v22, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v13.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v5.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v17.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
; GFX12-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v17
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v16.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v14.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.h, v7.l, v20.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v22, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.h, v15.l, v17.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v14
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v16.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v16.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v5.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v12
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v13.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v3
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v13
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v17, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v22
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v12.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v4.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.l
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v22, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v11
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v21
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v11.l, s3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v5.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v14.l, v6.l, s3
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v17, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v17.l, v14.l, v6.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v21, v16
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v22, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v3.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v18.l, v13.l, v5.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v10.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v9
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v8
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v22, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v17, v17
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v9.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v14, v14
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s1
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v21, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v11
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v10.l, v2.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v9.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v12.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v13, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v10.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v13, v12
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v16, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v12, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v3.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v17, v14
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v22, v21
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v11.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v14, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v10
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v21, v16
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v5.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v11.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v5.l, v2.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v8.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v13
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v12.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v14.l, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v13
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v6
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v3.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v8
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v2.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v13
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v14
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v13
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v0.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v1.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX12-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX12-TRUE16-NEXT: s_and_b32 s4, s5, s8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v9.l, v1.l, s4
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v12.l, v2.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v16.l, v11.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v1.l, s4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v11.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v20.l, v9.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v10.l, v4.l, s2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v15
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v20 :: v_dual_mov_b32 v3, v16
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v1, v6
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v15 :: v_dual_mov_b32 v3, v20
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v19 :: v_dual_mov_b32 v5, v18
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v17
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_minimumnum_v16bf16:
@@ -10402,633 +10119,534 @@ define <32 x bfloat> @v_minimumnum_v32bf16(<32 x bfloat> %x, <32 x bfloat> %y) #
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v15
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v35, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v38, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v53, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v28
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v35, v35
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v38, v38
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v49, v49
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v30
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v48, v48
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v51, v51
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v34, v34
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v35, v35
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v36.l, v33.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v39.l, v65.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v50.l, v66.l, s4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v10
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v50, 0xffff0000, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v28
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v66, 0xffff0000, v10
; GFX11-TRUE16-NEXT: v_and_b32_e32 v98, 0xffff0000, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v37, v37
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v52, v52
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v55, v55
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v49, v49
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v51, v51
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v53, v53
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v11
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
; GFX11-TRUE16-NEXT: v_and_b32_e32 v70, 0xffff0000, v9
; GFX11-TRUE16-NEXT: v_and_b32_e32 v86, 0xffff0000, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v22
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v101, 0xffff0000, v22
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v50, v50
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v52, v52
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v54, v54
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v66, v66
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v11
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s16, v98, v98
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v37, v37
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v38, v38
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.l, v53.l, v67.l, s6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v64.l, v68.l, s8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v53.l, v128.l, v119.l, s22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v64.l, v148.l, v147.l, s28
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.l, v36.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v66.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v35.l, v33.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.l, v37.l, v34.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.l, v39.l, v36.l, s4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v25
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v9
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v55, v55
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v55, 16, v12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v27
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s10, v70, v70
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s14, v86, v86
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s17, v101, v101
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v50.l, v100.l, v99.l, s16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v86.l, v147.l, v64.l, s29
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v129
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.l, v80.l, v71.l, s10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v80.l, v99.l, v50.l, s17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v64.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s16, v97, v128
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v86.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s17, v98, v129
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s44, v54, v54
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s47, v66, v66
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v54.l, v100.l, v99.l, s16
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v66.l, v132.l, v131.l, s24
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s5
; GFX11-TRUE16-NEXT: v_and_b32_e32 v82, 0xffff0000, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v49, v49
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v51, v51
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s43, v53, v53
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s45, v55, v55
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s56, v69, v69
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v51.l, v80.l, v71.l, s10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v53.l, v96.l, v87.l, s14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v55.l, v112.l, v103.l, s18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.l, v48.l, v147.l, s28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v35
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v39
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v98.l, v99.l, v54.l, s17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v114.l, v131.l, v66.l, s25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v34
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s17
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v8
; GFX11-TRUE16-NEXT: v_and_b32_e32 v85, 0xffff0000, v24
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s29, v117, v97
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v66.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s12, v82, v82
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v36.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v97
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.l, v84.l, v83.l, s12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s1
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s17, s2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v20
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v4
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v30
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s12, v82, v82
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v53.l, s15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v54
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v100.l, v103.l, v55.l, s19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v118.l, v147.l, v48.l, s29
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v98
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s17, v69, v130
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s18, v80, v131
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s19, v81, v132
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v65, 0xffff0000, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v17
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v54, v54
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s26, v134, v134
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.l, v96.l, v87.l, s14
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v54.l, v132.l, v131.l, s24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v34.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v70.l, v83.l, v48.l, s13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v119.l, v53.l, s23
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v33.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.h, v66.l, v36.l, s2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v52, v52
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.l, v64.l, v38.l, s6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v52.l, v84.l, v83.l, s12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v64.l, v116.l, v115.l, s20
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s27, v145, v145
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v52.l, v116.l, v115.l, s20
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v55.l, v144.l, v135.l, s26
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v84.l, v131.l, v54.l, s25
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v39.l, s11
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v87.l, v49.l, s15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.l, v50.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v82.l, v115.l, v52.l, s21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v54.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v85.l, v135.l, v55.l, s27
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v135.l, v80.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s15, v96, v119
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v84.l
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v100.l, v37.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v67.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v135
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s15
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s23, v87, v135
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s27, v115, v96
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.l, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v65.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v51.l, v112.l, v103.l, s18
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s18, v100, v130
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.l, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.l, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s18
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v101.l, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v68.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v132
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s15, 0, v87
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s16, 0, v96
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.l, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.l, v48.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v81.l, v103.l, v51.l, s19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v131
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s20, v102, v132
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v99.l, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v133
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s19, v101, v131
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.l, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v82.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v69.l, v69.l, v39.l, s20
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v98
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v144
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s21, v112, v133
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v145
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v100.l, v69.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v34.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s24, v99, v144
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v70.l, v70.l, v48.l, s21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v99.l, v68.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v49.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v71.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s25, v103, v145
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v101.l, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s15, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0x8000, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.l, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v134
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v80.l, v80.l, v50.l, s23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v81.l, v81.l, v51.l, s24
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v82.l, v82.l, v52.l, s25
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v100
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s16, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v34.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v149, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v65.l, v35.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v38.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v99
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v146
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s22, v113, v134
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.l, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.l, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v82.l
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s20, s5
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v30.l, s41
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.h, v69.l, v39.l, s5
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0x8000, v48.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v101
-; GFX11-TRUE16-NEXT: s_and_b32 s4, s19, s4
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s26, v114, v146
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v86.l, v86.l, v64.l, s29
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v53
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v48
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v87
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v118
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s25, v97, v146
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s17
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v65, v65
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v28
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v50, v50
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v50.l, v68.l, v67.l, s8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v68.l, v144.l, v135.l, s26
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v51.l, s11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v52.l, s13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v102.l, v115.l, v64.l, s21
; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s42
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s21, s6
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v50.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0x8000, v51.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0x8000, v52.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v53.l, s26
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v86.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v103
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v112
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v113
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.h, v70.l, v48.l, s6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s23, s8
-; GFX11-TRUE16-NEXT: s_and_b32 s9, s24, s9
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s25, s10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0x8000, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v117
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0x8000, v53.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v85.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v114
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v84.l, v84.l, v54.l, s27
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0x8000, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX11-TRUE16-NEXT: s_and_b32 s11, s26, s11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v84.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0x8000, v55.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v37.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s28, v116, v119
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v49.l, s22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v49.l
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s18, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v85.l, v85.l, v55.l, s28
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.h, v67.l, v37.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v115
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.l, v71.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v85.l
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s27, s12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v102
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v116
-; GFX11-TRUE16-NEXT: s_and_b32 s7, s22, s7
-; GFX11-TRUE16-NEXT: s_and_b32 s13, s28, s13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.h, v85.l, v55.l, s13
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s24, v96, v145
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s42, v117, v81
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v81.l, v98.l, v54.l, s25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v34
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v36
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s46, v65, v65
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v65.l, v128.l, v119.l, s22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v85, 16, v51
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v86, 16, v52
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v64
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v116.l, v135.l, v68.l, s27
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v71
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v83
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v102
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v35.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v96
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v97
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v98
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v112.l, v119.l, v65.l, s23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v66
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v114
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s22, v85, v135
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s23, v86, v144
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s27, v101, v69
+; GFX11-TRUE16-NEXT: s_and_b32 s17, s17, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v37.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v39.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s7
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s29, v113, v80
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v51.l, s22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v71.l, v83.l, v52.l, s23
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v83.l, v102.l, v64.l, s27
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, s43
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s45
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v35.l, s17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v49
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v38
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v85.l, v114.l, v66.l, s29
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v83
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s18, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s19, s2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v34.l, v37.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.h, v36.l, v39.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s9
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0x8000, v64.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s20, v82, v133
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v114
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v84, 16, v50
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v55
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v67
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v147, 16, v100
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s20
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s27, s10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s21, v84, v134
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s26, v99, v147
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v71
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s21
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v99
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v70, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s46
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0x8000, v52.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v65
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v112
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v80.l, v87.l, v53.l, s24
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v102
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, s47
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s44, v128, v82
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v82.l, v100.l, v55.l, s26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v67
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s20, s3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v28
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.h, v38.l, v49.l, s3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s28, v103, v130
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v80
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s23, s6
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v50.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s56
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v100
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.h, v71.l, v52.l, s6
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v53.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v103
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v30
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s21, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.h, v67.l, v50.l, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s7, s24, s7
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s43, v119, v132
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.h, v80.l, v53.l, s7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v29
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s16, 0x8000, v13.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s15, 0x8000, v14.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s43
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v68
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s44, 0, v128
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v116
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v84.l, v112.l, v65.l, s28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v30
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v69
+; GFX11-TRUE16-NEXT: s_and_b32 s16, s44, s16
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s41, v115, v131
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s16
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s43, 0, v119
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v81
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v87.l, v118.l, v48.l, s42
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v86.l, v116.l, v68.l, s41
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0x8000, v51.l
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s43, s15
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v54.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s15
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v101
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v112
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v82
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v84
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v85
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v86
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v87
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s22, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s25, s8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0x8000, v55.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0x8000, v65.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0x8000, v66.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0x8000, v68.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0x8000, v48.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v113
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v115
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v116
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s41, 0, v117
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s42, 0, v118
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.h, v69.l, v51.l, s5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.h, v81.l, v54.l, s8
+; GFX11-TRUE16-NEXT: s_and_b32 s9, s26, s9
+; GFX11-TRUE16-NEXT: s_and_b32 s11, s28, s11
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s29, s12
+; GFX11-TRUE16-NEXT: s_and_b32 s13, s41, s13
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s42, s14
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.h, v82.l, v55.l, s9
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v31
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v96, 0xffff0000, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v31
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v31
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v31
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v31.l, s40
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.h, v68.l, v38.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v87.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v96, v96
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v32.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v32.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v98, v98
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v34
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.h, v71.l, v49.l, s7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v87.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v31.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v96, v97
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v35
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.h, v80.l, v50.l, s8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v87.l, v32.l, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v36, v39
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v96.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v97, v97
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v98, v98
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v32
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v96.l, v32.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.h, v84.l, v65.l, s11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v33
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v31
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.h, v83.l, v64.l, s10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v35, v37
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v34, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v27
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v32.l, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v15.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v32.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.h, v81.l, v51.l, s9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v118
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v33.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v149, v149
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.h, v83.l, v53.l, s11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v38
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.h, v82.l, v52.l, s10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v31.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v29
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v48
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.h, v84.l, v54.l, s12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v33
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v31
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.h, v85.l, v66.l, s12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v34
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v35
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.h, v86.l, v68.l, s13
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.h, v87.l, v48.l, s14
; GFX11-TRUE16-NEXT: s_and_b32 s0, s1, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s29, s14
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v70, v70
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v33.l, v32.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v51, v128
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.h, v86.l, v64.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v50
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v51, v51
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v30.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v51
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v53
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v31.l, v15.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v50
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v14.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v52, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v12.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v11
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v29.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v51, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v129, v133
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v11
; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v26
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v53
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v11.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v25
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.l, v26.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v54
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v55
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v37, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v26
; GFX11-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s1
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v53, v50
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v54, v52
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v9.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v12.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v39, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v11.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v27.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v26.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v37.l, v28.l, v12.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v51, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v52
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v25.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v11.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v10.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v50, v50
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v12.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s3
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v28
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v27.l, v11.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v26.l, v10.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v24.l, v8.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v23
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v28, v28
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v39, v38
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v28.l, v12.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, s2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v10.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v27.l, v11.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v25
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v7
+; GFX11-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v8.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v39, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v23
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v26.l, v10.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
-; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v23.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v12.l, v9.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v25.l, v9.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v23.l, v7.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v22
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v25, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v38, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v9
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v22.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v10.l, v8.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v22.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v9.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v23, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v21.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v25, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v23, v26
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v25, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v8.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v24
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v26, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v5
; GFX11-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v10.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v9.l, v8.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v22
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v21
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v26, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v27.l, v24.l, v8.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v11.l, v7.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v12.l, v5.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v20
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v28.l, v9.l, v7.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v23, v23
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v20
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v21
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v19
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v11
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v19.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v10.l, v6.l, s3
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v36.l, v7.l, v5.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v10, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v18
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v9, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, s0
+; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v5.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v22.l, v6.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v9, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v30.l, v21.l, v5.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v18.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v17
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v5, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v16
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v18.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v19
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v20, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v17.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v16.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v6.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v3.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v16, v12
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v18, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v8.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v16
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v3.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v18.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v17.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v7, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v16.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v19.l, v3.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v18, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v8
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v21, v20
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v6
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v5
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v3.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v17
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v2.l
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v11
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v12
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v16
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v18
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v0.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v1.l
-; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX11-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX11-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX11-TRUE16-NEXT: s_and_b32 s4, s5, s8
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v29.l, v8.l, v0.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v49.l, v7.l, v1.l, s4
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v48.l, v5.l, v2.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v39.l, v9.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v38.l, v6.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, v29
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v35.l, v5.l, v0.l, s3
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v34.l, v9.l, v1.l, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v33.l, v6.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v32.l, v7.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v31.l, v8.l, v4.l, s2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, v49 :: v_dual_mov_b32 v2, v48
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, v39 :: v_dual_mov_b32 v4, v38
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v36 :: v_dual_mov_b32 v6, v35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v34 :: v_dual_mov_b32 v8, v33
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, v32 :: v_dual_mov_b32 v10, v31
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v30 :: v_dual_mov_b32 v12, v37
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v35 :: v_dual_mov_b32 v1, v34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v33 :: v_dual_mov_b32 v3, v32
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v31 :: v_dual_mov_b32 v5, v30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v29 :: v_dual_mov_b32 v7, v28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, v27 :: v_dual_mov_b32 v9, v36
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_minimumnum_v32bf16:
@@ -11607,697 +11225,589 @@ define <32 x bfloat> @v_minimumnum_v32bf16(<32 x bfloat> %x, <32 x bfloat> %y) #
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v15
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v35, 0xffff0000, v14
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v38, 0xffff0000, v13
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v12
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v14
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v13
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v53, 0xffff0000, v12
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v14
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v29
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v13
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v29
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v28
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v12
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v51, 0xffff0000, v28
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v35, v35
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v15
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v38, v38
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v49, v49
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v30
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v11
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v10
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v48, v48
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v51, v51
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v34, v34
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v35, v35
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v36.l, v33.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v39.l, v65.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v50.l, v66.l, s4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v27
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v11
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v26
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v10
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v14
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v50, 0xffff0000, v30
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v29
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v52, 0xffff0000, v29
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v28
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v12
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v28
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v66, 0xffff0000, v10
; GFX12-TRUE16-NEXT: v_and_b32_e32 v98, 0xffff0000, v6
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v37, v37
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v14
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v52, v52
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v55, v55
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v49, v49
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v51, v51
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v53, v53
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v48, 0xffff0000, v15
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v55, 0xffff0000, v11
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
; GFX12-TRUE16-NEXT: v_and_b32_e32 v70, 0xffff0000, v9
; GFX12-TRUE16-NEXT: v_and_b32_e32 v86, 0xffff0000, v7
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v22
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v6
; GFX12-TRUE16-NEXT: v_and_b32_e32 v101, 0xffff0000, v22
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v146, 0xffff0000, v0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v50, v50
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v52, v52
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s5, v54, v54
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s8, v66, v66
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v66, 16, v11
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s16, v98, v98
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v37, v37
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v38, v38
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.l, v53.l, v67.l, s6
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v64.l, v68.l, s8
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v53.l, v128.l, v119.l, s22
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v64.l, v148.l, v147.l, s28
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v35.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v98.l, v36.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v128.l, v65.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v129.l, v66.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v35.l, v33.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.l, v37.l, v34.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.l, v39.l, v36.l, s4
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v25
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v9
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v23
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v49, 0xffff0000, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v14
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v13
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s6, v55, v55
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v55, 16, v12
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v27
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s10, v70, v70
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s14, v86, v86
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s17, v101, v101
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v50.l, v100.l, v99.l, s16
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v86.l, v147.l, v64.l, s29
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v129
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.l, v80.l, v71.l, s10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v80.l, v99.l, v50.l, s17
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v117.l, v64.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s16, v97, v128
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v86.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s17, v98, v129
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s28, v146, v146
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s44, v54, v54
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s47, v66, v66
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v54.l, v100.l, v99.l, s16
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v66.l, v132.l, v131.l, s24
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s5
; GFX12-TRUE16-NEXT: v_and_b32_e32 v82, 0xffff0000, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v118, 0xffff0000, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s15, v97, v97
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s29, v49, v49
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s41, v51, v51
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s43, v53, v53
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s45, v55, v55
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s56, v69, v69
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v66.l, v66.l, v36.l, s17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v51.l, v80.l, v71.l, s10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v53.l, v96.l, v87.l, s14
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v55.l, v112.l, v103.l, s18
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.l, v48.l, v147.l, s28
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v35
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v39
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v98.l, v99.l, v54.l, s17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v114.l, v131.l, v66.l, s25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v33
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v34
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v36
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v27
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v11
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v8
; GFX12-TRUE16-NEXT: v_and_b32_e32 v85, 0xffff0000, v24
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v130, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s29, v117, v97
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v66.l
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v20
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v4
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v117, 0xffff0000, v20
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v30
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s12, v82, v82
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v36.l
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v54, 0xffff0000, v27
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v23
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v7
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v114, 0xffff0000, v4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v97
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v133, 0xffff0000, v18
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v134, 0xffff0000, v1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s24, v130, v130
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.l, v84.l, v83.l, s12
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s1
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s17, s2
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v20
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v4
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s22, v118, v118
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v53.l, s15
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v54
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v100.l, v103.l, v55.l, s19
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v118.l, v147.l, v48.l, s29
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v98
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s17, v69, v130
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s18, v80, v131
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s19, v81, v132
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v65, 0xffff0000, v27
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v26
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v17
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v1
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v145, 0xffff0000, v17
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v54, v54
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s20, v114, v114
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s25, v133, v133
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v15
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s13, v85, v85
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s21, v117, v117
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s26, v134, v134
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.l, v96.l, v87.l, s14
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v54.l, v132.l, v131.l, s24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v34.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v70.l, v83.l, v48.l, s13
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v119.l, v53.l, s23
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v119.l, v33.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.h, v66.l, v36.l, s2
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v81, 0xffff0000, v25
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v69, 0xffff0000, v26
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s27, v145, v145
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v52.l, v116.l, v115.l, s20
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v55.l, v144.l, v135.l, s26
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s11, v81, v81
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v84.l, v131.l, v54.l, s25
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s7
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s9, v69, v69
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v39.l, s11
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v87.l, v49.l, s15
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v87.l, v50.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v82.l, v115.l, v52.l, s21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v115.l, v54.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v85.l, v135.l, v55.l, s27
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v135.l, v80.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s15, v96, v119
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v84.l
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v102, 0xffff0000, v5
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v100.l, v37.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v130.l, v67.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v135
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s42, v52, v52
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.l, v64.l, v38.l, s6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v34.l, s15
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v65.l, v65.l, v35.l, s16
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v21
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v5
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s18, v102, v102
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v130
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s23, v87, v135
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s27, v115, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v87.l, v33.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v65.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v51.l, v112.l, v103.l, s18
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s18, v100, v130
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v113, 0xffff0000, v21
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s9
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v102.l, v39.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v132.l, v69.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v87, 16, v87
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v52.l, v84.l, v83.l, s12
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v64.l, v116.l, v115.l, s20
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s27, v145, v145
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v30.l, s41
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v53
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v48
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v87
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v81, 16, v118
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s25, v97, v146
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v35.l, s17
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v34.l, v37.l, s18
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v36.l, v39.l, s19
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v19
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v129, 0xffff0000, v19
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s7, v65, v65
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v65, 16, v28
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s40, v50, v50
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v50.l, v68.l, v67.l, s8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v68.l, v144.l, v135.l, s26
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v51.l, s11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v52.l, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v102.l, v115.l, v64.l, s21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s42
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s24, v96, v145
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s42, v117, v81
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v37.l, s18
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s19, v113, v113
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v101.l, v38.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v131.l, v68.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v81.l, v98.l, v54.l, s25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v33
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v34
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v36
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s23, v129, v129
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s46, v65, v65
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v65.l, v128.l, v119.l, s22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v85, 16, v51
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v86, 16, v52
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v64
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v116.l, v135.l, v68.l, s27
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v135, 16, v71
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v83
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v69, 16, v102
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v132
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s15, 0, v87
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s16, 0, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v98.l, v67.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v112.l, v48.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v35.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s17, 0, v96
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v97
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v98
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v81.l, v103.l, v51.l, s19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v133.l, v70.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v131
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s20, v102, v132
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v98
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v99.l, v51.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v144.l, v81.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v133
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s19, v101, v131
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v103.l, v52.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v145.l, v82.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v112.l, v119.l, v65.l, s23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v66
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v80, 16, v114
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s22, v85, v135
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s23, v86, v144
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s27, v101, v69
+; GFX12-TRUE16-NEXT: s_and_b32 s17, s17, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v37.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v39.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s7
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s29, v113, v80
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v69.l, v71.l, v51.l, s22
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v83.l, v52.l, s23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v102.l, v64.l, s27
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, s43
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s45
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v14
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v35.l, s17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v49
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v38
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v69.l, v69.l, v39.l, s20
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s18, 0, v98
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v144, 16, v144
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s21, v112, v133
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v68.l, v68.l, v38.l, s19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v145, 16, v145
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v100.l, v69.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v34.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s24, v99, v144
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v85.l, v114.l, v66.l, s29
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v83
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s18, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s19, s2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v13
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v12
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.h, v34.l, v37.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.h, v36.l, v39.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s9
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0x8000, v64.l
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s20, v82, v133
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v114
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v84, 16, v50
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v55
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v67
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v147, 16, v100
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v38.l, v49.l, s20
+; GFX12-TRUE16-NEXT: s_and_b32 s10, s27, s10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s21, v84, v134
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s26, v99, v147
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v38
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v71
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v49.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v82, 16, v29
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v70.l, v70.l, v48.l, s21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v99.l, v68.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v35.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v113.l, v49.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v134.l, v71.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s25, v103, v145
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v101.l, v70.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v99, 16, v99
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s15, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0x8000, v39.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v114.l, v53.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v146.l, v83.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v134, 16, v134
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v80.l, v80.l, v50.l, s23
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v81.l, v81.l, v51.l, s24
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v82.l, v82.l, v52.l, s25
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v100
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s16, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v67.l, v67.l, v50.l, s21
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s20, 0, v99
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v70, 16, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s46
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0x8000, v52.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v65
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v130, 16, v112
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v80.l, v87.l, v53.l, s24
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v102
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, s47
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s44, v128, v82
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v82.l, v100.l, v55.l, s26
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v67
+; GFX12-TRUE16-NEXT: s_and_b32 s3, s20, s3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v28
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.h, v33.l, v34.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v149, 16, v13
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.h, v65.l, v35.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v38.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s19, 0, v99
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v146, 16, v146
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s22, v113, v134
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v103.l, v80.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v112.l, v81.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v113.l, v82.l
-; GFX12-TRUE16-NEXT: s_and_b32 s5, s20, s5
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v14.l, v30.l, s41
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.h, v38.l, v49.l, s3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s28, v103, v130
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v80
+; GFX12-TRUE16-NEXT: s_and_b32 s6, s23, s6
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v50.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s56
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v100
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.h, v69.l, v39.l, s5
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s6, 0x8000, v48.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s21, 0, v101
-; GFX12-TRUE16-NEXT: s_and_b32 s4, s19, s4
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s26, v114, v146
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v86.l, v86.l, v64.l, s29
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v112
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v113
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s42
-; GFX12-TRUE16-NEXT: s_and_b32 s6, s21, s6
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v50.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0x8000, v51.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s10, 0x8000, v52.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v83.l, v83.l, v53.l, s26
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v117.l, v86.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s23, 0, v103
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v112
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v113
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.h, v71.l, v52.l, s6
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v53.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s24, 0, v103
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v30
+; GFX12-TRUE16-NEXT: s_and_b32 s4, s21, s4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s44
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.h, v70.l, v48.l, s6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v118.l, v14.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e64 v128.l, v30.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v114.l, v83.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
-; GFX12-TRUE16-NEXT: s_and_b32 s8, s23, s8
-; GFX12-TRUE16-NEXT: s_and_b32 s9, s24, s9
-; GFX12-TRUE16-NEXT: s_and_b32 s10, s25, s10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v128
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0x8000, v64.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v114, 16, v114
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v117
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0x8000, v53.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v116.l, v55.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v119.l, v85.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v114
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v84.l, v84.l, v54.l, s27
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0x8000, v54.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
-; GFX12-TRUE16-NEXT: s_and_b32 s11, s26, s11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v115.l, v84.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0x8000, v55.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v37.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s28, v116, v119
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v71.l, v71.l, v49.l, s22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v49.l
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s18, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v85.l, v85.l, v55.l, s28
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.h, v67.l, v50.l, s4
+; GFX12-TRUE16-NEXT: s_and_b32 s7, s24, s7
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s43, v119, v132
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.h, v67.l, v37.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s27, 0, v115
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v102.l, v71.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v116.l, v85.l
-; GFX12-TRUE16-NEXT: s_and_b32 s12, s27, s12
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v102, 16, v102
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v102
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v116
-; GFX12-TRUE16-NEXT: s_and_b32 s7, s22, s7
-; GFX12-TRUE16-NEXT: s_and_b32 s13, s28, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.h, v80.l, v53.l, s7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v128, 16, v29
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s16, 0x8000, v13.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s15, 0x8000, v14.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s43
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v68
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s44, 0, v128
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v131, 16, v116
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v84.l, v112.l, v65.l, s28
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v30
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v69
+; GFX12-TRUE16-NEXT: s_and_b32 s16, s44, s16
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s41, v115, v131
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s16
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s43, 0, v119
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v112, 16, v81
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v87.l, v118.l, v48.l, s42
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v86.l, v116.l, v68.l, s41
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s5, 0x8000, v51.l
+; GFX12-TRUE16-NEXT: s_and_b32 s15, s43, s15
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v54.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.h, v85.l, v55.l, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s15
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s22, 0, v101
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s25, 0, v112
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v113, 16, v82
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v84
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v85
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v86
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v87
+; GFX12-TRUE16-NEXT: s_and_b32 s5, s22, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s8, s25, s8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s9, 0x8000, v55.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s11, 0x8000, v65.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s12, 0x8000, v66.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s13, 0x8000, v68.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s14, 0x8000, v48.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s26, 0, v113
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s28, 0, v115
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s29, 0, v116
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s41, 0, v117
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s42, 0, v118
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.h, v69.l, v51.l, s5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.h, v81.l, v54.l, s8
+; GFX12-TRUE16-NEXT: s_and_b32 s9, s26, s9
+; GFX12-TRUE16-NEXT: s_and_b32 s11, s28, s11
+; GFX12-TRUE16-NEXT: s_and_b32 s12, s29, s12
+; GFX12-TRUE16-NEXT: s_and_b32 s13, s41, s13
+; GFX12-TRUE16-NEXT: s_and_b32 s14, s42, s14
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.h, v82.l, v55.l, s9
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v31
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v96, 0xffff0000, v31
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v31
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v97, 0xffff0000, v31
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v98, 16, v31
; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v15.l, v31.l, s40
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.h, v68.l, v38.l, s4
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v87.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v96, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v34.l, v15.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v96.l, v32.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v87.l, v87.l, v32.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v98, v98
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v34
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.h, v71.l, v49.l, s7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v96, 16, v96
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v97.l, v87.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v32.l, v96.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v97, v97
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v98, v98
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v15
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v32
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v35.l, v31.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v96, v97
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v35
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.h, v80.l, v50.l, s8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v96.l, v32.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.h, v84.l, v65.l, s11
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v87.l, v32.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v36, v39
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v32.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.h, v81.l, v51.l, s9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v118
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v38.l, v33.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v149, v149
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.h, v83.l, v53.l, s11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v38
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.h, v82.l, v52.l, s10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v31.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v29
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v13.l, v29.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v48
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.h, v84.l, v54.l, s12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v13.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s1, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s29, s14
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v33.l, v32.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v51, v128
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v12
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.h, v86.l, v64.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v50
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v33
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v31
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.h, v83.l, v64.l, s10
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v35, v37
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v34, v39
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v27
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v33.l, v32.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v30.l, v14.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v51, v51
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v28
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v31.l, v15.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v15.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v52.l, v29.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v30.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v12.l, v28.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v51
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v53
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v32.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v33
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v31
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.h, v85.l, v66.l, s12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v34
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v35
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.h, v86.l, v68.l, s13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.h, v87.l, v48.l, s14
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s1, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v70, v70
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.h, v33.l, v32.l, s0
; GFX12-TRUE16-NEXT: v_cndmask_b16 v15.l, v31.l, v15.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v50
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v14.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v52, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v28.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v12.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v11
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v29.l, v13.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v29.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v51, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v10
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v129, v133
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v27.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v28.l, v12.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v26
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v53
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v11.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v26.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v50, v50
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v28.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v27.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v55.l, v10.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v25
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v13.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v54.l, v26.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v25.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v52, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v54
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v54, 16, v55
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v37, v39
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v28
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v26
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s1
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v53, v50
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v51
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v54, v52
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v50.l, v25.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v51.l, v9.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, s2
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v27.l, v11.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v12.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v39, v38
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v27
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v11.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v26.l, v26.l, v10.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v52.l, v27.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v53.l, v26.l
+; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s3, v39, v38
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v26
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v37.l, v28.l, v12.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v51, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v52
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v50, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s3
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v25.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v11.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v28
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v10.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v50, v50
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v28.l, v12.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s3
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v28
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v28.l, v12.l, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v25.l, v25.l, v9.l, s3
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s0, s2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v10.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v27.l, v11.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v26.l, v10.l, s1
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v24.l, v8.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v23
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v28, v28
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v25
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v27.l, v11.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v25
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v38, v38
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v39, 16, v7
+; GFX12-TRUE16-NEXT: s_and_b32 s3, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v37
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v24.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v38, v38
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v9.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v24.l, v10.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v25.l, v8.l
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v39, v39
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v23
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v26.l, v10.l, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v23.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
-; GFX12-TRUE16-NEXT: s_and_b32 s1, vcc_lo, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v23.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v24
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v12.l, v9.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v25.l, v9.l, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v23.l, v7.l, vcc_lo
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v22
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v25, v24
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v11.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v7.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v22
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v38, v37
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v9
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v22.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v25, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v10.l, v8.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v24.l, v24.l, v8.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v22.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v9.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v23, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v10.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v6.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v23, v26
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v25, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v22
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v21.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v7.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v11.l, v11.l, v7.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v12.l, v21.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v11.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v8.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v24
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v22
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v22.l, v12.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v23.l, v5.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v10.l, v10.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v26, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v21
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v5
; GFX12-TRUE16-NEXT: s_and_b32 s2, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v21
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v21.l, v10.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v23
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v7.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v22.l, v22.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v26, v25
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v9.l, v8.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v23, v22
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v21
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v27.l, v24.l, v8.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v21.l, v21.l, v5.l, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v11.l, v7.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v12.l, v5.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v20
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v28.l, v9.l, v7.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v23, v23
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v20
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v21
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v7.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v20.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v19
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: s_and_b32 s3, s0, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v11
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v19.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v9, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v19
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v20.l, v4.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v19.l, s3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v5.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v10.l, v6.l, s3
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v22.l, v6.l, s0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v19.l, v19.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v9, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v20, v20
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v0
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s2, s4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v18
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v36.l, v7.l, v5.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v10, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v12, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v18
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v30.l, v21.l, v5.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v18.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v17
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v5, v5
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v16
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v19
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v20, v20
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v18.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v17.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v6, v6
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v16.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v18.l, v2.l, s2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v8.l, v4.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v4.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v17.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v11, v10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v16.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v17.l, v8.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v18.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v19.l, v6.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v17.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v7, v5
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v16.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v0
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v3.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v16, v12
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v18, v17
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v19
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v19.l, v3.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v18, v17
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v8
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v21, v20
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v2.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v2.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v7
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v1.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v8.l, v8.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v10
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v7.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v16.l, v8.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v16
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v3.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v10
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v9.l, v9.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v22
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v6
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v16
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v9
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v3.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v17
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v2.l
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v11
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v12
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s5, 0, v16
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s6, 0, v18
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s7, 0x8000, v0.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s8, 0x8000, v1.l
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s2
-; GFX12-TRUE16-NEXT: s_and_b32 s2, s3, s4
+; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s0, s1
+; GFX12-TRUE16-NEXT: s_and_b32 s1, s3, s4
; GFX12-TRUE16-NEXT: s_and_b32 s3, s6, s7
; GFX12-TRUE16-NEXT: s_and_b32 s4, s5, s8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v29.l, v8.l, v0.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v49.l, v7.l, v1.l, s4
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v48.l, v5.l, v2.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v39.l, v9.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v38.l, v6.l, v4.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v35.l, v5.l, v0.l, s3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v34.l, v9.l, v1.l, s4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v33.l, v6.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v32.l, v7.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v31.l, v8.l, v4.l, s2
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v29 :: v_dual_mov_b32 v1, v49
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v48 :: v_dual_mov_b32 v3, v39
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, v35 :: v_dual_mov_b32 v1, v34
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, v33 :: v_dual_mov_b32 v3, v32
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v38 :: v_dual_mov_b32 v5, v36
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, v35 :: v_dual_mov_b32 v7, v34
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v33 :: v_dual_mov_b32 v9, v32
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v10, v31 :: v_dual_mov_b32 v11, v30
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v12, v37
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v31 :: v_dual_mov_b32 v5, v30
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, v29 :: v_dual_mov_b32 v7, v28
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v27 :: v_dual_mov_b32 v9, v36
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: v_minimumnum_v32bf16:
@@ -13067,21 +12577,17 @@ define bfloat @v_minimumnum_bf16_no_ieee(bfloat %x, bfloat %y) #0 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -13127,19 +12633,15 @@ define bfloat @v_minimumnum_bf16_no_ieee(bfloat %x, bfloat %y) #0 {
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.h, v0.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v2
; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -13371,17 +12873,11 @@ define <2 x bfloat> @v_minimumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v7
@@ -13390,11 +12886,8 @@ define <2 x bfloat> @v_minimumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v2.l
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -13472,17 +12965,11 @@ define <2 x bfloat> @v_minimumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v2.l, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s2
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v6
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v7
@@ -13493,11 +12980,8 @@ define <2 x bfloat> @v_minimumnum_v2bf16_no_ieee(<2 x bfloat> %x, <2 x bfloat> %
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v0.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v2.l
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.l, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
@@ -13814,58 +13298,48 @@ define <3 x bfloat> @v_minimumnum_v3bf16_no_ieee(<3 x bfloat> %x, <3 x bfloat> %
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v7
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v9, v8
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v10, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v6.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX11-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
@@ -13943,64 +13417,54 @@ define <3 x bfloat> @v_minimumnum_v3bf16_no_ieee(<3 x bfloat> %x, <3 x bfloat> %
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v9, v9
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v2
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v9, v9
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v10, v10
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v7, v7
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v5.l, v6.l, s1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v7
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v9, v8
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v11, v10
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v10, v11
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v6.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v6.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v4
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v0.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v6
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s3, 0, v7
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s4, 0, v8
; GFX12-TRUE16-NEXT: s_and_b32 s2, s2, vcc_lo
; GFX12-TRUE16-NEXT: s_and_b32 s0, s3, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, s2
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v6.l, s2
; GFX12-TRUE16-NEXT: s_and_b32 s1, s4, s1
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14407,74 +13871,61 @@ define <4 x bfloat> @v_minimumnum_v4bf16_no_ieee(<4 x bfloat> %x, <4 x bfloat> %
; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v11, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v0.l
; GFX11-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v13, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX11-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
; GFX11-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
@@ -14574,85 +14025,75 @@ define <4 x bfloat> @v_minimumnum_v4bf16_no_ieee(<4 x bfloat> %x, <4 x bfloat> %
; GFX12-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v6.l, v5.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v3
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v5.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v2
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s3, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s0
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v11, v11
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s2, v6, v6
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v12, v12
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v6.l, v10.l, v9.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v4.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.l
-; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s4, v13, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v9.l, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v6
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s1
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s3
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v6.l, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v6.l
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s2
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s4
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
-; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v11.l, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v12.l, v2.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v3.l, s0
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v7, v7
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v8, v8
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v4.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v9.l, v4.l, vcc_lo
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
+; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s2, v11, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v1
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v0
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v6.l, s2
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v8, v9
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.l
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v11, v10
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s3, 0x8000, v0.l
; GFX12-TRUE16-NEXT: v_cmp_lt_f32_e64 s1, v13, v12
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v5
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v6.l, vcc_lo
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v4.l, vcc_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v1.l, s0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
; GFX12-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v0.l, s1
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v9.l, v7.l
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v8.l, v3.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v3
; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s4, 0x8000, v1.l
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v2
; GFX12-TRUE16-NEXT: s_and_b32 s5, vcc_lo, s0
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v6.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v9
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v4.l, s5
-; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v8
+; GFX12-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v4.l
+; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s1, 0, v9
; GFX12-TRUE16-NEXT: v_cmp_eq_f32_e64 s2, 0, v10
-; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v6.l, s0
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v6.l, s5
+; GFX12-TRUE16-NEXT: s_and_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_and_b32 s1, s1, s4
-; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v4.l, s0
+; GFX12-TRUE16-NEXT: s_and_b32 s0, s2, s3
; GFX12-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/minmax.ll b/llvm/test/CodeGen/AMDGPU/minmax.ll
index 93c9e67bda589f..3d9f1434b7ecae 100644
--- a/llvm/test/CodeGen/AMDGPU/minmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/minmax.ll
@@ -1052,8 +1052,7 @@ define amdgpu_ps half @test_minmax_f16_ieee_false(half %a, half %b, half %c) {
define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b, half inreg %c, ptr addrspace(1) inreg %out) {
; SDAG-GFX11-TRUE16-LABEL: s_test_minmax_f16_ieee_false:
; SDAG-GFX11-TRUE16: ; %bb.0:
-; SDAG-GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; SDAG-GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; SDAG-GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
; SDAG-GFX11-TRUE16-NEXT: s_mov_b32 s5, s4
; SDAG-GFX11-TRUE16-NEXT: s_mov_b32 s4, s3
; SDAG-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, s0, s1, v0.l
@@ -1090,8 +1089,7 @@ define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b
;
; SDAG-GFX1170-TRUE16-LABEL: s_test_minmax_f16_ieee_false:
; SDAG-GFX1170-TRUE16: ; %bb.0:
-; SDAG-GFX1170-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; SDAG-GFX1170-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; SDAG-GFX1170-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
; SDAG-GFX1170-TRUE16-NEXT: s_mov_b32 s5, s4
; SDAG-GFX1170-TRUE16-NEXT: s_mov_b32 s4, s3
; SDAG-GFX1170-TRUE16-NEXT: v_maxmin_num_f16 v0.l, s0, s1, v0.l
@@ -1131,8 +1129,7 @@ define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b
;
; SDAG-GFX12-TRUE16-LABEL: s_test_minmax_f16_ieee_false:
; SDAG-GFX12-TRUE16: ; %bb.0:
-; SDAG-GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; SDAG-GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; SDAG-GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
; SDAG-GFX12-TRUE16-NEXT: s_mov_b32 s5, s4
; SDAG-GFX12-TRUE16-NEXT: s_mov_b32 s4, s3
; SDAG-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, s0, s1, v0.l
@@ -1176,8 +1173,7 @@ define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b
; SDAG-GFX1250-TRUE16-NEXT: s_mov_b64 s[64:65], 0
; SDAG-GFX1250-TRUE16-NEXT: v_nop
; SDAG-GFX1250-TRUE16-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; SDAG-GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
-; SDAG-GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; SDAG-GFX1250-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
; SDAG-GFX1250-TRUE16-NEXT: s_mov_b32 s5, s4
; SDAG-GFX1250-TRUE16-NEXT: s_mov_b32 s4, s3
; SDAG-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, s0, s1, v0.l
diff --git a/llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll b/llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
index 99b77b1517bd2b..70a28cc4dbd6fb 100644
--- a/llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
+++ b/llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
@@ -11,12 +11,14 @@ define amdgpu_kernel void @exp_f16(ptr addrspace(1) %ptr) {
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; CHECK-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 [[S_LOAD_DWORDX2_IMM]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (volatile "amdgpu-noclobber" load (s16) from %ir.ptr.load, addrspace 1)
; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, [[DEF]], %subreg.hi16
- ; CHECK-NEXT: [[V_EXP_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_EXP_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_EXP_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[REG_SEQUENCE1]]
- ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY1]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[V_EXP_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_EXP_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_EXP_F16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY2]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
; CHECK-NEXT: S_ENDPGM 0
%val = load volatile half, ptr addrspace(1) %ptr
%res = call half @llvm.amdgcn.exp2.f16(half %val)
@@ -34,12 +36,14 @@ define amdgpu_kernel void @log_f16(ptr addrspace(1) %ptr) {
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; CHECK-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 [[S_LOAD_DWORDX2_IMM]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (volatile "amdgpu-noclobber" load (s16) from %ir.ptr.load, addrspace 1)
; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, [[DEF]], %subreg.hi16
- ; CHECK-NEXT: [[V_LOG_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_LOG_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_LOG_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[REG_SEQUENCE1]]
- ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY1]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[V_LOG_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_LOG_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_LOG_F16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY2]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
; CHECK-NEXT: S_ENDPGM 0
%val = load volatile half, ptr addrspace(1) %ptr
%res = call half @llvm.amdgcn.log.f16(half %val)
@@ -57,12 +61,14 @@ define amdgpu_kernel void @rcp_f16(ptr addrspace(1) %ptr) {
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; CHECK-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 [[S_LOAD_DWORDX2_IMM]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (volatile "amdgpu-noclobber" load (s16) from %ir.ptr.load, addrspace 1)
; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, [[DEF]], %subreg.hi16
- ; CHECK-NEXT: [[V_RCP_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_RCP_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_RCP_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[REG_SEQUENCE1]]
- ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY1]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[V_RCP_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_RCP_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_RCP_F16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY2]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
; CHECK-NEXT: S_ENDPGM 0
%val = load volatile half, ptr addrspace(1) %ptr
%res = call half @llvm.amdgcn.rcp.f16(half %val)
@@ -80,12 +86,14 @@ define amdgpu_kernel void @rsq_f16(ptr addrspace(1) %ptr) {
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; CHECK-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 [[S_LOAD_DWORDX2_IMM]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (volatile "amdgpu-noclobber" load (s16) from %ir.ptr.load, addrspace 1)
; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, [[DEF]], %subreg.hi16
- ; CHECK-NEXT: [[V_RSQ_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_RSQ_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_RSQ_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[REG_SEQUENCE1]]
- ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY1]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[V_RSQ_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_RSQ_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_RSQ_F16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY2]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
; CHECK-NEXT: S_ENDPGM 0
%val = load volatile half, ptr addrspace(1) %ptr
%res = call half @llvm.amdgcn.rsq.f16(half %val)
@@ -103,12 +111,14 @@ define amdgpu_kernel void @sqrt_f16(ptr addrspace(1) %ptr) {
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; CHECK-NEXT: [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_:%[0-9]+]]:vgpr_16 = GLOBAL_LOAD_SHORT_D16_SADDR_t16 [[S_LOAD_DWORDX2_IMM]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (volatile "amdgpu-noclobber" load (s16) from %ir.ptr.load, addrspace 1)
; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, [[DEF]], %subreg.hi16
- ; CHECK-NEXT: [[V_SQRT_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_SQRT_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_SQRT_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[REG_SEQUENCE1]]
- ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY1]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
+ ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE killed [[GLOBAL_LOAD_SHORT_D16_SADDR_t16_]], %subreg.lo16, killed [[DEF]], %subreg.hi16
+ ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[V_SQRT_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_SQRT_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_SQRT_F16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi16
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; CHECK-NEXT: GLOBAL_STORE_SHORT_SADDR_t16 [[V_MOV_B32_e32_]], killed [[COPY2]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s16) into %ir.ptr.load, addrspace 1)
; CHECK-NEXT: S_ENDPGM 0
%val = load volatile half, ptr addrspace(1) %ptr
%res = call half @llvm.amdgcn.sqrt.f16(half %val)
diff --git a/llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll b/llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
index 10287c131acdbb..eabef7a71dc65d 100644
--- a/llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
+++ b/llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
@@ -57,22 +57,23 @@ define amdgpu_kernel void @test_bitcast_llc_v128i8_v16i8(ptr addrspace(1) %out,
;
; GFX11-LABEL: test_bitcast_llc_v128i8_v16i8:
; GFX11: ; %bb.0: ; %entry
-; GFX11-NEXT: v_perm_b32 v0, s0, s0, 0x6050400
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8
+; GFX11-NEXT: v_perm_b32 v0, v0, v0, 0x6050400
; GFX11-NEXT: v_mov_b32_e32 v35, 0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v0
; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_mov_b32_e32 v1, v0
; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: v_mov_b32_e32 v3, v0
-; GFX11-NEXT: v_mov_b32_e32 v31, v0
-; GFX11-NEXT: v_mov_b32_e32 v4, v0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_lshl_b32 m0, s2, 2
+; GFX11-NEXT: v_mov_b32_e32 v31, v0
+; GFX11-NEXT: v_mov_b32_e32 v4, v0
; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: v_mov_b32_e32 v6, v0
; GFX11-NEXT: v_mov_b32_e32 v7, v0
@@ -108,8 +109,8 @@ define amdgpu_kernel void @test_bitcast_llc_v128i8_v16i8(ptr addrspace(1) %out,
;
; GFX12-LABEL: test_bitcast_llc_v128i8_v16i8:
; GFX12: ; %bb.0: ; %entry
-; GFX12-NEXT: v_perm_b32 v0, s0, s0, 0x6050400
; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
+; GFX12-NEXT: v_perm_b32 v0, v0, v0, 0x6050400
; GFX12-NEXT: v_mov_b32_e32 v35, 0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_and_b32_e32 v1, 0xffff, v0
diff --git a/llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll b/llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
index 8de7a0de592c7e..a1e013f3400b1c 100644
--- a/llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
+++ b/llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
@@ -51,13 +51,21 @@ define amdgpu_cs float @v_s_exp_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_exp_f16(half inreg %src) {
-; GFX12-SDAG-LABEL: v_s_exp_f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_s_exp_f16 s0, s0
-; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_exp_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_exp_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_exp_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_exp_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GFX12-GISEL-TRUE16-LABEL: v_s_exp_f16:
; GFX12-GISEL-TRUE16: ; %bb.0:
@@ -95,13 +103,29 @@ define amdgpu_cs float @v_s_amdgcn_exp_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_amdgcn_exp_f16(half inreg %src) {
-; GFX12-LABEL: v_s_amdgcn_exp_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: v_s_exp_f16 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_amdgcn_exp_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_exp_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_amdgcn_exp_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_exp_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_s_amdgcn_exp_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: v_s_exp_f16 s0, s0
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
;
; GCN-GISEL-LABEL: v_s_amdgcn_exp_f16:
; GCN-GISEL: ; %bb.0:
@@ -166,13 +190,21 @@ define amdgpu_cs float @v_s_log_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_log_f16(half inreg %src) {
-; GFX12-SDAG-LABEL: v_s_log_f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_s_log_f16 s0, s0
-; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_log_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_log_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_log_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_log_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GFX12-GISEL-TRUE16-LABEL: v_s_log_f16:
; GFX12-GISEL-TRUE16: ; %bb.0:
@@ -210,13 +242,29 @@ define amdgpu_cs float @v_s_amdgcn_log_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_amdgcn_log_f16(half inreg %src) {
-; GFX12-LABEL: v_s_amdgcn_log_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: v_s_log_f16 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_amdgcn_log_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_log_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_amdgcn_log_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_log_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_s_amdgcn_log_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: v_s_log_f16 s0, s0
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
;
; GCN-GISEL-LABEL: v_s_amdgcn_log_f16:
; GCN-GISEL: ; %bb.0:
@@ -325,13 +373,29 @@ define amdgpu_cs float @v_s_rcp_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_rcp_f16(half inreg %src) {
-; GFX12-LABEL: v_s_rcp_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: v_s_rcp_f16 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_rcp_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_rcp_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_rcp_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_rcp_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_s_rcp_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: v_s_rcp_f16 s0, s0
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
;
; GCN-GISEL-LABEL: v_s_rcp_f16:
; GCN-GISEL: ; %bb.0:
@@ -485,13 +549,29 @@ define amdgpu_cs float @v_s_rsq_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_rsq_f16(half inreg %src) {
-; GFX12-LABEL: v_s_rsq_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: v_s_rsq_f16 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_rsq_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_rsq_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_rsq_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_rsq_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_s_rsq_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: v_s_rsq_f16 s0, s0
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
;
; GCN-GISEL-LABEL: v_s_rsq_f16:
; GCN-GISEL: ; %bb.0:
@@ -615,13 +695,29 @@ define amdgpu_cs float @v_s_sqrt_f32(float inreg %src) {
}
define amdgpu_cs half @v_s_sqrt_f16(half inreg %src) {
-; GFX12-LABEL: v_s_sqrt_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: v_s_sqrt_f16 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_s_sqrt_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_s_sqrt_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_s_sqrt_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
;
; GCN-GISEL-LABEL: v_s_sqrt_f16:
; GCN-GISEL: ; %bb.0:
@@ -649,13 +745,29 @@ define amdgpu_cs float @v_amdgcn_sqrt_f32(float inreg %src) {
}
define amdgpu_cs half @v_amdgcn_sqrt_f16(half inreg %src) {
-; GFX12-LABEL: v_amdgcn_sqrt_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: v_s_sqrt_f16 s0, s0
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: v_amdgcn_sqrt_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: v_amdgcn_sqrt_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_amdgcn_sqrt_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: v_s_sqrt_f16 s0, s0
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
;
; GCN-GISEL-LABEL: v_amdgcn_sqrt_f16:
; GCN-GISEL: ; %bb.0:
@@ -783,13 +895,21 @@ define amdgpu_cs float @srcmods_neg_f32(float inreg %src) {
}
define amdgpu_cs half @srcmods_abs_f16(half inreg %src) {
-; GFX12-SDAG-LABEL: srcmods_abs_f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_s_log_f16 s0, |s0|
-; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: srcmods_abs_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_log_f16 s0, |s0|
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: srcmods_abs_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_log_f16 s0, |s0|
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GFX12-GISEL-TRUE16-LABEL: srcmods_abs_f16:
; GFX12-GISEL-TRUE16: ; %bb.0:
@@ -811,13 +931,21 @@ define amdgpu_cs half @srcmods_abs_f16(half inreg %src) {
}
define amdgpu_cs half @srcmods_neg_f16(half inreg %src) {
-; GFX12-SDAG-LABEL: srcmods_neg_f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: v_s_log_f16 s0, -s0
-; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: ; return to shader part epilog
+; GFX12-SDAG-TRUE16-LABEL: srcmods_neg_f16:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: v_s_log_f16 s0, -s0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-TRUE16-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-FAKE16-LABEL: srcmods_neg_f16:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: v_s_log_f16 s0, -s0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GFX12-GISEL-TRUE16-LABEL: srcmods_neg_f16:
; GFX12-GISEL-TRUE16: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll b/llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
index 965dc1c048b903..628985e024c436 100644
--- a/llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
+++ b/llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -global-isel=0 -mtriple=amdgpu11.50 < %s | FileCheck %s --check-prefixes=CHECK,SDAG
+; RUN: llc -global-isel=0 -mtriple=amdgpu11.50 < %s | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-GFX11
; RUN: llc -global-isel=1 -mtriple=amdgpu11.50 < %s | FileCheck %s --check-prefixes=CHECK,GISEL-GFX11
-; RUN: llc -global-isel=0 -mtriple=amdgpu12.00 < %s | FileCheck %s --check-prefixes=CHECK,SDAG
+; RUN: llc -global-isel=0 -mtriple=amdgpu12.00 < %s | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-GFX12
; RUN: llc -global-isel=1 -mtriple=amdgpu12.00 < %s | FileCheck %s --check-prefixes=CHECK,GISEL-GFX12
define amdgpu_vs float @sitofp_i32_to_f32(i32 inreg %val) {
@@ -45,19 +45,63 @@ define amdgpu_vs i32 @fptoui_f32_to_u32(float inreg %val) {
}
define amdgpu_vs i16 @fptosi_f32_to_i16(float inreg %val) {
-; CHECK-LABEL: fptosi_f32_to_i16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_cvt_i32_f32 s0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-GFX11-LABEL: fptosi_f32_to_i16:
+; SDAG-GFX11: ; %bb.0:
+; SDAG-GFX11-NEXT: s_cvt_i32_f32 s0, s0
+; SDAG-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; SDAG-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; SDAG-GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; SDAG-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: fptosi_f32_to_i16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_cvt_i32_f32 s0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; SDAG-GFX12-LABEL: fptosi_f32_to_i16:
+; SDAG-GFX12: ; %bb.0:
+; SDAG-GFX12-NEXT: s_cvt_i32_f32 s0, s0
+; SDAG-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; SDAG-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; SDAG-GFX12-NEXT: v_readfirstlane_b32 s0, v0
+; SDAG-GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
+; SDAG-GFX12-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: fptosi_f32_to_i16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_cvt_i32_f32 s0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = fptosi float %val to i16
ret i16 %res
}
define amdgpu_vs i16 @fptoui_f32_to_u16(float inreg %val) {
-; CHECK-LABEL: fptoui_f32_to_u16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_cvt_u32_f32 s0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-GFX11-LABEL: fptoui_f32_to_u16:
+; SDAG-GFX11: ; %bb.0:
+; SDAG-GFX11-NEXT: s_cvt_u32_f32 s0, s0
+; SDAG-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; SDAG-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; SDAG-GFX11-NEXT: v_readfirstlane_b32 s0, v0
+; SDAG-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: fptoui_f32_to_u16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_cvt_u32_f32 s0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; SDAG-GFX12-LABEL: fptoui_f32_to_u16:
+; SDAG-GFX12: ; %bb.0:
+; SDAG-GFX12-NEXT: s_cvt_u32_f32 s0, s0
+; SDAG-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; SDAG-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; SDAG-GFX12-NEXT: v_readfirstlane_b32 s0, v0
+; SDAG-GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
+; SDAG-GFX12-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: fptoui_f32_to_u16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_cvt_u32_f32 s0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = fptoui float %val to i16
ret i16 %res
}
@@ -102,12 +146,26 @@ define amdgpu_vs float @fpext_hif16_to_32(<2 x half> inreg %val) {
}
define amdgpu_vs half @fptrunc_f32_to_f16(float inreg %val) {
-; CHECK-LABEL: fptrunc_f32_to_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_cvt_f16_f32 s0, s0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-LABEL: fptrunc_f32_to_f16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: s_cvt_f16_f32 s0, s0
+; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: fptrunc_f32_to_f16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_cvt_f16_f32 s0, s0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: fptrunc_f32_to_f16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_cvt_f16_f32 s0, s0
+; GISEL-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = fptrunc float %val to half
ret half %res
}
@@ -167,34 +225,76 @@ define amdgpu_vs float @frint_f32(float inreg %val) {
}
define amdgpu_vs half @fceil_f16(half inreg %val) {
-; CHECK-LABEL: fceil_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_ceil_f16 s0, s0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-LABEL: fceil_f16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: s_ceil_f16 s0, s0
+; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: fceil_f16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_ceil_f16 s0, s0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: fceil_f16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_ceil_f16 s0, s0
+; GISEL-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = call half @llvm.ceil.f16(half %val)
ret half %res
}
define amdgpu_vs half @ffloor_f16(half inreg %val) {
-; CHECK-LABEL: ffloor_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_floor_f16 s0, s0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-LABEL: ffloor_f16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: s_floor_f16 s0, s0
+; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: ffloor_f16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_floor_f16 s0, s0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: ffloor_f16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_floor_f16 s0, s0
+; GISEL-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = call half @llvm.floor.f16(half %val)
ret half %res
}
define amdgpu_vs half @ftrunc_f16(half inreg %val) {
-; CHECK-LABEL: ftrunc_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_trunc_f16 s0, s0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-LABEL: ftrunc_f16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: s_trunc_f16 s0, s0
+; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: ftrunc_f16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_trunc_f16 s0, s0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: ftrunc_f16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_trunc_f16 s0, s0
+; GISEL-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = call half @llvm.trunc.f16(half %val)
ret half %res
}
@@ -204,7 +304,7 @@ define amdgpu_vs half @frint_f16(half inreg %val) {
; SDAG: ; %bb.0:
; SDAG-NEXT: s_rndne_f16 s0, s0
; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; SDAG-NEXT: v_mov_b32_e32 v0, s0
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
; SDAG-NEXT: ; return to shader part epilog
;
; GISEL-GFX11-LABEL: frint_f16:
@@ -243,25 +343,57 @@ define amdgpu_vs i32 @fptoui_f16_to_i32(half inreg %x) {
}
define amdgpu_vs half @sitofp_i32_to_f16(i32 inreg %x) {
-; CHECK-LABEL: sitofp_i32_to_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_cvt_f32_i32 s0, s0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
-; CHECK-NEXT: s_cvt_f16_f32 s0, s0
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-LABEL: sitofp_i32_to_f16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: s_cvt_f32_i32 s0, s0
+; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; SDAG-NEXT: s_cvt_f16_f32 s0, s0
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: sitofp_i32_to_f16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_cvt_f32_i32 s0, s0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GISEL-GFX11-NEXT: s_cvt_f16_f32 s0, s0
+; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: sitofp_i32_to_f16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_cvt_f32_i32 s0, s0
+; GISEL-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GISEL-GFX12-NEXT: s_cvt_f16_f32 s0, s0
+; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = sitofp i32 %x to half
ret half %res
}
define amdgpu_vs half @uitofp_i32_to_f16(i32 inreg %x) {
-; CHECK-LABEL: uitofp_i32_to_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_cvt_f32_u32 s0, s0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
-; CHECK-NEXT: s_cvt_f16_f32 s0, s0
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; SDAG-LABEL: uitofp_i32_to_f16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: s_cvt_f32_u32 s0, s0
+; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; SDAG-NEXT: s_cvt_f16_f32 s0, s0
+; SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX11-LABEL: uitofp_i32_to_f16:
+; GISEL-GFX11: ; %bb.0:
+; GISEL-GFX11-NEXT: s_cvt_f32_u32 s0, s0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GISEL-GFX11-NEXT: s_cvt_f16_f32 s0, s0
+; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX11-NEXT: ; return to shader part epilog
+;
+; GISEL-GFX12-LABEL: uitofp_i32_to_f16:
+; GISEL-GFX12: ; %bb.0:
+; GISEL-GFX12-NEXT: s_cvt_f32_u32 s0, s0
+; GISEL-GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GISEL-GFX12-NEXT: s_cvt_f16_f32 s0, s0
+; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX12-NEXT: ; return to shader part epilog
%res = uitofp i32 %x to half
ret half %res
}
diff --git a/llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll b/llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
index 25d29579583f23..43a1bcf934506f 100644
--- a/llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
+++ b/llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=amdgpu11.50 < %s | FileCheck -check-prefixes=CHECK,GFX1150 %s
-; RUN: llc -mtriple=amdgpu11.50 -global-isel < %s | FileCheck -check-prefixes=CHECK,GFX1150 %s
-; RUN: llc -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=CHECK,GFX12 %s
-; RUN: llc -mtriple=amdgpu12.00 -global-isel < %s | FileCheck -check-prefixes=CHECK,GFX12 %s
+; RUN: llc -mtriple=amdgpu11.50 < %s | FileCheck -check-prefixes=CHECK,GFX1150,GFX1150-SDAG %s
+; RUN: llc -mtriple=amdgpu11.50 -global-isel < %s | FileCheck -check-prefixes=CHECK,GFX1150,GFX1150-GISEL %s
+; RUN: llc -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=CHECK,GFX12,GFX12-SDAG %s
+; RUN: llc -mtriple=amdgpu12.00 -global-isel < %s | FileCheck -check-prefixes=CHECK,GFX12,GFX12-GISEL %s
define amdgpu_vs float @fadd_f32(float inreg %a, float inreg %b) {
; CHECK-LABEL: fadd_f32:
@@ -74,70 +74,161 @@ define amdgpu_vs float @fmax_f32(float inreg %a, float inreg %b) {
}
define amdgpu_vs half @fadd_f16(half inreg %a, half inreg %b) {
-; CHECK-LABEL: fadd_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_add_f16 s0, s0, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fadd_f16:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_add_f16 s0, s0, s1
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX1150-GISEL-LABEL: fadd_f16:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_add_f16 s0, s0, s1
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fadd_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_add_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fadd_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_add_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%add = fadd half %a, %b
ret half %add
}
define amdgpu_vs half @fsub_f16(half inreg %a, half inreg %b) {
-; CHECK-LABEL: fsub_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_sub_f16 s0, s0, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fsub_f16:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_sub_f16 s0, s0, s1
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX1150-GISEL-LABEL: fsub_f16:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_sub_f16 s0, s0, s1
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fsub_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_sub_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fsub_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_sub_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%sub = fsub half %a, %b
ret half %sub
}
define amdgpu_vs half @fmul_f16(half inreg %a, half inreg %b) {
-; CHECK-LABEL: fmul_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_mul_f16 s0, s0, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fmul_f16:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_mul_f16 s0, s0, s1
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX1150-GISEL-LABEL: fmul_f16:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_mul_f16 s0, s0, s1
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fmul_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_mul_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fmul_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_mul_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%mul = fmul half %a, %b
ret half %mul
}
define amdgpu_vs half @fmin_f16(half inreg %a, half inreg %b) {
-; GFX1150-LABEL: fmin_f16:
-; GFX1150: ; %bb.0:
-; GFX1150-NEXT: s_min_f16 s0, s0, s1
-; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-NEXT: v_mov_b32_e32 v0, s0
-; GFX1150-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fmin_f16:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_min_f16 s0, s0, s1
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: fmin_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_min_num_f16 s0, s0, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX1150-GISEL-LABEL: fmin_f16:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_min_f16 s0, s0, s1
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fmin_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fmin_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%min = call half @llvm.minnum.f16(half %a, half %b)
ret half %min
}
define amdgpu_vs half @fmax_f16(half inreg %a, half inreg %b) {
-; GFX1150-LABEL: fmax_f16:
-; GFX1150: ; %bb.0:
-; GFX1150-NEXT: s_max_f16 s0, s0, s1
-; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1150-NEXT: v_mov_b32_e32 v0, s0
-; GFX1150-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fmax_f16:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_max_f16 s0, s0, s1
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: fmax_f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_max_num_f16 s0, s0, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX1150-GISEL-LABEL: fmax_f16:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_max_f16 s0, s0, s1
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fmax_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fmax_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%max = call half @llvm.maxnum.f16(half %a, half %b)
ret half %max
}
@@ -182,27 +273,78 @@ define amdgpu_vs float @fmac_f32_with_mov(float inreg %a, float inreg %b, float
}
define amdgpu_vs half @fmac_f16(half inreg %a, half inreg %b, half inreg %c) {
-; CHECK-LABEL: fmac_f16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_fmac_f16 s0, s1, s2
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fmac_f16:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_fmac_f16 s0, s1, s2
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX1150-GISEL-LABEL: fmac_f16:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_fmac_f16 s0, s1, s2
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fmac_f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_fmac_f16 s0, s1, s2
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fmac_f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_fmac_f16 s0, s1, s2
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%res = call half @llvm.fma.f16(half %b, half %c, half %a)
ret half %res
}
; Check selection of mov + fmac if src2 of fmac has a use later
define amdgpu_vs half @fmac_f16_with_mov(half inreg %a, half inreg %b, half inreg %c) {
-; CHECK-LABEL: fmac_f16_with_mov:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: s_mov_b32 s3, s2
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
-; CHECK-NEXT: s_fmac_f16 s3, s0, s1
-; CHECK-NEXT: s_add_f16 s0, s3, s2
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; CHECK-NEXT: v_mov_b32_e32 v0, s0
-; CHECK-NEXT: ; return to shader part epilog
+; GFX1150-SDAG-LABEL: fmac_f16_with_mov:
+; GFX1150-SDAG: ; %bb.0:
+; GFX1150-SDAG-NEXT: s_mov_b32 s3, s2
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: s_fmac_f16 s3, s0, s1
+; GFX1150-SDAG-NEXT: s_add_f16 s0, s3, s2
+; GFX1150-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX1150-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX1150-GISEL-LABEL: fmac_f16_with_mov:
+; GFX1150-GISEL: ; %bb.0:
+; GFX1150-GISEL-NEXT: s_mov_b32 s3, s2
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: s_fmac_f16 s3, s0, s1
+; GFX1150-GISEL-NEXT: s_add_f16 s0, s3, s2
+; GFX1150-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1150-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1150-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX12-SDAG-LABEL: fmac_f16_with_mov:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_mov_b32 s3, s2
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: s_fmac_f16 s3, s0, s1
+; GFX12-SDAG-NEXT: s_add_f16 s0, s3, s2
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: fmac_f16_with_mov:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_mov_b32 s3, s2
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: s_fmac_f16 s3, s0, s1
+; GFX12-GISEL-NEXT: s_add_f16 s0, s3, s2
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%fma = call half @llvm.fma.f16(half %a, half %b, half %c)
%res = fadd half %fma, %c
ret half %res
diff --git a/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll b/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
index abea713b453cd2..18742224bfb0a5 100644
--- a/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
@@ -21,10 +21,9 @@ define amdgpu_kernel void @scalar_to_vector_i32 (ptr addrspace(1) %a, ptr addrsp
; GFX11-REAL16-NEXT: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR killed [[S_LOAD_DWORDX2_IMM]], killed [[V_LSHLREV_B32_e64_]], 0, 0, implicit $exec :: (load (s32) from %ir.in.gep1, addrspace 1)
; GFX11-REAL16-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 16
; GFX11-REAL16-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 killed [[S_MOV_B32_2]], [[GLOBAL_LOAD_DWORD_SADDR]], implicit $exec
- ; GFX11-REAL16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[V_LSHRREV_B32_e64_]].lo16
+ ; GFX11-REAL16-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY killed [[V_LSHRREV_B32_e64_]]
; GFX11-REAL16-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
- ; GFX11-REAL16-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY2]]
- ; GFX11-REAL16-NEXT: [[S_PACK_HL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_HL_B32_B16 [[COPY3]], killed [[COPY4]]
+ ; GFX11-REAL16-NEXT: [[S_PACK_HL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_HL_B32_B16 [[COPY3]], killed [[COPY2]]
; GFX11-REAL16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[S_PACK_HL_B32_B16_]], %subreg.sub0, [[S_PACK_HL_B32_B16_]], %subreg.sub1
; GFX11-REAL16-NEXT: GLOBAL_STORE_DWORDX2_SADDR killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], killed [[S_LOAD_DWORDX2_IMM1]], 0, 0, implicit $exec :: (store (s64) into %ir.out.load, addrspace 1)
; GFX11-REAL16-NEXT: S_ENDPGM 0
diff --git a/llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll b/llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
index 3bbc5b9113672e..da789a9712d508 100644
--- a/llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
@@ -238,15 +238,14 @@ define amdgpu_kernel void @scalar_to_vector_v4i16() {
; GFX11-NEXT: s_mov_b32 s2, -1
; GFX11-NEXT: buffer_load_d16_u8 v0, off, s[0:3], 0
; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s0, v0
-; GFX11-NEXT: s_lshl_b32 s1, s0, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s0, s1
-; GFX11-NEXT: s_and_b32 s1, s0, 0xffff
-; GFX11-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_or_b32 s0, s1, s0
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s0
+; GFX11-NEXT: v_lshlrev_b32_e32 v1, 8, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
+; GFX11-NEXT: v_mov_b32_e32 v1, v0
; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
; GFX11-NEXT: s_endpgm
bb:
@@ -327,19 +326,16 @@ define amdgpu_kernel void @scalar_to_vector_v4f16() {
; GFX11-NEXT: v_lshlrev_b32_e32 v1, 8, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_or_b32_e32 v0, v1, v0
-; GFX11-NEXT: ; kill: def $vgpr1_hi16 killed $sgpr0 killed $exec
-; GFX11-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_readfirstlane_b32 s0, v1
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-NEXT: s_and_b32 s1, s0, 0xff00
; GFX11-NEXT: s_bfe_u32 s4, s0, 0x80008
; GFX11-NEXT: s_and_b32 s0, s0, 0xffff
; GFX11-NEXT: s_or_b32 s1, s4, s1
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: s_lshl_b32 s4, s1, 16
; GFX11-NEXT: s_and_b32 s1, s1, 0xffff
; GFX11-NEXT: s_or_b32 s0, s0, s4
; GFX11-NEXT: s_or_b32 s1, s1, s4
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
; GFX11-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/select.f16.ll b/llvm/test/CodeGen/AMDGPU/select.f16.ll
index d4ff8ed56b7c66..4aca4298f1915c 100644
--- a/llvm/test/CodeGen/AMDGPU/select.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/select.f16.ll
@@ -839,10 +839,10 @@ define amdgpu_kernel void @select_v2f16(
; GFX11-TRUE16-NEXT: s_mov_b32 s21, s13
; GFX11-TRUE16-NEXT: s_mov_b32 s16, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s17, s11
-; GFX11-TRUE16-NEXT: s_mov_b32 s24, s14
-; GFX11-TRUE16-NEXT: s_mov_b32 s25, s15
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[20:23], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s24, s14
+; GFX11-TRUE16-NEXT: s_mov_b32 s25, s15
; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[24:27], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v3, off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, s9
@@ -850,19 +850,17 @@ define amdgpu_kernel void @select_v2f16(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v5.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, v0.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v1.l, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v3.l, v2.l, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v1.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s8
-; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16:
@@ -1015,28 +1013,26 @@ define amdgpu_kernel void @select_v2f16_imm_a(
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s6
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s7
; GFX11-TRUE16-NEXT: s_mov_b32 s16, s8
-; GFX11-TRUE16-NEXT: s_mov_b32 s17, s9
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[12:15], 0
-; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s17, s9
; GFX11-TRUE16-NEXT: s_mov_b32 s20, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s21, s11
-; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
+; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[20:23], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0.5, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, 0x3900, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v1.l, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s4
-; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16_imm_a:
@@ -1182,28 +1178,26 @@ define amdgpu_kernel void @select_v2f16_imm_b(
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s6
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s7
; GFX11-TRUE16-NEXT: s_mov_b32 s16, s8
-; GFX11-TRUE16-NEXT: s_mov_b32 s17, s9
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[12:15], 0
-; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s17, s9
; GFX11-TRUE16-NEXT: s_mov_b32 s20, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s21, s11
-; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
+; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[20:23], 0
+; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0.5, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e64 s0, 0x3900, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v1.l, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, v1.l, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.l, v0.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s4
-; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16_imm_b:
diff --git a/llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll b/llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
index e0ebb7ff1927d0..d2c15f615f6c9d 100644
--- a/llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
@@ -529,12 +529,19 @@ define amdgpu_ps half @s_constained_fadd_f16_fpexcept_strict(half inreg %x, half
; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e64 v0, s2, s3
; GFX11-GISEL-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: s_constained_fadd_f16_fpexcept_strict:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_add_f16 s0, s2, s3
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-LABEL: s_constained_fadd_f16_fpexcept_strict:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_add_f16 s0, s2, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: s_constained_fadd_f16_fpexcept_strict:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_add_f16 s0, s2, s3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%val = call half @llvm.experimental.constrained.fadd.f16(half %x, half %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
ret half %val
}
diff --git a/llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll b/llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
index d8925bf2c9a5fb..0f6099b4f96672 100644
--- a/llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
@@ -601,12 +601,19 @@ define amdgpu_ps half @s_constained_fmul_f16_fpexcept_strict(half inreg %x, half
; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e64 v0, s2, s3
; GFX11-GISEL-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: s_constained_fmul_f16_fpexcept_strict:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_mul_f16 s0, s2, s3
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-LABEL: s_constained_fmul_f16_fpexcept_strict:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_mul_f16 s0, s2, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: s_constained_fmul_f16_fpexcept_strict:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_mul_f16 s0, s2, s3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
; GFX1-GISEL-TRUE16-LABEL: s_constained_fmul_f16_fpexcept_strict:
; GFX1-GISEL-TRUE16: ; %bb.0:
; GFX1-GISEL-TRUE16-NEXT: v_mul_f16_e64 v0.l, s2, s3
diff --git a/llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll b/llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
index 3fa3a3c5a98e0c..d908af1e1feba6 100644
--- a/llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
@@ -761,12 +761,19 @@ define amdgpu_ps half @s_constained_fsub_f16_fpexcept_strict(half inreg %x, half
; GFX11-GISEL-FAKE16-NEXT: v_sub_f16_e64 v0, s2, s3
; GFX11-GISEL-FAKE16-NEXT: ; return to shader part epilog
;
-; GFX12-LABEL: s_constained_fsub_f16_fpexcept_strict:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_sub_f16 s0, s2, s3
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: ; return to shader part epilog
+; GFX12-SDAG-LABEL: s_constained_fsub_f16_fpexcept_strict:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_sub_f16 s0, s2, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX12-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: s_constained_fsub_f16_fpexcept_strict:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_sub_f16 s0, s2, s3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: ; return to shader part epilog
%val = call half @llvm.experimental.constrained.fsub.f16(half %x, half %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
ret half %val
}
diff --git a/llvm/test/CodeGen/AMDGPU/ucmp.ll b/llvm/test/CodeGen/AMDGPU/ucmp.ll
index 2eef0cd806efb0..c0712e8c8f3824 100644
--- a/llvm/test/CodeGen/AMDGPU/ucmp.ll
+++ b/llvm/test/CodeGen/AMDGPU/ucmp.ll
@@ -984,16 +984,17 @@ define i32 @ucmp_i8_uniform(i8 inreg %a, i8 inreg %b) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_and_b32 s1, s1, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s0, s0, 0xff
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cmp_gt_u32 s0, s1
-; GFX12-SDAG-NEXT: s_cselect_b32 s2, 1, 0
-; GFX12-SDAG-NEXT: s_cmp_ge_u32 s0, s1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cselect_b32 s0, s2, -1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0xff, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
+; GFX12-SDAG-NEXT: v_cmp_gt_u32_e32 vcc_lo, v1, v0
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_ge_u32_e32 vcc_lo, v1, v0
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e32 v0, -1, v2, vcc_lo
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: ucmp_i8_uniform:
@@ -1233,39 +1234,44 @@ define <4 x i32> @ucmp_v4i8_uniform(<4 x i8> inreg %a, <4 x i8> inreg %b) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_and_b32 s7, s16, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s0, s0, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s4, s19, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s3, s3, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s5, s18, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s2, s2, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s6, s17, 0xff
-; GFX12-SDAG-NEXT: s_and_b32 s1, s1, 0xff
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cmp_gt_u32 s0, s7
-; GFX12-SDAG-NEXT: s_cselect_b32 s8, 1, 0
-; GFX12-SDAG-NEXT: s_cmp_ge_u32 s0, s7
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cselect_b32 s0, s8, -1
-; GFX12-SDAG-NEXT: s_cmp_gt_u32 s1, s6
-; GFX12-SDAG-NEXT: s_cselect_b32 s7, 1, 0
-; GFX12-SDAG-NEXT: s_cmp_ge_u32 s1, s6
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cselect_b32 s1, s7, -1
-; GFX12-SDAG-NEXT: s_cmp_gt_u32 s2, s5
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
-; GFX12-SDAG-NEXT: s_cselect_b32 s6, 1, 0
-; GFX12-SDAG-NEXT: s_cmp_ge_u32 s2, s5
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cselect_b32 s2, s6, -1
-; GFX12-SDAG-NEXT: s_cmp_gt_u32 s3, s4
-; GFX12-SDAG-NEXT: s_cselect_b32 s5, 1, 0
-; GFX12-SDAG-NEXT: s_cmp_ge_u32 s3, s4
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_cselect_b32 s3, s5, -1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s19 :: v_dual_mov_b32 v1, s3
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v3, s0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v6, s1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v0
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s17 :: v_dual_and_b32 v5, 0xff, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0xff, v2
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v7, s2 :: v_dual_and_b32 v2, 0xff, v3
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v3, s18 :: v_dual_and_b32 v8, 0xff, v0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v6, 0xff, v6
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-SDAG-NEXT: v_cmp_gt_u32_e32 vcc_lo, v2, v1
+; GFX12-SDAG-NEXT: v_and_b32_e32 v7, 0xff, v7
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_ge_u32_e32 vcc_lo, v2, v1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX12-SDAG-NEXT: v_dual_cndmask_b32 v0, -1, v0 :: v_dual_and_b32 v3, 0xff, v3
+; GFX12-SDAG-NEXT: v_cmp_gt_u32_e32 vcc_lo, v6, v8
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_gt_u32_e32 vcc_lo, v7, v3
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_gt_u32_e32 vcc_lo, v5, v4
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_ge_u32_e32 vcc_lo, v6, v8
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e32 v1, -1, v1, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_ge_u32_e32 vcc_lo, v7, v3
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e32 v2, -1, v2, vcc_lo
+; GFX12-SDAG-NEXT: v_cmp_ge_u32_e32 vcc_lo, v5, v4
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-SDAG-NEXT: v_cndmask_b32_e32 v3, -1, v9, vcc_lo
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: ucmp_v4i8_uniform:
diff --git a/llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll b/llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
index 81a4d41ef7388a..cbc3a29d706025 100644
--- a/llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
+++ b/llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
@@ -176,11 +176,14 @@ define amdgpu_ps i16 @s_underflow_compare_fold_i16(i16 inreg %a, i16 inreg %b) #
;
; GFX11-LABEL: s_underflow_compare_fold_i16:
; GFX11: ; %bb.0:
-; GFX11-NEXT: s_sub_i32 s1, s0, s1
+; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT: s_and_b32 s0, 0xffff, s0
-; GFX11-NEXT: s_and_b32 s1, s1, 0xffff
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: s_min_u32 s0, s1, s0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v1
+; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_min_u32_e32 v0, s0, v0
+; GFX11-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-NEXT: ; return to shader part epilog
%sub = sub i16 %a, %b
%cond = call i16 @llvm.umin.i16(i16 %sub, i16 %a)
diff --git a/llvm/test/CodeGen/AMDGPU/usubsat.ll b/llvm/test/CodeGen/AMDGPU/usubsat.ll
index 8ea1c4fa0adc7b..f42874d234f23e 100644
--- a/llvm/test/CodeGen/AMDGPU/usubsat.ll
+++ b/llvm/test/CodeGen/AMDGPU/usubsat.ll
@@ -47,15 +47,25 @@ define i8 @s_usubsat_i8(i8 inreg %lhs, i8 inreg %rhs) {
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: s_usubsat_i8:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s1, s1, 0xff
-; GFX11-NEXT: s_and_b32 s0, s0, 0xff
-; GFX11-NEXT: s_max_u32 s0, s0, s1
-; GFX11-NEXT: s_sub_i32 s0, s0, s1
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: s_usubsat_i8:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xff, v0
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xff, v1
+; GFX11-TRUE16-NEXT: v_max_u32_e32 v1, v1, v0
+; GFX11-TRUE16-NEXT: v_sub_nc_u32_e32 v0, v1, v0
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: s_usubsat_i8:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xff
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-FAKE16-NEXT: s_max_u32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_sub_i32 s0, s0, s1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%result = call i8 @llvm.usub.sat.i8(i8 %lhs, i8 %rhs)
ret i8 %result
}
@@ -150,15 +160,25 @@ define i16 @s_usubsat_i16(i16 inreg %lhs, i16 inreg %rhs) {
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: s_usubsat_i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s1, 0xffff, s1
-; GFX11-NEXT: s_and_b32 s0, 0xffff, s0
-; GFX11-NEXT: s_max_u32 s0, s0, s1
-; GFX11-NEXT: s_sub_i32 s0, s0, s1
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: s_usubsat_i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_and_b32 s1, 0xffff, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-TRUE16-NEXT: s_max_u32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_sub_i32 s0, s0, s1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: s_usubsat_i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s1, 0xffff, s1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-FAKE16-NEXT: s_max_u32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_sub_i32 s0, s0, s1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%result = call i16 @llvm.usub.sat.i16(i16 %lhs, i16 %rhs)
ret i16 %result
}
@@ -244,14 +264,23 @@ define i16 @uniform_usubsat_as_bithack_i16(i16 inreg %x) {
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: uniform_usubsat_as_bithack_i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s0, 0xffff, s0
-; GFX11-NEXT: s_max_u32 s0, s0, 0x8000
-; GFX11-NEXT: s_sub_i32 s0, s0, 0x8000
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: uniform_usubsat_as_bithack_i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-TRUE16-NEXT: s_max_u32 s0, s0, 0x8000
+; GFX11-TRUE16-NEXT: s_sub_i32 s0, s0, 0x8000
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: uniform_usubsat_as_bithack_i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-FAKE16-NEXT: s_max_u32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_sub_i32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%signsplat = ashr i16 %x, 15
%flipsign = xor i16 %x, 32768
%result = and i16 %signsplat, %flipsign
@@ -343,14 +372,23 @@ define i16 @uniform_usubsat_as_bithack2_i16(i16 inreg %x) {
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: uniform_usubsat_as_bithack2_i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s0, 0xffff, s0
-; GFX11-NEXT: s_max_u32 s0, s0, 0x8000
-; GFX11-NEXT: s_sub_i32 s0, s0, 0x8000
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: uniform_usubsat_as_bithack2_i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-TRUE16-NEXT: s_max_u32 s0, s0, 0x8000
+; GFX11-TRUE16-NEXT: s_sub_i32 s0, s0, 0x8000
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: uniform_usubsat_as_bithack2_i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-FAKE16-NEXT: s_max_u32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_sub_i32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%signsplat = ashr i16 %x, 15
%flipsign = add i16 %x, 32768
%result = and i16 %signsplat, %flipsign
@@ -442,14 +480,23 @@ define i16 @uniform_usubsat_as_bithack_commute_i16(i16 inreg %x) {
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: uniform_usubsat_as_bithack_commute_i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_and_b32 s0, 0xffff, s0
-; GFX11-NEXT: s_max_u32 s0, s0, 0x8000
-; GFX11-NEXT: s_sub_i32 s0, s0, 0x8000
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: uniform_usubsat_as_bithack_commute_i16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-TRUE16-NEXT: s_max_u32 s0, s0, 0x8000
+; GFX11-TRUE16-NEXT: s_sub_i32 s0, s0, 0x8000
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: uniform_usubsat_as_bithack_commute_i16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_and_b32 s0, 0xffff, s0
+; GFX11-FAKE16-NEXT: s_max_u32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: s_sub_i32 s0, s0, 0x8000
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%signsplat = ashr i16 %x, 15
%flipsign = add i16 %x, 32768
%result = and i16 %flipsign, %signsplat
>From 2f3f11addbf9e449fd9dc723fda2788a2b8bdca6 Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Wed, 9 Sep 2026 13:21:00 -0400
Subject: [PATCH 2/4] rebase and update test
---
llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll b/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
index f00bca5bd1d8c5..5147888b97d60c 100644
--- a/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
@@ -1793,6 +1793,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_16(ptr addrsp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_cvt_u32_u16_e32 v1, v1.l
; GFX12-GISEL-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -1930,6 +1931,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_16(ptr addrsp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v2, v0.h
; GFX12-SDAG-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
@@ -2052,6 +2054,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_16(ptr
; GFX12-GISEL-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -2170,6 +2173,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_16(ptr
; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
@@ -3304,6 +3308,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_8(ptr addrspa
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0xff, v1
; GFX12-GISEL-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -3450,6 +3455,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_8(ptr addrspa
; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v2, v0.h
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
@@ -3590,6 +3596,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_8(ptr a
; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
@@ -3713,6 +3720,7 @@ define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_8(ptr a
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_cvt_u32_u16_e32 v0, v0.l
; GFX12-SDAG-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
>From df14903fc31f3938886011407b2503225575a19d Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Wed, 9 Sep 2026 13:56:17 -0400
Subject: [PATCH 3/4] clang-format change
---
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index b6df182ae3cb56..27ef6881f10e44 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -9830,18 +9830,13 @@ void SIInstrInfo::movePackToVALU(SIInstrWorklist &Worklist,
auto NewMI = BuildMI(*MBB, Inst, DL, get(AMDGPU::REG_SEQUENCE), ResultReg);
switch (Inst.getOpcode()) {
case AMDGPU::S_PACK_LL_B32_B16:
- NewMI
- .addReg(SrcReg0, {},
- AMDGPU::lo16)
+ NewMI.addReg(SrcReg0, {}, AMDGPU::lo16)
.addImm(AMDGPU::lo16)
- .addReg(SrcReg1, {},
- AMDGPU::lo16)
+ .addReg(SrcReg1, {}, AMDGPU::lo16)
.addImm(AMDGPU::hi16);
break;
case AMDGPU::S_PACK_LH_B32_B16:
- NewMI
- .addReg(SrcReg0, {},
- AMDGPU::lo16)
+ NewMI.addReg(SrcReg0, {}, AMDGPU::lo16)
.addImm(AMDGPU::lo16)
.addReg(SrcReg1, {}, AMDGPU::hi16)
.addImm(AMDGPU::hi16);
@@ -9849,8 +9844,7 @@ void SIInstrInfo::movePackToVALU(SIInstrWorklist &Worklist,
case AMDGPU::S_PACK_HL_B32_B16:
NewMI.addReg(SrcReg0, {}, AMDGPU::hi16)
.addImm(AMDGPU::lo16)
- .addReg(SrcReg1, {},
- AMDGPU::lo16)
+ .addReg(SrcReg1, {}, AMDGPU::lo16)
.addImm(AMDGPU::hi16);
break;
case AMDGPU::S_PACK_HH_B32_B16:
>From 2b049d0a926d4f2f5f2b8ef428584ee5ab266002 Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Wed, 9 Sep 2026 14:48:51 -0400
Subject: [PATCH 4/4] clean up
---
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 48 +-
llvm/test/CodeGen/AMDGPU/fcmp.f16.ll | 308 ++++++------
.../AMDGPU/fix-sgpr-copies-f16-true16.mir | 226 ---------
llvm/test/CodeGen/AMDGPU/fpext.f16.ll | 8 +-
llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll | 212 ++++++---
llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll | 170 ++++---
llvm/test/CodeGen/AMDGPU/half.ll | 305 ++++++------
llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll | 4 +-
llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll | 4 +-
llvm/test/CodeGen/AMDGPU/load-constant-i8.ll | 441 ++++++++++++------
llvm/test/CodeGen/AMDGPU/select.f16.ll | 102 ++--
11 files changed, 914 insertions(+), 914 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index a3dc904f6075e6..472e1bc3785d67 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -4858,6 +4858,7 @@ static SDValue createSGPR32ToVGPR16(SDValue SReg32, SDValue LoHi16, SDLoc DL,
// Check and legalize 16bit Register/SubregIdx in true16 mode includuing:
// 1. 16bit register def-use chain that requires a fix (i.e. sgpr32->vgpr16)
// 2. extract_subreg lo/hi16
+// by inserting REG_SEQUENCE and COPY_TO_REGCLASS
// Legalization expected to be done from top-down
bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
// This check is required for r600 and older targets
@@ -4868,12 +4869,26 @@ bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
EVT VT = N->getValueType(0);
+ // Check only 16bit types
if (VT != MVT::i16 && VT != MVT::f16 && VT != MVT::bf16)
return false;
const TargetRegisterClass *DstRC = nullptr;
SDLoc DL(N);
+ // EXTRACT_SUBREG Src, Lo16/Hi16
+ // 1. Src is SGPR:
+ // t0 = EXTRACT_SUBREG Src, sub0
+ // t1 = COPY_TO_REGCLASS t0, VGPR32
+ // t2 = EXTRACT_SUBREG t1, Lo16/Hi16
+ // User is SGPR => select t0
+ // User is VGPR => select t2
+ // 2. Src is VGPR:
+ // t0 = EXTRACT_SUBREG Src, Lo16/Hi16
+ // t1 = EXTRACT_SUBREG Src, sub0
+ // t2 = COPY_TO_REGCLASS t1, SGPR32
+ // User is VGPR => select t0
+ // User is SGPR => select t2
if (N->isMachineOpcode() &&
N->getMachineOpcode() == TargetOpcode::EXTRACT_SUBREG) {
unsigned SubIdx = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
@@ -4927,7 +4942,7 @@ bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
// to
// t0: sgpr_xx = ...
// t1: sgpr_32 = extract_subreg t0, sub0
- // t2: vgpr_32 = COPY_TO_VGPR32_PSEUDO t1
+ // t2: vgpr_32 = COPY_TO_VGPR32 t1
// t3 ... = extract_subreg t2, lo/hi16
// ... = t3: vgpr_16
NewValue =
@@ -4946,16 +4961,9 @@ bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
// t0: sgpr_xx = ...
// t1: sgpr_32 = extract_subreg t0, sub0
// ... = t1: sgpr_32
- // Insert additional copy_to_regclass in case the src is a
- // extract_subreg
- SDValue RCImm =
- CurDAG->getTargetConstant(AMDGPU::SGPR_32RegClassID, DL, MVT::i32);
- NewValue = SDValue(CurDAG->getMachineNode(AMDGPU::COPY_TO_REGCLASS, DL,
- VT, SReg32, RCImm),
- 0);
for (auto &[User, OperandNo] : UserSGPR) {
SmallVector<SDValue, 8> NewOps(User->op_begin(), User->op_end());
- NewOps[OperandNo] = NewValue;
+ NewOps[OperandNo] = SReg32;
CurDAG->UpdateNodeOperands(User, NewOps);
}
}
@@ -5006,7 +5014,13 @@ bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
bool IsSGPR32 = TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_32RegClass);
bool IsVGPR16 = TRI->getCommonSubClass(DstRC, &AMDGPU::VGPR_16RegClass);
- // Now fix user
+ // Fix user:
+ // 1. Def is SGPR32, Use is VGPR16:
+ // t0 = COPY_TO_REGCLASS Def, VGPR32
+ // Use = EXTRACT_SUBREG t0, Lo16/Hi16
+ // 2. Def is VGPR16, Use is SGPR32:
+ // t0 = REG_SEQUENCE Def, lo16, undef, hi16
+ // Use = COPY_TO_REGCLASS t0, SGPR32
for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); UI != UE;
++UI) {
SDNode *User = UI->getUser();
@@ -5030,24 +5044,10 @@ bool AMDGPUDAGToDAGISel::Legalize16BitRegClass(SDNode *N) {
SDValue NewValue;
if (IsSGPR32) {
- // t0: sgpr_32 = ...
- // ... = t0: vgpr_16
- //
- // t0: sgpr_32 = ...
- // t1: vgpr_32 = COPY_TO_VGPR32_PSEUDO t0
- // t2: vgpr_16 = EXTRACT_SUBREG t1, lo16
- // ... = t2: vgpr_16
NewValue = createSGPR32ToVGPR16(
SDValue(N, 0), CurDAG->getTargetConstant(AMDGPU::lo16, DL, MVT::i32),
DL, VT, CurDAG);
} else if (IsVGPR16) {
- // t0: vgpr_16 = ...
- // ... = t0: sgpr_32
- // to
- // t0: vgpr_16 = ...
- // t1: vgpr_32 = REG_SEQUENCE t0, lo16, undef, hi16
- // t2: sgpr_32 = COPY_TO_REGCLASS t1
- // ... = t2: sgpr_32
NewValue = createVGPR16ToSGPR32(SDValue(N, 0), DL, VT, CurDAG);
}
for (auto &[User, OperandNo] : ToFix) {
diff --git a/llvm/test/CodeGen/AMDGPU/fcmp.f16.ll b/llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
index d2c4f31d816ecc..d8325f39d1303f 100644
--- a/llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
@@ -2685,14 +2685,14 @@ define amdgpu_kernel void @fcmp_v2f16_lt(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -2744,19 +2744,19 @@ define amdgpu_kernel void @fcmp_v2f16_lt(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -2894,14 +2894,14 @@ define amdgpu_kernel void @fcmp_v2f16_eq(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -2953,19 +2953,19 @@ define amdgpu_kernel void @fcmp_v2f16_eq(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -3102,14 +3102,14 @@ define amdgpu_kernel void @fcmp_v2f16_le(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_le_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_le_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3161,19 +3161,19 @@ define amdgpu_kernel void @fcmp_v2f16_le(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -3310,14 +3310,14 @@ define amdgpu_kernel void @fcmp_v2f16_gt(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3369,19 +3369,19 @@ define amdgpu_kernel void @fcmp_v2f16_gt(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -3519,14 +3519,14 @@ define amdgpu_kernel void @fcmp_v2f16_lg(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3578,19 +3578,19 @@ define amdgpu_kernel void @fcmp_v2f16_lg(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -3728,14 +3728,14 @@ define amdgpu_kernel void @fcmp_v2f16_ge(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3787,19 +3787,19 @@ define amdgpu_kernel void @fcmp_v2f16_ge(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -3937,14 +3937,14 @@ define amdgpu_kernel void @fcmp_v2f16_o(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3996,19 +3996,19 @@ define amdgpu_kernel void @fcmp_v2f16_o(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -4146,14 +4146,14 @@ define amdgpu_kernel void @fcmp_v2f16_u(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_u_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -4205,19 +4205,19 @@ define amdgpu_kernel void @fcmp_v2f16_u(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -4354,14 +4354,14 @@ define amdgpu_kernel void @fcmp_v2f16_nge(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -4413,19 +4413,19 @@ define amdgpu_kernel void @fcmp_v2f16_nge(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -4562,14 +4562,14 @@ define amdgpu_kernel void @fcmp_v2f16_nlg(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -4621,19 +4621,19 @@ define amdgpu_kernel void @fcmp_v2f16_nlg(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -4771,14 +4771,14 @@ define amdgpu_kernel void @fcmp_v2f16_ngt(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -4830,19 +4830,19 @@ define amdgpu_kernel void @fcmp_v2f16_ngt(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -4979,14 +4979,14 @@ define amdgpu_kernel void @fcmp_v2f16_nle(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -5038,19 +5038,19 @@ define amdgpu_kernel void @fcmp_v2f16_nle(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -5187,14 +5187,14 @@ define amdgpu_kernel void @fcmp_v2f16_neq(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -5246,19 +5246,19 @@ define amdgpu_kernel void @fcmp_v2f16_neq(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -5395,14 +5395,14 @@ define amdgpu_kernel void @fcmp_v2f16_nlt(
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e64 s0, v3.l, v2.l
+; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: s_and_b32 s1, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s1, -1, 0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, exec_lo
; GFX11-TRUE16-NEXT: s_cselect_b32 s0, -1, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -5454,19 +5454,19 @@ define amdgpu_kernel void @fcmp_v2f16_nlt(
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
-; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
+; GFX12-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v0.l
-; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3.l, v2.l
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
+; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v2.l, v0.l
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
+; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
index 703fc602b58c2b..a40318135d370f 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
+++ b/llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
@@ -134,34 +134,6 @@ body: |
%3:vgpr_16 = V_TRUNC_F16_t16_e64 0, %2:sreg_32, 0, 0, 0, implicit $mode, implicit $exec
...
----
-name: copy_vgpr16_sreg32_usedby_salu16
-body: |
- bb.0:
- ; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_salu16
- ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[COPY]].lo16, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- %0:vgpr_16 = IMPLICIT_DEF
- %1:sreg_32 = COPY %0:vgpr_16
- %2:sreg_32 = S_TRUNC_F16 %1:sreg_32, implicit $mode
-...
-
----
-name: copy_vgpr16_sreg32_usedby_salu32
-body: |
- bb.0:
- ; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_salu32
- ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY]], implicit $exec
- %0:vgpr_16 = IMPLICIT_DEF
- %1:sreg_32 = COPY %0:vgpr_16
- %2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc
-...
-
---
name: copy_vgpr32_sreg32_usedby_valu16
body: |
@@ -174,191 +146,6 @@ body: |
%2:vgpr_16 = V_TRUNC_F16_t16_e64 0, %1:sreg_32, 0, 0, 0, implicit $mode, implicit $exec
...
----
-name: copy_vgpr16_sreg32_usedby_valu32
-body: |
- bb.0:
- ; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_valu32
- ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY]], implicit $exec
- %0:vgpr_16 = IMPLICIT_DEF
- %1:sreg_32 = COPY %0:vgpr_16
- %2:vgpr_32 = V_XOR_B32_e64 %1:sreg_32, %1:sreg_32, implicit $exec
-...
-
----
-name: copy_lo16_sreg32_usedby_salu32
-body: |
- bb.0:
- ; GCN-LABEL: name: copy_lo16_sreg32_usedby_salu32
- ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]].lo16, %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]].lo16, %subreg.lo16, [[DEF2]], %subreg.hi16
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE1]], implicit $exec
- %0:vgpr_32 = IMPLICIT_DEF
- %1:sreg_32 = COPY %0.lo16
- %2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc
-...
-
----
-name: copy_hi16_sreg32_usedby_salu32
-body: |
- bb.0:
- ; GCN-LABEL: name: copy_hi16_sreg32_usedby_salu32
- ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]].hi16, %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]].hi16, %subreg.lo16, [[DEF2]], %subreg.hi16
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE1]], implicit $exec
- %0:vgpr_32 = IMPLICIT_DEF
- %1:sreg_32 = COPY %0.hi16
- %2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc
-...
-
----
-name: copy_lo16_sreg32_usedby_phi
-tracksRegLiveness: true
-body: |
- ; GCN-LABEL: name: copy_lo16_sreg32_usedby_phi
- ; GCN: bb.0:
- ; GCN-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; GCN-NEXT: liveins: $scc
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: bb.1:
- ; GCN-NEXT: successors: %bb.2(0x80000000)
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_16 = COPY [[DEF]].lo16
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: bb.2:
- ; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_16 = PHI [[DEF1]], %bb.0, [[COPY]], %bb.1
- ; GCN-NEXT: S_ENDPGM 0, implicit [[PHI]]
- bb.0:
- liveins: $scc
- %0:vgpr_32 = IMPLICIT_DEF
- %1:vgpr_16 = IMPLICIT_DEF
- S_CBRANCH_SCC1 %bb.2, implicit $scc
-
- bb.1:
- %2:sreg_32 = COPY %0.lo16
-
- bb.2:
- %3:vgpr_16 = PHI %1, %bb.0, %2, %bb.1
- S_ENDPGM 0, implicit %3
-...
-
----
-name: S_FMAC_F16
-body: |
- bb.0:
- ; GCN-LABEL: name: S_FMAC_F16
- ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_FMAC_F16_t16_e64 0, [[COPY1]].lo16, 0, [[COPY1]].lo16, 0, [[COPY]].lo16, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FMAC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- %0:vgpr_16 = IMPLICIT_DEF
- %1:sgpr_lo16 = COPY %0:vgpr_16
- %2:sreg_32 = COPY %0:vgpr_16
- %3:sreg_32 = COPY %1:sgpr_lo16
- %4:sreg_32 = S_FMAC_F16 %3:sreg_32, %3:sreg_32, %2:sreg_32, implicit $mode
-...
-
----
-name: legalize_with_multi_user
-body: |
- bb.0:
- ; GCN-LABEL: name: legalize_with_multi_user
- ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_ADD_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ADD_F16_t16_e64 0, [[COPY]].lo16, 0, 1, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ADD_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
- ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_PK_FMA_F16_:%[0-9]+]]:vgpr_32 = V_PK_FMA_F16 11, [[S_MOV_B32_]], 0, [[REG_SEQUENCE]], 8, [[DEF2]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[S_MOV_B32_]], implicit $exec
- %0:vgpr_16 = IMPLICIT_DEF
- %1:sreg_32 = COPY %0:vgpr_16
- %2:sreg_32 = S_ADD_F16 %1:sreg_32, 1, implicit $mode
- %3:sreg_32 = S_MOV_B32 32768
- %4:vgpr_32 = IMPLICIT_DEF
- %5:vgpr_32 = V_PK_FMA_F16 11, %3:sreg_32, 0, %2:sreg_32, 8, %4:vgpr_32, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
- %6:sreg_32 = S_XOR_B32 %2:sreg_32, %3:sreg_32, implicit-def dead $scc
-...
-
----
-name: vgpr16_to_spgr32
-body: |
- ; GCN-LABEL: name: vgpr16_to_spgr32
- ; GCN: bb.0.entry:
- ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
- ; GCN-NEXT: [[DS_READ2_B32_gfx9_:%[0-9]+]]:vreg_64 = DS_READ2_B32_gfx9 killed [[COPY]], 0, 1, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) poison` + 8, align 4, addrspace 3)
- ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DS_READ2_B32_gfx9_]].sub0
- ; GCN-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, killed [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec
- ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
- ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_F32_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16
- ; GCN-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[REG_SEQUENCE]], implicit $exec
- ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[S_MOV_B32_]], killed [[V_READFIRSTLANE_B32_]], implicit-def dead $scc
- ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 5
- ; GCN-NEXT: [[S_MUL_I32_:%[0-9]+]]:sreg_32 = S_MUL_I32 killed [[S_AND_B32_]], killed [[S_MOV_B32_1]]
- ; GCN-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 2
- ; GCN-NEXT: S_CMP_LG_U32 killed [[S_MUL_I32_]], killed [[S_MOV_B32_2]], implicit-def $scc
- ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc
- ; GCN-NEXT: S_BRANCH %bb.1
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: bb.1:
- ; GCN-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 1
- ; GCN-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 killed [[S_MOV_B32_3]]
- ; GCN-NEXT: $sgpr0 = COPY [[S_MOV_B32_4]]
- ; GCN-NEXT: SI_RETURN_TO_EPILOG $sgpr0
- ; GCN-NEXT: {{ $}}
- ; GCN-NEXT: bb.2:
- ; GCN-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sreg_32 = S_MOV_B32 2
- ; GCN-NEXT: [[S_MOV_B32_6:%[0-9]+]]:sreg_32 = S_MOV_B32 killed [[S_MOV_B32_5]]
- ; GCN-NEXT: $sgpr0 = COPY [[S_MOV_B32_6]]
- ; GCN-NEXT: SI_RETURN_TO_EPILOG $sgpr0
- bb.0.entry:
- successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
-
- %5:sreg_32 = IMPLICIT_DEF
- %6:vgpr_32 = COPY %5:sreg_32
- %4:vreg_64 = DS_READ2_B32_gfx9 killed %6:vgpr_32, 0, 1, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) poison` + 8, align 4, addrspace 3)
- %7:sgpr_32 = COPY %4.sub0:vreg_64
- %8:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, killed %7:sgpr_32, 0, 0, 0, implicit $mode, implicit $exec
- %9:sreg_32 = S_MOV_B32 65535
- %11:sreg_32 = COPY %8:vgpr_16
- %10:sreg_32 = S_AND_B32 killed %9:sreg_32, killed %11:sreg_32, implicit-def dead $scc
- %12:sreg_32 = S_MOV_B32 5
- %13:sreg_32 = S_MUL_I32 killed %10:sreg_32, killed %12:sreg_32
- %14:sreg_32 = S_MOV_B32 2
- S_CMP_LG_U32 killed %13:sreg_32, killed %14:sreg_32, implicit-def $scc
- S_CBRANCH_SCC1 %bb.2, implicit $scc
- S_BRANCH %bb.1
- bb.1:
- %17:sreg_32 = S_MOV_B32 1
- %18:sreg_32 = S_MOV_B32 killed %17:sreg_32
- $sgpr0 = COPY %18:sreg_32
- SI_RETURN_TO_EPILOG $sgpr0
- bb.2:
- %15:sreg_32 = S_MOV_B32 2
- %16:sreg_32 = S_MOV_B32 killed %15:sreg_32
- $sgpr0 = COPY %16:sreg_32
- SI_RETURN_TO_EPILOG $sgpr0
-...
-
---
name: s_pack_ll_b32_b16
body: |
@@ -448,16 +235,3 @@ body: |
%2:sreg_32 = S_PACK_LL_B32_B16 1, %1:sreg_32, implicit-def dead $scc
...
----
-name: v_or_b16_t16_from_hi16
-body: |
- bb.0:
- ; GCN-LABEL: name: v_or_b16_t16_from_hi16
- ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN-NEXT: [[V_OR_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_OR_B16_t16_e64 0, [[DEF]].lo16, 0, [[DEF1]].hi16, 0, implicit $exec
- %0:vgpr_32 = IMPLICIT_DEF
- %1:vgpr_32 = IMPLICIT_DEF
- %2:sreg_32 = COPY %1.hi16
- %3:vgpr_16 = V_OR_B16_t16_e64 0, %0.lo16, 0, killed %2, 0, implicit $exec
-...
diff --git a/llvm/test/CodeGen/AMDGPU/fpext.f16.ll b/llvm/test/CodeGen/AMDGPU/fpext.f16.ll
index 9e3ecb66d4ac86..2831c091d3da9a 100644
--- a/llvm/test/CodeGen/AMDGPU/fpext.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/fpext.f16.ll
@@ -323,11 +323,11 @@ define amdgpu_kernel void @fpext_v2f16_to_v2f64(
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v1.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX11-TRUE16-NEXT: buffer_store_b128 v[0:3], off, s[4:7], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll b/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
index bdf3fd9367967f..98e838c2b51864 100644
--- a/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
@@ -3994,33 +3994,61 @@ define <4 x i64> @test_s_signed_v4f16_v4i64(<4 x half> inreg %f) {
; GFX11-NEXT: v_ashrrev_i32_e32 v7, 31, v6
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-ISEL-LABEL: test_s_signed_v4f16_v4i64:
-; GFX12-ISEL: ; %bb.0:
-; GFX12-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-ISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-ISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s2, s0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s3, s1
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s1, s1
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s3, s3
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s1, s1
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_ashr_i32 s4, s2, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s5, s3, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s6, s0, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s7, s1, 31
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s6
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s4
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s7
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, s5
-; GFX12-ISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_signed_v4f16_v4i64:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s2, s0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s3, s1
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s1, s1
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s3, s3
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s1, s1
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_ashr_i32 s4, s2, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s5, s3, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s6, s0, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s7, s1, 31
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s6
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s4
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s7
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, s5
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_signed_v4f16_v4i64:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s2, s0
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s3, s1
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s1, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s3, s3
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s1, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_ashr_i32 s4, s2, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s5, s0, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s6, s3, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s7, s1, 31
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s4
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s5
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v5, s6
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v7, s7
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_signed_v4f16_v4i64:
; GFX12-GI: ; %bb.0:
@@ -6613,49 +6641,93 @@ define <8 x i64> @test_s_signed_v8f16_v8i64(<8 x half> inreg %f) {
; GFX11-NEXT: v_ashrrev_i32_e32 v13, 31, v12
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-ISEL-LABEL: test_s_signed_v8f16_v8i64:
-; GFX12-ISEL: ; %bb.0:
-; GFX12-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-ISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-ISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s4, s0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s5, s1
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s6, s2
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s7, s3
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s1, s1
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s3, s3
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s4, s4
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s5, s5
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s6, s6
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s7, s7
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s1, s1
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_i32_f32 s3, s3
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_ashr_i32 s8, s4, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s9, s5, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s10, s6, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s11, s7, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s12, s0, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s13, s1, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s14, s2, 31
-; GFX12-ISEL-NEXT: s_ashr_i32 s15, s3, 31
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s8
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s13
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v7, s9
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s14
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v11, s10
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s15
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s11
-; GFX12-ISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_signed_v8f16_v8i64:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s4, s0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s5, s1
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s6, s2
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s7, s3
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s1, s1
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s3, s3
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s4, s4
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s5, s5
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s6, s6
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s7, s7
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s1, s1
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_i32_f32 s3, s3
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_ashr_i32 s8, s4, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s9, s5, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s10, s6, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s11, s7, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s12, s0, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s13, s1, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s14, s2, 31
+; GFX12-FAKE16-NEXT: s_ashr_i32 s15, s3, 31
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s8
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, s13
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v7, s9
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s14
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v11, s10
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, s15
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, s11
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_signed_v8f16_v8i64:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s4, s0
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s5, s1
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s1, s1
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s10, s2
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s11, s3
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s3, s3
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s4, s4
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s5, s5
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s1, s1
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s10, s10
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s11, s11
+; GFX12-TRUE16-NEXT: s_cvt_i32_f32 s3, s3
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_ashr_i32 s6, s4, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s7, s0, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s8, s5, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s9, s1, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s12, s10, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s13, s2, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s14, s11, 31
+; GFX12-TRUE16-NEXT: s_ashr_i32 s15, s3, 31
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s6
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s7
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_mov_b32 v5, s8
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v7, s9
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s12
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s13
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v12, s11 :: v_dual_mov_b32 v13, s14
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v14, s3 :: v_dual_mov_b32 v15, s15
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_signed_v8f16_v8i64:
; GFX12-GI: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll b/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
index 503fa8ea2decc5..fdb070f1b59ddb 100644
--- a/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
@@ -3712,28 +3712,51 @@ define <4 x i64> @test_s_unsigned_v4f16_v4i64(<4 x half> inreg %f) {
; GFX11-NEXT: v_mov_b32_e32 v5, 0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-ISEL-LABEL: test_s_unsigned_v4f16_v4i64:
-; GFX12-ISEL: ; %bb.0:
-; GFX12-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-ISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-ISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s2, s0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s3, s1
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s1, s1
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s3, s3
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s1, s1
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, 0
-; GFX12-ISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_unsigned_v4f16_v4i64:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s2, s0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s3, s1
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s1, s1
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s3, s3
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s1, s1
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, 0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_unsigned_v4f16_v4i64:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s2, s0
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s3, s1
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s1, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s3, s3
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s1, s1
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v5, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v7, 0
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_unsigned_v4f16_v4i64:
; GFX12-GI: ; %bb.0:
@@ -6180,40 +6203,75 @@ define <8 x i64> @test_s_unsigned_v8f16_v8i64(<8 x half> inreg %f) {
; GFX11-NEXT: v_mov_b32_e32 v15, 0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-ISEL-LABEL: test_s_unsigned_v8f16_v8i64:
-; GFX12-ISEL: ; %bb.0:
-; GFX12-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-ISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-ISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-ISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s4, s0
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s5, s1
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s6, s2
-; GFX12-ISEL-NEXT: s_cvt_hi_f32_f16 s7, s3
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s1, s1
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_f32_f16 s3, s3
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s4, s4
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s5, s5
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s6, s6
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s7, s7
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s0, s0
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s1, s1
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s2, s2
-; GFX12-ISEL-NEXT: s_cvt_u32_f32 s3, s3
-; GFX12-ISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v7, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v11, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, 0
-; GFX12-ISEL-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, 0
-; GFX12-ISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX12-FAKE16-LABEL: test_s_unsigned_v8f16_v8i64:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s4, s0
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s5, s1
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s6, s2
+; GFX12-FAKE16-NEXT: s_cvt_hi_f32_f16 s7, s3
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s1, s1
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_f32_f16 s3, s3
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s4, s4
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s5, s5
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s6, s6
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s7, s7
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s1, s1
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s2, s2
+; GFX12-FAKE16-NEXT: s_cvt_u32_f32 s3, s3
+; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v5, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v7, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v10, s6 :: v_dual_mov_b32 v11, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v13, 0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v15, 0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: test_s_unsigned_v8f16_v8i64:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s4, s0
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s5, s1
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s1, s1
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s6, s2
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_f32_f16 s7, s3
+; GFX12-TRUE16-NEXT: s_cvt_hi_f32_f16 s3, s3
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s4, s4
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s0, s0
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s5, s5
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s1, s1
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s6, s6
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s2, s2
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s7, s7
+; GFX12-TRUE16-NEXT: s_cvt_u32_f32 s3, s3
+; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_mov_b32 v5, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v7, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, s6 :: v_dual_mov_b32 v9, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v12, s7 :: v_dual_mov_b32 v13, 0
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v14, s3 :: v_dual_mov_b32 v15, 0
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GI-LABEL: test_s_unsigned_v8f16_v8i64:
; GFX12-GI: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/half.ll b/llvm/test/CodeGen/AMDGPU/half.ll
index e6885281c60bcc..a92fa0e9d2f9ca 100644
--- a/llvm/test/CodeGen/AMDGPU/half.ll
+++ b/llvm/test/CodeGen/AMDGPU/half.ll
@@ -383,13 +383,12 @@ define amdgpu_kernel void @extload_v3f16_to_v3f32_arg(ptr addrspace(1) %out, <3
; GFX11-TRUE16-LABEL: extload_v3f16_to_v3f32_arg:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, s2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, s3
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s4
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b96 v3, v[0:2], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -451,13 +450,12 @@ define amdgpu_kernel void @extload_v4f16_to_v4f32_arg(ptr addrspace(1) %out, <4
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, s4
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s2, 16
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, s3
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, s4
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s5
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, s2
; GFX11-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -704,44 +702,24 @@ define amdgpu_kernel void @extload_v3f16_to_v3f64_arg(ptr addrspace(1) %out, <3
; CIVI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; CIVI-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: extload_v3f16_to_v3f64_arg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, s3
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16
-; GFX11-TRUE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: extload_v3f16_to_v3f64_arg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s3
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, s4
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v6, s2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v0
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v6
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, 0
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16
-; GFX11-FAKE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: extload_v3f16_to_v3f64_arg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-NEXT: v_cvt_f32_f16_e32 v0, s3
+; GFX11-NEXT: v_cvt_f32_f16_e32 v1, s4
+; GFX11-NEXT: v_cvt_f32_f16_e32 v6, s2
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[4:5], v0
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[0:1], v6
+; GFX11-NEXT: v_mov_b32_e32 v6, 0
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16
+; GFX11-NEXT: global_store_b128 v6, v[0:3], s[0:1]
+; GFX11-NEXT: s_endpgm
%ext = fpext <3 x half> %arg to <3 x double>
store <3 x double> %ext, ptr addrspace(1) %out
ret void
@@ -804,50 +782,27 @@ define amdgpu_kernel void @extload_v4f16_to_v4f64_arg(ptr addrspace(1) %out, <4
; VI-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; VI-NEXT: s_endpgm
;
-; GFX11-TRUE16-LABEL: extload_v4f16_to_v4f64_arg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, 0
-; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, s2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s3, 16
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v5, s3
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, s2
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, s4
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v5
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
-; GFX11-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1]
-; GFX11-TRUE16-NEXT: s_endpgm
-;
-; GFX11-FAKE16-LABEL: extload_v4f16_to_v4f64_arg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s3, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, s3
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, s5
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s2
-; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v8, s4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v2
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v3
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, 0
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
-; GFX11-FAKE16-NEXT: global_store_b128 v8, v[0:3], s[0:1]
-; GFX11-FAKE16-NEXT: s_endpgm
+; GFX11-LABEL: extload_v4f16_to_v4f64_arg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: s_lshr_b32 s5, s3, 16
+; GFX11-NEXT: s_lshr_b32 s4, s2, 16
+; GFX11-NEXT: v_cvt_f32_f16_e32 v2, s3
+; GFX11-NEXT: v_cvt_f32_f16_e32 v3, s5
+; GFX11-NEXT: v_cvt_f32_f16_e32 v0, s2
+; GFX11-NEXT: v_cvt_f32_f16_e32 v8, s4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[4:5], v2
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[6:7], v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX11-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
+; GFX11-NEXT: v_mov_b32_e32 v8, 0
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16
+; GFX11-NEXT: global_store_b128 v8, v[0:3], s[0:1]
+; GFX11-NEXT: s_endpgm
%ext = fpext <4 x half> %arg to <4 x double>
store <4 x double> %ext, ptr addrspace(1) %out
ret void
@@ -1471,18 +1426,18 @@ define amdgpu_kernel void @global_extload_v8f16_to_v8f32(ptr addrspace(1) %out,
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v12, s[2:3]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, v0.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v3.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v8, v2.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v5.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v7, v5.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v0.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v9, v9.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v7, v1.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v5, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v5, v1.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_store_b128 v12, v[8:11], s[0:1] offset:16
; GFX11-TRUE16-NEXT: global_store_b128 v12, v[4:7], s[0:1]
@@ -1641,35 +1596,35 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f32(ptr addrspace(1) %out
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v20, s[2:3]
; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v20, s[2:3] offset:16
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v7
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v18, v7.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v16, v6.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v6
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v2
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v5
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v14, v5.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v8, v0.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v14, v3.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v12, v2.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v5.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v4.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v19, v7.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v17, v6.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v1.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v15, v3.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v5.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v4.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v13, v13.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v9, v9.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v16, v6.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v19, v13.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v17, v7.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v12, v4.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v15, v2.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v13, v5.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v22.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v9.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v9, v21.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: global_store_b128 v20, v[16:19], s[0:1] offset:48
-; GFX11-TRUE16-NEXT: global_store_b128 v20, v[0:3], s[0:1] offset:32
-; GFX11-TRUE16-NEXT: global_store_b128 v20, v[12:15], s[0:1] offset:16
+; GFX11-TRUE16-NEXT: global_store_b128 v20, v[12:15], s[0:1] offset:32
+; GFX11-TRUE16-NEXT: global_store_b128 v20, v[1:4], s[0:1] offset:16
; GFX11-TRUE16-NEXT: global_store_b128 v20, v[8:11], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -1820,11 +1775,11 @@ define amdgpu_kernel void @global_extload_v2f16_to_v2f64(ptr addrspace(1) %out,
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v1.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX11-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -2175,25 +2130,25 @@ define amdgpu_kernel void @global_extload_v8f16_to_v8f64(ptr addrspace(1) %out,
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v16, s[2:3]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v4, v0.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v1.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v8, v2.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v4
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v17, v5.l
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v6
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v9.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v8.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v2.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v7, v7.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v1.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v18, v5.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v17, v4.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[12:13], v3
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[14:15], v6
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[10:11], v2
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v7
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[14:15], v10
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[8:9], v2
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[10:11], v7
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v6
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v18
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v17
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[0:1] offset:48
@@ -2438,45 +2393,45 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v32, s[2:3] offset:16
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v2
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v4
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v15, v7.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v14, v6.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v13, v3.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v12, v2.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v18, v4.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v4
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v6.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v19, v4.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v22, v5.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[4:5], v10
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v23.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v34, v11.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v19.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v10, v11.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v11, v20.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v33, v8.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v34, v9.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[8:9], v2
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v12.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[12:13], v3
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v14.l
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v14, v18.l
; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v7, v7.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v6.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v8, v0.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v3.l
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v2.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[16:17], v6
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v6, v15.l
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[28:29], v22
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[30:31], v10
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[24:25], v18
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[26:27], v11
-; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v33, v9.l
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[20:21], v15
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[22:23], v7
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[16:17], v14
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[18:19], v6
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v8
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[8:9], v12
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[12:13], v13
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[14:15], v3
-; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[10:11], v2
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[30:31], v11
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[24:25], v19
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[26:27], v14
+; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[20:21], v7
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[22:23], v6
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[18:19], v3
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[14:15], v2
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[10:11], v10
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[6:7], v34
+; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v33
; GFX11-TRUE16-NEXT: s_clause 0x7
; GFX11-TRUE16-NEXT: global_store_b128 v32, v[28:31], s[0:1] offset:80
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll b/llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
index 50430cac9ee3ba..10b3894afe7367 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
@@ -1193,11 +1193,11 @@ define void @s_maximum_v2f16(<2 x half> inreg %src0, <2 x half> inreg %src1) {
; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, s0, s1
-; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, s3, s2
+; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, s3, s2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s2
; GFX11-TRUE16-NEXT: ;;#ASMSTART
; GFX11-TRUE16-NEXT: ; use v0
; GFX11-TRUE16-NEXT: ;;#ASMEND
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll b/llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
index 963d4fc819a2a5..7d6892feca1e3f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
@@ -1003,11 +1003,11 @@ define void @s_minimum_v2f16(<2 x half> inreg %src0, <2 x half> inreg %src1) {
; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, s0, s1
-; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, s3, s2
+; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, s3, s2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s1
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s2
; GFX11-TRUE16-NEXT: ;;#ASMSTART
; GFX11-TRUE16-NEXT: ; use v0
; GFX11-TRUE16-NEXT: ;;#ASMEND
diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
index ea08281541d193..63a99c8eac5508 100644
--- a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
@@ -10365,28 +10365,25 @@ define amdgpu_kernel void @constant_sextload_v8i8_to_v8i16(ptr addrspace(1) %out
; GFX12-TRUE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_lshr_b32 s4, s2, 16
-; GFX12-TRUE16-NEXT: s_ashr_i32 s8, s2, 24
-; GFX12-TRUE16-NEXT: v_bfe_i32 v0, s2, 0, 8
-; GFX12-TRUE16-NEXT: s_sext_i32_i16 s2, s2
; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s3, 16
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s7, s3
; GFX12-TRUE16-NEXT: s_ashr_i32 s6, s3, 24
-; GFX12-TRUE16-NEXT: s_bfe_i32 s7, s3, 0x80000
-; GFX12-TRUE16-NEXT: s_sext_i32_i16 s3, s3
-; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v3, s2
-; GFX12-TRUE16-NEXT: s_bfe_i32 s5, s5, 0x80000
-; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s3, s3, 0x80000
+; GFX12-TRUE16-NEXT: s_ashr_i32 s8, s2, 24
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s9, s2
+; GFX12-TRUE16-NEXT: v_bfe_i32 v0, s2, 0, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s2, s5, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s5, s7, 8
; GFX12-TRUE16-NEXT: s_bfe_i32 s4, s4, 0x80000
-; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
-; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s4, s8
+; GFX12-TRUE16-NEXT: s_lshr_b32 s7, s9, 8
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s7, s3
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s6
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s4, s4, s8
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s5
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, s4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_mov_b32 v2, s3
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.h, v3.l
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, s5
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v3, s2
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.h, s7
; GFX12-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX12-TRUE16-NEXT: s_endpgm
;
@@ -11142,54 +11139,103 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i16(ptr addrspace(1) %o
; EG-NEXT: MOV T19.X, T8.X,
; EG-NEXT: MOV * T19.Z, T4.X, BS:VEC_120/SCL_212
;
-; GFX12-LABEL: constant_sextload_v16i8_to_v16i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_lshr_b32 s2, s6, 16
-; GFX12-NEXT: s_lshr_b32 s3, s7, 16
-; GFX12-NEXT: s_ashr_i32 s14, s7, 24
-; GFX12-NEXT: s_bfe_i32 s15, s7, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s7, s7
-; GFX12-NEXT: s_ashr_i32 s16, s6, 24
-; GFX12-NEXT: s_bfe_i32 s17, s6, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s6, s6
-; GFX12-NEXT: s_lshr_b32 s8, s4, 16
-; GFX12-NEXT: s_lshr_b32 s9, s5, 16
-; GFX12-NEXT: s_ashr_i32 s10, s5, 16
-; GFX12-NEXT: s_bfe_i32 s11, s5, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s5, s5
-; GFX12-NEXT: s_ashr_i32 s12, s4, 24
-; GFX12-NEXT: s_bfe_i32 s13, s4, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s4, s4
-; GFX12-NEXT: s_bfe_i32 s3, s3, 0x80000
-; GFX12-NEXT: s_lshr_b32 s7, s7, 8
-; GFX12-NEXT: s_bfe_i32 s2, s2, 0x80000
-; GFX12-NEXT: s_lshr_b32 s6, s6, 8
-; GFX12-NEXT: s_lshr_b32 s10, s10, 8
-; GFX12-NEXT: s_bfe_i32 s9, s9, 0x80000
-; GFX12-NEXT: s_lshr_b32 s5, s5, 8
-; GFX12-NEXT: s_bfe_i32 s8, s8, 0x80000
-; GFX12-NEXT: s_lshr_b32 s4, s4, 8
-; GFX12-NEXT: s_pack_ll_b32_b16 s3, s3, s14
-; GFX12-NEXT: s_pack_ll_b32_b16 s7, s15, s7
-; GFX12-NEXT: s_pack_ll_b32_b16 s6, s17, s6
-; GFX12-NEXT: s_pack_ll_b32_b16 s2, s2, s16
-; GFX12-NEXT: s_pack_ll_b32_b16 s9, s9, s10
-; GFX12-NEXT: s_pack_ll_b32_b16 s5, s11, s5
-; GFX12-NEXT: s_pack_ll_b32_b16 s8, s8, s12
-; GFX12-NEXT: s_pack_ll_b32_b16 s4, s13, s4
-; GFX12-NEXT: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v1, s2
-; GFX12-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v3, s3
-; GFX12-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v5, s8
-; GFX12-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v7, s9
-; GFX12-NEXT: v_mov_b32_e32 v6, s5
-; GFX12-NEXT: s_clause 0x1
-; GFX12-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16
-; GFX12-NEXT: global_store_b128 v8, v[4:7], s[0:1]
-; GFX12-NEXT: s_endpgm
+; GFX12-TRUE16-LABEL: constant_sextload_v16i8_to_v16i16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_load_b128 s[4:7], s[2:3], 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_lshr_b32 s2, s6, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s3, s7, 16
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s15, s7
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s17, s6
+; GFX12-TRUE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX12-TRUE16-NEXT: s_ashr_i32 s10, s5, 16
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s11, s5
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s13, s4
+; GFX12-TRUE16-NEXT: s_ashr_i32 s14, s7, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s7, s7, 0x80000
+; GFX12-TRUE16-NEXT: s_ashr_i32 s16, s6, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s6, s6, 0x80000
+; GFX12-TRUE16-NEXT: s_bfe_i32 s3, s3, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s15, s15, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s2, s2, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s17, s17, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s5, s5, 0x80000
+; GFX12-TRUE16-NEXT: s_ashr_i32 s12, s4, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s4, s4, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s9, s9, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s11, s11, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s8, s8, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s13, s13, 8
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s14
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s7, s7, s15
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s6, s17
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s16
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s9, s10
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s5, s11
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s8, s12
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s4, s4, s13
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v1, s2
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v3, s3
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v5, s8
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v7, s9
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX12-TRUE16-NEXT: s_clause 0x1
+; GFX12-TRUE16-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v8, v[4:7], s[0:1]
+; GFX12-TRUE16-NEXT: s_endpgm
+;
+; GFX12-FAKE16-LABEL: constant_sextload_v16i8_to_v16i16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_load_b128 s[4:7], s[2:3], 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_lshr_b32 s2, s6, 16
+; GFX12-FAKE16-NEXT: s_lshr_b32 s3, s7, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s14, s7, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s15, s7, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s7, s7
+; GFX12-FAKE16-NEXT: s_ashr_i32 s16, s6, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s17, s6, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s6, s6
+; GFX12-FAKE16-NEXT: s_lshr_b32 s8, s4, 16
+; GFX12-FAKE16-NEXT: s_lshr_b32 s9, s5, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s10, s5, 16
+; GFX12-FAKE16-NEXT: s_bfe_i32 s11, s5, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s5, s5
+; GFX12-FAKE16-NEXT: s_ashr_i32 s12, s4, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s13, s4, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s4, s4
+; GFX12-FAKE16-NEXT: s_bfe_i32 s3, s3, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s7, s7, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s2, s2, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s6, s6, 8
+; GFX12-FAKE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s9, s9, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s5, s5, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s8, s8, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s4, s4, 8
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s3, s14
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s15, s7
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s17, s6
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s16
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s9, s10
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s11, s5
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s8, s12
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s13, s4
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v1, s2
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v3, s3
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v5, s8
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v7, s9
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, s5
+; GFX12-FAKE16-NEXT: s_clause 0x1
+; GFX12-FAKE16-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16
+; GFX12-FAKE16-NEXT: global_store_b128 v8, v[4:7], s[0:1]
+; GFX12-FAKE16-NEXT: s_endpgm
%load = load <16 x i8>, ptr addrspace(4) %in
%ext = sext <16 x i8> %load to <16 x i16>
store <16 x i16> %ext, ptr addrspace(1) %out
@@ -12537,94 +12583,183 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i16(ptr addrspace(1) %o
; EG-NEXT: MOV T35.X, T24.X,
; EG-NEXT: MOV * T35.Z, T20.X, BS:VEC_120/SCL_212
;
-; GFX12-LABEL: constant_sextload_v32i8_to_v32i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_lshr_b32 s17, s1, 16
-; GFX12-NEXT: s_ashr_i32 s18, s1, 16
-; GFX12-NEXT: s_lshr_b32 s12, s4, 16
-; GFX12-NEXT: s_lshr_b32 s18, s18, 8
-; GFX12-NEXT: s_bfe_i32 s17, s17, 0x80000
-; GFX12-NEXT: s_bfe_i32 s19, s1, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s1, s1
-; GFX12-NEXT: s_pack_ll_b32_b16 s17, s17, s18
-; GFX12-NEXT: s_ashr_i32 s18, s4, 24
-; GFX12-NEXT: s_bfe_i32 s12, s12, 0x80000
-; GFX12-NEXT: s_lshr_b32 s1, s1, 8
-; GFX12-NEXT: s_pack_ll_b32_b16 s12, s12, s18
-; GFX12-NEXT: s_sext_i32_i16 s18, s4
-; GFX12-NEXT: s_pack_ll_b32_b16 s1, s19, s1
-; GFX12-NEXT: s_bfe_i32 s4, s4, 0x80000
-; GFX12-NEXT: s_lshr_b32 s18, s18, 8
-; GFX12-NEXT: s_ashr_i32 s19, s7, 16
-; GFX12-NEXT: s_pack_ll_b32_b16 s4, s4, s18
-; GFX12-NEXT: s_lshr_b32 s18, s19, 8
-; GFX12-NEXT: s_sext_i32_i16 s19, s7
-; GFX12-NEXT: s_lshr_b32 s11, s7, 16
-; GFX12-NEXT: s_bfe_i32 s7, s7, 0x80000
-; GFX12-NEXT: s_lshr_b32 s19, s19, 8
-; GFX12-NEXT: s_lshr_b32 s10, s6, 16
-; GFX12-NEXT: s_bfe_i32 s11, s11, 0x80000
-; GFX12-NEXT: s_pack_ll_b32_b16 s7, s7, s19
-; GFX12-NEXT: s_sext_i32_i16 s19, s6
-; GFX12-NEXT: s_lshr_b32 s13, s5, 16
-; GFX12-NEXT: s_ashr_i32 s26, s5, 24
-; GFX12-NEXT: s_bfe_i32 s27, s5, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s5, s5
-; GFX12-NEXT: s_lshr_b32 s14, s2, 16
-; GFX12-NEXT: s_lshr_b32 s15, s3, 16
-; GFX12-NEXT: s_ashr_i32 s22, s3, 16
-; GFX12-NEXT: s_bfe_i32 s23, s3, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s3, s3
-; GFX12-NEXT: s_ashr_i32 s24, s2, 24
-; GFX12-NEXT: s_bfe_i32 s25, s2, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s2, s2
-; GFX12-NEXT: s_pack_ll_b32_b16 s11, s11, s18
-; GFX12-NEXT: s_ashr_i32 s18, s6, 24
-; GFX12-NEXT: s_bfe_i32 s6, s6, 0x80000
-; GFX12-NEXT: s_lshr_b32 s19, s19, 8
-; GFX12-NEXT: s_bfe_i32 s10, s10, 0x80000
-; GFX12-NEXT: s_lshr_b32 s16, s0, 16
-; GFX12-NEXT: s_ashr_i32 s20, s0, 24
-; GFX12-NEXT: s_bfe_i32 s21, s0, 0x80000
-; GFX12-NEXT: s_sext_i32_i16 s0, s0
-; GFX12-NEXT: s_bfe_i32 s13, s13, 0x80000
-; GFX12-NEXT: s_lshr_b32 s5, s5, 8
-; GFX12-NEXT: s_lshr_b32 s22, s22, 8
-; GFX12-NEXT: s_bfe_i32 s15, s15, 0x80000
-; GFX12-NEXT: s_lshr_b32 s3, s3, 8
-; GFX12-NEXT: s_bfe_i32 s14, s14, 0x80000
-; GFX12-NEXT: s_lshr_b32 s2, s2, 8
-; GFX12-NEXT: s_pack_ll_b32_b16 s6, s6, s19
-; GFX12-NEXT: s_pack_ll_b32_b16 s10, s10, s18
-; GFX12-NEXT: s_bfe_i32 s16, s16, 0x80000
-; GFX12-NEXT: s_lshr_b32 s0, s0, 8
-; GFX12-NEXT: s_pack_ll_b32_b16 s13, s13, s26
-; GFX12-NEXT: s_pack_ll_b32_b16 s5, s27, s5
-; GFX12-NEXT: v_dual_mov_b32 v16, 0 :: v_dual_mov_b32 v1, s10
-; GFX12-NEXT: s_pack_ll_b32_b16 s15, s15, s22
-; GFX12-NEXT: s_pack_ll_b32_b16 s3, s23, s3
-; GFX12-NEXT: s_pack_ll_b32_b16 s14, s14, s24
-; GFX12-NEXT: s_pack_ll_b32_b16 s2, s25, s2
-; GFX12-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v3, s11
-; GFX12-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v5, s12
-; GFX12-NEXT: s_pack_ll_b32_b16 s16, s16, s20
-; GFX12-NEXT: s_pack_ll_b32_b16 s0, s21, s0
-; GFX12-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v7, s13
-; GFX12-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v9, s14
-; GFX12-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v11, s15
-; GFX12-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v13, s16
-; GFX12-NEXT: v_dual_mov_b32 v12, s0 :: v_dual_mov_b32 v15, s17
-; GFX12-NEXT: v_mov_b32_e32 v14, s1
-; GFX12-NEXT: s_clause 0x3
-; GFX12-NEXT: global_store_b128 v16, v[0:3], s[8:9] offset:48
-; GFX12-NEXT: global_store_b128 v16, v[4:7], s[8:9] offset:32
-; GFX12-NEXT: global_store_b128 v16, v[8:11], s[8:9] offset:16
-; GFX12-NEXT: global_store_b128 v16, v[12:15], s[8:9]
-; GFX12-NEXT: s_endpgm
+; GFX12-TRUE16-LABEL: constant_sextload_v32i8_to_v32i16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: s_lshr_b32 s17, s1, 16
+; GFX12-TRUE16-NEXT: s_ashr_i32 s18, s1, 16
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s19, s1
+; GFX12-TRUE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX12-TRUE16-NEXT: s_bfe_i32 s1, s1, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s18, s18, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s17, s17, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s19, s19, 8
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s17, s17, s18
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s1, s1, s19
+; GFX12-TRUE16-NEXT: s_ashr_i32 s18, s4, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s12, s12, 0x80000
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s19, s4
+; GFX12-TRUE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s12, s12, s18
+; GFX12-TRUE16-NEXT: s_lshr_b32 s18, s19, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s4, s4, 0x80000
+; GFX12-TRUE16-NEXT: s_ashr_i32 s19, s7, 16
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s4, s4, s18
+; GFX12-TRUE16-NEXT: s_lshr_b32 s18, s19, 8
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s19, s7
+; GFX12-TRUE16-NEXT: s_bfe_i32 s11, s11, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s19, s19, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s7, s7, 0x80000
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s11, s18
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s18, s6
+; GFX12-TRUE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s27, s5
+; GFX12-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX12-TRUE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX12-TRUE16-NEXT: s_ashr_i32 s22, s3, 16
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s23, s3
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s25, s2
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s7, s7, s19
+; GFX12-TRUE16-NEXT: s_ashr_i32 s19, s6, 24
+; GFX12-TRUE16-NEXT: s_lshr_b32 s18, s18, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s6, s6, 0x80000
+; GFX12-TRUE16-NEXT: s_bfe_i32 s10, s10, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX12-TRUE16-NEXT: s_sext_i32_i16 s21, s0
+; GFX12-TRUE16-NEXT: s_ashr_i32 s26, s5, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s5, s5, 0x80000
+; GFX12-TRUE16-NEXT: s_bfe_i32 s13, s13, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s27, s27, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s3, s3, 0x80000
+; GFX12-TRUE16-NEXT: s_ashr_i32 s24, s2, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s2, s2, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s22, s22, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s15, s15, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s23, s23, 8
+; GFX12-TRUE16-NEXT: s_bfe_i32 s14, s14, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s25, s25, 8
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s6, s18
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s10, s19
+; GFX12-TRUE16-NEXT: s_ashr_i32 s20, s0, 24
+; GFX12-TRUE16-NEXT: s_bfe_i32 s0, s0, 0x80000
+; GFX12-TRUE16-NEXT: s_bfe_i32 s16, s16, 0x80000
+; GFX12-TRUE16-NEXT: s_lshr_b32 s21, s21, 8
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s13, s13, s26
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s5, s27
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v16, 0 :: v_dual_mov_b32 v1, s10
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s15, s15, s22
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s3, s3, s23
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s14, s14, s24
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s25
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v3, s11
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v5, s12
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s16, s16, s20
+; GFX12-TRUE16-NEXT: s_pack_ll_b32_b16 s0, s0, s21
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v7, s13
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v9, s14
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v11, s15
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v13, s16
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v12, s0 :: v_dual_mov_b32 v15, s17
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v14, s1
+; GFX12-TRUE16-NEXT: s_clause 0x3
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[0:3], s[8:9] offset:48
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[4:7], s[8:9] offset:32
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[8:11], s[8:9] offset:16
+; GFX12-TRUE16-NEXT: global_store_b128 v16, v[12:15], s[8:9]
+; GFX12-TRUE16-NEXT: s_endpgm
+;
+; GFX12-FAKE16-LABEL: constant_sextload_v32i8_to_v32i16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: s_lshr_b32 s17, s1, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s18, s1, 16
+; GFX12-FAKE16-NEXT: s_lshr_b32 s12, s4, 16
+; GFX12-FAKE16-NEXT: s_lshr_b32 s18, s18, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s17, s17, 0x80000
+; GFX12-FAKE16-NEXT: s_bfe_i32 s19, s1, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s1, s1
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s17, s17, s18
+; GFX12-FAKE16-NEXT: s_ashr_i32 s18, s4, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s12, s12, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s1, s1, 8
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s12, s12, s18
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s18, s4
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s1, s19, s1
+; GFX12-FAKE16-NEXT: s_bfe_i32 s4, s4, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s18, s18, 8
+; GFX12-FAKE16-NEXT: s_ashr_i32 s19, s7, 16
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s4, s18
+; GFX12-FAKE16-NEXT: s_lshr_b32 s18, s19, 8
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s19, s7
+; GFX12-FAKE16-NEXT: s_lshr_b32 s11, s7, 16
+; GFX12-FAKE16-NEXT: s_bfe_i32 s7, s7, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s19, s19, 8
+; GFX12-FAKE16-NEXT: s_lshr_b32 s10, s6, 16
+; GFX12-FAKE16-NEXT: s_bfe_i32 s11, s11, 0x80000
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s7, s19
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s19, s6
+; GFX12-FAKE16-NEXT: s_lshr_b32 s13, s5, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s26, s5, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s27, s5, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s5, s5
+; GFX12-FAKE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX12-FAKE16-NEXT: s_lshr_b32 s15, s3, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s22, s3, 16
+; GFX12-FAKE16-NEXT: s_bfe_i32 s23, s3, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s3, s3
+; GFX12-FAKE16-NEXT: s_ashr_i32 s24, s2, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s25, s2, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s2, s2
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s11, s18
+; GFX12-FAKE16-NEXT: s_ashr_i32 s18, s6, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s6, s6, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s19, s19, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s10, s10, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX12-FAKE16-NEXT: s_ashr_i32 s20, s0, 24
+; GFX12-FAKE16-NEXT: s_bfe_i32 s21, s0, 0x80000
+; GFX12-FAKE16-NEXT: s_sext_i32_i16 s0, s0
+; GFX12-FAKE16-NEXT: s_bfe_i32 s13, s13, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s5, s5, 8
+; GFX12-FAKE16-NEXT: s_lshr_b32 s22, s22, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s15, s15, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s3, s3, 8
+; GFX12-FAKE16-NEXT: s_bfe_i32 s14, s14, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s2, s2, 8
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s6, s19
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s10, s18
+; GFX12-FAKE16-NEXT: s_bfe_i32 s16, s16, 0x80000
+; GFX12-FAKE16-NEXT: s_lshr_b32 s0, s0, 8
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s13, s13, s26
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s27, s5
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v16, 0 :: v_dual_mov_b32 v1, s10
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s15, s15, s22
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s3, s23, s3
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s14, s14, s24
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s25, s2
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v3, s11
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v5, s12
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s16, s16, s20
+; GFX12-FAKE16-NEXT: s_pack_ll_b32_b16 s0, s21, s0
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v7, s13
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v9, s14
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v11, s15
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v13, s16
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v12, s0 :: v_dual_mov_b32 v15, s17
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v14, s1
+; GFX12-FAKE16-NEXT: s_clause 0x3
+; GFX12-FAKE16-NEXT: global_store_b128 v16, v[0:3], s[8:9] offset:48
+; GFX12-FAKE16-NEXT: global_store_b128 v16, v[4:7], s[8:9] offset:32
+; GFX12-FAKE16-NEXT: global_store_b128 v16, v[8:11], s[8:9] offset:16
+; GFX12-FAKE16-NEXT: global_store_b128 v16, v[12:15], s[8:9]
+; GFX12-FAKE16-NEXT: s_endpgm
%load = load <32 x i8>, ptr addrspace(4) %in
%ext = sext <32 x i8> %load to <32 x i16>
store <32 x i16> %ext, ptr addrspace(1) %out
diff --git a/llvm/test/CodeGen/AMDGPU/select.f16.ll b/llvm/test/CodeGen/AMDGPU/select.f16.ll
index 4aca4298f1915c..03ec19e1e2ad64 100644
--- a/llvm/test/CodeGen/AMDGPU/select.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/select.f16.ll
@@ -830,10 +830,10 @@ define amdgpu_kernel void @select_v2f16(
; GFX11-TRUE16-NEXT: s_mov_b32 s23, s3
; GFX11-TRUE16-NEXT: s_mov_b32 s18, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s19, s3
-; GFX11-TRUE16-NEXT: s_mov_b32 s26, s2
-; GFX11-TRUE16-NEXT: s_mov_b32 s27, s3
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s3
+; GFX11-TRUE16-NEXT: s_mov_b32 s26, s2
+; GFX11-TRUE16-NEXT: s_mov_b32 s27, s3
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s20, s12
; GFX11-TRUE16-NEXT: s_mov_b32 s21, s13
@@ -843,24 +843,24 @@ define amdgpu_kernel void @select_v2f16(
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s24, s14
; GFX11-TRUE16-NEXT: s_mov_b32 s25, s15
-; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[24:27], 0
-; GFX11-TRUE16-NEXT: buffer_load_b32 v3, off, s[4:7], 0
+; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[4:7], 0
+; GFX11-TRUE16-NEXT: buffer_load_b32 v3, off, s[24:27], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, s9
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v5.l, v4.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v3.l, v2.l, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v1.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v5.l, v4.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v3.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s8
-; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v6.l, v7.l, vcc_lo
+; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16:
@@ -1022,17 +1022,17 @@ define amdgpu_kernel void @select_v2f16_imm_a(
; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0.5, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, 0.5, v0.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, 0x3900, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0x3900, v3.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v1.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s4
-; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16_imm_a:
@@ -1187,17 +1187,17 @@ define amdgpu_kernel void @select_v2f16_imm_b(
; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0.5, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e64 s0, 0.5, v0.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e64 s0, 0x3900, v3.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, v1.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.l, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0x3900, v3.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v1.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s4
-; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v4.l, vcc_lo
+; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16_imm_b:
@@ -1346,6 +1346,8 @@ define amdgpu_kernel void @select_v2f16_imm_c(
; GFX11-TRUE16-NEXT: s_mov_b32 s19, s3
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s3
+; GFX11-TRUE16-NEXT: s_mov_b32 s22, s2
+; GFX11-TRUE16-NEXT: s_mov_b32 s23, s3
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s16, s8
; GFX11-TRUE16-NEXT: s_mov_b32 s17, s9
@@ -1353,23 +1355,24 @@ define amdgpu_kernel void @select_v2f16_imm_c(
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s7
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[16:19], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, s10
-; GFX11-TRUE16-NEXT: s_mov_b32 s13, s11
+; GFX11-TRUE16-NEXT: s_mov_b32 s20, s10
+; GFX11-TRUE16-NEXT: s_mov_b32 s21, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
-; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], 0
+; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[20:23], 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e64 s0, v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x3800, v2.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x3900, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v4.l, v3.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x3800, v2.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s4
-; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x3900, v5.l, vcc_lo
+; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16_imm_c:
@@ -1518,6 +1521,8 @@ define amdgpu_kernel void @select_v2f16_imm_d(
; GFX11-TRUE16-NEXT: s_mov_b32 s19, s3
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s3
+; GFX11-TRUE16-NEXT: s_mov_b32 s22, s2
+; GFX11-TRUE16-NEXT: s_mov_b32 s23, s3
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s16, s8
; GFX11-TRUE16-NEXT: s_mov_b32 s17, s9
@@ -1525,23 +1530,24 @@ define amdgpu_kernel void @select_v2f16_imm_d(
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s7
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[16:19], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s12, s10
-; GFX11-TRUE16-NEXT: s_mov_b32 s13, s11
+; GFX11-TRUE16-NEXT: s_mov_b32 s20, s10
+; GFX11-TRUE16-NEXT: s_mov_b32 s21, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s1, s5
-; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], 0
+; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[20:23], 0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v1.l, v0.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v4.l, v3.l
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x3800, v2.l, vcc_lo
-; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x3900, v0.l, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v4.l, v3.l
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x3800, v2.l, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s0, s4
-; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x3900, v5.l, vcc_lo
+; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: select_v2f16_imm_d:
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