[llvm] [AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairing (PR #218950)

[Kieran B via llvm-commits]

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@@ -2829,6 +2917,11 @@ bool AArch64FrameLowering::assignCalleeSavedSpillSlots(
       CSI.push_back(VGInfo);
   }
 
+  if (!IsWindows)
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kieroxide wrote:

Windows stack allocation has different behaviour and was skipped to keep changes minimal. Windows does support pairings when we don't need WinCFI so it can be added in this or a subsequent PR if appropriate. 

https://github.com/llvm/llvm-project/pull/218950