[llvm] [AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairing (PR #218950)
Kieran B via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 26 08:17:16 PDT 2026
================
@@ -1828,7 +1828,7 @@ void computeCalleeSaveRegisterPairs(const AArch64FrameLowering &AFL,
case RegPairInfo::PPR:
break;
case RegPairInfo::ZPR:
- if (AFI->getPredicateRegForFillSpill() != 0 &&
+ if (!NeedsWinCFI && AFI->getPredicateRegForFillSpill() != 0 &&
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kieroxide wrote:
This condition was added WinCFI pairings are not supported and was a missing conditional
https://github.com/llvm/llvm-project/pull/218950
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