[llvm] [AArch64][SVE] Support copy of PPR2 register class in copyPhysReg (PR #216303)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 25 02:33:17 PDT 2026
================
@@ -5742,36 +5742,36 @@ static const MachineInstrBuilder &AddSubReg(const MachineInstrBuilder &MIB,
}
static bool forwardCopyWillClobberTuple(unsigned DestReg, unsigned SrcReg,
- unsigned NumRegs) {
- // We really want the positive remainder mod 32 here, that happens to be
+ unsigned NumRegs, bool IsPred) {
+ // We really want the positive remainder mod 16/32 here, that happens to be
// easily obtainable with a mask.
- return ((DestReg - SrcReg) & 0x1f) < NumRegs;
+ unsigned MaxRegs = IsPred ? 0xf : 0x1f;
----------------
sdesmalen-arm wrote:
I was hoping we could use something like `getLargestLegalSuperClass`, but maybe that won't work. An alternative way to make this more generic would be to implement a little loop that checks if there's any overlap between any of the registers using `TRI->regsOverlap()`, but that's more compute intensive. So, the current approach is actually fine.
nit: instead of passing `IsPred`, can you pass `unsigned MaxRegs` directly (and also initialise it with `15` or `31` (instead of `0xf` and `0x1f`)
another nit: this function only has a single use, it could just be inlined and named `ForwardCopyWillClobberTuple = ...`
https://github.com/llvm/llvm-project/pull/216303
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